From 073e14abe5a245aedb40c966a71b3f93f6cb761e Mon Sep 17 00:00:00 2001
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Date: Fri, 4 Apr 2025 07:10:00 +0300
Subject: [PATCH] airoha64: keep uart/spi/spinand/emmc dts nodes for
u-boot-spl/tpl needs
---
airoha/dts/en7581-base.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/airoha/dts/en7581-base.dtsi b/airoha/dts/en7581-base.dtsi
index 343984d5b..3a975a599 100644
--- a/airoha/dts/en7581-base.dtsi
+++ b/airoha/dts/en7581-base.dtsi
@@ -389,6 +389,7 @@
};
scu: scu@1fb00000 {
+ bootph-all;
compatible = "econet,ecnt-scu";
// ------------------------------------------------------------
// WARNING:
@@ -641,6 +642,7 @@
};
uart1: serial@1fbf0000 {
+ bootph-all;
compatible = "airoha,en7523-uart";
reg = <0x0 0x1fbf0000 0x0 0x30>;
reg-io-width = <4>;
@@ -746,6 +748,7 @@
};
spi_ctrl: spi_controller@1fa10000 {
+ bootph-all;
compatible = "econet,en75xx-spi";
#address-cells = <1>;
#size-cells = <0>;
@@ -758,6 +761,7 @@
spi-ecc = <&spi_ecc>;
spinand@0 {
+ bootph-all;
compatible = "spi-nand";
reg = <0x0>; // Chip select
spi-tx-bus-width = <2>;
@@ -767,11 +771,13 @@
};
spi_spi2nfi: spi_spi2nfi@1fa11000 {
+ bootph-all;
compatible = "econet,ecnt-spi2nfi";
reg = <0x0 0x1fa11000 0x0 0x160>; //NFI2SPI
};
spi_ecc: spi_ecc@1fa12000 {
+ bootph-all;
compatible = "econet,ecnt-spi_ecc";
reg = <0x0 0x1fa12000 0x0 0x150>; //NFI ECC
};
@@ -1003,6 +1009,7 @@
};
mmc0: mmc@1fa0e000 {
+ bootph-all;
compatible = "airoha,an758x-mmc";
reg = <0x0 0x1fa0e000 0x0 0x1000>,
<0x0 0x1fa0c000 0x0 0x60>;
--
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