diff --git a/iopsys-ramips/Makefile b/iopsys-ramips/Makefile
index 52cca36be93528e850e08e97188ba6a78cddb4bb..d2f14b7bda57dbc20501a6079070a4d5178c7430 100644
--- a/iopsys-ramips/Makefile
+++ b/iopsys-ramips/Makefile
@@ -1,26 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0-only
 #
 # Copyright (C) 2008-2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
+
 include $(TOPDIR)/rules.mk
 
 ARCH:=mipsel
 BOARD:=iopsys-ramips
-BOARDNAME:=Iopsys MediaTek Ralink MIPS
-SUBTARGETS:=mt7621 mt7620 mt76x8 rt288x rt305x rt3883
+BOARDNAME:=IOPSYS MediaTek Ralink MIPS
+SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883
 FEATURES:=squashfs gpio ubifs
-MAINTAINER:=John Crispin <john@phrozen.org>
 
-KERNEL_PATCHVER:=4.14
+KERNEL_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.4
 
 define Target/Description
 	Build firmware images for Ralink RT288x/RT3xxx based boards.
 endef
 
 include $(INCLUDE_DIR)/target.mk
-DEFAULT_PACKAGES += \
-	kmod-leds-gpio kmod-gpio-button-hotplug swconfig
+DEFAULT_PACKAGES += kmod-leds-gpio kmod-gpio-button-hotplug
 
 $(eval $(call BuildTarget))
diff --git a/iopsys-ramips/base-files/etc/inittab b/iopsys-ramips/base-files/etc/inittab
new file mode 100644
index 0000000000000000000000000000000000000000..9820e7144bed618f1375661f4e413f1b4979b584
--- /dev/null
+++ b/iopsys-ramips/base-files/etc/inittab
@@ -0,0 +1,3 @@
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K shutdown
+::askconsole:/usr/libexec/login.sh
diff --git a/iopsys-ramips/base-files/etc/uci-defaults/04_led_migration b/iopsys-ramips/base-files/etc/uci-defaults/04_led_migration
new file mode 100644
index 0000000000000000000000000000000000000000..161b79dac458bbd5e75e5515952287f48d7d10f5
--- /dev/null
+++ b/iopsys-ramips/base-files/etc/uci-defaults/04_led_migration
@@ -0,0 +1,8 @@
+. /lib/functions.sh
+. /lib/functions/migrations.sh
+
+remove_devicename_leds "rt2800soc-phy0" "rt2800pci-phy0"
+
+migrations_apply system
+
+exit 0
diff --git a/iopsys-ramips/dts/11ACNAS.dts b/iopsys-ramips/dts/11ACNAS.dts
deleted file mode 100644
index 2b1556696854c78814d484b9db3a9923ea74ab93..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/11ACNAS.dts
+++ /dev/null
@@ -1,24 +0,0 @@
-/dts-v1/;
-
-#include "W2914NSV2.dtsi"
-
-/ {
-	compatible = "wevo,11acnas", "wevo,w2914ns-v2", "mediatek,mt7621-soc";
-	model = "WeVO 11AC NAS Router";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		usb {
-			label = "11acnas:green:usb";
-			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
-			linux,default-trigger = "usbport";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/AC1200RM.dts b/iopsys-ramips/dts/AC1200RM.dts
deleted file mode 100644
index 388b088d927f3d0f14a7ede15cbaaa13cb3a74e8..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/AC1200RM.dts
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    1. Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *    2. Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *    3. Neither the names of the copyright holders nor the names of any
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "alfa-network,ac1200rm", "ralink,mt7620a-soc";
-	model = "ALFA Network AC1200RM";
-
-	aliases {
-		led-boot = &led_wps;
-		led-failsafe = &led_wps;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		wlan2g {
-			label = "ac1200rm:green:wlan2g";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-		};
-
-		led_wps: wps {
-			label = "ac1200rm:green:wps";
-			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x28>;
-	mediatek,portmap = "llllw";
-	pinctrl-names = "default";
-	pinctrl-0 = <&ephy_pins>;
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&gsw {
-	mediatek,port4 = "ephy";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-
-		led {
-			led-sources = <2>;
-			led-active-low;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "nd_sd", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x1000>;
-			};
-
-			partition@31000 {
-				label = "config";
-				reg = <0x31000 0xf000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
diff --git a/iopsys-ramips/dts/AWUSFREE1.dts b/iopsys-ramips/dts/AWUSFREE1.dts
deleted file mode 100644
index 4e5ce1cc7b29608d23284ab7a6bd86df48d326db..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/AWUSFREE1.dts
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    1. Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *    2. Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *    3. Neither the names of the copyright holders nor the names of any
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "mt7628an.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "alfa-network,awusfree1", "mediatek,mt7628an-soc";
-	model = "ALFA Network AWUSFREE1";
-
-	aliases {
-		led-boot = &led_system;
-		led-failsafe = &led_system;
-		led-running = &led_system;
-		led-upgrade = &led_system;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_system: system {
-			label = "awusfree1:orange:system";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "awusfree1:blue:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-};
-
-&ehci {
-	status = "disabled";
-};
-
-&esw {
-	mediatek,portdisable = <0x1e>;
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x2e>;
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&ohci {
-	status = "disabled";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-
-		ext_lna {
-			ralink,group = "uart1";
-			ralink,function = "sw_r";
-		};
-
-		ext_pa {
-			ralink,group = "i2s";
-			ralink,function = "antenna";
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x1000>;
-			};
-
-			partition@31000 {
-				label = "config";
-				reg = <0x31000 0xf000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0x7b0000>;
-			};
-		};
-	};
-};
-
-&wmac {
-	status = "okay";
-	mediatek,mtd-eeprom = <&factory 0x0>;
-};
diff --git a/iopsys-ramips/dts/ArcherC20v1.dts b/iopsys-ramips/dts/ArcherC20v1.dts
deleted file mode 100644
index 7add5698865f89949baea4bb4429708a32fc2799..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/ArcherC20v1.dts
+++ /dev/null
@@ -1,201 +0,0 @@
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "tplink,c20-v1", "ralink,mt7620a-soc";
-	model = "TP-Link Archer C20 v1";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "c20-v1:blue:lan";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "c20-v1:blue:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-			default-state = "keep";
-		};
-
-		usb {
-			label = "c20-v1:blue:usb";
-			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wan {
-			label = "c20-v1:blue:wan";
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-		};
-
-		wan_orange {
-			label = "c20-v1:orange:wan";
-			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-		};
-
-		wlan5g {
-			label = "c20-v1:blue:wlan5g";
-			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-
-		wlan2g {
-			label = "c20-v1:blue:wlan2g";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
-
-		wps {
-			label = "c20-v1:blue:wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x20000>;
-				read-only;
-			};
-
-			partition@20000 {
-				compatible = "tplink,firmware";
-				label = "firmware";
-				reg = <0x20000 0x7a0000>;
-			};
-
-			partition@7c0000 {
-				label = "config";
-				reg = <0x7c0000 0x10000>;
-				read-only;
-			};
-
-			rom: partition@7d0000 {
-				label = "rom";
-				reg = <0x7d0000 0x10000>;
-				read-only;
-			};
-
-			partition@7e0000 {
-				label = "romfile";
-				reg = <0x7e0000 0x10000>;
-				read-only;
-			};
-
-			radio: partition@7f0000 {
-				label = "radio";
-				reg = <0x7f0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-		pinctrl-names = "default";
-		mtd-mac-address = <&rom 0xf100>;
-		mediatek,portmap = "wllll";
-	};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&gsw {
-	mediatek,port4 = "ephy";
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&radio 0>;
-	mtd-mac-address = <&rom 0xf100>;
-	mtd-mac-address-increment = <(-2)>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pa_pins>;
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&rom 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/ArcherC20v4.dts b/iopsys-ramips/dts/ArcherC20v4.dts
deleted file mode 100644
index b2a1591df98d5633849f574326101ca38df5150b..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/ArcherC20v4.dts
+++ /dev/null
@@ -1,107 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "tplink,c20-v4", "mediatek,mt7628an-soc";
-	model = "TP-Link Archer C20 v4";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "c20-v4:green:lan";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "c20-v4:green:power";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "c20-v4:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "c20-v4:orange:wan";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan5g {
-			label = "c20-v4:green:wlan5g";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
-
-		wlan2g {
-			label = "c20-v4:green:wlan2g";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-
-		wps {
-			label = "c20-v4:green:wps";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-};
-
-&wmac {
-	mtd-mac-address-increment = <(-2)>;
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2s", "gpio", "refclk", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x28000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&factory 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/ArcherC50.dts b/iopsys-ramips/dts/ArcherC50.dts
deleted file mode 100644
index 3c9f4d772902f2677e467d24573ca101e6af5119..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/ArcherC50.dts
+++ /dev/null
@@ -1,200 +0,0 @@
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "tplink,c50", "ralink,mt7620a-soc";
-	model = "TP-Link Archer C50";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "c50:green:lan";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "c50:green:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-			default-state = "on";
-		};
-
-		usb {
-			label = "c50:green:usb";
-			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wan {
-			label = "c50:green:wan";
-			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "c50:orange:wan";
-			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan5g {
-			label = "c50:green:wlan5g";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-
-		wlan2g {
-			label = "c50:green:wlan2g";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
-
-		wps {
-			label = "c50:green:wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};	};
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x20000>;
-				read-only;
-			};
-
-			partition@20000 {
-				compatible = "tplink,firmware";
-				label = "firmware";
-				reg = <0x20000 0x7a0000>;
-			};
-
-			partition@7c0000 {
-				label = "config";
-				reg = <0x7c0000 0x10000>;
-				read-only;
-			};
-
-			rom: partition@7d0000 {
-				label = "rom";
-				reg = <0x7d0000 0x10000>;
-				read-only;
-			};
-
-			partition@7e0000 {
-				label = "romfile";
-				reg = <0x7e0000 0x10000>;
-				read-only;
-			};
-
-			radio: partition@7f0000 {
-				label = "radio";
-				reg = <0x7f0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-		pinctrl-names = "default";
-		mtd-mac-address = <&rom 0xf100>;
-		mediatek,portmap = "wllll";
-	};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&gsw {
-	mediatek,port4 = "ephy";
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&radio 0>;
-	mtd-mac-address = <&rom 0xf100>;
-	mtd-mac-address-increment = <(-2)>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pa_pins>;
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 32768>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&rom 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/ArcherC50V3.dts b/iopsys-ramips/dts/ArcherC50V3.dts
deleted file mode 100644
index 0aa03b814b48f5ff44fbbfcc2a933f067e65eaa7..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/ArcherC50V3.dts
+++ /dev/null
@@ -1,102 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,c50-v3", "mediatek,mt7628an-soc";
-	model = "TP-Link Archer C50 v3";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "c50-v3:green:lan";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "c50-v3:green:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "c50-v3:green:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "c50-v3:orange:wan";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "c50-v3:green:wlan2g";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan5 {
-			label = "c50-v3:green:wlan5g";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "c50-v3:green:wps";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "gpio", "p0led_an", "p1led_an", "p2led_an",
-				       "p3led_an", "p4led_an", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x28000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&factory 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/ArcherC50V4.dts b/iopsys-ramips/dts/ArcherC50V4.dts
deleted file mode 100644
index 37f388620e3bf2cb9fb3f79e036dde0f987a8a5f..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/ArcherC50V4.dts
+++ /dev/null
@@ -1,99 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
-
-#include "TPLINK-8M-SPLIT-UBOOT.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,c50-v4", "mediatek,mt7628an-soc";
-	model = "TP-Link Archer C50 v4";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "c50-v4:green:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan2 {
-			label = "c50-v4:green:wlan2g";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan5 {
-			label = "c50-v4:green:wlan5g";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		lan {
-			label = "c50-v4:green:lan";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "c50-v4:green:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "c50-v4:orange:wan";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "c50-v4:green:wps";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "p0led_an", "p1led_an", "p2led_an",
-				       "p3led_an", "p4led_an", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&rom 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/D240.dts b/iopsys-ramips/dts/D240.dts
deleted file mode 100644
index 2110959ee8ae88740ea0cb27d6e4fa77537c18a9..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/D240.dts
+++ /dev/null
@@ -1,206 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "sanlinking,d240", "ralink,mt7620a-soc";
-	model = "Sanlinking Technologies D240";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	gpio-export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
-
-		power_mpcie2 {
-			gpio-export,name = "power_mpcie2";
-			gpio-export,output = <1>;
-			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
-		};
-
-		power_mpcie1 {
-			gpio-export,name = "power_mpcie1";
-			gpio-export,output = <1>;
-			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "d240:blue:power";
-			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-		};
-
-		usb {
-			label = "d240:blue:usb";
-			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		air {
-			label = "d240:blue:wifi";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	en25q128@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
-
-&sdhci {
-	status = "okay";
-	/* the pins function is already set during pinmux driver load */
-	/delete-property/ pinctrl-0;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
-			ralink,function = "gpio";
-		};
-
-		/*
-		 * The sd function of the nd_sd group configures two of the
-		 * groups pins as gpios. The pins are used as PCIe reset/power.
-		 * Due to the driver load order, the pins are configured way to
-		 * late if triggered by the sd-card driver.
-		 * To not introduce another kind of driver load order
-		 * dependency and configure the pins as early as possible,
-		 * means during pinmux driver load.
-		 */
-		gpio_sd {
-			ralink,group = "nd_sd";
-			ralink,function = "sd";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/EX2700.dts b/iopsys-ramips/dts/EX2700.dts
deleted file mode 100644
index 7d7b2220f773eeb24eb0e22c0b47a9a4f1ebe098..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/EX2700.dts
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Device Tree file for the Netgear EX2700
- *
- * Copyright (C) 2016 Joseph C. Lehner <joseph.c.lehner@gmail.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "netgear,ex2700", "ralink,mt7620a-soc";
-	model = "Netgear EX2700";
-
-	aliases {
-		led-boot = &led_power_green;
-		led-failsafe = &led_power_green;
-		led-running = &led_power_green;
-		led-upgrade = &led_power_green;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power_green: power_g {
-			label = "ex2700:green:power";
-			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
-			default-state = "on";
-		};
-
-		power_r {
-			label = "ex2700:red:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		device_g {
-			label = "ex2700:green:device";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-		};
-
-		device_r {
-			label = "ex2700:red:device";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-		};
-
-		router_g {
-			label = "ex2700:green:router";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
-		};
-
-		router_r {
-			label = "ex2700:red:router";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "ex2700:green:wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-	};
-};
-
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			partition@40000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x40000 0x3b0000>;
-			};
-
-			art: partition@3f0000 {
-				label = "art";
-				reg = <0x3f0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&art 0x0>;
-};
-
-&wmac {
-	mtd-mac-address = <&art 0x6>;
-	ralink,mtd-eeprom = <&art 0x1000>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "spi refclk";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/HC5861B.dts b/iopsys-ramips/dts/HC5861B.dts
deleted file mode 100644
index 5cc2634dcc93567b8a7ced118b338668b8142af4..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/HC5861B.dts
+++ /dev/null
@@ -1,144 +0,0 @@
-/dts-v1/;
-
-#include "mt7628an.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "hiwifi,hc5861b", "mediatek,mt7628an-soc";
-	model = "HiWiFi HC5861B";
-
-	aliases {
-		led-boot = &led_system;
-		led-failsafe = &led_system;
-		led-running = &led_system;
-		led-upgrade = &led_system;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_system: system {
-			label = "hc5861b:green:system";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-		};
-		wlan2g {
-			label = "hc5861b:green:wlan2g";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "refclk", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "hw_panic";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xf70000>;
-			};
-
-			partition@fc0000 {
-				label = "oem";
-				reg = <0xfc0000 0x20000>;
-				read-only;
-			};
-
-			bdinfo: partition@fe0000 {
-				label = "bdinfo";
-				reg = <0xfe0000 0x10000>;
-				read-only;
-			};
-
-			partition@ff0000 {
-				label = "backup";
-				reg = <0xff0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-};
-
-&wmac {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		mtd-mac-address = <&factory 0x2e>;
-		ieee80211-freq-limit = <5000000 6000000>;
-
-		led {
-			led-sources = <2>;
-			led-active-low;
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/NBG-419N2.dts b/iopsys-ramips/dts/NBG-419N2.dts
deleted file mode 100644
index e150eff9e80e571842433973b22daa24ac8d7d10..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/NBG-419N2.dts
+++ /dev/null
@@ -1,130 +0,0 @@
-/dts-v1/;
-
-#include "rt3352.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "zyxel,nbg-419n-v2", "ralink,rt3352-soc";
-	model = "ZyXEL NBG-419N v2";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	palmbus@10000000 {
-		spi@b00 {
-			status = "okay";
-			m25p80@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0 0>;
-				spi-max-frequency = <10000000>;
-
-				partitions {
-					compatible = "fixed-partitions";
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					partition@0 {
-						label = "u-boot";
-						reg = <0x0 0x30000>;
-						read-only;
-					};
-
-					partition@30000 {
-						label = "u-boot-env";
-						reg = <0x30000 0x10000>;
-						read-only;
-					};
-
-					factory: partition@40000 {
-						label = "factory";
-						reg = <0x40000 0x10000>;
-						read-only;
-					};
-
-					partition@50000 {
-						compatible = "denx,uimage";
-						label = "firmware";
-						reg = <0x50000 0x7b0000>;
-					};
-				};
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "nbg-419n2:green:power";
-			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "nbg-419n2:green:wps";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "nbg-419n2:green:usb";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-		reset {
-			label = "reset";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-		wps {
-			label = "wps";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-		rfkill {
-			label = "rfkill";
-			linux,input-type = <EV_SW>;
-			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x28>;
-};
-
-&esw {
-	mediatek,portmap = <0x2f>;
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/OMEGA2.dts b/iopsys-ramips/dts/OMEGA2.dts
deleted file mode 100644
index 25cc818d56929420d66c4fe1ae8c29d96b2db2ad..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/OMEGA2.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-/dts-v1/;
-
-#include "OMEGA2.dtsi"
-
-/ {
-	compatible = "onion,omega2", "mediatek,mt7628an-soc";
-	model = "Onion Omega2";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-};
-
-&firmware {
-	reg = <0x50000 0xfb0000>;
-};
-
-&system_led {
-	label = "omega2:amber:system";
-};
diff --git a/iopsys-ramips/dts/OMEGA2P.dts b/iopsys-ramips/dts/OMEGA2P.dts
deleted file mode 100644
index 53e83772924beff2145bd85b8d1bd73aa8aa8d83..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/OMEGA2P.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-/dts-v1/;
-
-#include "OMEGA2.dtsi"
-
-/ {
-	compatible = "onion,omega2p", "onion,omega2", "mediatek,mt7628an-soc";
-	model = "Onion Omega2+";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-};
-
-&firmware {
-	reg = <0x50000 0x1fb0000>;
-};
-
-&system_led {
-	label = "omega2p:amber:system";
-};
diff --git a/iopsys-ramips/dts/PSG1218A.dts b/iopsys-ramips/dts/PSG1218A.dts
deleted file mode 100644
index 2ae8871d8917619cd548b3e5c12237a52ec1b948..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/PSG1218A.dts
+++ /dev/null
@@ -1,55 +0,0 @@
-/dts-v1/;
-
-#include "PSG1218.dtsi"
-
-/ {
-	compatible = "phicomm,psg1218a", "phicomm,psg1218", "ralink,mt7620a-soc";
-	model = "Phicomm PSG1218 rev.A";
-
-	aliases {
-		led-boot = &led_blue;
-		led-failsafe = &led_blue;
-		led-running = &led_blue;
-		led-upgrade = &led_blue;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		led_blue: blue {
-			label = "psg1218a:blue:status";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-			default-state = "on";
-		};
-
-		yellow {
-			label = "psg1218a:yellow:status";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		red {
-			label = "psg1218a:red:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-	pinctrl-names = "default";
-	pinctrl-0 = <&ephy_pins>;
-	mtd-mac-address = <&factory 0x28>;
-	mediatek,portmap = "llllw";
-};
-
-&wmac {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pa_pins>;
-};
diff --git a/iopsys-ramips/dts/PSG1218B.dts b/iopsys-ramips/dts/PSG1218B.dts
deleted file mode 100644
index f6445e8c449dce1debf3ab759a294a5926277e52..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/PSG1218B.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-/dts-v1/;
-
-#include "PSG1218.dtsi"
-
-/ {
-	compatible = "phicomm,psg1218b", "phicomm,psg1218", "ralink,mt7620a-soc";
-	model = "Phicomm PSG1218 rev.B";
-
-	aliases {
-		led-boot = &led_blue;
-		led-failsafe = &led_blue;
-		led-running = &led_blue;
-		led-upgrade = &led_blue;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		led_blue: blue {
-			label = "psg1218b:blue:status";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-			default-state = "on";
-		};
-
-		yellow {
-			label = "psg1218b:yellow:status";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		red {
-			label = "psg1218b:red:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "pa";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-	pinctrl-names = "default";
-	pinctrl-0 = <&ephy_pins>;
-	mtd-mac-address = <&factory 0x28>;
-	mediatek,portmap = "llllw";
-};
diff --git a/iopsys-ramips/dts/R6120.dts b/iopsys-ramips/dts/R6120.dts
deleted file mode 100644
index d263c7824be7b59f2bb30f624519dda01446ca8e..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/R6120.dts
+++ /dev/null
@@ -1,161 +0,0 @@
-/dts-v1/;
-
-#include "mt7628an.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "netgear,r6120", "mediatek,mt7628an-soc";
-	model = "Netgear R6120";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "r6120:green:lan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "r6120:green:power";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "r6120:green:wlan2g";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan_orange {
-			label = "r6120:orange:wlan2g";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "r6120:green:wan";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "r6120:orange:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	usb-regulator {
-		compatible = "regulator-fixed";
-
-		regulator-name = "USB-power";
-		gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		enable-active-high;
-
-		regulator-always-on;
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "p1led_an", "p2led_an",
-				       "p3led_an", "p4led_an", "wdt",
-				       "wled_an", "uart1";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x40000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x20000>;
-				read-only;
-			};
-
-			partition@60000 {
-				label = "nvram";
-				reg = <0x60000 0x30000>;
-				read-only;
-			};
-
-			partition@90000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x90000 0xf60000>;
-			};
-
-			partition@ff0000 {
-				label = "reserved";
-				reg = <0xff0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&wmac {
-	status = "okay";
-	mtd-mac-address = <&factory 0x4>;
-	mediatek,mtd-eeprom = <&factory 0x0>;
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&factory 0x4>;
-		mtd-mac-address-increment = <(2)>;
-	};
-};
diff --git a/iopsys-ramips/dts/R6220.dtsi b/iopsys-ramips/dts/R6220.dtsi
deleted file mode 100644
index c9268b0caa17893b4cd2de47072489a0fc643b9c..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/R6220.dtsi
+++ /dev/null
@@ -1,125 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "mediatek,mt7621-soc";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-		};
-
-		led_usb: usb {
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
-			linux,default-trigger = "usbport";
-		};
-
-		led_internet: internet {
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-		};
-
-		led_wifi: wifi {
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-
-		led_wps: wps {
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		wps {
-			label = "wps";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-
-		wifi {
-			label = "wifi";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	reg_usb_vbus: regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
-};
-
-&xhci {
-	vbus-supply = <&reg_usb_vbus>;
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "pci14c3,7662";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
-
-&pcie1 {
-	wifi@0,0 {
-		compatible = "pci14c3,7603";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x0000>;
-		ieee80211-freq-limit = <2400000 2500000>;
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x00000004>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "uart2", "jtag", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/RB750Gr3.dts b/iopsys-ramips/dts/RB750Gr3.dts
deleted file mode 100644
index 4a303edddb8d527c95df94084eaec64ceda81bc1..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/RB750Gr3.dts
+++ /dev/null
@@ -1,155 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "mikrotik,rb750gr3", "mediatek,mt7621-soc";
-	model = "MikroTik RouterBOARD 750Gr3";
-
-	aliases {
-		led-boot = &led_usr;
-		led-failsafe = &led_usr;
-		led-running = &led_usr;
-		led-upgrade = &led_usr;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		pwr {
-			label = "rb750gr3:blue:pwr";
-			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
-			default-state = "on";
-		};
-
-		led_usr: usr {
-			label = "rb750gr3:green:usr";
-			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		mode {
-			label = "mode";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-		};
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	beeper {
-		compatible = "gpio-beeper";
-		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
-	};
-
-	gpio_export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
-
-		usb_power {
-			gpio-export,name = "usb_power";
-			gpio-export,output = <1>;
-			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <20000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "RouterBoot";
-				reg = <0x0 0x40000>;
-				read-only;
-				compatible = "fixed-partitions";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				partition@0 {
-					label = "bootloader1";
-					reg = <0x0 0xf000>;
-					read-only;
-				};
-
-				hard_config: partition@f000 {
-					label = "hard_config";
-					reg = <0xf000 0x1000>;
-					read-only;
-				};
-
-				partition@10000 {
-					label = "bootloader2";
-					reg = <0x10000 0xf000>;
-					read-only;
-				};
-
-				partition@20000 {
-					label = "soft_config";
-					reg = <0x20000 0x1000>;
-				};
-
-				partition@30000 {
-					label = "bios";
-					reg = <0x30000 0x1000>;
-					read-only;
-				};
-			};
-
-			partition@40000 {
-				compatible = "mikrotik,minor";
-				label = "firmware";
-				reg = <0x040000 0xfc0000>;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&hard_config 0x0010>;
-	mtd-mac-address-increment = <1>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			/* via gpio7 (uart3 group) the PoE status can be read */
-			ralink,group = "uart2", "uart3", "jtag", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&sdhci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/RBM11G.dts b/iopsys-ramips/dts/RBM11G.dts
deleted file mode 100644
index ce8d7208f11af1f2637915e413c7968cdbe63135..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/RBM11G.dts
+++ /dev/null
@@ -1,168 +0,0 @@
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "mikrotik,rbm11g", "mediatek,mt7621-soc";
-	model = "MikroTik RouterBOARD M11G";
-
-	aliases {
-		led-boot = &led_usr;
-		led-failsafe = &led_usr;
-		led-running = &led_usr;
-		led-upgrade = &led_usr;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_usr: usr {
-			label = "rbm11g:green:usr";
-			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
-		};
-
-		rssi0 {
-			label = "rbm11g:green:rssi0";
-			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
-		};
-
-		rssi1 {
-			label = "rbm11g:green:rssi1";
-			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
-		};
-
-		rssi2 {
-			label = "rbm11g:green:rssi2";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
-		};
-
-		rssi3 {
-			label = "rbm11g:green:rssi3";
-			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
-		};
-
-		rssi4 {
-			label = "rbm11g:green:rssi4";
-			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-		res {
-			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	pcie0_vcc_reg {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie0_vcc";
-
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-};
-
-
-&spi0 {
-	status = "okay";
-
-	w25q128@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		// XXX empiric value to obtain actual 10MHz SCK at the chip
-		spi-max-frequency = <3125000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "RouterBoot";
-				reg = <0x0 0x40000>;
-				read-only;
-				compatible = "fixed-partitions";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				partition@0 {
-					label = "bootloader1";
-					reg = <0x0 0xf000>;
-					read-only;
-				};
-
-				hard_config: partition@f000 {
-					label = "hard_config";
-					reg = <0xf000 0x1000>;
-					read-only;
-				};
-
-				partition@10000 {
-					label = "bootloader2";
-					reg = <0x10000 0xf000>;
-					read-only;
-				};
-
-				partition@20000 {
-					label = "soft_config";
-					reg = <0x20000 0x1000>;
-				};
-
-				partition@30000 {
-					label = "bios";
-					reg = <0x30000 0x1000>;
-					read-only;
-				};
-			};
-
-			partition@40000 {
-				compatible = "mikrotik,minor";
-				label = "firmware";
-				reg = <0x040000 0xFC0000>;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&hard_config 0x0010>;
-	mtd-mac-address-increment = <1>;
-};
-
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "wdt", "rgmii2";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&i2c {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/RBM33G.dts b/iopsys-ramips/dts/RBM33G.dts
deleted file mode 100644
index f40c4f733fb113a6239b8060da36fb697759410e..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/RBM33G.dts
+++ /dev/null
@@ -1,197 +0,0 @@
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "mikrotik,rbm33g", "mediatek,mt7621-soc";
-	model = "MikroTik RouterBOARD M33G";
-
-	aliases {
-		led-boot = &led_usr;
-		led-failsafe = &led_usr;
-		led-running = &led_usr;
-		led-upgrade = &led_usr;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_usr: usr {
-			label = "rbm33g:green:usr";
-			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		res {
-			label = "res";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	pcie0_vcc_reg {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie0_vcc";
-
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	pcie1_vcc_reg {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie1_vcc";
-
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	pcie2_vcc_reg {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie2_vcc";
-
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	usb_vcc_reg {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_vcc";
-
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-always-on;
-	};
-};
-
-
-&spi0 {
-	status = "okay";
-
-	w25q40@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <3125000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "RouterBoot";
-				reg = <0x0 0x40000>;
-				read-only;
-				compatible = "fixed-partitions";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				partition@0 {
-					label = "bootloader1";
-					reg = <0x0 0xf000>;
-					read-only;
-				};
-
-				hard_config: partition@f000 {
-					label = "hard_config";
-					reg = <0xf000 0x1000>;
-					read-only;
-				};
-
-				partition@10000 {
-					label = "bootloader2";
-					reg = <0x10000 0xf000>;
-					read-only;
-				};
-
-				partition@20000 {
-					label = "soft_config";
-					reg = <0x20000 0x1000>;
-				};
-
-				partition@30000 {
-					label = "bios";
-					reg = <0x30000 0x1000>;
-					read-only;
-				};
-			};
-		};
-	};
-
-	w25q128@1 {
-		compatible = "jedec,spi-nor";
-		reg = <1>;
-		// XXX empiric value to obtain actual 10MHz SCK at the chip
-		spi-max-frequency = <3125000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			// Region <0x0 0x40000> seems reserved by OEM
-
-			partition@40000 {
-				compatible = "mikrotik,minor";
-				label = "firmware";
-				reg = <0x040000 0xFC0000>;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&hard_config 0x0010>;
-	mtd-mac-address-increment = <1>;
-};
-
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&sdhci {
-	status = "okay";
-};
-
-&i2c {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/TL-MR3420V5.dts b/iopsys-ramips/dts/TL-MR3420V5.dts
deleted file mode 100644
index dc3f980ae663ea63a5c7935acb4684d8186a9073..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-MR3420V5.dts
+++ /dev/null
@@ -1,97 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-mr3420-v5", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-MR3420 v5";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "tl-mr3420-v5:green:lan";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "tl-mr3420-v5:green:power";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "tl-mr3420-v5:green:usb";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wan {
-			label = "tl-mr3420-v5:green:wan";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_amber {
-			label = "tl-mr3420-v5:amber:wan";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-mr3420-v5:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "tl-mr3420-v5:green:wps";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "i2s", "p2led_an", "refclk", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
diff --git a/iopsys-ramips/dts/TL-WA801NDV5.dts b/iopsys-ramips/dts/TL-WA801NDV5.dts
deleted file mode 100644
index 44f1a6e9f498e768179eed763d3127184b433b2a..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-WA801NDV5.dts
+++ /dev/null
@@ -1,75 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-wa801nd-v5", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-WA801ND v5";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "tl-wa801nd-v5:green:power";
-			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-		};
-
-		lan {
-			label = "tl-wa801nd-v5:green:lan";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-wa801nd-v5:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-
-		wps_red {
-			label = "tl-wa801nd-v5:red:wps";
-			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
-		};
-
-		wps_green {
-			label = "tl-wa801nd-v5:green:wps";
-			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "p1led_an", "perst",
-					"refclk", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/TL-WR840NV4.dts b/iopsys-ramips/dts/TL-WR840NV4.dts
deleted file mode 100644
index 431bba7485d7dff690c45e6fdc2bfc1485d3cc21..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-WR840NV4.dts
+++ /dev/null
@@ -1,71 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-wr840n-v4", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-WR840N v4";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "tl-wr840n-v4:green:lan";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "tl-wr840n-v4:green:power";
-			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "tl-wr840n-v4:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-wr840n-v4:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "tl-wr840n-v4:green:wps";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "p2led_an", "perst", "refclk", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
diff --git a/iopsys-ramips/dts/TL-WR841NV13.dts b/iopsys-ramips/dts/TL-WR841NV13.dts
deleted file mode 100644
index ded09407a942def310c2b8921532ea99558e7682..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-WR841NV13.dts
+++ /dev/null
@@ -1,97 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-wr841n-v13", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-WR841N v13";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "tl-wr841n-v13:green:power";
-			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "tl-wr841n-v13:green:wps";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-		};
-
-		lan1 {
-			label = "tl-wr841n-v13:green:lan1";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		lan2 {
-			label = "tl-wr841n-v13:green:lan2";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		lan3 {
-			label = "tl-wr841n-v13:green:lan3";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-		};
-
-		lan4 {
-			label = "tl-wr841n-v13:green:lan4";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_green {
-			label = "tl-wr841n-v13:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_orange {
-			label = "tl-wr841n-v13:orange:wan";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-wr841n-v13:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "perst", "refclk", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
diff --git a/iopsys-ramips/dts/TL-WR842NV5.dts b/iopsys-ramips/dts/TL-WR842NV5.dts
deleted file mode 100644
index b1352a2ee6ae7e8a669fd5fcf18015ea93d74243..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-WR842NV5.dts
+++ /dev/null
@@ -1,97 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-wr842n-v5", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-WR842N v5";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		rfkill {
-			label = "rfkill";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RFKILL>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "tl-wr842n-v5:green:lan";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		led_power: power {
-			label = "tl-wr842n-v5:green:power";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "tl-wr842n-v5:green:usb";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wan {
-			label = "tl-wr842n-v5:green:wan";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_amber {
-			label = "tl-wr842n-v5:amber:wan";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-wr842n-v5:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "tl-wr842n-v5:green:wps";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "i2s", "p2led_an", "refclk", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&esw {
-	mediatek,portmap = <0x3e>;
-};
diff --git a/iopsys-ramips/dts/TL-WR902ACV3.dts b/iopsys-ramips/dts/TL-WR902ACV3.dts
deleted file mode 100644
index 1d634314cf1136d3fd597f5e632c5219f5b2654a..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/TL-WR902ACV3.dts
+++ /dev/null
@@ -1,114 +0,0 @@
-/dts-v1/;
-
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
-	model = "TP-Link TL-WR902AC v3";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		sw1 {
-			label = "sw1";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-		};
-
-		sw2 {
-			label = "sw2";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_1>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		lan {
-			label = "tl-wr902ac-v3:green:lan";
-			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
-		};
-
-		led_power: power {
-			label = "tl-wr902ac-v3:green:power";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "tl-wr902ac-v3:green:usb";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wan {
-			label = "tl-wr902ac-v3:green:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "tl-wr902ac-v3:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "tl-wr902ac-v3:green:wps";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "i2s", "p0led_an", "p2led_an", "p4led_an", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x28000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&factory 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
-	};
-};
diff --git a/iopsys-ramips/dts/U7621-06-256M-16M.dts b/iopsys-ramips/dts/U7621-06-256M-16M.dts
deleted file mode 100644
index e6cc4c9205dd023f968fa28cd2e1b1f6cad63fa5..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/U7621-06-256M-16M.dts
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "U7621-06.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "unielec,u7621-06-256m-16m", "unielec,u7621-06", "mediatek,mt7621-soc";
-	model = "UniElec U7621-06 (256M RAM/16M flash)";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <14000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "bootloader";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "config";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			firmware: partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/U7621-06-512M-64M.dts b/iopsys-ramips/dts/U7621-06-512M-64M.dts
deleted file mode 100644
index d710477c1380e79ab811f7dd80e5b1b117a97afb..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/U7621-06-512M-64M.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
- *  Copyright(c) 2018 Nishant Sharma <codemarauder@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "U7621-06.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "unielec,u7621-06-512m-64m", "unielec,u7621-06", "mediatek,mt7621-soc";
-	model = "UniElec U7621-06 (512M RAM/64M flash)";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "bootloader";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "config";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			firmware: partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0x3fb0000>;
-			};
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/U7621-06.dtsi b/iopsys-ramips/dts/U7621-06.dtsi
deleted file mode 100644
index 301edfe680467709553a78615fbd5683d6248c4b..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/U7621-06.dtsi
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "unielec,u7621-06", "mediatek,mt7621-soc";
-
-	aliases {
-		led-boot = &led_status;
-		led-failsafe = &led_status;
-		led-running = &led_status;
-		led-upgrade = &led_status;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	gpio-export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
-
-		modem_reset {
-			gpio-export,name = "modem_reset";
-			gpio-export,output = <1>;
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_status: status {
-			label = "u7621-06:green:status";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-		};
-
-		led4 {
-			label = "u7621-06:green:led4";
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
-		};
-
-		led5 {
-			label = "u7621-06:green:led5";
-			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-		};
-	};
-};
-
-&gpio0 {
-	status = "okay";
-};
-
-&sdhci {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0xe000>;
-	mediatek,portmap = "llllw";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uart2", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/U7628-01-128M-16M.dts b/iopsys-ramips/dts/U7628-01-128M-16M.dts
deleted file mode 100644
index ac9fd503cab22a7fc8f8bd4c2acec71990447c5c..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/U7628-01-128M-16M.dts
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "U7628-01.dtsi"
-
-/ {
-	compatible = "unielec,u7628-01-128m-16m", "unielec,u7628-01", "mediatek,mt7628an-soc";
-	model = "UniElec U7628-01 (128M RAM/16M flash)";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <12000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "bootloader";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "config";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/U7628-01.dtsi b/iopsys-ramips/dts/U7628-01.dtsi
deleted file mode 100644
index 03da1f88f21056373335597516a5f9efab56bff6..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/U7628-01.dtsi
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "mt7628an.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "unielec,u7628-01", "mediatek,mt7628an-soc";
-
-	aliases {
-		led-boot = &led_power;
-		led-failsafe = &led_power;
-		led-running = &led_power;
-		led-upgrade = &led_power;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "u7628-01:green:power";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan {
-			label = "u7628-01:green:wlan";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		wan {
-			label = "u7628-01:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-		};
-
-		lan1 {
-			label = "u7628-01:green:lan1";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-		};
-
-		lan2 {
-			label = "u7628-01:green:lan2";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-		};
-
-		lan3 {
-			label = "u7628-01:green:lan3";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
-		};
-
-		lan4 {
-			label = "u7628-01:green:lan4";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "u7628-01:green:usb";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-	};
-};
-
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&pcie {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x28>;
-};
-
-&wmac {
-	status = "okay";
-	ralink,mtd-eeprom = <&factory 0x0>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "refclk", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/UBNT-ERX-SFP.dts b/iopsys-ramips/dts/UBNT-ERX-SFP.dts
deleted file mode 100644
index 7de37804a522bb2c2b3a12c54245443b2bcea64f..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/UBNT-ERX-SFP.dts
+++ /dev/null
@@ -1,24 +0,0 @@
-/dts-v1/;
-
-#include "UBNT-ER-e50.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	model = "UBNT-ERX-SFP";
-	compatible = "ubiquiti,edgerouterx-sfp", "mediatek,mt7621-soc";
-
-	i2c-gpio {
-		compatible = "i2c-gpio";
-		gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* sda */
-		         &gpio0 4 GPIO_ACTIVE_HIGH /* scl */
-		        >;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		pca9555@25 {
-			compatible = "pca9555";
-			reg = <0x25>;
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/UBNT-ERX.dts b/iopsys-ramips/dts/UBNT-ERX.dts
deleted file mode 100644
index 556d1156c352f76a94c6e39bc3b58c88f08815be..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/UBNT-ERX.dts
+++ /dev/null
@@ -1,7 +0,0 @@
-/dts-v1/;
-
-#include "UBNT-ER-e50.dtsi"
-
-/ {
-	model = "UBNT-ERX";
-};
diff --git a/iopsys-ramips/dts/WD03.dts b/iopsys-ramips/dts/WD03.dts
deleted file mode 100644
index b6c601f58ae281002477896318222035ce141b85..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WD03.dts
+++ /dev/null
@@ -1,119 +0,0 @@
-/dts-v1/;
-
-#include "mt7620n.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "ravpower,wd03", "ralink,mt7620n-soc";
-	model = "Ravpower WD03";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		green-wifi {
-			label = "wd03:green:wifi";
-			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
-		};
-
-
-		blue-wifi {
-			label = "wd03:blue:wifi";
-			gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&i2c {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0x7b0000>;
-			};
-		};
-	};
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4000>;
-	ralink,port-map = "wllll";
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled", "ephy";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/WE1026-5G-16M.dts b/iopsys-ramips/dts/WE1026-5G-16M.dts
deleted file mode 100644
index 8954006ecec960680dae8d728a91bbb51703c52e..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WE1026-5G-16M.dts
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-#include "WE1026-5G.dtsi"
-
-/ {
-	compatible = "zbtlink,we1026-5g-16m", "ralink,mt7620a-soc";
-	model = "ZBT WE1026-5G (16M)";
-};
-
-&spi0 {
-	status = "okay";
-
-	en25q128@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			firmware: partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/WE1026-5G.dtsi b/iopsys-ramips/dts/WE1026-5G.dtsi
deleted file mode 100644
index e7e64e251a0a168cdd5b031d6340271c313cf19b..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WE1026-5G.dtsi
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
- *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "zbtlink,we1026-5g", "ralink,mt7620a-soc";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		lan {
-			label = "we1026-5g:green:lan";
-			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "we1026-5g:green:usb";
-			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wifi {
-			label = "we1026-5g:green:wifi";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-		reset {
-			label = "reset";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
-&sdhci {
-	status = "okay";
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x28>;
-};
-
-&wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "spi refclk", "ephy", "wled";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "pci14c3,7662";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
diff --git a/iopsys-ramips/dts/WF-2881.dts b/iopsys-ramips/dts/WF-2881.dts
deleted file mode 100644
index bc9d6d72295c42d3403491ae47ce0ccf41eda102..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WF-2881.dts
+++ /dev/null
@@ -1,127 +0,0 @@
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "netis,wf-2881", "mediatek,mt7621-soc";
-	model = "NETIS WF-2881";
-
-	aliases {
-		led-boot = &led_wps;
-		led-failsafe = &led_wps;
-		led-running = &led_wps;
-		led-upgrade = &led_wps;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		usb {
-			label = "wf-2881:green:usb";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
-			linux,default-trigger = "usbport";
-		};
-
-		led_wps: wps {
-			label = "wf-2881:green:wps";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&nand {
-	status = "okay";
-
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		partition@0 {
-			label = "u-boot";
-			reg = <0x0 0x30000>;
-			read-only;
-		};
-
-		partition@30000 {
-			label = "u-boot-env";
-			reg = <0x30000 0x1000>;
-			read-only;
-		};
-
-		partition@80000 {
-			label = "config";
-			reg = <0x80000 0x80000>;
-			read-only;
-		};
-
-		factory: partition@100000 {
-			label = "factory";
-			reg = <0x100000 0x40000>;
-			read-only;
-		};
-
-		partition@140000 {
-			compatible = "denx,uimage";
-			label = "firmware";
-			reg = <0x140000 0x7E40000>;
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
-
-&pcie1 {
-	mt76@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x0000>;
-		ieee80211-freq-limit = <2400000 2500000>;
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0xe006>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "jtag";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/WITI-256M.dts b/iopsys-ramips/dts/WITI-256M.dts
deleted file mode 100644
index 4c12d8c3b5b18a71b5c36ee0c94fe5f78434e776..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WITI-256M.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-/dts-v1/;
-
-#include "WITI.dtsi"
-
-/ {
-	compatible = "mqmaker,witi-256m", "mqmaker,witi", "mediatek,mt7621-soc";
-	model = "MQmaker WiTi (256MB RAM)";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-};
diff --git a/iopsys-ramips/dts/WITI-512M.dts b/iopsys-ramips/dts/WITI-512M.dts
deleted file mode 100644
index b24907553404111346bc851e6a9f82db9db3dd4c..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WITI-512M.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-/dts-v1/;
-
-#include "WITI.dtsi"
-
-/ {
-	compatible = "mqmaker,witi-512m", "mqmaker,witi", "mediatek,mt7621-soc";
-	model = "MQmaker WiTi (512MB RAM)";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-};
diff --git a/iopsys-ramips/dts/WN3000RPV3.dts b/iopsys-ramips/dts/WN3000RPV3.dts
deleted file mode 100644
index b067a4e448f54ee7b2156e0314d57fd6ad3877e1..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WN3000RPV3.dts
+++ /dev/null
@@ -1,153 +0,0 @@
-/* This file is released into the public domain */
-
-/dts-v1/;
-
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	compatible = "netgear,wn3000rp-v3", "ralink,mt7620a-soc";
-	model = "Netgear WN3000RPv3";
-
-	aliases {
-		led-boot = &led_power_green;
-		led-failsafe = &led_power_green;
-		led-running = &led_power_green;
-		led-upgrade = &led_power_green;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power_green: power_g {
-			label = "wn3000rpv3:green:power";
-			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
-			default-state = "on";
-		};
-
-		power_r {
-			label = "wn3000rpv3:red:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		client_g {
-			label = "wn3000rpv3:green:client";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-		};
-
-		client_r {
-			label = "wn3000rpv3:red:client";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-		};
-
-		router_g {
-			label = "wn3000rpv3:green:router";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
-		};
-
-		router_r {
-			label = "wn3000rpv3:red:router";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-		};
-
-		wps {
-			label = "wn3000rpv3:green:wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
-		};
-
-		l_arrow {
-			label = "wn3000rpv3:blue:leftarrow";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-		};
-
-		r_arrow {
-			label = "wn3000rpv3:blue:rightarrow";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-	};
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			partition@40000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x40000 0x7b0000>;
-			};
-
-			art: partition@7f0000 {
-				label = "art";
-				reg = <0x7f0000 0x10000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&art 0x0>;
-};
-
-&wmac {
-	mtd-mac-address = <&art 0x6>;
-	ralink,mtd-eeprom = <&art 0x1000>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "spi refclk";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/WNDR3700V5.dts b/iopsys-ramips/dts/WNDR3700V5.dts
deleted file mode 100644
index 475ddb7e959f43eef35b1a430245d93d174a236a..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WNDR3700V5.dts
+++ /dev/null
@@ -1,72 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "R6220.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "netgear,wndr3700-v5", "mediatek,mt7621-soc";
-	model = "Netgear WNDR3700v5";
-};
-
-&led_power {
-	label = "wndr3700v5:green:power";
-};
-
-&led_usb {
-	label = "wndr3700v5:green:usb";
-};
-
-&led_internet {
-	label = "wndr3700v5:green:wan";
-};
-
-&led_wifi {
-	label = "wndr3700v5:green:wifi";
-};
-
-&led_wps {
-	label = "wndr3700v5:green:wps";
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@f30000 {
-				label = "factory";
-				reg = <0xf30000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xee0000>;
-			};
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/WRC-1900GST.dts b/iopsys-ramips/dts/WRC-1900GST.dts
deleted file mode 100644
index c910bdeec7b392fb86a45f5f918806604bf0d028..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WRC-1900GST.dts
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "elecom_wrc-gst.dtsi"
-
-
-/ {
-	compatible = "elecom,wrc-1900gst", "mediatek,mt7621-soc";
-	model = "ELECOM WRC-1900GST";
-  };
diff --git a/iopsys-ramips/dts/WRC-2533GST.dts b/iopsys-ramips/dts/WRC-2533GST.dts
deleted file mode 100644
index 7aecdccbf632d0045f434e1362ecaf16fdc4ec90..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/WRC-2533GST.dts
+++ /dev/null
@@ -1,9 +0,0 @@
-/dts-v1/;
-
-#include "elecom_wrc-gst.dtsi"
-
-
-/ {
-	compatible = "elecom,wrc-2533gst", "mediatek,mt7621-soc";
-	model = "ELECOM WRC-2533GST";
-  };
diff --git a/iopsys-ramips/dts/XIAOMI-MIR4A-100M.dts b/iopsys-ramips/dts/XIAOMI-MIR4A-100M.dts
deleted file mode 100644
index 8a33745f7fc3700cc566eec87053b3fad35ff4b1..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/XIAOMI-MIR4A-100M.dts
+++ /dev/null
@@ -1,147 +0,0 @@
-//SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
-
-#include "mt7628an.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "xiaomi,mir4a-100m", "mediatek,mt7628an-soc";
-	model = "Xiaomi Mi Router 4A (100M Edition)";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	aliases {
-		led-boot = &power_yellow;
-		led-failsafe = &power_yellow;
-		led-running = &power_blue;
-		led-upgrade = &power_yellow;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		power_blue: power_blue {
-			label = "mir4a-100m:blue:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-		};
-
-		power_yellow: power_yellow {
-			label = "mir4a-100m:yellow:power";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "bootloader";
-				reg = <0x0 0x20000>;
-				read-only;
-			};
-
-			partition@20000 {
-				label = "config";
-				reg = <0x20000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@30000 {
-				label = "factory";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			partition@40000 {
-				label = "crash";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				label = "cfg_bak";
-				reg = <0x50000 0x10000>;
-				read-only;
-			};
-
-			partition@60000 {
-				label = "overlay";
-				reg = <0x60000 0x100000>;
-				read-only;
-			};
-
-			partition@160000 {
-				label = "firmware";
-				reg = <0x160000 0xea0000>;
-				compatible = "denx,uimage";
-			};
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "mediatek,mt76";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-	mtd-mac-address-increment = <(-1)>;
-};
-
-&esw {
-	mediatek,portmap = <0x2f>;
-	mediatek,portdisable = <0x2a>;
-};
-
-&wmac {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/elecom_wrc-gst.dtsi b/iopsys-ramips/dts/elecom_wrc-gst.dtsi
deleted file mode 100644
index 40f16adb84a921e46661971ca56e084fa321989c..0000000000000000000000000000000000000000
--- a/iopsys-ramips/dts/elecom_wrc-gst.dtsi
+++ /dev/null
@@ -1,180 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "mt7621.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	aliases {
-		led-boot = &led_power_green;
-		led-failsafe = &led_power_green;
-		led-running = &led_power_green;
-		led-upgrade = &led_power_green;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_power_green: power_green {
-			label = "wrc-gst:green:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
-		};
-
-		power_blue {
-			label = "wrc-gst:blue:power";
-			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
-		};
-
-		wps {
-			label = "wrc-gst:red:wps";
-			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
-		};
-
-		power_red {
-			label = "wrc-gst:red:power";
-			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-
-		client {
-			label = "client";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-			linux,input-type = <EV_SW>;
-		};
-
-		ap {
-			label = "ap";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-			linux,input-type = <EV_SW>;
-		};
-
-		extender {
-			label = "extender";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-			linux,input-type = <EV_SW>;
-		};
-
-		router {
-			label = "router";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
-			linux,input-type = <EV_SW>;
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0xe000>;
-};
-
-&spi0 {
-	status = "okay";
-
-	m25p80@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			factory: partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xb00000>;
-			};
-
-			partition@b50000 {
-				label = "tm_pattern";
-				reg = <0xb50000 0x380000>;
-				read-only;
-			};
-
-			partition@ed0000 {
-				label = "tm_key";
-				reg = <0xed0000 0x80000>;
-				read-only;
-			};
-
-			partition@f50000 {
-				label = "art_block";
-				reg = <0xf50000 0x30000>;
-				read-only;
-			};
-
-			partition@f80000 {
-				label = "user_data";
-				reg = <0xf80000 0x80000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "jtag", "wdt", "sdhci";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-	/* WRC-xxxxGST has MT7615 for 2.4/5 GHz wifi, but it's not supported */
-};
-
-&xhci {
-	status = "disabled";
-};
diff --git a/iopsys-ramips/dts/mt7620a.dtsi b/iopsys-ramips/dts/mt7620a.dtsi
index 150c0e14ca2d1c3f4bf8f5f2c995da70223a5bcb..ebcb659d3686092a4210343e77190930db951835 100644
--- a/iopsys-ramips/dts/mt7620a.dtsi
+++ b/iopsys-ramips/dts/mt7620a.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -116,7 +118,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -133,7 +135,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -152,7 +154,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <32>;
+			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -171,7 +173,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
-			ralink,nr-gpio = <1>;
+			ralink,num-gpios = <1>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -315,113 +317,113 @@
 
 		pcm_i2s_pins: pcm_i2s {
 			pcm_i2s {
-				ralink,group = "uartf";
-				ralink,function = "pcm i2s";
+				groups = "uartf";
+				function = "pcm i2s";
 			};
 		};
 
 		uartf_gpio_pins: uartf_gpio {
 			uartf_gpio {
-				ralink,group = "uartf";
-				ralink,function = "gpio uartf";
+				groups = "uartf";
+				function = "gpio uartf";
 			};
 		};
 
 		gpio_i2s_pins: gpio_i2s {
 			gpio_i2s {
-				ralink,group = "uartf";
-				ralink,function = "gpio i2s";
+				groups = "uartf";
+				function = "gpio i2s";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi refclk";
-				ralink,function = "spi refclk";
+				groups = "spi refclk";
+				function = "spi refclk";
 			};
 		};
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 
 		mdio_pins: mdio {
 			mdio {
-				ralink,group = "mdio";
-				ralink,function = "mdio";
+				groups = "mdio";
+				function = "mdio";
 			};
 		};
 
 		mdio_refclk_pins: mdio_refclk {
 			mdio_refclk {
-				ralink,group = "mdio";
-				ralink,function = "refclk";
+				groups = "mdio";
+				function = "refclk";
 			};
 		};
 
 		ephy_pins: ephy {
 			ephy {
-				ralink,group = "ephy";
-				ralink,function = "ephy";
+				groups = "ephy";
+				function = "ephy";
 			};
 		};
 
 		wled_pins: wled {
 			wled {
-				ralink,group = "wled";
-				ralink,function = "wled";
+				groups = "wled";
+				function = "wled";
 			};
 		};
 
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
-				ralink,group = "rgmii1";
-				ralink,function = "rgmii1";
+				groups = "rgmii1";
+				function = "rgmii1";
 			};
 		};
 
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
-				ralink,group = "rgmii2";
-				ralink,function = "rgmii2";
+				groups = "rgmii2";
+				function = "rgmii2";
 			};
 		};
 
 		pcie_pins: pcie {
 			pcie {
-				ralink,group = "pcie";
-				ralink,function = "pcie rst";
+				groups = "pcie";
+				function = "pcie rst";
 			};
 		};
 
 		pa_pins: pa {
 			pa {
-				ralink,group = "pa";
-				ralink,function = "pa";
+				groups = "pa";
+				function = "pa";
 			};
 		};
 
 		sdhci_pins: sdhci {
 			sdhci {
-				ralink,group = "nd_sd";
-				ralink,function = "sd";
+				groups = "nd_sd";
+				function = "sd";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/AI-BR100.dts b/iopsys-ramips/dts/mt7620a_aigale_ai-br100.dts
similarity index 79%
rename from iopsys-ramips/dts/AI-BR100.dts
rename to iopsys-ramips/dts/mt7620a_aigale_ai-br100.dts
index 8de4b5877adffc7d0eb085939a2b41d47ff97d49..ba251c265639fc68716aee52b6e051dc54d7cb92 100644
--- a/iopsys-ramips/dts/AI-BR100.dts
+++ b/iopsys-ramips/dts/mt7620a_aigale_ai-br100.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,18 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "ai-br100:blue:wan";
+			label = "blue:wan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wlan: wlan {
-			label = "ai-br100:blue:wlan";
+			label = "blue:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -53,9 +50,9 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
-		reg = <0 0>;
+		reg = <0>;
 		spi-max-frequency = <10000000>;
 
 		partitions {
@@ -98,20 +95,19 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/mt7620a_alfa-network_ac1200rm.dts b/iopsys-ramips/dts/mt7620a_alfa-network_ac1200rm.dts
new file mode 100644
index 0000000000000000000000000000000000000000..27b6896cec1082de997115ad1d90fadb60261432
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_alfa-network_ac1200rm.dts
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
+ *  All rights reserved.
+ */
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "alfa-network,ac1200rm", "ralink,mt7620a-soc";
+	model = "ALFA Network AC1200RM";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wps: wps {
+			label = "green:wps";
+			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
+	mediatek,portmap = "llllw";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&gsw {
+	mediatek,port4 = "ephy";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "nd_sd", "spi refclk", "wled";
+		function = "gpio";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x1000>;
+			};
+
+			partition@31000 {
+				label = "config";
+				reg = <0x31000 0xf000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/iopsys-ramips/dts/R36M-E4G.dts b/iopsys-ramips/dts/mt7620a_alfa-network_r36m-e4g.dts
similarity index 88%
rename from iopsys-ramips/dts/R36M-E4G.dts
rename to iopsys-ramips/dts/mt7620a_alfa-network_r36m-e4g.dts
index 8d7d512d273275d178608f67e78f4a876a746156..58386a9ac7f48839eea2678232f62a4f40ced809 100644
--- a/iopsys-ramips/dts/R36M-E4G.dts
+++ b/iopsys-ramips/dts/mt7620a_alfa-network_r36m-e4g.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -11,6 +10,7 @@
 	model = "ALFA Network R36M-E4G";
 
 	aliases {
+		label-mac-device = &wmac;
 		led-boot = &led_system;
 		led-failsafe = &led_system;
 		led-running = &led_system;
@@ -81,40 +81,40 @@
 		compatible = "gpio-leds";
 
 		4g {
-			label = "r36m-e4g:orange:4g";
+			label = "orange:4g";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "r36m-e4g:green:lan";
+			label = "green:lan";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		led_system: system {
-			label = "r36m-e4g:green:system";
+			label = "green:system";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		sim1 {
-			label = "r36m-e4g:green:sim1";
+			label = "green:sim1";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		sim2 {
-			label = "r36m-e4g:green:sim2";
+			label = "green:sim2";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		wan {
-			label = "r36m-e4g:green:wan";
+			label = "green:wan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "r36m-e4g:orange:wlan";
+			label = "orange:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0radio";
 		};
@@ -153,12 +153,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "ephy", "pcie", "rgmii1", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "ephy", "pcie", "rgmii1", "wled";
+		function = "gpio";
 	};
 };
 
@@ -213,5 +211,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/TUBE-E4G.dts b/iopsys-ramips/dts/mt7620a_alfa-network_tube-e4g.dts
similarity index 88%
rename from iopsys-ramips/dts/TUBE-E4G.dts
rename to iopsys-ramips/dts/mt7620a_alfa-network_tube-e4g.dts
index 4097dc6140d396fea3e06b169b18c1d9a33064fb..30a0201c395867019a00b358e03bf85c0deb849c 100644
--- a/iopsys-ramips/dts/TUBE-E4G.dts
+++ b/iopsys-ramips/dts/mt7620a_alfa-network_tube-e4g.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -11,6 +10,7 @@
 	model = "ALFA Network Tube-E4G";
 
 	aliases {
+		label-mac-device = &ethernet;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
@@ -69,29 +69,29 @@
 		compatible = "gpio-leds";
 
 		4g {
-			label = "tube-e4g:green:4g";
+			label = "green:4g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "tube-e4g:blue:lan";
+			label = "blue:lan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		power: power {
-			label = "tube-e4g:green:power";
+			label = "green:power";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		sim1 {
-			label = "tube-e4g:green:sim1";
+			label = "green:sim1";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		sim2 {
-			label = "tube-e4g:green:sim2";
+			label = "green:sim2";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
@@ -106,10 +106,6 @@
 	mtd-mac-address = <&factory 0x28>;
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -130,12 +126,10 @@
 	status = "disabled";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "ephy", "nd_sd", "pcie", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "ephy", "nd_sd", "pcie", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/RP-N53.dts b/iopsys-ramips/dts/mt7620a_asus_rp-n53.dts
similarity index 82%
rename from iopsys-ramips/dts/RP-N53.dts
rename to iopsys-ramips/dts/mt7620a_asus_rp-n53.dts
index 2d2820ed791a91c02492dea0619b960425d3da0c..3cb9142c387c3b879e6894051d79fdd0f704e931 100644
--- a/iopsys-ramips/dts/RP-N53.dts
+++ b/iopsys-ramips/dts/mt7620a_asus_rp-n53.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -10,8 +8,7 @@
 	model = "Asus RP-N53";
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		touch {
 			label = "touch";
@@ -42,42 +39,42 @@
 		compatible = "gpio-leds";
 
 		backlight {
-			label = "rp-n53:white:back";
+			label = "white:back";
 			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi0 {
-			label = "rp-n53:blue:5g3";
+			label = "blue:5g3";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi1 {
-			label = "rp-n53:blue:5g2";
+			label = "blue:5g2";
 			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "rp-n53:blue:5g1";
+			label = "blue:5g1";
 			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi3 {
-			label = "rp-n53:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi4 {
-			label = "rp-n53:blue:2g1";
+			label = "blue:2g1";
 			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi5 {
-			label = "rp-n53:blue:2g2";
+			label = "blue:2g2";
 			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi6 {
-			label = "rp-n53:blue:2g3";
+			label = "blue:2g3";
 			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -100,7 +97,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -146,15 +143,13 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "mdio", "rgmii1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "mdio", "rgmii1";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7620a_asus_rt-ac51u.dts b/iopsys-ramips/dts/mt7620a_asus_rt-ac51u.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0710b2557101862bbd97610cb49b33c8b22b77b6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_asus_rt-ac51u.dts
@@ -0,0 +1,13 @@
+#include "mt7620a_asus_rt-ac5x.dtsi"
+
+/ {
+	compatible = "asus,rt-ac51u", "ralink,mt7620a-soc";
+	model = "Asus RT-AC51U";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_asus_rt-ac54u.dts b/iopsys-ramips/dts/mt7620a_asus_rt-ac54u.dts
new file mode 100644
index 0000000000000000000000000000000000000000..acc60807b6870588eda45629cb89d0d613e2c788
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_asus_rt-ac54u.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_asus_rt-ac5x.dtsi"
+
+/ {
+	compatible = "asus,rt-ac54u", "ralink,mt7620a-soc";
+	model = "Asus RT-AC54U";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/RT-AC51U.dts b/iopsys-ramips/dts/mt7620a_asus_rt-ac5x.dtsi
similarity index 65%
rename from iopsys-ramips/dts/RT-AC51U.dts
rename to iopsys-ramips/dts/mt7620a_asus_rt-ac5x.dtsi
index 3e54ffdad271016449a0698dbdb7e052e761d47c..423b4edc6b1fb5c773ef3f0e14fe20e18e860a6f 100644
--- a/iopsys-ramips/dts/RT-AC51U.dts
+++ b/iopsys-ramips/dts/mt7620a_asus_rt-ac5x.dtsi
@@ -1,45 +1,19 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "asus,rt-ac51u", "ralink,mt7620a-soc";
-	model = "Asus RT-AC51U";
-
 	aliases {
+		label-mac-device = &ethernet;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
 	};
 
-	leds {
-		compatible = "gpio-leds";
-
-		led_power: power {
-			label = "rt-ac51u:blue:power";
-			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
-		};
-
-		usb {
-			label = "rt-ac51u:blue:usb";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-
-		wifi {
-			label = "rt-ac51u:blue:wifi";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -54,14 +28,25 @@
 		};
 	};
 
-	gpio_export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
 
-		enable-leds {
-			gpio-export,name = "enable-leds";
-			gpio-export,output = <1>;
-			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+		wifi2g {
+			label = "blue:wifi2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
 		};
 	};
 };
@@ -69,10 +54,12 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -114,36 +101,36 @@
 	status = "okay";
 };
 
+&gpio0 {
+	enable-leds {
+		gpio-hog;
+		line-name = "enable-leds";
+		output-low;
+		gpios = <10 GPIO_ACTIVE_HIGH>;
+	};
+};
+
 &gpio3 {
 	status = "okay";
 };
 
+&state_default {
+	gpio {
+		groups = "i2c", "wled", "uartf";
+		function = "gpio";
+	};
+};
+
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&factory 0x4>;
+	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "wled", "uartf";
-			ralink,function = "gpio";
-		};
-	};
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
 	status = "okay";
 };
-
-&pcie0 {
-	wifi@0,0 {
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-	};
-};
diff --git a/iopsys-ramips/dts/BDCOM-WAP2100-SK.dts b/iopsys-ramips/dts/mt7620a_bdcom_wap2100-sk.dts
similarity index 82%
rename from iopsys-ramips/dts/BDCOM-WAP2100-SK.dts
rename to iopsys-ramips/dts/mt7620a_bdcom_wap2100-sk.dts
index e71d14c6abff4e44965cf0bd4d351b461107cf79..fc2b74db2a78b14a8ea98ffd1fdd18e229499f82 100644
--- a/iopsys-ramips/dts/BDCOM-WAP2100-SK.dts
+++ b/iopsys-ramips/dts/mt7620a_bdcom_wap2100-sk.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -23,26 +22,25 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "wap2100-sk:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_power: wps {
-			label = "wap2100-sk:green:wps";
+			label = "green:wps";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "wap2100-sk:green:wlan2g";
+			label = "green:wlan2g";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -98,10 +96,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -124,11 +118,12 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "llllw";
+
+	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
@@ -143,11 +138,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "spi refclk", "uartf", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "spi refclk", "uartf", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WHR-1166D.dts b/iopsys-ramips/dts/mt7620a_buffalo_whr-1166d.dts
similarity index 83%
rename from iopsys-ramips/dts/WHR-1166D.dts
rename to iopsys-ramips/dts/mt7620a_buffalo_whr-1166d.dts
index 9a6ca335a8cad228239c58ec61dd7d3f8c0d1dfc..196bbde7261e128989dc608b6be2a4d3a40b29c6 100644
--- a/iopsys-ramips/dts/WHR-1166D.dts
+++ b/iopsys-ramips/dts/mt7620a_buffalo_whr-1166d.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,44 +18,43 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "whr-1166d:red:power";
+			label = "red:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "whr-1166d:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power2 {
-			label = "whr-1166d:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "whr-1166d:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "whr-1166d:green:internet";
+			label = "green:internet";
 			gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
 		};
 
 		router {
-			label = "whr-1166d:orange:router";
+			label = "orange:router";
 			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
 		};
 
 		router2 {
-			label = "whr-1166d:green:router";
+			label = "green:router";
 			gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -94,7 +91,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -131,12 +128,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "wled", "nd_sd";
+		function = "gpio";
 	};
 };
 
@@ -144,6 +139,8 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 
+	mtd-mac-address = <&factory 0x4>;
+
 	port@5 {
 		status = "okay";
 		phy-handle = <&phy5>;
@@ -165,7 +162,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
diff --git a/iopsys-ramips/dts/WHR-300HP2.dts b/iopsys-ramips/dts/mt7620a_buffalo_whr-300hp2.dts
similarity index 80%
rename from iopsys-ramips/dts/WHR-300HP2.dts
rename to iopsys-ramips/dts/mt7620a_buffalo_whr-300hp2.dts
index 8a79d6ab054758e0546e6d46983ca2d533c2a415..ed2e03d6cfa008f3fef842dd12b2e81c944a1d43 100644
--- a/iopsys-ramips/dts/WHR-300HP2.dts
+++ b/iopsys-ramips/dts/mt7620a_buffalo_whr-300hp2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,44 +18,43 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "whr-300hp2:red:power";
+			label = "red:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "whr-300hp2:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power2 {
-			label = "whr-300hp2:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "whr-300hp2:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "whr-300hp2:green:internet";
+			label = "green:internet";
 			gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
 		};
 
 		router {
-			label = "whr-300hp2:green:router";
+			label = "green:router";
 			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
 		};
 
 		router2 {
-			label = "whr-300hp2:orange:router";
+			label = "orange:router";
 			gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -94,7 +91,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -131,18 +128,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -151,7 +149,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
diff --git a/iopsys-ramips/dts/WHR-600D.dts b/iopsys-ramips/dts/mt7620a_buffalo_whr-600d.dts
similarity index 81%
rename from iopsys-ramips/dts/WHR-600D.dts
rename to iopsys-ramips/dts/mt7620a_buffalo_whr-600d.dts
index f4b5661eac9475ca3b6efb0abca2c230f0c895d0..b799a98e56edcb65ed2e9717f2228e9ac14fb2e0 100644
--- a/iopsys-ramips/dts/WHR-600D.dts
+++ b/iopsys-ramips/dts/mt7620a_buffalo_whr-600d.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,44 +18,43 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "whr-600d:red:power";
+			label = "red:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "whr-600d:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power2 {
-			label = "whr-600d:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "whr-600d:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "whr-600d:green:internet";
+			label = "green:internet";
 			gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
 		};
 
 		router {
-			label = "whr-600d:green:router";
+			label = "green:router";
 			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
 		};
 
 		router2 {
-			label = "whr-600d:orange:router";
+			label = "orange:router";
 			gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -94,7 +91,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -131,19 +128,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -152,7 +149,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
diff --git a/iopsys-ramips/dts/DIR-810L.dts b/iopsys-ramips/dts/mt7620a_cameo_810.dtsi
similarity index 76%
rename from iopsys-ramips/dts/DIR-810L.dts
rename to iopsys-ramips/dts/mt7620a_cameo_810.dtsi
index 479005fbf72c2fe5fc17107560b97125f4c7b6c2..c3f3267d382f21c04b38b02a6f66c83731135f33 100644
--- a/iopsys-ramips/dts/DIR-810L.dts
+++ b/iopsys-ramips/dts/mt7620a_cameo_810.dtsi
@@ -1,4 +1,4 @@
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include "mt7620a.dtsi"
 
@@ -6,10 +6,8 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "dlink,dir-810l", "ralink,mt7620a-soc";
-	model = "D-Link DIR-810L";
-
 	aliases {
+		label-mac-device = &ethernet;
 		led-boot = &led_power_green;
 		led-failsafe = &led_power_green;
 		led-running = &led_power_green;
@@ -17,37 +15,41 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
+			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
 			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <BTN_0>;
+			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
-		led_power_green: power {
-			label = "dir-810l:green:power";
+		led_power_green: power_green {
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 		};
 
-		wan {
-			label = "dir-810l:orange:wan";
+		wan_orange {
+			label = "orange:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 		};
 
-		power2 {
-			label = "dir-810l:orange:power";
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		power_orange {
+			label = "orange:power";
 			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -56,10 +58,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -102,9 +104,9 @@
 				read-only;
 			};
 
-			partition@e0000 {
+			partition@f0000 {
 				label = "Jffs2";
-				reg = <0xe0000 0x80000>;
+				reg = <0xf0000 0x80000>;
 				read-only;
 			};
 
@@ -117,37 +119,39 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "ephy";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "llllw";
 };
 
 &gsw {
 	mediatek,port4 = "ephy";
-	pinctrl-names = "default";
-	pinctrl-0 = <&ephy_pins>;
 };
 
-&pcie {
+&gpio2 {
 	status = "okay";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
+
+	ralink,mtd-eeprom = <&factory 0x0>;
 	mtd-mac-address = <&factory 0x28>;
 };
 
+&pcie {
+	status = "okay";
+};
+
 &pcie0 {
 	wifi@0,0 {
 		reg = <0x0000 0 0 0 0>;
diff --git a/iopsys-ramips/dts/DCH-M225.dts b/iopsys-ramips/dts/mt7620a_dlink_dch-m225.dts
similarity index 86%
rename from iopsys-ramips/dts/DCH-M225.dts
rename to iopsys-ramips/dts/mt7620a_dlink_dch-m225.dts
index 0644378ba29478b774612abf9299aaeadfbd791b..63667da28199f7cddc93e97622b6f97de80bae2d 100644
--- a/iopsys-ramips/dts/DCH-M225.dts
+++ b/iopsys-ramips/dts/mt7620a_dlink_dch-m225.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <100>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -37,13 +34,13 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "dch-m225:green:power";
+			label = "green:power";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		status {
-			label = "dch-m225:red:status";
+			label = "red:status";
 			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -72,10 +69,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -102,7 +95,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <80000000>;
@@ -162,17 +155,15 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii1";
+		function = "gpio";
+	};
 
-		gpio_i2s {
-			ralink,group = "uartf";
-			ralink,function = "gpio i2s";
-		};
+	gpio_i2s {
+		groups = "uartf";
+		function = "gpio i2s";
 	};
 };
 
@@ -185,7 +176,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
diff --git a/iopsys-ramips/dts/DIR-510L.dts b/iopsys-ramips/dts/mt7620a_dlink_dir-510l.dts
similarity index 86%
rename from iopsys-ramips/dts/DIR-510L.dts
rename to iopsys-ramips/dts/mt7620a_dlink_dir-510l.dts
index 885e64f9f2d2aa5bd7059f2c6a0b6b0bf771dba3..f4db67648a57e7e3c8baec8f3ad15871d77b7220 100644
--- a/iopsys-ramips/dts/DIR-510L.dts
+++ b/iopsys-ramips/dts/mt7620a_dlink_dir-510l.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -22,8 +21,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -42,15 +40,14 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dir-510l:green:status";
+			label = "green:status";
 			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
 		};
 
 		status-red {
-			label = "dir-510l:red:status";
+			label = "red:status";
 			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 		};
-
 	};
 };
 
@@ -62,10 +59,6 @@
 	status = "okay";
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
@@ -131,12 +124,9 @@
 	mediatek,port4 = "ephy";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
-
diff --git a/iopsys-ramips/dts/mt7620a_dlink_dir-810l.dts b/iopsys-ramips/dts/mt7620a_dlink_dir-810l.dts
new file mode 100644
index 0000000000000000000000000000000000000000..12173d1e861ea1adca887acc11ddac4046568640
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_dlink_dir-810l.dts
@@ -0,0 +1,6 @@
+#include "mt7620a_cameo_810.dtsi"
+
+/ {
+	compatible = "dlink,dir-810l", "ralink,mt7620a-soc";
+	model = "D-Link DIR-810L";
+};
diff --git a/iopsys-ramips/dts/DWR-118-A1.dts b/iopsys-ramips/dts/mt7620a_dlink_dwr-118-a1.dts
similarity index 86%
rename from iopsys-ramips/dts/DWR-118-A1.dts
rename to iopsys-ramips/dts/mt7620a_dlink_dwr-118-a1.dts
index 707bc1c3d3d248b07e04b6b223f6dda467465be4..bacebee8e1f33e5897f5da4c0638607dd050ae20 100644
--- a/iopsys-ramips/dts/DWR-118-A1.dts
+++ b/iopsys-ramips/dts/mt7620a_dlink_dwr-118-a1.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -17,8 +16,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -37,27 +35,27 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "dwr-118-a1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_internet: internet {
-			label = "dwr-118-a1:green:internet";
+			label = "green:internet";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "dwr-118-a1:green:lan";
+			label = "green:lan";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "dwr-118-a1:green:wlan2g";
+			label = "green:wlan2g";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "dwr-118-a1:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -130,12 +128,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "uartf", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "uartf", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
 
@@ -158,7 +154,6 @@
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 
diff --git a/iopsys-ramips/dts/DWR-118-A2.dts b/iopsys-ramips/dts/mt7620a_dlink_dwr-118-a2.dts
similarity index 82%
rename from iopsys-ramips/dts/DWR-118-A2.dts
rename to iopsys-ramips/dts/mt7620a_dlink_dwr-118-a2.dts
index e1d181a8748f823be56c1fb85a4ae1c1692e2a5e..0b124e67deaecac178768793bd6c4d0cc602d7ed 100644
--- a/iopsys-ramips/dts/DWR-118-A2.dts
+++ b/iopsys-ramips/dts/mt7620a_dlink_dwr-118-a2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -15,8 +13,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -35,27 +32,27 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "dwr-118-a2:green:wan";
+			label = "green:wan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_internet: internet {
-			label = "dwr-118-a2:green:internet";
+			label = "green:internet";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "dwr-118-a2:green:lan";
+			label = "green:lan";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "dwr-118-a2:green:wlan2g";
+			label = "green:wlan2g";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "dwr-118-a2:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -128,12 +125,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "uartf", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "uartf", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
 
@@ -156,26 +151,28 @@
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 
+	mediatek,portmap = "wllll";
+
 	port@4 {
 		status = "okay";
-		phy-handle = <&phy4>;
+		phy-handle = <&phy0>;
 		phy-mode = "rgmii";
 	};
 
 	mdio-bus {
 		status = "okay";
 
-		phy4: ethernet-phy@4 {
-			reg = <4>;
-			phy-mode = "rgmii";
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii-rxid";
 		};
 	};
 };
 
 &gsw {
 	mediatek,port4 = "gmac";
+	mediatek,ephy-base-address = /bits/ 16 < 2 >;
 };
diff --git a/iopsys-ramips/dts/mt7620a_dlink_dwr-960.dts b/iopsys-ramips/dts/mt7620a_dlink_dwr-960.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4284c61aa2e87d0522172ca8d3265becc5546f87
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_dlink_dwr-960.dts
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "dlink,dwr-960", "ralink,mt7620a-soc";
+	model = "D-Link DWR-960";
+
+	aliases {
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status: status {
+			label = "green:status";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+		};
+
+		sms {
+			label = "green:sms";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+
+		signal_green {
+			label = "green:signal";
+			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		signal_red {
+			label = "red:signal";
+			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		4g {
+			label = "green:4g";
+			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+		};
+
+		3g {
+			label = "green:3g";
+			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
+	mediatek,portmap = "wllll";
+
+	port@5 {
+		status = "okay";
+		phy-mode = "rgmii-txid";
+		phy-handle = <&phy7>;
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy7: ethernet-phy@7 {
+			reg = <7>;
+			phy-mode = "rgmii-id";
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "jboot";
+				reg = <0x0 0x10000>;
+				read-only;
+			};
+
+			partition@10000 {
+				compatible = "amit,jimage";
+				label = "firmware";
+				reg = <0x10000 0xfe0000>;
+			};
+
+			config: partition@ff0000 {
+				label = "config";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mediatek,mtd-eeprom = <&config 0xe08e>;
+		mtd-mac-address = <&config 0xe50e>;
+		mtd-mac-address-increment = <2>;
+	};
+};
+
+&state_default {
+	default {
+		groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/TINY-AC.dts b/iopsys-ramips/dts/mt7620a_dovado_tiny-ac.dts
similarity index 85%
rename from iopsys-ramips/dts/TINY-AC.dts
rename to iopsys-ramips/dts/mt7620a_dovado_tiny-ac.dts
index e36af1dc7f1b35e4123c3e421a4a7be5c2ed4ded..9450596f1b0d85a8ffd6084cb0b6276d421c6e2f 100644
--- a/iopsys-ramips/dts/TINY-AC.dts
+++ b/iopsys-ramips/dts/mt7620a_dovado_tiny-ac.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,29 +7,24 @@
 	compatible = "dovado,tiny-ac", "ralink,mt7620a-soc";
 	model = "Dovado Tiny AC";
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		usb {
-			label = "tiny-ac:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wifi {
-			label = "tiny-ac:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -52,10 +45,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -67,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -113,9 +102,9 @@
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
 	mediatek,portmap = "llllw";
 
 	port@4 {
@@ -153,12 +142,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf", "nd_sd", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf", "nd_sd", "wled";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/BR-6478AC-V2.dts b/iopsys-ramips/dts/mt7620a_edimax_br-6478ac-v2.dts
similarity index 79%
rename from iopsys-ramips/dts/BR-6478AC-V2.dts
rename to iopsys-ramips/dts/mt7620a_edimax_br-6478ac-v2.dts
index 5c90aa15496f0ae8ced6339089c4c8b5c4efaff9..e7af34aa8eb018832f5a7e8ac6b85686cdac1a02 100644
--- a/iopsys-ramips/dts/BR-6478AC-V2.dts
+++ b/iopsys-ramips/dts/mt7620a_edimax_br-6478ac-v2.dts
@@ -1,22 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
- * Device Tree file for the Edimax BR-6478AC V2
- * based on Linksys E1700
- *
  * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com>
  * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com>
  * Copyright (C) 2017 James McKenzie <openwrt@madingley.org>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
  */
 
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
 	compatible = "edimax,br-6478ac-v2", "ralink,mt7620a-soc";
@@ -29,13 +22,8 @@
 		led-upgrade = &led_power;
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset_wps {
 			label = "reset_wps";
@@ -48,26 +36,28 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "br-6478ac-v2:white:power";
+			label = "white:power";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
+
 		internet {
-			label = "br-6478ac-v2:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
+
 		wlan {
-			label = "br-6478ac-v2:blue:wlan";
+			label = "blue:wlan";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
+
 		usb {
-			label = "br-6478ac-v2:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
-
 	gpio_export {
 		compatible = "gpio-export";
 		#size-cells = <0>;
@@ -79,7 +69,6 @@
 	};
 };
 
-
 &gpio2 {
 	status = "okay";
 };
@@ -89,7 +78,7 @@
 
 	flash@0 {
 		compatible = "jedec,spi-nor";
-		reg = <0 0>;
+		reg = <0>;
 		spi-max-frequency = <10000000>;
 
 		partitions {
@@ -122,7 +111,9 @@
 			};
 
 			partition@70000 {
-				compatible = "edimax,uimage";
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 				label = "firmware";
 				reg = <0x00070000 0x00790000>;
 			};
@@ -130,20 +121,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "nd_sd";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&factory 0x4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 
 	port@5 {
@@ -192,7 +182,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
diff --git a/iopsys-ramips/dts/mt7620a_edimax_ew-7476rpc.dts b/iopsys-ramips/dts/mt7620a_edimax_ew-7476rpc.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ebab7e4089990616ae38035fadf6a4c383cfd3f4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_edimax_ew-7476rpc.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_edimax_ew-747x.dtsi"
+
+/ {
+	compatible = "edimax,ew-7476rpc", "ralink,mt7620a-soc";
+	model = "Edimax EW-7476RPC";
+};
diff --git a/iopsys-ramips/dts/mt7620a_edimax_ew-7478ac.dts b/iopsys-ramips/dts/mt7620a_edimax_ew-7478ac.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a0fa2e3da8f0d1d34acf34e23b2e8d5c1f027499
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_edimax_ew-7478ac.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_edimax_ew-747x.dtsi"
+
+/ {
+	compatible = "edimax,ew-7478ac", "ralink,mt7620a-soc";
+	model = "Edimax EW-7478AC";
+};
diff --git a/iopsys-ramips/dts/mt7620a_edimax_ew-7478apc.dts b/iopsys-ramips/dts/mt7620a_edimax_ew-7478apc.dts
new file mode 100644
index 0000000000000000000000000000000000000000..77d214e888c1b3c30ec22fc9e14ed26335953c97
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_edimax_ew-7478apc.dts
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	compatible = "edimax,ew-7478apc", "ralink,mt7620a-soc";
+	model = "Edimax EW-7478APC";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset_wps {
+			label = "reset_wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "white:power";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		internet {
+			label = "blue:internet";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+	};
+};
+
+&gpio2 {
+	status = "okay";
+
+	enable_usb_power {
+		gpio-hog;
+		line-name = "enable USB power";
+		gpios = <5 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "cimage";
+				reg = <0x50000 0x20000>;
+				read-only;
+			};
+
+			partition@70000 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
+				label = "firmware";
+				reg = <0x00070000 0x00790000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "nd_sd";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
+	mediatek,portmap = "wllll";
+
+	port@5 {
+		status = "okay";
+		mediatek,fixed-link = <1000 1 1 1>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+		};
+
+		phy1: ethernet-phy@1 {
+			reg = <1>;
+			phy-mode = "rgmii";
+		};
+
+		phy2: ethernet-phy@2 {
+			reg = <2>;
+			phy-mode = "rgmii";
+		};
+
+		phy3: ethernet-phy@3 {
+			reg = <3>;
+			phy-mode = "rgmii";
+		};
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+
+		phy1f: ethernet-phy@1f {
+			reg = <0x1f>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&gsw {
+	mediatek,port4 = "gmac";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		mediatek,2ghz = <0>;
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7620a_edimax_ew-747x.dtsi b/iopsys-ramips/dts/mt7620a_edimax_ew-747x.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..d17cc090c2d2b170b5883edc7b5e8357273ab597
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_edimax_ew-747x.dtsi
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	compatible = "ralink,mt7620a-soc";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset_wps {
+			label = "reset_wps";
+			gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		switch_high {
+			label = "switch high";
+			gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		switch_off {
+			label = "switch off";
+			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+			linux,input-type = <EV_SW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1radio";
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
+		};
+
+		crossband {
+			label = "green:crossband";
+			gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "cimage";
+				reg = <0x50000 0x20000>;
+				read-only;
+			};
+
+			partition@70000 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
+				label = "firmware";
+				reg = <0x00070000 0x00790000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "nd_sd", "rgmii2";
+		function = "gpio";
+	};
+};
+
+&pinctrl {
+	phy_reset_pins: phy-reset {
+		gpio {
+			groups = "spi refclk";
+			function = "gpio";
+		};
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
+	mediatek,mdio-mode = <1>;
+
+	phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <30>;
+
+	port@5 {
+		status = "okay";
+		mediatek,fixed-link = <1000 1 1 1>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy0: ethernet-phy@0 {
+			status = "disabled";
+			reg = <0>;
+			phy-mode = "rgmii";
+		};
+
+		phy1: ethernet-phy@1 {
+			status = "disabled";
+			reg = <1>;
+			phy-mode = "rgmii";
+		};
+
+		phy2: ethernet-phy@2 {
+			status = "disabled";
+			reg = <2>;
+			phy-mode = "rgmii";
+		};
+
+		phy3: ethernet-phy@3 {
+			status = "disabled";
+			reg = <3>;
+			phy-mode = "rgmii";
+		};
+
+		phy4: ethernet-phy@4 {
+			status = "disabled";
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&gsw {
+	mediatek,port5 = "gmac";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		mediatek,2ghz = <0>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_engenius_esr600.dts b/iopsys-ramips/dts/mt7620a_engenius_esr600.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b8fe2f8cdbf33dd07e76911c4e1e445222112d6d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_engenius_esr600.dts
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "engenius,esr600", "ralink,mt7620a-soc";
+	model = "EnGenius ESR600";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "amber:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		wps2g {
+			label = "amber:wps2g";
+			gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			debounce-interval = <60>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			iNIC_rf: partition@50000 {
+				label = "iNIC_rf";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "firmware";
+				reg = <0x60000 0xf40000>;
+				compatible = "denx,uimage";
+			};
+
+			partition@fa0000 {
+				label = "backup";
+				reg = <0xfa0000 0x10000>;
+				read-only;
+			};
+
+			partition@fb0000 {
+				label = "storage";
+				reg = <0xfb0000 0x50000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
+	mtd-mac-address = <&iNIC_rf 0x4>;
+
+	port@5 {
+		status = "okay";
+		phy-mode = "rgmii";
+		mediatek,fixed-link = <1000 1 1 1>;
+	};
+
+	mdio-bus {
+		status = "okay";
+		mediatek,mdio-mode;
+
+		ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+			qca,ar8327-initvals = <
+				0x10 0x40000000 /* POWER-ON STRAPPING */
+				0x04 0x07600000 /* PORT0 PAD MODE CTRL */
+				0x7c 0x0000007e /* PORT0 STATUS */
+				0x0c 0x05600000 /* PORT6 PAD MODE CTRL */
+				0x94 0x0000007e /* PORT6 STATUS */
+				>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "nd_sd", "wled";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci1814,5592";
+		reg = <0x0 0 0 0 0>;
+		ralink,mtd-eeprom = <&factory 0x0>;
+	};
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&iNIC_rf 0x0>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7620a_fon_fon2601.dts b/iopsys-ramips/dts/mt7620a_fon_fon2601.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ee61c6e59e99c74b642f6f81a8daa588e800fbf5
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_fon_fon2601.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "fon,fon2601", "ralink,mt7620a-soc";
+	model = "Fon FON2601";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power_r {
+			label = "red:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		internet_g {
+			label = "green:internet";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+
+		net_g {
+			label = "green:net";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi_g {
+			label = "green:wifi";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,padding = <32>;
+				label = "firmware";
+				reg = <0x50000 0xf90000>;
+			};
+
+			partition@fe0000 {
+				label = "board_data";
+				reg = <0xfe0000 0x20000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
+	};
+	nd_sd {
+		groups = "nd_sd";
+		function = "sd";
+	};
+	spi_cs {
+		groups = "spi refclk";
+		function = "spi refclk";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
+	port@4 {
+		status = "okay";
+		phy-handle = <&phy4>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&gsw {
+	mediatek,port4 = "gmac";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pa_pins>, <&wled_pins>;
+};
+
+&pcie {
+	status = "okay";
+};
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/GL-MT300A.dts b/iopsys-ramips/dts/mt7620a_glinet_gl-mt300a.dts
similarity index 85%
rename from iopsys-ramips/dts/GL-MT300A.dts
rename to iopsys-ramips/dts/mt7620a_glinet_gl-mt300a.dts
index 2cea9d9beb69b1b42023467cdeee23e6d6f6b9f3..545e11a83f75267bd93f4a679f1e66c1340e748e 100644
--- a/iopsys-ramips/dts/GL-MT300A.dts
+++ b/iopsys-ramips/dts/mt7620a_glinet_gl-mt300a.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,6 +7,10 @@
 	compatible = "glinet,gl-mt300a", "ralink,mt7620a-soc";
 	model = "GL-MT300A";
 
+	aliases {
+		label-mac-device = &wmac;
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -38,8 +40,8 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		reset {
 			label = "reset";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
@@ -60,14 +62,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -79,7 +73,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -134,18 +128,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4000>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled","ephy","uartf","i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wled","ephy","uartf","i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/GL-MT300N.dts b/iopsys-ramips/dts/mt7620a_glinet_gl-mt300n.dts
similarity index 85%
rename from iopsys-ramips/dts/GL-MT300N.dts
rename to iopsys-ramips/dts/mt7620a_glinet_gl-mt300n.dts
index a30792cacea90d28f59f5e2aed7f7e290ae8df3f..575566c5fa6430b11817de86074b07833427dd13 100644
--- a/iopsys-ramips/dts/GL-MT300N.dts
+++ b/iopsys-ramips/dts/mt7620a_glinet_gl-mt300n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,6 +7,10 @@
 	compatible = "glinet,gl-mt300n", "ralink,mt7620a-soc";
 	model = "GL-MT300N";
 
+	aliases {
+		label-mac-device = &wmac;
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -33,8 +35,8 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		reset {
 			label = "reset";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
@@ -55,14 +57,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -74,7 +68,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -125,18 +119,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4000>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled","ephy","i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wled","ephy","i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/GL-MT750.dts b/iopsys-ramips/dts/mt7620a_glinet_gl-mt750.dts
similarity index 85%
rename from iopsys-ramips/dts/GL-MT750.dts
rename to iopsys-ramips/dts/mt7620a_glinet_gl-mt750.dts
index 11133a126a2f833b89087c5fe629483792439237..75823787bfb2f772aebf5424c41c01ae7ec34ccd 100644
--- a/iopsys-ramips/dts/GL-MT750.dts
+++ b/iopsys-ramips/dts/mt7620a_glinet_gl-mt750.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,6 +7,10 @@
 	compatible = "glinet,gl-mt750", "ralink,mt7620a-soc";
 	model = "GL-MT750";
 
+	aliases {
+		label-mac-device = &wmac;
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -33,8 +35,8 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		reset {
 			label = "reset";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
@@ -55,14 +57,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -74,7 +68,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -129,11 +123,12 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4000>;
-	mediatek,portmap = "llllw";
+
+	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
@@ -147,11 +142,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled","ephy","uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wled","ephy","uartf";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/HDRM200.dts b/iopsys-ramips/dts/mt7620a_head-weblink_hdrm200.dts
similarity index 85%
rename from iopsys-ramips/dts/HDRM200.dts
rename to iopsys-ramips/dts/mt7620a_head-weblink_hdrm200.dts
index ad16d027161efd1eb407134415009415c161bc83..a0ebe4fff5d7e6de4eb04b5a8994e642115a2257 100644
--- a/iopsys-ramips/dts/HDRM200.dts
+++ b/iopsys-ramips/dts/mt7620a_head-weblink_hdrm200.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -25,24 +24,23 @@
 		compatible = "gpio-leds";
 
 		rssi {
-			label = "hdrm200:red:rssi";
+			label = "red:rssi";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 
 		led_system: system {
-			label = "hdrm200:green:system";
+			label = "green:system";
 			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 		};
 
 		air {
-			label = "hdrm200:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -98,10 +96,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -123,12 +117,11 @@
 };
 
 &ethernet {
-	status = "okay";
-
-	mtd-mac-address = <&factory 0x4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 
+	mtd-mac-address = <&factory 0x4>;
+
 	port@4 {
 		status = "okay";
 		phy-handle = <&phy4>;
@@ -157,16 +150,14 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "pa", "spi refclk",
-				       "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf", "pa", "spi refclk",
+			       "wled";
+		function = "gpio";
 	};
 };
 
@@ -184,5 +175,5 @@
 };
 
 &uart {
-    status = "okay";
+	status = "okay";
 };
diff --git a/iopsys-ramips/dts/HC5661.dts b/iopsys-ramips/dts/mt7620a_hiwifi_hc5661.dts
similarity index 67%
rename from iopsys-ramips/dts/HC5661.dts
rename to iopsys-ramips/dts/mt7620a_hiwifi_hc5661.dts
index 091483a131f70f62002e6ccc91d7fea571f1343e..90ce3c92d78c538a51c30364ba3608c8225b5fd7 100644
--- a/iopsys-ramips/dts/HC5661.dts
+++ b/iopsys-ramips/dts/mt7620a_hiwifi_hc5661.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "HC5X61.dtsi"
+#include "mt7620a_hiwifi_hc5x61.dtsi"
 
 / {
 	compatible = "hiwifi,hc5661", "hiwifi,hc5x61", "ralink,mt7620a-soc";
@@ -17,23 +15,19 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "hc5661:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "hc5661:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "hc5661:blue:wlan2g";
+			label = "blue:wlan2g";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-		};
-
-		wlan5g {
-			label = "hc5661:blue:wlan5g";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
 		};
 	};
 };
diff --git a/iopsys-ramips/dts/HC5761.dts b/iopsys-ramips/dts/mt7620a_hiwifi_hc5761.dts
similarity index 77%
rename from iopsys-ramips/dts/HC5761.dts
rename to iopsys-ramips/dts/mt7620a_hiwifi_hc5761.dts
index dff129a93834f08df49a83514f4bdf5bd0ac5bd3..5b6777998413225f5e90195cb690d1020059d0c1 100644
--- a/iopsys-ramips/dts/HC5761.dts
+++ b/iopsys-ramips/dts/mt7620a_hiwifi_hc5761.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "HC5X61.dtsi"
+#include "mt7620a_hiwifi_hc5x61.dtsi"
 
 / {
 	compatible = "hiwifi,hc5761", "hiwifi,hc5x61", "ralink,mt7620a-soc";
@@ -17,23 +15,25 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "hc5761:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "hc5761:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "hc5761:blue:wlan2g";
+			label = "blue:wlan2g";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
 		};
 
 		wlan5g {
-			label = "hc5761:blue:wlan5g";
+			label = "blue:wlan5g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
 		};
 	};
 };
diff --git a/iopsys-ramips/dts/HC5861.dts b/iopsys-ramips/dts/mt7620a_hiwifi_hc5861.dts
similarity index 84%
rename from iopsys-ramips/dts/HC5861.dts
rename to iopsys-ramips/dts/mt7620a_hiwifi_hc5861.dts
index b1d5ce4fa1459aa3f059373f467b5e749d1d2280..08163e56ba8c519c697ed71b797222857044cda1 100644
--- a/iopsys-ramips/dts/HC5861.dts
+++ b/iopsys-ramips/dts/mt7620a_hiwifi_hc5861.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "HC5X61.dtsi"
+#include "mt7620a_hiwifi_hc5x61.dtsi"
 
 / {
 	compatible = "hiwifi,hc5861", "hiwifi,hc5x61", "ralink,mt7620a-soc";
@@ -17,27 +15,29 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "hc5861:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "hc5861:blue:wlan2g";
+			label = "blue:wlan2g";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
 		};
 
 		internet {
-			label = "hc5861:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "hc5861:blue:wlan5g";
+			label = "blue:wlan5g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
 		};
 
 		turbo {
-			label = "hc5861:blue:turbo";
+			label = "blue:turbo";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -69,11 +69,12 @@
 };
 
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&factory 0x4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
-	mediatek,portmap = "wllll";
+
+	mtd-mac-address = <&factory 0x4>;
+
+	mediatek,portmap = "llllw";
 
 	port@5 {
 		status = "okay";
diff --git a/iopsys-ramips/dts/HC5X61.dtsi b/iopsys-ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
similarity index 86%
rename from iopsys-ramips/dts/HC5X61.dtsi
rename to iopsys-ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
index 09b303fd337b6bb10a9aa93d99b97cafcbc9d668..6349ec5365c674829187aed468ef0957cbb964c4 100644
--- a/iopsys-ramips/dts/HC5X61.dtsi
+++ b/iopsys-ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
@@ -11,8 +11,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -39,14 +38,6 @@
 	ralink,wdtmux = <1>;
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
@@ -54,7 +45,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -112,7 +103,9 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
@@ -121,16 +114,14 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/C108.dts b/iopsys-ramips/dts/mt7620a_hnet_c108.dts
similarity index 50%
rename from iopsys-ramips/dts/C108.dts
rename to iopsys-ramips/dts/mt7620a_hnet_c108.dts
index 2d89d34ad5056ed28a3f98b8092d57dcb7a20cbb..4035139ed169a79760266fd26253742994c8d0f2 100644
--- a/iopsys-ramips/dts/C108.dts
+++ b/iopsys-ramips/dts/mt7620a_hnet_c108.dts
@@ -1,38 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
 /*
- *  BSD LICENSE
- *
  *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
  *  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- *    * Redistributions of source code must retain the above copyright
- *      notice, this list of conditions and the following disclaimer.
- *    * Redistributions in binary form must reproduce the above copyright
- *      notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the
- *      distribution.
- *    * Neither the name of Broadcom Corporation nor the names of its
- *      contributors may be used to endorse or promote products derived
- *      from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -68,34 +39,33 @@
 		compatible = "gpio-leds";
 
 		sdcard {
-			label = "c108:green:sdcard";
+			label = "green:sdcard";
 			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 		};
 
 		modem_green {
-			label = "c108:green:modem";
+			label = "green:modem";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_red {
-			label = "c108:red:modem";
+			label = "red:modem";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		lan_red {
-			label = "c108:red:lan";
+			label = "red:lan";
 			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_lan_green: lan_green {
-			label = "c108:green:lan";
+			label = "green:lan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -116,7 +86,7 @@
 &spi0 {
 	status = "okay";
 
-	en25q128@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -170,15 +140,13 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "spi refclk", "ephy";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf", "spi refclk", "ephy";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WN-AC1167GR.dts b/iopsys-ramips/dts/mt7620a_iodata_wn-ac1167gr.dts
similarity index 84%
rename from iopsys-ramips/dts/WN-AC1167GR.dts
rename to iopsys-ramips/dts/mt7620a_iodata_wn-ac1167gr.dts
index 14c851a3a880bab3cd7586a3a6369d5b40ae6b1d..7044a511bcc97f32a0db83cbc7ab97e83df9cebd 100644
--- a/iopsys-ramips/dts/WN-AC1167GR.dts
+++ b/iopsys-ramips/dts/mt7620a_iodata_wn-ac1167gr.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -17,39 +16,33 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wn-ac1167gr:green:power";
+			label = "green:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		wlan2g {
-			label = "wn-ac1167gr:green:wlan2g";
+			label = "green:wlan2g";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		notification {
-			label = "wn-ac1167gr:green:notification";
+			label = "green:notification";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "wn-ac1167gr:green:wlan5g";
+			label = "green:wlan5g";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -97,8 +90,8 @@
 				read-only;
 			};
 
-			Factory: partition@40000 {
-				label = "Factory";
+			factory: partition@40000 {
+				label = "factory";
 				reg = <0x40000 0x8000>;
 				read-only;
 			};
@@ -145,7 +138,8 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
-	mtd-mac-address = <&Factory 0x4>;
+
+	mtd-mac-address = <&factory 0x4>;
 
 	port@5 {
 		status = "okay";
@@ -190,12 +184,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -212,5 +204,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&Factory 0x0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WN-AC733GR3.dts b/iopsys-ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
similarity index 83%
rename from iopsys-ramips/dts/WN-AC733GR3.dts
rename to iopsys-ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
index ea837c4d34a757209b5104ca9f0b7d1da457c358..e29431dc8d285757ea5279a4e0d3890e0ed4838d 100644
--- a/iopsys-ramips/dts/WN-AC733GR3.dts
+++ b/iopsys-ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620a.dtsi"
 
@@ -17,39 +16,33 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wn-ac733gr3:green:power";
+			label = "green:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		notification {
-			label = "wn-ac733gr3:green:notification";
+			label = "green:notification";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "wn-ac733gr3:green:wlan2g";
+			label = "green:wlan2g";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "wn-ac733gr3:green:wlan5g";
+			label = "green:wlan5g";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -111,8 +104,8 @@
 				read-only;
 			};
 
-			Factory: partition@40000 {
-				label = "Factory";
+			factory: partition@40000 {
+				label = "factory";
 				reg = <0x40000 0x8000>;
 				read-only;
 			};
@@ -153,7 +146,8 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins>;
-	mtd-mac-address = <&Factory 0x4>;
+
+	mtd-mac-address = <&factory 0x4>;
 
 	port@5 {
 		status = "okay";
@@ -171,12 +165,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "mdio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "mdio";
+		function = "gpio";
 	};
 };
 
@@ -194,5 +186,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&Factory 0x0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/mt7620a_iptime.dtsi b/iopsys-ramips/dts/mt7620a_iptime.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..c7c90ca722c9ce403ac0e7c55ecfcaa860e695fe
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_iptime.dtsi
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &ethernet;
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uboot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				label = "config";
+				reg = <0x20000 0x10000>;
+				read-only;
+			};
+
+			firmware: partition@30000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+			};
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&uboot 0x1fc20>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&uboot 0x1f800>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
+	};
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&wled_pins>;
+
+	ralink,mtd-eeprom = <&uboot 0x1f400>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_iptime_a1004ns.dts b/iopsys-ramips/dts/mt7620a_iptime_a1004ns.dts
new file mode 100644
index 0000000000000000000000000000000000000000..20d055791634953490fa00ca53fef8db6a5572f5
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_iptime_a1004ns.dts
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_iptime.dtsi"
+
+/ {
+	compatible = "iptime,a1004ns", "ralink,mt7620a-soc";
+	model = "ipTIME A1004ns";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&firmware {
+	reg = <0x30000 0xfd0000>;
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "spi refclk";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
+	port@5 {
+		status = "okay";
+		mediatek,fixed-link = <1000 1 1 1>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1 {
+			reg = <1>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@2 {
+			reg = <2>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@3 {
+			reg = <3>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1f {
+			reg = <0x1f>;
+			phy-mode = "rgmii";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_iptime_a104ns.dts b/iopsys-ramips/dts/mt7620a_iptime_a104ns.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c997d68cd12fbea42248a8c955a6ed45cff2b9b8
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_iptime_a104ns.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_iptime.dtsi"
+
+/ {
+	compatible = "iptime,a104ns", "ralink,mt7620a-soc";
+	model = "ipTIME A104ns";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&firmware {
+	reg = <0x30000 0x7d0000>;
+};
+
+&state_default {
+	gpio {
+		groups = "uartf", "spi refclk";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/U25AWF-H1.dts b/iopsys-ramips/dts/mt7620a_kimax_u25awf-h1.dts
similarity index 82%
rename from iopsys-ramips/dts/U25AWF-H1.dts
rename to iopsys-ramips/dts/mt7620a_kimax_u25awf-h1.dts
index 4b4d0b63569e9430e1a7f8edbe88d97426cf39ef..218dd7a761dd48cf360eeef714050de1ba9f4c3e 100644
--- a/iopsys-ramips/dts/U25AWF-H1.dts
+++ b/iopsys-ramips/dts/mt7620a_kimax_u25awf-h1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -31,12 +28,12 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "u25awf:red:wifi";
+			label = "red:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "u25awf:green:lan";
+			label = "green:lan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -53,7 +50,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -103,14 +100,12 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "uartf", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "uartf", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/LR-25G001.dts b/iopsys-ramips/dts/mt7620a_lava_lr-25g001.dts
similarity index 88%
rename from iopsys-ramips/dts/LR-25G001.dts
rename to iopsys-ramips/dts/mt7620a_lava_lr-25g001.dts
index 20974c93e2547403f0279a44d2474a22dc723098..962ef3371d6343a6f00c21c9e022a8006a242331 100644
--- a/iopsys-ramips/dts/LR-25G001.dts
+++ b/iopsys-ramips/dts/mt7620a_lava_lr-25g001.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -37,17 +34,17 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "lr-25g001:green:status";
+			label = "green:status";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2g {
-			label = "lr-25g001:green:wifi2g";
+			label = "green:wifi2g";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi5g {
-			label = "lr-25g001:green:wifi5g";
+			label = "green:wifi5g";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -64,10 +61,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
@@ -111,7 +104,6 @@
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 
@@ -171,11 +163,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf", "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf", "i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620a_lb-link_bl-w1200.dts b/iopsys-ramips/dts/mt7620a_lb-link_bl-w1200.dts
new file mode 100644
index 0000000000000000000000000000000000000000..bb1303d4fb40a8d80322b727dc5992db96795711
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_lb-link_bl-w1200.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
+	model = "LB-Link BL-W1200";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+		led-upgrade = &led_wps;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset_wps {
+			label = "reset_wps";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_wps: wps {
+			label = "green:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uartf", "spi refclk";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
+	mediatek,portmap = "wllll";
+
+	port@5 {
+		status = "okay";
+		mediatek,fixed-link = <1000 1 1 1>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1 {
+			reg = <1>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@2 {
+			reg = <2>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@3 {
+			reg = <3>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1f {
+			reg = <0x1f>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/Y1.dts b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dts
similarity index 75%
rename from iopsys-ramips/dts/Y1.dts
rename to iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dts
index 87eb1bf4c5231abbc903456ef2b98ef6006c2298..2bea987b4236e97f412a4f43a58d28b6fabaa5fb 100644
--- a/iopsys-ramips/dts/Y1.dts
+++ b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "Y1.dtsi"
+#include "mt7620a_lenovo_newifi-y1.dtsi"
 
 / {
 	compatible = "lenovo,newifi-y1", "ralink,mt7620a-soc";
@@ -11,40 +9,41 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "y1:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan1 {
-			label = "y1:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2 {
-			label = "y1:blue:wifi5g";
+			label = "blue:wifi5g";
 			gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "y1:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		lan {
-			label = "y1:blue:lan";
+			label = "blue:lan";
 			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "y1:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -53,6 +52,8 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
-	mtd-mac-address = <&factory 0x4>;
+
+	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "llllw";
 };
diff --git a/iopsys-ramips/dts/Y1.dtsi b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dtsi
similarity index 83%
rename from iopsys-ramips/dts/Y1.dtsi
rename to iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dtsi
index 5d6c9922fd3a991a59829d31354cbddf3c9ac424..c7b7ea7b90a4c5d76e3ea944345b13688f51e70d 100644
--- a/iopsys-ramips/dts/Y1.dtsi
+++ b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1.dtsi
@@ -11,8 +11,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -22,10 +21,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -37,7 +32,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -95,16 +90,14 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf", "wled", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf", "wled", "nd_sd";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/Y1S.dts b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1s.dts
similarity index 85%
rename from iopsys-ramips/dts/Y1S.dts
rename to iopsys-ramips/dts/mt7620a_lenovo_newifi-y1s.dts
index 6cdf0b5cdc88b6141f8dc8bd7575aad8d00990d4..a07683ed4abe31c5998192f1a551da86112ba4b0 100644
--- a/iopsys-ramips/dts/Y1S.dts
+++ b/iopsys-ramips/dts/mt7620a_lenovo_newifi-y1s.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "Y1.dtsi"
+#include "mt7620a_lenovo_newifi-y1.dtsi"
 
 / {
 	compatible = "lenovo,newifi-y1s", "lenovo,newifi-y1", "ralink,mt7620a-soc";
@@ -11,6 +9,7 @@
 		led-failsafe = &led_power_blue;
 		led-running = &led_power_blue;
 		led-upgrade = &led_power_blue;
+		label-mac-device = &ethernet;
 	};
 
 	gpio_export {
@@ -38,49 +37,50 @@
 		compatible = "gpio-leds";
 
 		power1 {
-			label = "y1s:yellow:power";
+			label = "yellow:power";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_blue: power2 {
-			label = "y1s:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan1 {
-			label = "y1s:yellow:wifi";
+			label = "yellow:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2 {
-			label = "y1s:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 		};
 
 		usb1 {
-			label = "y1s:yellow:usb";
+			label = "yellow:usb";
 			gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
 		};
 
 		usb2 {
-			label = "y1s:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		internet {
-			label = "y1s:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&factory 0x4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "wllll";
 
 	port@4 {
diff --git a/iopsys-ramips/dts/E1700.dts b/iopsys-ramips/dts/mt7620a_linksys_e1700.dts
similarity index 79%
rename from iopsys-ramips/dts/E1700.dts
rename to iopsys-ramips/dts/mt7620a_linksys_e1700.dts
index 2ea7400a71ef9ebd792daf36a2785398fe8d85d0..2619a4653a5255a35b5bc5dda60a931121864b82 100644
--- a/iopsys-ramips/dts/E1700.dts
+++ b/iopsys-ramips/dts/mt7620a_linksys_e1700.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
- * Device Tree file for the Linksys E1700
- *
  * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
  */
 
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -27,8 +20,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -47,12 +39,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "e1700:green:power";
+			label = "green:power";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "e1700:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -61,7 +53,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -98,21 +90,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&factory 0x28>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 
+	mtd-mac-address = <&factory 0x28>;
+
 	port@5 {
 		status = "okay";
 		mediatek,fixed-link = <1000 1 1 1>;
@@ -159,5 +149,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MicroWRT.dts b/iopsys-ramips/dts/mt7620a_microduino_microwrt.dts
similarity index 80%
rename from iopsys-ramips/dts/MicroWRT.dts
rename to iopsys-ramips/dts/mt7620a_microduino_microwrt.dts
index a010a9c6262b34ef17af29484f8a0ea487287937..4307d51424a01ac221cd93666cdbd978a38c5dd6 100644
--- a/iopsys-ramips/dts/MicroWRT.dts
+++ b/iopsys-ramips/dts/mt7620a_microduino_microwrt.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,8 +12,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -31,18 +28,10 @@
 	};
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -90,19 +79,19 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "wled", "i2c", "wdt", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "wled", "i2c", "wdt", "uartf";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620a_netgear_ex2700.dts b/iopsys-ramips/dts/mt7620a_netgear_ex2700.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9ed0883b456c3d1f7ad6871b2b9321c9218a8857
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex2700.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2016 Joseph C. Lehner <joseph.c.lehner@gmail.com>
+ */
+
+#include "mt7620a_netgear_ex2700_wn3000rp-v3.dtsi"
+
+/ {
+	compatible = "netgear,ex2700", "ralink,mt7620a-soc";
+	model = "Netgear EX2700";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: power_g {
+			label = "green:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		power_r {
+			label = "red:power";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		device_g {
+			label = "green:device";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+		};
+
+		device_r {
+			label = "red:device";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+
+		router_g {
+			label = "green:router";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+		};
+
+		router_r {
+			label = "red:router";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&partitions {
+	partition@0 {
+		label = "u-boot";
+		reg = <0x0 0x30000>;
+		read-only;
+	};
+
+	partition@30000 {
+		label = "u-boot-env";
+		reg = <0x30000 0x10000>;
+		read-only;
+	};
+
+	partition@40000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x40000 0x3b0000>;
+	};
+
+	art: partition@3f0000 {
+		label = "art";
+		reg = <0x3f0000 0x10000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_netgear_ex2700_wn3000rp-v3.dtsi b/iopsys-ramips/dts/mt7620a_netgear_ex2700_wn3000rp-v3.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..e7b1f4bf40dc8deeced1b55f782edcf427bc5e30
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex2700_wn3000rp-v3.dtsi
@@ -0,0 +1,58 @@
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&art 0x0>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&art 0x1000>;
+	mtd-mac-address = <&art 0x6>;
+};
+
+&state_default {
+	default {
+		groups = "i2c", "uartf", "spi refclk";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_netgear_ex3700.dts b/iopsys-ramips/dts/mt7620a_netgear_ex3700.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0ab84f7e273e982de591a826bc1257ee0ec66e14
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex3700.dts
@@ -0,0 +1,8 @@
+/* This file is released into the public domain */
+
+#include "mt7620a_netgear_ex3x00_ex61xx.dtsi"
+
+/ {
+	compatible = "netgear,ex3700", "ralink,mt7620a-soc";
+	model = "Netgear EX3700/EX3800";
+};
diff --git a/iopsys-ramips/dts/EX3700.dts b/iopsys-ramips/dts/mt7620a_netgear_ex3x00_ex61xx.dtsi
similarity index 67%
rename from iopsys-ramips/dts/EX3700.dts
rename to iopsys-ramips/dts/mt7620a_netgear_ex3x00_ex61xx.dtsi
index d971909b29f59ea20b08fb14b10057317c9bb065..11e8f7fce6b24efbc28c716ed1e6015e96c23939 100644
--- a/iopsys-ramips/dts/EX3700.dts
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex3x00_ex61xx.dtsi
@@ -1,87 +1,71 @@
-/* This file is released into the public domain */
-
-/dts-v1/;
+#include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "mt7620a.dtsi"
-
 / {
-	compatible = "netgear,ex3700", "ralink,mt7620a-soc";
-	model = "Netgear EX3700/EX3800";
-
 	aliases {
-		led-boot = &led_power_green;
-		led-failsafe = &led_power_green;
+		led-boot = &led_power_amber;
+		led-failsafe = &led_power_amber;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_green;
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
-		led_power_green: power_g {
-			label = "ex3700:green:power";
+		led_power_green: power_green {
+			label = "green:power";
 			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
-		power_a {
-			label = "ex3700:amber:power";
+		led_power_amber: power_amber {
+			label = "amber:power";
 			gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
 		};
 
-		router_g {
-			label = "ex3700:green:router";
+		router_green {
+			label = "green:router";
 			gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
 		};
 
-		router_r {
-			label = "ex3700:red:router";
+		router_red {
+			label = "red:router";
 			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
 		};
 
-		device_g {
-			label = "ex3700:green:device";
+		device_green {
+			label = "green:device";
 			gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
 		};
 
-		device_r {
-			label = "ex3700:red:device";
+		device_red {
+			label = "red:device";
 			gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "ex3700:green:wps";
+			label = "green:wps";
 			gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
 		};
 	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-
-		wps {
-			label = "wps";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WPS_BUTTON>;
-		};
-	};
-};
-
-&gpio0 {
-	status = "okay";
 };
 
 &gpio2 {
@@ -91,10 +75,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -146,7 +130,7 @@
 
 &pcie0 {
 	mt76@0,0 {
-		reg = <0x0000 0 0 0 0 >;
+		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x8000>;
 		ieee80211-freq-limit = <5000000 6000000>;
 	};
@@ -160,11 +144,9 @@
 	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "rgmii2", "spi refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "rgmii2", "spi refclk";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620a_netgear_ex6120.dts b/iopsys-ramips/dts/mt7620a_netgear_ex6120.dts
new file mode 100644
index 0000000000000000000000000000000000000000..2d376275a0b317a1f51a6a3139bbd6e875687f7d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex6120.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_netgear_ex3x00_ex61xx.dtsi"
+
+/ {
+	compatible = "netgear,ex6120", "ralink,mt7620a-soc";
+	model = "Netgear EX6120";
+};
diff --git a/iopsys-ramips/dts/mt7620a_netgear_ex6130.dts b/iopsys-ramips/dts/mt7620a_netgear_ex6130.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0cb4dc6f27b20523f368dc03c2fb9b07049fb2f5
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_ex6130.dts
@@ -0,0 +1,12 @@
+/* This file is released into the public domain */
+
+#include "mt7620a_netgear_ex3x00_ex61xx.dtsi"
+
+/ {
+	compatible = "netgear,ex6130", "ralink,mt7620a-soc";
+	model = "Netgear EX6130";
+
+	aliases {
+		label-mac-device = &ethernet;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_netgear_wn3000rp-v3.dts b/iopsys-ramips/dts/mt7620a_netgear_wn3000rp-v3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c9b180624348827c59123c2e6864a8f29190c426
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netgear_wn3000rp-v3.dts
@@ -0,0 +1,91 @@
+/* This file is released into the public domain */
+
+#include "mt7620a_netgear_ex2700_wn3000rp-v3.dtsi"
+
+/ {
+	compatible = "netgear,wn3000rp-v3", "ralink,mt7620a-soc";
+	model = "Netgear WN3000RP v3";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: power_g {
+			label = "green:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		power_r {
+			label = "red:power";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		client_g {
+			label = "green:client";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+		};
+
+		client_r {
+			label = "red:client";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+
+		router_g {
+			label = "green:router";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+		};
+
+		router_r {
+			label = "red:router";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+
+		l_arrow {
+			label = "blue:leftarrow";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+		};
+
+		r_arrow {
+			label = "blue:rightarrow";
+			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&partitions {
+	partition@0 {
+		label = "u-boot";
+		reg = <0x0 0x30000>;
+		read-only;
+	};
+
+	partition@30000 {
+		label = "u-boot-env";
+		reg = <0x30000 0x10000>;
+		read-only;
+	};
+
+	partition@40000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x40000 0x7b0000>;
+	};
+
+	art: partition@7f0000 {
+		label = "art";
+		reg = <0x7f0000 0x10000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_netis_wf2770.dts b/iopsys-ramips/dts/mt7620a_netis_wf2770.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ab8c61b1d8260d65ad8f6f1ed09fbca67cc9f83e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_netis_wf2770.dts
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "netis,wf2770", "ralink,mt7620a-soc";
+	model = "NETIS WF2770";
+
+	leds {
+		compatible = "gpio-leds";
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		led-toggle {
+			label = "led-toggle";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_LIGHTS_TOGGLE>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x4>;
+
+	port@5 {
+		status = "okay";
+		mediatek,fixed-link = <1000 1 1 1>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1 {
+			reg = <1>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@2 {
+			reg = <2>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@3 {
+			reg = <3>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+
+		ethernet-phy@1f {
+			reg = <0x1f>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/iopsys-ramips/dts/OY-0001.dts b/iopsys-ramips/dts/mt7620a_ohyeah_oy-0001.dts
similarity index 81%
rename from iopsys-ramips/dts/OY-0001.dts
rename to iopsys-ramips/dts/mt7620a_ohyeah_oy-0001.dts
index 6b93b8d089886d57baacc8edd24a090974a8f16b..07f606fce45ce75011946c84052dab99d72e3d5a 100644
--- a/iopsys-ramips/dts/OY-0001.dts
+++ b/iopsys-ramips/dts/mt7620a_ohyeah_oy-0001.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,19 +22,18 @@
 		compatible = "gpio-leds";
 
 		led_power: powerled {
-			label = "oy-0001:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifiled {
-			label = "oy-0001:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		s1 {
 			label = "reset";
@@ -46,10 +43,6 @@
 	};
 };
 
-&gpio2 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
@@ -57,7 +50,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -94,18 +87,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -114,7 +108,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/K2G.dts b/iopsys-ramips/dts/mt7620a_phicomm_k2g.dts
similarity index 85%
rename from iopsys-ramips/dts/K2G.dts
rename to iopsys-ramips/dts/mt7620a_phicomm_k2g.dts
index 4ca52297459c67cdd69cf23c7b4aa35e318621e0..e01c60a6951caf6540502ef25e3418d37a887d98 100644
--- a/iopsys-ramips/dts/K2G.dts
+++ b/iopsys-ramips/dts/mt7620a_phicomm_k2g.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -21,24 +19,23 @@
 		compatible = "gpio-leds";
 
 		led_blue: blue {
-			label = "k2g:blue:status";
+			label = "blue:status";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		yellow {
-			label = "k2g:yellow:status";
+			label = "yellow:status";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		red {
-			label = "k2g:red:status";
+			label = "red:status";
 			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -51,7 +48,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <24000000>;
@@ -94,19 +91,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
 	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "llllw";
 
 	port@5 {
@@ -138,7 +135,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
diff --git a/iopsys-ramips/dts/PSG1208.dts b/iopsys-ramips/dts/mt7620a_phicomm_psg1208.dts
similarity index 83%
rename from iopsys-ramips/dts/PSG1208.dts
rename to iopsys-ramips/dts/mt7620a_phicomm_psg1208.dts
index 564b083f822dc89d7d042fdec63e3884b3d43474..ea87d64ecc3925302c55b31222eac3e5262e1c91 100644
--- a/iopsys-ramips/dts/PSG1208.dts
+++ b/iopsys-ramips/dts/mt7620a_phicomm_psg1208.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,18 @@
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "psg1208:white:wps";
+			label = "white:wps";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "psg1208:white:wlan2g";
+			label = "white:wlan2g";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -53,7 +50,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -90,19 +87,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -119,5 +116,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/PSG1218.dtsi b/iopsys-ramips/dts/mt7620a_phicomm_psg1218.dtsi
similarity index 67%
rename from iopsys-ramips/dts/PSG1218.dtsi
rename to iopsys-ramips/dts/mt7620a_phicomm_psg1218.dtsi
index 33eabb6f7802398bcd4802d89cd09c55a580d498..4163a9cd4382e98036c118d4127e7f9974ba784a 100644
--- a/iopsys-ramips/dts/PSG1218.dtsi
+++ b/iopsys-ramips/dts/mt7620a_phicomm_psg1218.dtsi
@@ -6,9 +6,15 @@
 / {
 	compatible = "phicomm,psg1218", "ralink,mt7620a-soc";
 
+	aliases {
+		led-boot = &led_blue;
+		led-failsafe = &led_blue;
+		led-running = &led_blue;
+		led-upgrade = &led_blue;
+	};
+
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -16,16 +22,32 @@
 			linux,code = <KEY_RESTART>;
 		};
 	};
-};
 
-&gpio0 {
-	status = "okay";
+	leds {
+		compatible = "gpio-leds";
+
+		led_blue: blue {
+			label = "blue:status";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		yellow {
+			label = "yellow:status";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		red {
+			label = "red:status";
+			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+		};
+	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -75,5 +97,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/mt7620a_phicomm_psg1218a.dts b/iopsys-ramips/dts/mt7620a_phicomm_psg1218a.dts
new file mode 100644
index 0000000000000000000000000000000000000000..baa0d8b261797652b7e01bef8fee5dc2ba3f70fe
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_phicomm_psg1218a.dts
@@ -0,0 +1,27 @@
+#include "mt7620a_phicomm_psg1218.dtsi"
+
+/ {
+	compatible = "phicomm,psg1218a", "phicomm,psg1218", "ralink,mt7620a-soc";
+	model = "Phicomm PSG1218 rev.A";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
+	mediatek,portmap = "llllw";
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pa_pins>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_phicomm_psg1218b.dts b/iopsys-ramips/dts/mt7620a_phicomm_psg1218b.dts
new file mode 100644
index 0000000000000000000000000000000000000000..f7e70c92c8c56bb5ebb714ac8193c3b3e020ba38
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_phicomm_psg1218b.dts
@@ -0,0 +1,20 @@
+#include "mt7620a_phicomm_psg1218.dtsi"
+
+/ {
+	compatible = "phicomm,psg1218b", "phicomm,psg1218", "ralink,mt7620a-soc";
+	model = "Phicomm PSG1218 rev.B";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "pa";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+};
diff --git a/iopsys-ramips/dts/CS-QR10.dts b/iopsys-ramips/dts/mt7620a_planex_cs-qr10.dts
similarity index 80%
rename from iopsys-ramips/dts/CS-QR10.dts
rename to iopsys-ramips/dts/mt7620a_planex_cs-qr10.dts
index dadd37acba612812d67293d1f638753282366d8d..aa7ddb0a2520aff3849b5a3b0caf0937f29e458b 100644
--- a/iopsys-ramips/dts/CS-QR10.dts
+++ b/iopsys-ramips/dts/mt7620a_planex_cs-qr10.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,14 +18,13 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "cs-qr10:red:power";
+			label = "red:power";
 			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		s1 {
 			label = "reset";
@@ -43,22 +40,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &i2c {
 	status = "okay";
 };
@@ -72,7 +57,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -117,23 +102,23 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi refclk", "rgmii1";
-			ralink,function = "gpio";
-		};
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "wdt refclk";
-		};
+&state_default {
+	gpio {
+		groups = "spi refclk", "rgmii1";
+		function = "gpio";
+	};
+	wdt {
+		groups = "wdt";
+		function = "wdt refclk";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -154,5 +139,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DB-WRT01.dts b/iopsys-ramips/dts/mt7620a_planex_db-wrt01.dts
similarity index 83%
rename from iopsys-ramips/dts/DB-WRT01.dts
rename to iopsys-ramips/dts/mt7620a_planex_db-wrt01.dts
index bb2c14e0962731c349d281b5333ae7b1601bc9ec..eb373e9aa2470941254547231afdd4a26cc8bded 100644
--- a/iopsys-ramips/dts/DB-WRT01.dts
+++ b/iopsys-ramips/dts/mt7620a_planex_db-wrt01.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,14 +18,13 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "db-wrt01:orange:power";
+			label = "orange:power";
 			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		s1 {
 			label = "wps";
@@ -44,7 +41,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -81,19 +78,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi refclk", "rgmii1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi refclk", "rgmii1";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -102,5 +99,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MZK-750DHP.dts b/iopsys-ramips/dts/mt7620a_planex_mzk-750dhp.dts
similarity index 82%
rename from iopsys-ramips/dts/MZK-750DHP.dts
rename to iopsys-ramips/dts/mt7620a_planex_mzk-750dhp.dts
index a4a6c9b8be8936c2f7040e778d1ff43a5b4c4f0d..df9c9689c34e4b098559bfabdc3b54baec660324 100644
--- a/iopsys-ramips/dts/MZK-750DHP.dts
+++ b/iopsys-ramips/dts/mt7620a_planex_mzk-750dhp.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,24 +18,23 @@
 		compatible = "gpio-leds";
 
 		wps {
-			label = "mzk-750dhp:green:wps";
+			label = "green:wps";
 			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "mzk-750dhp:green:power";
+			label = "green:power";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "mzk-750dhp:green:wlan5g";
+			label = "green:wlan5g";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		s1 {
 			label = "reset";
@@ -64,7 +61,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -101,19 +98,19 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi refclk", "rgmii1", "nd_sd";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -122,7 +119,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
diff --git a/iopsys-ramips/dts/MZK-EX300NP.dts b/iopsys-ramips/dts/mt7620a_planex_mzk-ex300np.dts
similarity index 79%
rename from iopsys-ramips/dts/MZK-EX300NP.dts
rename to iopsys-ramips/dts/mt7620a_planex_mzk-ex300np.dts
index 6578d952c003b6fe7cd5110b6b9bccf89d866b7e..5459886a3a6c1952e506be49fb340ba1bf9d5daf 100644
--- a/iopsys-ramips/dts/MZK-EX300NP.dts
+++ b/iopsys-ramips/dts/mt7620a_planex_mzk-ex300np.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,39 +18,38 @@
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "mzk-ex300np:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "mzk-ex300np:green:wps";
+			label = "green:wps";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 		};
 
 		rep {
-			label = "mzk-ex300np:blue:rep";
+			label = "blue:rep";
 			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi1 {
-			label = "mzk-ex300np:blue:wifi1";
+			label = "blue:wifi1";
 			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "mzk-ex300np:blue:wifi2";
+			label = "blue:wifi2";
 			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi3 {
-			label = "mzk-ex300np:blue:wifi3";
+			label = "blue:wifi3";
 			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -79,7 +76,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -121,22 +118,22 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi refclk", "rgmii1", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi refclk", "rgmii1", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MZK-EX750NP.dts b/iopsys-ramips/dts/mt7620a_planex_mzk-ex750np.dts
similarity index 80%
rename from iopsys-ramips/dts/MZK-EX750NP.dts
rename to iopsys-ramips/dts/mt7620a_planex_mzk-ex750np.dts
index 497693d3937865d7c75aeadc8f26026b80810c4a..457d4fd552c08e922a8d9a5983bf426abf49b3c9 100644
--- a/iopsys-ramips/dts/MZK-EX750NP.dts
+++ b/iopsys-ramips/dts/mt7620a_planex_mzk-ex750np.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,44 +18,43 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "mzk-ex750np:red:power";
+			label = "red:power";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "mzk-ex750np:red:wifi";
+			label = "red:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "mzk-ex750np:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		rep {
-			label = "mzk-ex750np:blue:rep";
+			label = "blue:rep";
 			gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi1 {
-			label = "mzk-ex750np:blue:wifi1";
+			label = "blue:wifi1";
 			gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "mzk-ex750np:blue:wifi2";
+			label = "blue:wifi2";
 			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi3 {
-			label = "mzk-ex750np:blue:wifi3";
+			label = "blue:wifi3";
 			gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -84,7 +81,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -126,24 +123,24 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf", "nd_sd", "rgmii2", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
diff --git a/iopsys-ramips/dts/MT7620a.dts b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-evb.dts
similarity index 87%
rename from iopsys-ramips/dts/MT7620a.dts
rename to iopsys-ramips/dts/mt7620a_ralink_mt7620a-evb.dts
index 9166fdc57653e08dec6e349a207da5b1c8fc41e3..7743df06fb49b067ecaa2b3c728ccd8f449a21fd 100644
--- a/iopsys-ramips/dts/MT7620a.dts
+++ b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-evb.dts
@@ -1,17 +1,14 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
+	compatible = "ralink,mt7620a-evb", "ralink,mt7620a-soc";
 	model = "Ralink MT7620a + MT7610e evaluation board";
 
 	keys {
 		compatible = "gpio-keys";
-		poll-interval = <20>;
 
 		s2 {
 			label = "S2";
@@ -30,7 +27,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -67,19 +64,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
 	mediatek,portmap = "llllw";
 
 	port@4 {
diff --git a/iopsys-ramips/dts/MT7620a_MT7530.dts b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7530-evb.dts
similarity index 87%
rename from iopsys-ramips/dts/MT7620a_MT7530.dts
rename to iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7530-evb.dts
index 3fc19d907128fdd545f0fec4c19572952a36e628..4a09755967c8d889d402a4dcdb0b00ffd6d359c4 100644
--- a/iopsys-ramips/dts/MT7620a_MT7530.dts
+++ b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7530-evb.dts
@@ -1,16 +1,14 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 / {
-	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
+	compatible = "ralink,mt7620a-mt7530-evb", "ralink,mt7620a-soc";
 	model = "Ralink MT7620a + MT7530 evaluation board";
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -47,19 +45,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
 	mediatek,portmap = "llllw";
 
 	port@5 {
diff --git a/iopsys-ramips/dts/MT7620a_MT7610e.dts b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7610e-evb.dts
similarity index 89%
rename from iopsys-ramips/dts/MT7620a_MT7610e.dts
rename to iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7610e-evb.dts
index e0ae57a0d95508b2c3446c36c070df3ac6c2df8e..ae0d364d3e3e9f7a409995891b35157b292d693a 100644
--- a/iopsys-ramips/dts/MT7620a_MT7610e.dts
+++ b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-mt7610e-evb.dts
@@ -1,17 +1,14 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
+	compatible = "ralink,mt7620a-mt7610e-evb", "ralink,mt7620a-soc";
 	model = "Ralink MT7620A evaluation board";
 
 	keys {
 		compatible = "gpio-keys";
-		poll-interval = <20>;
 
 		wps {
 			label = "wps";
@@ -27,14 +24,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <1000000>;
@@ -72,9 +65,9 @@
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mediatek,portmap = "llllw";
 };
 
diff --git a/iopsys-ramips/dts/MT7620a_V22SG.dts b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-v22sg-evb.dts
similarity index 84%
rename from iopsys-ramips/dts/MT7620a_V22SG.dts
rename to iopsys-ramips/dts/mt7620a_ralink_mt7620a-v22sg-evb.dts
index d2863ee75cf2b73bf29a1dfa8d4d07f253fe19d6..bee4ba7fd38d9dea0f70a8379d0b59e9f59315a0 100644
--- a/iopsys-ramips/dts/MT7620a_V22SG.dts
+++ b/iopsys-ramips/dts/mt7620a_ralink_mt7620a-v22sg-evb.dts
@@ -1,17 +1,14 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
+	compatible = "ralink,mt7620a-v22sg-evb", "ralink,mt7620a-soc";
 	model = "Ralink MT7620a V22SG High Power evaluation board";
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -61,19 +58,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "spi";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "spi";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
+
 	mediatek,portmap = "llllw";
 
 	port@4 {
diff --git a/iopsys-ramips/dts/mt7620a_sanlinking_d240.dts b/iopsys-ramips/dts/mt7620a_sanlinking_d240.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6cff557fcd0842afc922f0611e87490cca093d4a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_sanlinking_d240.dts
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "sanlinking,d240", "ralink,mt7620a-soc";
+	model = "Sanlinking Technologies D240";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		power_mpcie2 {
+			gpio-export,name = "power_mpcie2";
+			gpio-export,output = <1>;
+			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_mpcie1 {
+			gpio-export,name = "power_mpcie1";
+			gpio-export,output = <1>;
+			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		air {
+			label = "blue:wifi";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+	/* the pins function is already set during pinmux driver load */
+	/delete-property/ pinctrl-0;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+
+	mediatek,portmap = "llllw";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&state_default {
+	default {
+		groups = "i2c", "uartf", "wled", "spi refclk", "pa";
+		function = "gpio";
+	};
+
+	/*
+	 * The sd function of the nd_sd group configures two of the
+	 * groups pins as gpios. The pins are used as PCIe reset/power.
+	 * Due to the driver load order, the pins are configured way to
+	 * late if triggered by the sd-card driver.
+	 * To not introduce another kind of driver load order
+	 * dependency and configure the pins as early as possible,
+	 * means during pinmux driver load.
+	 */
+	gpio_sd {
+		groups = "nd_sd";
+		function = "sd";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/NA930.dts b/iopsys-ramips/dts/mt7620a_sercomm_na930.dts
similarity index 83%
rename from iopsys-ramips/dts/NA930.dts
rename to iopsys-ramips/dts/mt7620a_sercomm_na930.dts
index 6d85914265976dc487d987f9cb849bf74a2a9d7a..4a91c07ecd58ce7ea044bd5e8f955a505738c9ab 100644
--- a/iopsys-ramips/dts/NA930.dts
+++ b/iopsys-ramips/dts/mt7620a_sercomm_na930.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -55,8 +53,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -81,24 +78,24 @@
 		compatible = "gpio-leds";
 
 		zwave {
-			label = "na930:blue:zwave";
+			label = "blue:zwave";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		status {
-			label = "na930:blue:status";
+			label = "blue:status";
 			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		service {
-			label = "na930:blue:service";
+			label = "blue:service";
 			gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "na930:blue:power";
+			label = "blue:power";
 			gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -115,17 +112,15 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "rgmii2", "spi", "ephy";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "rgmii2", "spi", "ephy";
+		function = "gpio";
+	};
 
-		uartf_gpio {
-			ralink,group = "uartf";
-			ralink,function = "gpio uartf";
-		};
+	uartf_gpio {
+		groups = "uartf";
+		function = "gpio uartf";
 	};
 };
 
@@ -133,18 +128,14 @@
 	status = "okay";
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
 	mediatek,portmap = "llllw";
 
 	port@4 {
diff --git a/iopsys-ramips/dts/ArcherC2-v1.dts b/iopsys-ramips/dts/mt7620a_tplink_archer-c2-v1.dts
similarity index 84%
rename from iopsys-ramips/dts/ArcherC2-v1.dts
rename to iopsys-ramips/dts/mt7620a_tplink_archer-c2-v1.dts
index 3e1549ff988a51c4a0b50a2d014bb4ec570c290d..184af58d2920d7207943461094fe9ffdad67e947 100644
--- a/iopsys-ramips/dts/ArcherC2-v1.dts
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer-c2-v1.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "tplink,c2-v1", "ralink,mt7620a-soc";
+	compatible = "tplink,archer-c2-v1", "ralink,mt7620a-soc";
 	model = "TP-Link Archer C2 v1";
 
 	aliases {
@@ -20,42 +18,33 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	pinctrl {
-		state_default: pinctrl0 {
-			gpio {
-				ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk";
-				ralink,function = "gpio";
-			};
-		};
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		lan {
-			label = "c2-v1:green:lan";
+			label = "green:lan";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "c2-v1:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_wps: wps {
-			label = "c2-v1:green:wps";
+			label = "green:wps";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "c2-v1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "c2-v1:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
@@ -88,10 +77,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <30000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -138,11 +127,11 @@
 };
 
 &ethernet {
-	status = "okay";
-	mtd-mac-address = <&rom 0xf100>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 
+	mtd-mac-address = <&rom 0xf100>;
+
 	port@5 {
 		status = "okay";
 		mediatek,fixed-link = <1000 1 1 1>;
@@ -154,7 +143,6 @@
 	};
 };
 
-
 &gpio1 {
 	status = "okay";
 };
@@ -167,8 +155,15 @@
 	status = "okay";
 };
 
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "wled", "ephy", "spi refclk";
+		function = "gpio";
+	};
+};
+
 &wmac {
-	ralink,mtd-eeprom = <&radio 0>;
+	ralink,mtd-eeprom = <&radio 0x0>;
 	mtd-mac-address = <&rom 0xf100>;
 };
 
diff --git a/iopsys-ramips/dts/mt7620a_tplink_archer-c20-v1.dts b/iopsys-ramips/dts/mt7620a_tplink_archer-c20-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..f7e7d50df7ce9e816432b44ab244ec924a9ae82b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer-c20-v1.dts
@@ -0,0 +1,82 @@
+#include "mt7620a_tplink_archer.dtsi"
+
+/ {
+	compatible = "tplink,archer-c20-v1", "ralink,mt7620a-soc";
+	model = "TP-Link Archer C20 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "blue:lan";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wan {
+			label = "blue:wan";
+			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wps {
+			label = "blue:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "wled", "ephy", "spi refclk", "wdt";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pa_pins>;
+
+	mtd-mac-address = <&rom 0xf100>;
+	mtd-mac-address-increment = <(-2)>;
+};
+
+&wifi {
+	mtd-mac-address = <&rom 0xf100>;
+	mtd-mac-address-increment = <(-1)>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_tplink_archer-c20i.dts b/iopsys-ramips/dts/mt7620a_tplink_archer-c20i.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a6c3cea7360065f1f113b158383a55ea9f93fedb
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer-c20i.dts
@@ -0,0 +1,62 @@
+#include "mt7620a_tplink_archer.dtsi"
+
+/ {
+	compatible = "tplink,archer-c20i", "ralink,mt7620a-soc";
+	model = "TP-Link Archer C20i";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+		led-running = &led_wps;
+		led-upgrade = &led_wps;
+		label-mac-device = &ethernet;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "blue:lan";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		led_wps: wps {
+			label = "blue:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "blue:wan";
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	mtd-mac-address = <&rom 0xf100>;
+};
+
+&wifi {
+	mtd-mac-address = <&rom 0xf100>;
+	mtd-mac-address-increment = <(-1)>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_tplink_archer-c50-v1.dts b/iopsys-ramips/dts/mt7620a_tplink_archer-c50-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d564552ff0b63d4e1e369caf0331b077de0a8d74
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer-c50-v1.dts
@@ -0,0 +1,82 @@
+#include "mt7620a_tplink_archer.dtsi"
+
+/ {
+	compatible = "tplink,archer-c50-v1", "ralink,mt7620a-soc";
+	model = "TP-Link Archer C50 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pa_pins>;
+
+	mtd-mac-address = <&rom 0xf100>;
+	mtd-mac-address-increment = <(-2)>;
+};
+
+&wifi {
+	mtd-mac-address = <&rom 0xf100>;
+	mtd-mac-address-increment = <(-1)>;
+};
diff --git a/iopsys-ramips/dts/ArcherMR200.dts b/iopsys-ramips/dts/mt7620a_tplink_archer-mr200.dts
similarity index 78%
rename from iopsys-ramips/dts/ArcherMR200.dts
rename to iopsys-ramips/dts/mt7620a_tplink_archer-mr200.dts
index 93e8cf88046767d1b67bd3861df89001e1d8440b..ae92dc85e656eccd9a8a482091b16ab9c574cf8b 100644
--- a/iopsys-ramips/dts/ArcherMR200.dts
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer-mr200.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "tplink,mr200", "ralink,mt7620a-soc";
+	compatible = "tplink,archer-mr200", "ralink,mt7620a-soc";
 	model = "TP-Link Archer MR200";
 
 	aliases {
@@ -24,52 +22,52 @@
 		compatible = "gpio-leds";
 
 		lan {
-			label = "mr200:white:lan";
+			label = "white:lan";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "mr200:white:wan";
+			label = "white:wan";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "mr200:white:power";
+			label = "white:power";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		4g {
-			label = "mr200:white:4g";
+			label = "white:4g";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "mr200:white:wps";
+			label = "white:wps";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		signal1 {
-			label = "mr200:white:signal1";
+			label = "white:signal1";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		signal2 {
-			label = "mr200:white:signal2";
+			label = "white:signal2";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 		};
 
 		signal3 {
-			label = "mr200:white:signal3";
+			label = "white:signal3";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		signal4 {
-			label = "mr200:white:signal4";
+			label = "white:signal4";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "mr200:white:wlan";
+			label = "white:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
@@ -118,10 +116,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <30000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -161,12 +159,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
+		function = "gpio";
 	};
 };
 
@@ -187,7 +183,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&radio 0>;
+	ralink,mtd-eeprom = <&radio 0x0>;
 };
 
 &pcie {
@@ -197,6 +193,6 @@
 &pcie0 {
 	mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 32768>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
 	};
 };
diff --git a/iopsys-ramips/dts/ArcherC20i.dts b/iopsys-ramips/dts/mt7620a_tplink_archer.dtsi
similarity index 52%
rename from iopsys-ramips/dts/ArcherC20i.dts
rename to iopsys-ramips/dts/mt7620a_tplink_archer.dtsi
index 8d4f51a5f664ab83837270cb523e4fd3acaaa635..670bad615d0701138aa02f992016332209ce393b 100644
--- a/iopsys-ramips/dts/ArcherC20i.dts
+++ b/iopsys-ramips/dts/mt7620a_tplink_archer.dtsi
@@ -1,65 +1,27 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
-#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
-	compatible = "tplink,c20i", "ralink,mt7620a-soc";
-	model = "TP-Link Archer C20i";
-
-	aliases {
-		led-boot = &led_wps;
-		led-failsafe = &led_wps;
-		led-running = &led_wps;
-		led-upgrade = &led_wps;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	leds {
-		compatible = "gpio-leds";
-		lan {
-			label = "c20i:blue:lan";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-		};
-		usb {
-			label = "c20i:blue:usb";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
-			trigger-sources = <&ohci_port1>, <&ehci_port1>;
-			linux,default-trigger = "usbport";
-		};
-		led_wps: wps {
-			label = "c20i:blue:wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
-		};
-		wan {
-			label = "c20i:blue:wan";
-			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
-		};
-		wlan {
-			label = "c20i:blue:wlan";
-			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
-	};
-
 	keys {
 		compatible = "gpio-keys";
 
+		reset {
+			label = "reset";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
 		rfkill {
 			label = "rfkill";
 			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RFKILL>;
 		};
-		reset_wps {
-			label = "reset_wps";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
 	};
 };
 
@@ -78,10 +40,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <30000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -103,40 +65,37 @@
 			partition@7c0000 {
 				label = "config";
 				reg = <0x7c0000 0x10000>;
+				read-only;
 			};
 
 			rom: partition@7d0000 {
 				label = "rom";
 				reg = <0x7d0000 0x10000>;
+				read-only;
 			};
 
 			partition@7e0000 {
 				label = "romfile";
 				reg = <0x7e0000 0x10000>;
+				read-only;
 			};
 
 			radio: partition@7f0000 {
 				label = "radio";
 				reg = <0x7f0000 0x10000>;
+				read-only;
 			};
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
-			ralink,function = "gpio";
-		};
-	};
-};
-
 &ethernet {
-		pinctrl-names = "default";
-		mtd-mac-address = <&rom 0xf100>;
-		mediatek,portmap = "wllll";
-	};
+	pinctrl-names = "default";
+
+	mtd-mac-address = <&rom 0xf100>;
+
+	mediatek,portmap = "wllll";
+};
 
 &ehci {
 	status = "okay";
@@ -151,8 +110,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&radio 0>;
-	mtd-mac-address = <&rom 0xf100>;
+	ralink,mtd-eeprom = <&radio 0x0>;
 };
 
 &pcie {
@@ -160,11 +118,9 @@
 };
 
 &pcie0 {
-	mt76@0,0 {
+	wifi: mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 32768>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
 		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&rom 0xf100>;
-		mtd-mac-address-increment = <(-1)>;
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620a_tplink_re200-v1.dts b/iopsys-ramips/dts/mt7620a_tplink_re200-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d2f5207fac147701d6fba7f2fdc848d20a2fc1f6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_re200-v1.dts
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_tplink_re2x0-v1.dtsi"
+
+/ {
+	compatible = "tplink,re200-v1", "ralink,mt7620a-soc";
+	model = "TP-Link RE200 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+		};
+
+		qss {
+			label = "green:qss";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g_red {
+			label = "red:wlan2g";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g_green {
+			label = "green:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+};
+
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "ephy", "wled", "rgmii1", "spi refclk";
+		function = "gpio";
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7620a_tplink_re210-v1.dts b/iopsys-ramips/dts/mt7620a_tplink_re210-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..41e56fbe3664323278e5955e48085cd077d5ee78
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_re210-v1.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_tplink_re2x0-v1.dtsi"
+
+/ {
+	compatible = "tplink,re210-v1", "ralink,mt7620a-soc";
+	model = "TP-Link RE210 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi_high {
+			label = "green:rssi-high";
+			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi_low {
+			label = "red:rssi-low";
+			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&keys {
+	led_power {
+		label = "LED power";
+		gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+		linux,code = <BTN_0>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "wled", "rgmii1";
+		function = "gpio";
+	};
+};
+
+&gsw {
+	mediatek,port4 = "gmac";
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
+	port@4 {
+		status = "okay";
+
+		phy-handle = <&phy4>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7620a_tplink_re2x0-v1.dtsi b/iopsys-ramips/dts/mt7620a_tplink_re2x0-v1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..80b47b7d774b4ed6b54202e0bb7ba9c0d7870dfa
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_tplink_re2x0-v1.dtsi
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &ethernet;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600n8";
+	};
+
+	keys: keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uboot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0x7c0000>;
+			};
+
+			partition@7e0000 {
+				label = "config";
+				reg = <0x7e0000 0x10000>;
+				read-only;
+			};
+
+			radio: partition@7f0000 {
+				label = "radio";
+				reg = <0x7f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&uboot 0x1fc00>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&radio 0x0>;
+	mtd-mac-address = <&uboot 0x1fc00>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		mtd-mac-address = <&uboot 0x1fc00>;
+		mtd-mac-address-increment = <2>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_trendnet_tew-810dr.dts b/iopsys-ramips/dts/mt7620a_trendnet_tew-810dr.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6c6ea18bf4e5c4a8fd35964575cd5d1c95426720
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_trendnet_tew-810dr.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_cameo_810.dtsi"
+
+/ {
+	compatible = "trendnet,tew-810dr", "ralink,mt7620a-soc";
+	model = "TRENDnet TEW-810DR";
+};
diff --git a/iopsys-ramips/dts/mt7620a_wavlink_wl-wn530hg4.dts b/iopsys-ramips/dts/mt7620a_wavlink_wl-wn530hg4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d8ce40c8d11e3e627c60a8c49e21ff21d4d27a26
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_wavlink_wl-wn530hg4.dts
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "wavlink,wl-wn530hg4", "ralink,mt7620a-soc";
+	model = "Wavlink WL-WN530HG4";
+
+	aliases {
+		led-boot = &led_status_blue;
+		led-failsafe = &led_status_blue;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_blue;
+		serial0 = &uartlite;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+
+		status_yellow {
+			label = "yellow:status";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		status_red {
+			label = "red:status";
+			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <24000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+
+	mtd-mac-address = <&factory 0x28>;
+
+	mediatek,portmap = "llllw";
+
+	port@5 {
+		status = "okay";
+		phy-handle = <&phy5>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy5: ethernet-phy@5 {
+			reg = <5>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pa_pins>;
+
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/iopsys-ramips/dts/MIWIFI-MINI.dts b/iopsys-ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
similarity index 83%
rename from iopsys-ramips/dts/MIWIFI-MINI.dts
rename to iopsys-ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
index e8ff02f2abc99dec0c0ad7a761b7448fd5ac19fd..11b1aa38d6cffa114519a377db365744013e3206 100644
--- a/iopsys-ramips/dts/MIWIFI-MINI.dts
+++ b/iopsys-ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,6 +12,7 @@
 		led-failsafe = &led_blue;
 		led-running = &led_blue;
 		led-upgrade = &led_blue;
+		label-mac-device = &ethernet;
 	};
 
 	chosen {
@@ -24,25 +23,24 @@
 		compatible = "gpio-leds";
 
 		led_blue: blue {
-			label = "miwifi-mini:blue:status";
+			label = "blue:status";
 			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		yellow {
-			label = "miwifi-mini:yellow:status";
+			label = "yellow:status";
 			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 		};
 
 		red {
-			label = "miwifi-mini:red:status";
+			label = "red:status";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -52,22 +50,14 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -130,12 +120,14 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x28>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
@@ -152,11 +144,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "rgmii1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "rgmii1";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/YOUKU-YK1.dts b/iopsys-ramips/dts/mt7620a_youku_yk1.dts
similarity index 80%
rename from iopsys-ramips/dts/YOUKU-YK1.dts
rename to iopsys-ramips/dts/mt7620a_youku_yk1.dts
index 5d90b17a04e9c095a29aacb4c8bf8b97e4aa5c59..86e2031aa6583598451069eea193a65dfa1eefb5 100644
--- a/iopsys-ramips/dts/YOUKU-YK1.dts
+++ b/iopsys-ramips/dts/mt7620a_youku_yk1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -18,29 +16,33 @@
 
 	leds {
 		compatible = "gpio-leds";
+
 		wan {
-			label = "youku-yk1:blue:wan";
+			label = "blue:wan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
+
 		air {
-			label = "youku-yk1:blue:air";
+			label = "blue:air";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
+
 		usb {
-			label = "youku-yk1:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
+
 		led_power: power {
-			label = "youku-yk1:blue:power";
+			label = "blue:power";
 			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		reset {
 			label = "reset";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
@@ -49,10 +51,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -68,7 +66,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "mx25l25635f", "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
@@ -106,23 +104,23 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "rgmii1", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "rgmii1", "ephy", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/BOCCO.dts b/iopsys-ramips/dts/mt7620a_yukai_bocco.dts
similarity index 85%
rename from iopsys-ramips/dts/BOCCO.dts
rename to iopsys-ramips/dts/mt7620a_yukai_bocco.dts
index 6b6ac754ea1739c5b953f95d7178a937311699c6..9c99a6582ef4bb6e8e9eb4f48536357fbd07088b 100644
--- a/iopsys-ramips/dts/BOCCO.dts
+++ b/iopsys-ramips/dts/mt7620a_yukai_bocco.dts
@@ -1,17 +1,14 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
+	compatible = "yukai,bocco", "ralink,mt7620a-soc";
 	model = "YUKAI Engineering BOCCO";
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -57,22 +54,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &i2c {
 	status = "okay";
 
@@ -95,7 +80,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -140,19 +125,19 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi refclk", "rgmii1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi refclk", "rgmii1";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
@@ -161,5 +146,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/ZBT-APE522II.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-ape522ii.dts
similarity index 73%
rename from iopsys-ramips/dts/ZBT-APE522II.dts
rename to iopsys-ramips/dts/mt7620a_zbtlink_zbt-ape522ii.dts
index 70ad0f0b58555a2ccd27b90d758976a948863fb3..28ae7c3f98b992ef92f17e2007e67c62387298e2 100644
--- a/iopsys-ramips/dts/ZBT-APE522II.dts
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-ape522ii.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,7 +5,7 @@
 
 / {
 	compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
-	model = "ZBT-APE522II";
+	model = "Zbtlink ZBT-APE522II";
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
@@ -17,34 +15,33 @@
 		compatible = "gpio-leds";
 
 		sys1 {
-			label = "zbt-ape522ii:green:sys1";
+			label = "green:sys1";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		sys2 {
-			label = "zbt-ape522ii:green:sys2";
+			label = "green:sys2";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		sys3 {
-			label = "zbt-ape522ii:green:sys3";
+			label = "green:sys3";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		sys4 {
-			label = "zbt-ape522ii:green:sys4";
+			label = "green:sys4";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g4 {
-			label = "zbt-ape522ii:green:wlan2g4";
+			label = "green:wlan2g4";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -54,18 +51,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
-&gpio2 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
@@ -73,7 +58,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -112,12 +97,14 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
+
+	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pa_pins>;
 };
@@ -134,11 +121,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled", "i2c", "uartf", "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wled", "i2c", "uartf", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g-16m.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g-16m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..bc2eec5a3826139fd4a6b3bc95831aba227e9fc9
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g-16m.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_zbtlink_zbt-we1026-5g.dtsi"
+
+/ {
+	compatible = "zbtlink,zbt-we1026-5g-16m", "zbtlink,zbt-we1026-5g",
+		"zbtlink,zbt-we1026", "ralink,mt7620a-soc";
+	model = "Zbtlink ZBT-WE1026-5G (16M)";
+};
+
+&firmware {
+	reg = <0x50000 0xfb0000>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g.dtsi b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..4991897ca4bb88dcc11981595fc07fca86108a4e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-5g.dtsi
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_zbtlink_zbt-we1026.dtsi"
+
+/ {
+	compatible = "zbtlink,zbt-we1026-5g", "zbtlink,zbt-we1026",
+		"ralink,mt7620a-soc";
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0fc8fc60e42ebbdaced4decca47a515e9fd32bd5
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_zbtlink_zbt-we1026-h.dtsi"
+
+/ {
+	compatible = "zbtlink,zbt-we1026-h-32m", "zbtlink,zbt-we1026-h",
+		"zbtlink,zbt-we1026", "ralink,mt7620a-soc";
+	model = "Zbtlink ZBT-WE1026-H (32M)";
+};
+
+&firmware {
+	reg = <0x50000 0x1fb0000>;
+};
diff --git a/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h.dtsi b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..09f0ba773c09dbb47b3e35dbcbc1eaeaa738fc53
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026-h.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a_zbtlink_zbt-we1026.dtsi"
+
+/ {
+	compatible = "zbtlink,zbt-we1026-h", "zbtlink,zbt-we1026",
+		"ralink,mt7620a-soc";
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..91bbd4a0449643a779a9a5a5711c37c57da2c2ea
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zbtlink,zbt-we1026", "ralink,mt7620a-soc";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	aliases {
+		label-mac-device = &wmac;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			firmware: partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+			};
+		};
+	};
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&state_default {
+	default {
+		groups = "i2c", "uartf", "spi refclk", "ephy", "wled";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/ZBT-WE826-16M.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-16m.dts
similarity index 88%
rename from iopsys-ramips/dts/ZBT-WE826-16M.dts
rename to iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-16m.dts
index c33a11ecb7e536eba3401482267f64c308a80203..c3de5330b0002bb1869a4a6f2e7ac3960f181572 100644
--- a/iopsys-ramips/dts/ZBT-WE826-16M.dts
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-16m.dts
@@ -1,16 +1,14 @@
-/dts-v1/;
-
-#include "ZBT-WE826.dtsi"
+#include "mt7620a_zbtlink_zbt-we826.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-we826-16m", "zbtlink,zbt-we826", "ralink,mt7620a-soc";
-	model = "ZBT-WE826 (16M)";
+	model = "Zbtlink ZBT-WE826 (16M)";
 };
 
 &spi0 {
 	status = "okay";
 
-	en25q128@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ZBT-WE826-32M.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts
similarity index 89%
rename from iopsys-ramips/dts/ZBT-WE826-32M.dts
rename to iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts
index 9c8f3708d173a1838669f80044f7ef6ca2684184..6f5bc41d5d1dbfed2fc68fae88bded76fcabcf40 100644
--- a/iopsys-ramips/dts/ZBT-WE826-32M.dts
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts
@@ -1,16 +1,14 @@
-/dts-v1/;
-
-#include "ZBT-WE826.dtsi"
+#include "mt7620a_zbtlink_zbt-we826.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-we826-32m", "zbtlink,zbt-we826", "ralink,mt7620a-soc";
-	model = "ZBT-WE826 (32M)";
+	model = "Zbtlink ZBT-WE826 (32M)";
 };
 
 &spi0 {
 	status = "okay";
 
-	en25q128@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ZBT-WE826-E.dts b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts
similarity index 76%
rename from iopsys-ramips/dts/ZBT-WE826-E.dts
rename to iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts
index ce97b037153bbecc7c97c69c41f351bf8207780d..bce6afe263fa3b362d62e01c40e05e59d0aa01c6 100644
--- a/iopsys-ramips/dts/ZBT-WE826-E.dts
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts
@@ -1,11 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
-#include "ZBT-WE826.dtsi"
+#include "mt7620a_zbtlink_zbt-we826.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-we826-e", "zbtlink,zbt-we826", "ralink,mt7620a-soc";
-	model = "ZBT-WE826-E";
+	model = "Zbtlink ZBT-WE826-E";
 
 	/delete-node/ leds;
 
@@ -13,22 +12,22 @@
 		compatible = "gpio-leds";
 
 		led_power: gsm {
-			label = "zbt-we826-e:blue:gsm";
+			label = "blue:gsm";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		signal {
-			label = "zbt-we826-e:green:signal";
+			label = "green:signal";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		sim {
-			label = "zbt-we826-e:red:sim";
+			label = "red:sim";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		air {
-			label = "zbt-we826-e:red:wifi";
+			label = "red:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -74,11 +73,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WE826.dtsi b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi
similarity index 71%
rename from iopsys-ramips/dts/ZBT-WE826.dtsi
rename to iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi
index 0776ea7a7916d3510a7b980f4fb9b2bb6b806a74..cf2ca1cd2782ae74ffc4ba74df632e66b0c3399e 100644
--- a/iopsys-ramips/dts/ZBT-WE826.dtsi
+++ b/iopsys-ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi
@@ -19,25 +19,28 @@
 
 	leds {
 		compatible = "gpio-leds";
+
 		led_power: power {
-			label = "zbt-we826:green:power";
+			label = "green:power";
 			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 		};
+
 		usb {
-			label = "zbt-we826:green:usb";
+			label = "green:usb";
 			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
+
 		air {
-			label = "zbt-we826:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		reset {
 			label = "reset";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
@@ -46,10 +49,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -72,19 +71,18 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
+
+	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf", "wled", "spi refclk", "pa";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/ZTE-Q7.dts b/iopsys-ramips/dts/mt7620a_zte_q7.dts
similarity index 80%
rename from iopsys-ramips/dts/ZTE-Q7.dts
rename to iopsys-ramips/dts/mt7620a_zte_q7.dts
index 5b4c5ee0474480d4af294f814649f15addd3253a..1ec3ba2e3330db1baea30a853029b031f87d7d6a 100644
--- a/iopsys-ramips/dts/ZTE-Q7.dts
+++ b/iopsys-ramips/dts/mt7620a_zte_q7.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,18 @@
 		compatible = "gpio-leds";
 
 		statred {
-			label = "zte-q7:red:status";
+			label = "red:status";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_blue: statblue {
-			label = "zte-q7:blue:status";
+			label = "blue:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -42,10 +39,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -53,7 +46,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -90,22 +83,21 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/kng_rc.dts b/iopsys-ramips/dts/mt7620a_zyxel_keenetic-viva.dts
similarity index 85%
rename from iopsys-ramips/dts/kng_rc.dts
rename to iopsys-ramips/dts/mt7620a_zyxel_keenetic-viva.dts
index 3d6d2c6f06a8259879221faf237d4d6f50edc927..8c07de48456a2d3be647f8271504008923e2cab0 100644
--- a/iopsys-ramips/dts/kng_rc.dts
+++ b/iopsys-ramips/dts/mt7620a_zyxel_keenetic-viva.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,36 +18,35 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "kng_rc:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "kng_rc:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		power_alert {
-			label = "kng_rc:red:power";
+			label = "red:power";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "kng_rc:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power {
-			label = "kng_rc:green:power";
+			label = "green:power";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
 		compatible = "gpio-keys";
-		poll-interval = <20>;
 
 		reset {
 			label = "reset";
@@ -92,7 +89,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -129,20 +126,18 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii2_pins &mdio_pins>;
-	mtd-mac-address = <&factory 0x00004>;
+
+	mtd-mac-address = <&factory 0x4>;
 
 	port@4 {
 		status = "okay";
@@ -166,7 +161,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/mt7620n.dtsi b/iopsys-ramips/dts/mt7620n.dtsi
index 54370a0c759c21ea495204431ab6a370bbe0ee44..2feb411dbc70cfb5331b8d77772f0ef174a65860 100644
--- a/iopsys-ramips/dts/mt7620n.dtsi
+++ b/iopsys-ramips/dts/mt7620n.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -101,7 +103,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -118,7 +120,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -137,7 +139,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <32>;
+			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -156,7 +158,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
-			ralink,nr-gpio = <1>;
+			ralink,num-gpios = <1>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -250,36 +252,36 @@
 
 		ephy_pins: ephy {
 			ephy {
-				ralink,group = "ephy";
-				ralink,function = "ephy";
+				groups = "ephy";
+				function = "ephy";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi refclk";
-				ralink,function = "spi refclk";
+				groups = "spi refclk";
+				function = "spi refclk";
 			};
 		};
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/RT-N12-PLUS.dts b/iopsys-ramips/dts/mt7620n_asus_rt-n12p.dts
similarity index 78%
rename from iopsys-ramips/dts/RT-N12-PLUS.dts
rename to iopsys-ramips/dts/mt7620n_asus_rt-n12p.dts
index 83a7b6adf0f4c544d509a92c8d6a235a19a309ce..24a8779b27a821c023231b570fd2fb46cce4f2c0 100644
--- a/iopsys-ramips/dts/RT-N12-PLUS.dts
+++ b/iopsys-ramips/dts/mt7620n_asus_rt-n12p.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,29 +22,28 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "rt-n12p:green:wan";
+			label = "green:wan";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "rt-n12p:green:lan";
+			label = "green:lan";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "rt-n12p:green:power";
+			label = "green:power";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		air {
-			label = "rt-n12p:green:air";
+			label = "green:air";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -71,7 +68,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -110,18 +107,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
+
+	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled", "i2c", "wdt", "pa", "spi refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled", "i2c", "wdt", "pa", "spi refclk";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/RT-N14U.dts b/iopsys-ramips/dts/mt7620n_asus_rt-n14u.dts
similarity index 81%
rename from iopsys-ramips/dts/RT-N14U.dts
rename to iopsys-ramips/dts/mt7620n_asus_rt-n14u.dts
index 834eb0ddf3ec4ce8ace70d6ca42ffaa623e9e28a..ce51ff89b3efe1b43670f00761b595abbcb493c4 100644
--- a/iopsys-ramips/dts/RT-N14U.dts
+++ b/iopsys-ramips/dts/mt7620n_asus_rt-n14u.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,36 +18,35 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "rt-n14u:blue:wan";
+			label = "blue:wan";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "rt-n14u:blue:lan";
+			label = "blue:lan";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "rt-n14u:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_power: power {
-			label = "rt-n14u:blue:power";
+			label = "blue:power";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		air {
-			label = "rt-n14u:blue:air";
+			label = "blue:air";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -76,7 +73,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -123,18 +120,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled", "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled", "i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WMR-300.dts b/iopsys-ramips/dts/mt7620n_buffalo_wmr-300.dts
similarity index 82%
rename from iopsys-ramips/dts/WMR-300.dts
rename to iopsys-ramips/dts/mt7620n_buffalo_wmr-300.dts
index f0f1cc1337e7da4e999f1e17abe9696183a393d9..26803c0c2ad6f62b364fb6767a9c78d33fc5b0e0 100644
--- a/iopsys-ramips/dts/WMR-300.dts
+++ b/iopsys-ramips/dts/mt7620n_buffalo_wmr-300.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,24 +18,23 @@
 		compatible = "gpio-leds";
 
 		aoss1 {
-			label = "wmr-300:red:aoss";
+			label = "red:aoss";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		aoss2 {
-			label = "wmr-300:green:aoss";
+			label = "green:aoss";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "wmr-300:green:status";
+			label = "green:status";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -60,7 +57,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -99,18 +96,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "ephy";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "ephy";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/CF-WR800N.dts b/iopsys-ramips/dts/mt7620n_comfast_cf-wr800n.dts
similarity index 78%
rename from iopsys-ramips/dts/CF-WR800N.dts
rename to iopsys-ramips/dts/mt7620n_comfast_cf-wr800n.dts
index 65f44e43d7ab08154136e6a89077752fb11aa534..c458f8724f602167850e852ce7b65019fc2a8ba3 100644
--- a/iopsys-ramips/dts/CF-WR800N.dts
+++ b/iopsys-ramips/dts/mt7620n_comfast_cf-wr800n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,24 +22,23 @@
 		compatible = "gpio-leds";
 
 		ethernet {
-			label = "cf-wr800n:white:ethernet";
+			label = "white:ethernet";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "cf-wr800n:white:wifi";
+			label = "white:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "cf-wr800n:white:wps";
+			label = "white:wps";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -51,10 +48,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -70,7 +63,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -112,14 +105,12 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled", "spi refclk", "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled", "spi refclk", "i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/DWR-116-A1.dts b/iopsys-ramips/dts/mt7620n_dlink_dwr-116-a1.dts
similarity index 83%
rename from iopsys-ramips/dts/DWR-116-A1.dts
rename to iopsys-ramips/dts/mt7620n_dlink_dwr-116-a1.dts
index 6f76a640397fedb667a96c96bdb5cd64afd92cab..d659262b0ec6c8fa405af1ab23e9a4e57c718abc 100644
--- a/iopsys-ramips/dts/DWR-116-A1.dts
+++ b/iopsys-ramips/dts/mt7620n_dlink_dwr-116-a1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -37,21 +34,17 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dwr-116-a1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
 		};
 
 		wifi {
-			label = "dwr-116-a1:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
@@ -98,17 +91,16 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	mediatek,portmap = "llllw";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
+	mediatek,portmap = "llllw";
 };
diff --git a/iopsys-ramips/dts/DWR-921-C1.dts b/iopsys-ramips/dts/mt7620n_dlink_dwr-921-c1.dts
similarity index 80%
rename from iopsys-ramips/dts/DWR-921-C1.dts
rename to iopsys-ramips/dts/mt7620n_dlink_dwr-921-c1.dts
index 92bcd54a428d2f208b835e13d8707a4cdf70bad3..c784839c349ae8e29888dae31c19282731089942 100644
--- a/iopsys-ramips/dts/DWR-921-C1.dts
+++ b/iopsys-ramips/dts/mt7620n_dlink_dwr-921-c1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -15,8 +13,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -35,37 +32,37 @@
 		compatible = "gpio-leds";
 
 		sms {
-			label = "dwr-921-c1:green:sms";
+			label = "green:sms";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "dwr-921-c1:green:lan";
+			label = "green:lan";
 			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_sstrenghg: sstrengthg {
-			label = "dwr-921-c1:green:sigstrength";
+			label = "green:sigstrength";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		sstrengthr {
-			label = "dwr-921-c1:red:sigstrength";
+			label = "red:sigstrength";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		4g {
-			label = "dwr-921-c1:green:4g";
+			label = "green:4g";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "dwr-921-c1:green:3g";
+			label = "green:3g";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "dwr-921-c1:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -142,11 +139,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "spi refclk", "i2c", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "spi refclk", "i2c", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/DWR-922-E2.dts b/iopsys-ramips/dts/mt7620n_dlink_dwr-922-e2.dts
similarity index 80%
rename from iopsys-ramips/dts/DWR-922-E2.dts
rename to iopsys-ramips/dts/mt7620n_dlink_dwr-922-e2.dts
index c2dd26a09da311628192b05b0cc7162d70a1f541..9400394d89ec00bbba00d178dcb4d91a1dbc4f63 100644
--- a/iopsys-ramips/dts/DWR-922-E2.dts
+++ b/iopsys-ramips/dts/mt7620n_dlink_dwr-922-e2.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7620n.dtsi"
 
@@ -16,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
@@ -37,37 +35,37 @@
 		led-boot = &sstrengthg;
 
 		sms {
-			label = "dwr-922-e2:green:sms";
+			label = "green:sms";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "dwr-922-e2:green:lan";
+			label = "green:lan";
 			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
 		};
 
 		sstrengthg: sstrengthg {
-			label = "dwr-922-e2:green:sigstrength";
+			label = "green:sigstrength";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		sstrengthr {
-			label = "dwr-922-e2:red:sigstrength";
+			label = "red:sigstrength";
 			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 		};
 
 		4g {
-			label = "dwr-922-e2:green:4g";
+			label = "green:4g";
 			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "dwr-922-e2:green:3g";
+			label = "green:3g";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "dwr-922-e2:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -144,11 +142,9 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "spi refclk", "i2c", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "spi refclk", "i2c", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WRH-300CR.dts b/iopsys-ramips/dts/mt7620n_elecom_wrh-300cr.dts
similarity index 81%
rename from iopsys-ramips/dts/WRH-300CR.dts
rename to iopsys-ramips/dts/mt7620n_elecom_wrh-300cr.dts
index eb6dbe6d1afa62fa739eda8674fa73528b8542b0..19d2f63694f5cda0fec982a348762d6f358d8560 100644
--- a/iopsys-ramips/dts/WRH-300CR.dts
+++ b/iopsys-ramips/dts/mt7620n_elecom_wrh-300cr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,28 +14,27 @@
 		led-upgrade = &led_wps;
 	};
 
-		leds {
+	leds {
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "wrh-300cr:green:wps";
+			label = "green:wps";
 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 		};
 
 		ethernet {
-			label = "wrh-300cr:green:ethernet";
+			label = "green:ethernet";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "wrh-300cr:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -53,10 +50,6 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -68,7 +61,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -120,18 +113,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x2e>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620n_hootoo_ht-tm05.dts b/iopsys-ramips/dts/mt7620n_hootoo_ht-tm05.dts
new file mode 100644
index 0000000000000000000000000000000000000000..1c408bcaa1a9b95e4eb0569f14ff33b0fe886344
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620n_hootoo_ht-tm05.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620n_sunvalley_filehub.dtsi"
+
+/ {
+	compatible = "hootoo,ht-tm05", "ralink,mt7620n-soc";
+	model = "HooToo HT-TM05";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/U35WF.dts b/iopsys-ramips/dts/mt7620n_kimax_u35wf.dts
similarity index 82%
rename from iopsys-ramips/dts/U35WF.dts
rename to iopsys-ramips/dts/mt7620n_kimax_u35wf.dts
index d058b839496d9107177832baff9be5525fff0523..7d6d80038c76eeb4a2de10ceb64aab8472c6f54c 100644
--- a/iopsys-ramips/dts/U35WF.dts
+++ b/iopsys-ramips/dts/mt7620n_kimax_u35wf.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,8 +15,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -31,12 +28,12 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "u35wf:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "u35wf:green:eth";
+			label = "green:eth";
 			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -53,7 +50,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -103,14 +100,12 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/MLW221.dts b/iopsys-ramips/dts/mt7620n_kingston_mlw221.dts
similarity index 82%
rename from iopsys-ramips/dts/MLW221.dts
rename to iopsys-ramips/dts/mt7620n_kingston_mlw221.dts
index 815370e6fd1e8d1d1569fc1178ce0c704b0e463a..1186b83f064ab2a329952989a3f752bade0e7f14 100644
--- a/iopsys-ramips/dts/MLW221.dts
+++ b/iopsys-ramips/dts/mt7620n_kingston_mlw221.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,18 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "mlw221:blue:system";
+			label = "blue:system";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "mlw221:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -48,10 +45,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -63,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -115,18 +108,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/MLWG2.dts b/iopsys-ramips/dts/mt7620n_kingston_mlwg2.dts
similarity index 83%
rename from iopsys-ramips/dts/MLWG2.dts
rename to iopsys-ramips/dts/mt7620n_kingston_mlwg2.dts
index f88af718964c37ba1c872416ee56967997435912..eba7fabff62302da165970d10d5341fbd3d29e54 100644
--- a/iopsys-ramips/dts/MLWG2.dts
+++ b/iopsys-ramips/dts/mt7620n_kingston_mlwg2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,18 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "mlwg2:blue:system";
+			label = "blue:system";
 			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "mlwg2:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -48,10 +45,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
@@ -63,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -115,18 +108,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "ephy", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "ephy", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620n_netgear_jwnr2010-v5.dts b/iopsys-ramips/dts/mt7620n_netgear_jwnr2010-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..63cf38dec55e5bbd5441e4c9bd3eaeeaa5254fa7
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620n_netgear_jwnr2010-v5.dts
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620n_netgear_n300.dtsi"
+
+/ {
+	compatible = "netgear,jwnr2010-v5", "ralink,mt7620n-soc";
+	model = "Netgear JWNR2010 v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		lan1 {
+			label = "green:lan1";
+			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2 {
+			label = "green:lan2";
+			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3 {
+			label = "green:lan3";
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4 {
+			label = "green:lan4";
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620n_netgear_n300.dtsi b/iopsys-ramips/dts/mt7620n_netgear_n300.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..6f5be57ec7704880f7eff66335d53581a8c93002
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620n_netgear_n300.dtsi
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620n.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <30000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x20000 0x3c0000>;
+			};
+
+			partition@3e0000 {
+				label = "nvram";
+				reg = <0x3e0000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@3f0000 {
+				label = "factory";
+				reg = <0x3f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+
+	mediatek,portmap = "llllw";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&state_default {
+	default {
+		groups = "pa", "ephy", "wled";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/WT3020-4M.dts b/iopsys-ramips/dts/mt7620n_nexx_wt3020-4m.dts
similarity index 93%
rename from iopsys-ramips/dts/WT3020-4M.dts
rename to iopsys-ramips/dts/mt7620n_nexx_wt3020-4m.dts
index 4bdc3bd6baba4e5ca1c8fbe176dfa0a4e47ce66b..ed9170fed40b321c224a9dd2418741303726ff6d 100644
--- a/iopsys-ramips/dts/WT3020-4M.dts
+++ b/iopsys-ramips/dts/mt7620n_nexx_wt3020-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WT3020.dtsi"
+#include "mt7620n_nexx_wt3020.dtsi"
 
 / {
 	compatible = "nexx,wt3020-4m", "nexx,wt3020", "ralink,mt7620n-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/WT3020-8M.dts b/iopsys-ramips/dts/mt7620n_nexx_wt3020-8m.dts
similarity index 94%
rename from iopsys-ramips/dts/WT3020-8M.dts
rename to iopsys-ramips/dts/mt7620n_nexx_wt3020-8m.dts
index be429f0c2b65fbcaafa8b1d1dd465be61b73deb8..ac46ccbfadb063e8eeb4980229bb1f15c4b6c445 100644
--- a/iopsys-ramips/dts/WT3020-8M.dts
+++ b/iopsys-ramips/dts/mt7620n_nexx_wt3020-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WT3020.dtsi"
+#include "mt7620n_nexx_wt3020.dtsi"
 
 / {
 	compatible = "nexx,wt3020-8m", "nexx,wt3020", "ralink,mt7620n-soc";
@@ -18,7 +16,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/WT3020.dtsi b/iopsys-ramips/dts/mt7620n_nexx_wt3020.dtsi
similarity index 67%
rename from iopsys-ramips/dts/WT3020.dtsi
rename to iopsys-ramips/dts/mt7620n_nexx_wt3020.dtsi
index 59558a2e963153f5c44d321a32f2aafaf207a406..1597c088bcbe9b3c2b295e144a1e88bcac2e877c 100644
--- a/iopsys-ramips/dts/WT3020.dtsi
+++ b/iopsys-ramips/dts/mt7620n_nexx_wt3020.dtsi
@@ -11,11 +11,11 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -28,34 +28,29 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wt3020:blue:power";
+			label = "blue:power";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio2 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled", "pa", "i2c", "wdt", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled", "pa", "i2c", "wdt", "uartf";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7620n_ravpower_rp-wd03.dts b/iopsys-ramips/dts/mt7620n_ravpower_rp-wd03.dts
new file mode 100644
index 0000000000000000000000000000000000000000..320d61f65c9dcb75adeea89fe6d750f654d0ffaa
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620n_ravpower_rp-wd03.dts
@@ -0,0 +1,27 @@
+#include "mt7620n_sunvalley_filehub.dtsi"
+
+/ {
+	compatible = "ravpower,rp-wd03", "ralink,mt7620n-soc";
+	model = "RAVPower RP-WD03";
+
+	aliases {
+		led-boot = &led_wifi_blue;
+		led-failsafe = &led_wifi_blue;
+		led-running = &led_wifi_blue;
+		led-upgrade = &led_wifi_blue;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wifi_green {
+			label = "green:wifi";
+			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_wifi_blue: wifi_blue {
+			label = "blue:wifi";
+			gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7620n_sunvalley_filehub.dtsi b/iopsys-ramips/dts/mt7620n_sunvalley_filehub.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..20ff2dbd1c3db91e900e47da72e0d8b8965e01bb
--- /dev/null
+++ b/iopsys-ramips/dts/mt7620n_sunvalley_filehub.dtsi
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620n.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	aliases {
+		label-mac-device = &ethernet;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+
+		devices = <&fwconcat0 &fwconcat1 &fwconcat2>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,ih-magic = <IH_MAGIC_OKLI>;
+				label = "firmware";
+				reg = <0x0 0x0>;
+			};
+		};
+	};
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&i2c {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "loader";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+
+			fwconcat1: partition@60000 {
+				label = "fwconcat1";
+				reg = <0x60000 0x170000>;
+			};
+
+			partition@1d0000 {
+				label = "u-boot-env";
+				reg = <0x1d0000 0x10000>;
+			};
+
+			fwconcat2: partition@1e0000 {
+				label = "fwconcat2";
+				reg = <0x1e0000 0x20000>;
+			};
+
+			fwconcat0: partition@200000 {
+				label = "fwconcat0";
+				reg = <0x200000 0x600000>;
+			};
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&state_default {
+	gpio {
+		groups = "wled", "ephy";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/VAR11N-300.dts b/iopsys-ramips/dts/mt7620n_vonets_var11n-300.dts
similarity index 81%
rename from iopsys-ramips/dts/VAR11N-300.dts
rename to iopsys-ramips/dts/mt7620n_vonets_var11n-300.dts
index cf4b7c54a16d23452ff185de129587807729713c..97ed206f56d1f61dc169814a0666a730f074d3d3 100644
--- a/iopsys-ramips/dts/VAR11N-300.dts
+++ b/iopsys-ramips/dts/mt7620n_vonets_var11n-300.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,14 +18,13 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "var11n-300:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -37,14 +34,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -83,18 +76,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WRTNODE.dts b/iopsys-ramips/dts/mt7620n_wrtnode_wrtnode.dts
similarity index 79%
rename from iopsys-ramips/dts/WRTNODE.dts
rename to iopsys-ramips/dts/mt7620n_wrtnode_wrtnode.dts
index a8088182013849a629674de428c8f327255697b6..144591d48a620fd5eba9ec7db6108a515301a0cb 100644
--- a/iopsys-ramips/dts/WRTNODE.dts
+++ b/iopsys-ramips/dts/mt7620n_wrtnode_wrtnode.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -19,7 +17,7 @@
 		compatible = "gpio-leds";
 
 		led_indicator: indicator {
-			label = "wrtnode:blue:indicator";
+			label = "blue:indicator";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -29,18 +27,10 @@
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -87,18 +77,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "ephy", "wled", "pa", "i2c", "wdt", "uartf", "spi refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "ephy", "wled", "pa", "i2c", "wdt", "uartf", "spi refclk";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-CPE102.dts b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
similarity index 77%
rename from iopsys-ramips/dts/ZBT-CPE102.dts
rename to iopsys-ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
index 6f0213bf70b78640ddb05c9945334917309aa183..6d018b9e589c3f4867fef4b16a899e98f65e7352 100644
--- a/iopsys-ramips/dts/ZBT-CPE102.dts
+++ b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,7 +11,6 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-
 	aliases {
 		led-boot = &led_4g_0;
 		led-failsafe = &led_4g_0;
@@ -23,24 +20,23 @@
 		compatible = "gpio-leds";
 
 		led_4g_0: 4g-0 {
-			label = "zbt-cpe102:green:4g-0";
+			label = "green:4g-0";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		4g-1 {
-			label = "zbt-cpe102:green:4g-1";
+			label = "green:4g-1";
 			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 		};
 
 		4g-2 {
-			label = "zbt-cpe102:green:4g-2";
+			label = "green:4g-2";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -54,18 +50,10 @@
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	en25q64@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -112,18 +100,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WA05.dts b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-wa05.dts
similarity index 81%
rename from iopsys-ramips/dts/ZBT-WA05.dts
rename to iopsys-ramips/dts/mt7620n_zbtlink_zbt-wa05.dts
index 21b56dcae17ba1f11bc4c39361694bc82cdd2859..b29c0341405b17d52bd661a9e55e43d964f4e422 100644
--- a/iopsys-ramips/dts/ZBT-WA05.dts
+++ b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-wa05.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,26 +22,25 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "zbt-wa05:blue:power";
+			label = "blue:power";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "zbt-wa05:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		air {
-			label = "zbt-wa05:blue:air";
+			label = "blue:air";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -57,10 +54,6 @@
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
 &gpio3 {
 	status = "okay";
 };
@@ -68,7 +61,7 @@
 &spi0 {
 	status = "okay";
 
-	en25q64@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -115,18 +108,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WE2026.dts b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
similarity index 80%
rename from iopsys-ramips/dts/ZBT-WE2026.dts
rename to iopsys-ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
index be8d13be90edf8c83e2640bfd2d0abbdd47c4e68..fe1799885a48d7bc2f709aba7714b51f38d3b84e 100644
--- a/iopsys-ramips/dts/ZBT-WE2026.dts
+++ b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
@@ -1,10 +1,8 @@
-/dts-v1/;
+#include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "mt7620n.dtsi"
-
 / {
 	compatible = "zbtlink,zbt-we2026", "ralink,mt7620n-soc";
 	model = "Zbtlink ZBT-WE2026";
@@ -24,19 +22,18 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "zbt-we2026:red:power";
+			label = "red:power";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "zbt-we2026:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -57,7 +54,7 @@
 &spi0 {
 	status = "okay";
 
-	en25q64@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -96,18 +93,17 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
+
+	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WR8305RT.dts b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-wr8305rt.dts
similarity index 81%
rename from iopsys-ramips/dts/ZBT-WR8305RT.dts
rename to iopsys-ramips/dts/mt7620n_zbtlink_zbt-wr8305rt.dts
index 5292c70dbbb4ba6cccfbbf956bd2e755ed53168f..af3ac4b00966539c59bcc55ab0247728f700b175 100644
--- a/iopsys-ramips/dts/ZBT-WR8305RT.dts
+++ b/iopsys-ramips/dts/mt7620n_zbtlink_zbt-wr8305rt.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,26 +18,25 @@
 		compatible = "gpio-leds";
 
 		led_sys: sys {
-			label = "zbt-wr8305rt:green:sys";
+			label = "green:sys";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "zbt-wr8305rt:green:usb";
+			label = "green:usb";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wifi {
-			label = "zbt-wr8305rt:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -60,7 +57,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -108,19 +105,19 @@
 &ethernet {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ephy_pins>;
+
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		default {
-			ralink,group = "i2c", "uartf", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	default {
+		groups = "i2c", "uartf", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/kn_rf.dts b/iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni-ii.dts
similarity index 85%
rename from iopsys-ramips/dts/kn_rf.dts
rename to iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni-ii.dts
index 765629548cd435eaaee30c0430b01ec485cc78e2..4e5c68ef3fcc819b23f1d096198be0fb12b28589 100644
--- a/iopsys-ramips/dts/kn_rf.dts
+++ b/iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni-ii.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,31 +18,30 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "kn_rc:green:wan";
+			label = "green:wan";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "kn_rc:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wifi {
-			label = "kn_rc:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "kn_rc:green:power";
+			label = "green:power";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
 		compatible = "gpio-keys";
-		poll-interval = <20>;
 
 		reset {
 			label = "reset";
@@ -88,7 +85,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -125,22 +122,21 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "wdt", "pa", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "wdt", "pa", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/kn_rc.dts b/iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni.dts
similarity index 85%
rename from iopsys-ramips/dts/kn_rc.dts
rename to iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni.dts
index 74396d1fc2dfce857e8cc799461cbd2dc130acc6..e43f1357dde139785f3d5f6b53e9ea3964366971 100644
--- a/iopsys-ramips/dts/kn_rc.dts
+++ b/iopsys-ramips/dts/mt7620n_zyxel_keenetic-omni.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,31 +18,30 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "kn_rc:green:wan";
+			label = "green:wan";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "kn_rc:green:usb";
+			label = "green:usb";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wifi {
-			label = "kn_rc:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "kn_rc:green:power";
+			label = "green:power";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
 		compatible = "gpio-keys";
-		poll-interval = <20>;
 
 		reset {
 			label = "reset";
@@ -88,7 +85,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -125,22 +122,21 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "wdt", "pa", "spi refclk", "wled";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "wdt", "pa", "spi refclk", "wled";
+		function = "gpio";
 	};
 };
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
+
 	mediatek,portmap = "llllw";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/mt7621.dtsi b/iopsys-ramips/dts/mt7621.dtsi
index 4f69e0902e451ba73973583539724cbab895c364..7636f9d8000a55bd453de0dab1db685ef292fabf 100644
--- a/iopsys-ramips/dts/mt7621.dtsi
+++ b/iopsys-ramips/dts/mt7621.dtsi
@@ -1,5 +1,8 @@
+/dts-v1/;
+
 #include <dt-bindings/interrupt-controller/mips-gic.h>
 #include <dt-bindings/clock/mt7621-clk.h>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	#address-cells = <1>;
@@ -34,6 +37,10 @@
 		serial0 = &uartlite;
 	};
 
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
 	pll: pll {
 		compatible = "mediatek,mt7621-pll", "syscon";
 
@@ -49,8 +56,6 @@
 		clock-frequency = <50000000>;
 	};
 
-
-
 	palmbus: palmbus@1E000000 {
 		compatible = "palmbus";
 		reg = <0x1E000000 0x100000>;
@@ -69,36 +74,15 @@
 			reg = <0x100 0x100>;
 		};
 
-		gpio@600 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			compatible = "mtk,mt7621-gpio";
+		gpio: gpio@600 {
+			#gpio-cells = <2>;
+			#interrupt-cells = <2>;
+			compatible = "mediatek,mt7621-gpio";
+			gpio-controller;
+			interrupt-controller;
 			reg = <0x600 0x100>;
-
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
-
-			gpio0: bank@0 {
-				reg = <0>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
-
-			gpio1: bank@1 {
-				reg = <1>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
-
-			gpio2: bank@2 {
-				reg = <2>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
 		};
 
 		i2c: i2c@900 {
@@ -280,83 +264,83 @@
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		uart1_pins: uart1 {
 			uart1 {
-				ralink,group = "uart1";
-				ralink,function = "uart1";
+				groups = "uart1";
+				function = "uart1";
 			};
 		};
 
 		uart2_pins: uart2 {
 			uart2 {
-				ralink,group = "uart2";
-				ralink,function = "uart2";
+				groups = "uart2";
+				function = "uart2";
 			};
 		};
 
 		uart3_pins: uart3 {
 			uart3 {
-				ralink,group = "uart3";
-				ralink,function = "uart3";
+				groups = "uart3";
+				function = "uart3";
 			};
 		};
 
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
-				ralink,group = "rgmii1";
-				ralink,function = "rgmii1";
+				groups = "rgmii1";
+				function = "rgmii1";
 			};
 		};
 
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
-				ralink,group = "rgmii2";
-				ralink,function = "rgmii2";
+				groups = "rgmii2";
+				function = "rgmii2";
 			};
 		};
 
 		mdio_pins: mdio {
 			mdio {
-				ralink,group = "mdio";
-				ralink,function = "mdio";
+				groups = "mdio";
+				function = "mdio";
 			};
 		};
 
 		pcie_pins: pcie {
 			pcie {
-				ralink,group = "pcie";
-				ralink,function = "pcie rst";
+				groups = "pcie";
+				function = "gpio";
 			};
 		};
 
 		nand_pins: nand {
 			spi-nand {
-				ralink,group = "spi";
-				ralink,function = "nand1";
+				groups = "spi";
+				function = "nand1";
 			};
 
 			sdhci-nand {
-				ralink,group = "sdhci";
-				ralink,function = "nand2";
+				groups = "sdhci";
+				function = "nand2";
 			};
 		};
 
 		sdhci_pins: sdhci {
 			sdhci {
-				ralink,group = "sdhci";
-				ralink,function = "sdhci";
+				groups = "sdhci";
+				function = "sdhci";
 			};
 		};
 	};
@@ -387,7 +371,6 @@
 	xhci: xhci@1E1C0000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "okay";
 
 		compatible = "mediatek,mt8173-xhci";
 		reg = <0x1e1c0000 0x1000
@@ -436,21 +419,41 @@
 		};
 	};
 
+	nficlock: nficlock {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+
+		clock-frequency = <125000000>;
+	};
+
 	nand: nand@1e003000 {
 		status = "disabled";
 
-		compatible = "mtk,mt7621-nand";
-		bank-width = <2>;
+		compatible = "mediatek,mt7621-nfc";
 		reg = <0x1e003000 0x800
 			0x1e003800 0x800>;
+		reg-names = "nfi", "ecc";
+
+		clocks = <&nficlock>;
+		clock-names = "nfi_clk";
+	};
+
+	ethsys: syscon@1e000000 {
+		compatible = "mediatek,mt7621-ethsys",
+			     "syscon";
+		reg = <0x1e000000 0x1000>;
+		#clock-cells = <1>;
 	};
 
 	ethernet: ethernet@1e100000 {
 		compatible = "mediatek,mt7621-eth";
 		reg = <0x1e100000 0x10000>;
 
+		clocks = <&sysclock>;
+		clock-names = "ethif";
+
 		#address-cells = <1>;
-		#size-cells = <1>;
+		#size-cells = <0>;
 
 		resets = <&rstctrl 6 &rstctrl 23>;
 		reset-names = "fe", "eth";
@@ -458,27 +461,89 @@
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
 
-		mediatek,switch = <&gsw>;
+		mediatek,ethsys = <&ethsys>;
+
+		gmac0: mac@0 {
+			compatible = "mediatek,eth-mac";
+			reg = <0>;
+			phy-mode = "rgmii";
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+				pause;
+			};
+		};
 
-		mdio-bus {
+		gmac1: mac@1 {
+			compatible = "mediatek,eth-mac";
+			reg = <1>;
+			status = "disabled";
+			phy-mode = "rgmii-rxid";
+		};
+
+		mdio: mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			phy1f: ethernet-phy@1f {
+			switch0: switch@1f {
+				compatible = "mediatek,mt7621";
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <0x1f>;
-				phy-mode = "rgmii";
+				mediatek,mcm;
+				resets = <&rstctrl 2>;
+				reset-names = "mcm";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0>;
+
+					port@0 {
+						status = "disabled";
+						reg = <0>;
+						label = "lan0";
+					};
+
+					port@1 {
+						status = "disabled";
+						reg = <1>;
+						label = "lan1";
+					};
+
+					port@2 {
+						status = "disabled";
+						reg = <2>;
+						label = "lan2";
+					};
+
+					port@3 {
+						status = "disabled";
+						reg = <3>;
+						label = "lan3";
+					};
+
+					port@4 {
+						status = "disabled";
+						reg = <4>;
+						label = "lan4";
+					};
+
+					port@6 {
+						reg = <6>;
+						label = "cpu";
+						ethernet = <&gmac0>;
+						phy-mode = "rgmii";
+
+						fixed-link {
+							speed = <1000>;
+							full-duplex;
+						};
+					};
+				};
 			};
 		};
-
-		hnat: hnat@0 {
-			compatible = "mediatek,mt7623-hnat";
-			reg = <0 0x10000>;
-			mtketh-ppd = "eth0";
-			mtketh-lan = "eth0";
-			mtketh-wan = "eth0";
-			resets = <&rstctrl 0>;
-			reset-names = "mtketh";
-		};
 	};
 
 	gsw: gsw@1e110000 {
@@ -490,9 +555,10 @@
 
 	pcie: pcie@1e140000 {
 		compatible = "mediatek,mt7621-pci";
-		reg = <0x1e140000 0x100
-			0x1e142000 0x100>;
-
+		reg = <0x1e140000 0x100     /* host-pci bridge registers */
+			0x1e142000 0x100    /* pcie port 0 RC control registers */
+			0x1e143000 0x100    /* pcie port 1 RC control registers */
+			0x1e144000 0x100>;  /* pcie port 2 RC control registers */
 		#address-cells = <3>;
 		#size-cells = <2>;
 
@@ -518,32 +584,45 @@
 		reset-names = "pcie0", "pcie1", "pcie2";
 		clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
 		clock-names = "pcie0", "pcie1", "pcie2";
+		phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
+		phy-names = "pcie-phy0", "pcie-phy2";
+
+		reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
 
 		pcie0: pcie@0,0 {
 			reg = <0x0000 0 0 0 0>;
-
 			#address-cells = <3>;
 			#size-cells = <2>;
-
 			ranges;
+			bus-range = <0x00 0xff>;
 		};
 
 		pcie1: pcie@1,0 {
 			reg = <0x0800 0 0 0 0>;
-
 			#address-cells = <3>;
 			#size-cells = <2>;
-
 			ranges;
+			bus-range = <0x00 0xff>;
 		};
 
 		pcie2: pcie@2,0 {
 			reg = <0x1000 0 0 0 0>;
-
 			#address-cells = <3>;
 			#size-cells = <2>;
-
 			ranges;
+			bus-range = <0x00 0xff>;
 		};
 	};
+
+	pcie0_phy: pcie-phy@1e149000 {
+		compatible = "mediatek,mt7621-pci-phy";
+		reg = <0x1e149000 0x0700>;
+		#phy-cells = <1>;
+	};
+
+	pcie2_phy: pcie-phy@1e14a000 {
+		compatible = "mediatek,mt7621-pci-phy";
+		reg = <0x1e14a000 0x0700>;
+		#phy-cells = <1>;
+	};
 };
diff --git a/iopsys-ramips/dts/mt7621_adslr_g7.dts b/iopsys-ramips/dts/mt7621_adslr_g7.dts
new file mode 100644
index 0000000000000000000000000000000000000000..3290a5e710c41c969a55eb9d49f6de7e1362115b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_adslr_g7.dts
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "adslr,g7", "mediatek,mt7621-soc";
+	model = "ADSLR G7";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "blue:sys";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe00c>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe00c>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/EW1200.dts b/iopsys-ramips/dts/mt7621_afoundry_ew1200.dts
similarity index 71%
rename from iopsys-ramips/dts/EW1200.dts
rename to iopsys-ramips/dts/mt7621_afoundry_ew1200.dts
index def47d51990b78bcd0a522ef0033e5d3e888cdd9..ed9e9852d3f10f4f205e576bc5742b7b1a735c48 100644
--- a/iopsys-ramips/dts/EW1200.dts
+++ b/iopsys-ramips/dts/mt7621_afoundry_ew1200.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,28 +14,12 @@
 		led-upgrade = &led_run;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	palmbus: palmbus@1E000000 {
-		i2c@900 {
-			status = "okay";
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -46,13 +28,13 @@
 		compatible = "gpio-leds";
 
 		led_run: run {
-			label = "ew1200:green:run";
-			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+			label = "green:run";
+			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
 		};
 
 		usb {
-			label = "ew1200:green:usb";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
@@ -66,7 +48,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -123,15 +105,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/QUAD-E4G.dts b/iopsys-ramips/dts/mt7621_alfa-network_quad-e4g.dts
similarity index 68%
rename from iopsys-ramips/dts/QUAD-E4G.dts
rename to iopsys-ramips/dts/mt7621_alfa-network_quad-e4g.dts
index 3826f698721018a3b098635d0cd4263ebb6b4c36..e457dfcdbea5f42e5cfbc8780e2ca575da2827fc 100644
--- a/iopsys-ramips/dts/QUAD-E4G.dts
+++ b/iopsys-ramips/dts/mt7621_alfa-network_quad-e4g.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -11,6 +10,7 @@
 	model = "ALFA Network Quad-E4G";
 
 	aliases {
+		label-mac-device = &gmac0;
 		led-boot = &led_system;
 		led-failsafe = &led_system;
 		led-running = &led_system;
@@ -28,61 +28,61 @@
 		m2-enable {
 			gpio-export,name = "m2-enable";
 			gpio-export,output = <1>;
-			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie0-enable {
 			gpio-export,name = "minipcie0-enable";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie0-reset {
 			gpio-export,name = "minipcie0-reset";
 			gpio-export,output = <0>;
-			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie1-enable {
 			gpio-export,name = "minipcie1-enable";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 30 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie1-reset {
 			gpio-export,name = "minipcie1-reset";
 			gpio-export,output = <0>;
-			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie2-enable {
 			gpio-export,name = "minipcie2-enable";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 31 GPIO_ACTIVE_HIGH>;
 		};
 
 		minipcie2-reset {
 			gpio-export,name = "minipcie2-reset";
 			gpio-export,output = <0>;
-			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
 		};
 
 		pcie-perst-disable {
 			gpio-export,name = "pcie-perst-enable";
 			gpio-export,output = <0>;
-			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
 		};
 
 		sim-select {
 			gpio-export,name = "sim-select";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
 		};
 
 		watchdog-enable {
 			gpio-export,name = "watchdog-enable";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
@@ -91,19 +91,19 @@
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		user1 {
 			label = "user1";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 
 		user2 {
 			label = "user2";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_1>;
 		};
 	};
@@ -112,50 +112,75 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "quad-e4g:red:system";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "red:system";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		m2 {
-			label = "quad-e4g:orange:m2";
-			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+			label = "orange:m2";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
 		};
 
 		minipcie0 {
-			label = "quad-e4g:orange:minipcie0";
-			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+			label = "orange:minipcie0";
+			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
 		};
 
 		minipcie1 {
-			label = "quad-e4g:orange:minipcie1";
-			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+			label = "orange:minipcie1";
+			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
 		};
 
 		minipcie2 {
-			label = "quad-e4g:orange:minipcie2";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "orange:minipcie2";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 		};
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	watchdog {
 		compatible = "linux,wdt-gpio";
-		gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+		gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
 		hw_algo = "toggle";
 		hw_margin_ms = <25000>;
 		always-running;
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
 &i2c {
 	status = "okay";
 
@@ -169,12 +194,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "rgmii2", "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "rgmii2", "wdt";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7621_asiarf_ap7621-001.dts b/iopsys-ramips/dts/mt7621_asiarf_ap7621-001.dts
new file mode 100644
index 0000000000000000000000000000000000000000..cf91dc03119b61ba9ad11f6b8ca121d79b91c91e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asiarf_ap7621-001.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_asiarf_ap7621.dtsi"
+
+/ {
+	compatible = "asiarf,ap7621-001", "mediatek,mt7621-soc";
+	model = "AsiaRF AP7621-001";
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_asiarf_ap7621-nv1.dts b/iopsys-ramips/dts/mt7621_asiarf_ap7621-nv1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..5a4c03fb7c0db5ad5cb9a2521cf91b25a5c8336e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asiarf_ap7621-nv1.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_asiarf_ap7621.dtsi"
+
+/ {
+	compatible = "asiarf,ap7621-nv1", "mediatek,mt7621-soc";
+	model = "AsiaRF AP7621-NV1";
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_asiarf_ap7621.dtsi b/iopsys-ramips/dts/mt7621_asiarf_ap7621.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..b011c7ae2aed69de7246904258651f7774429507
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asiarf_ap7621.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wlan1 {
+			label = "orange:wlan1";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan0 {
+			label = "orange:wlan0";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x2000>;
+			};
+
+			partition@32000 {
+				label = "2860";
+				reg = <0x32000 0x4000>;
+			};
+
+			partition@36000 {
+				label = "rtdev";
+				reg = <0x36000 0x2000>;
+			};
+
+			partition@38000 {
+				label = "Reserve";
+				reg = <0x38000 0x8000>;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "firmware";
+				reg = <0x50000 0xfa0000>;
+				compatible = "denx,uimage";
+			};
+
+			partition@ff0000 {
+				label = "nvram";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/RT-AC57U.dts b/iopsys-ramips/dts/mt7621_asus_rt-ac57u.dts
similarity index 75%
rename from iopsys-ramips/dts/RT-AC57U.dts
rename to iopsys-ramips/dts/mt7621_asus_rt-ac57u.dts
index 6fec0cdf619e54c492ed8fc04088bc526c658140..78f5584b4c56486b6b0d3de9c8a23056c2856e37 100644
--- a/iopsys-ramips/dts/RT-AC57U.dts
+++ b/iopsys-ramips/dts/mt7621_asus_rt-ac57u.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -17,26 +16,17 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "rt-ac57u:blue:power";
-			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "rt-ac57u:blue:usb";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			label = "blue:usb";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
@@ -47,14 +37,14 @@
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_WPS_BUTTON>;
 			debounce-interval = <60>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 			debounce-interval = <60>;
 		};
@@ -63,7 +53,7 @@
 	led-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "LED-Power";
-		gpio = <&gpio1 14 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio 46 GPIO_ACTIVE_LOW>;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 		regulator-always-on;
@@ -139,15 +129,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "sdhci";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "sdhci";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_asus_rt-ac65p.dts b/iopsys-ramips/dts/mt7621_asus_rt-ac65p.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9be178ecd3319bcbdaf9245dbb2b50c12ce53bbd
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asus_rt-ac65p.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_asus_rt-acx5p.dtsi"
+
+/ {
+	compatible = "asus,rt-ac65p", "mediatek,mt7621-soc";
+	model = "ASUS RT-AC65P";
+};
diff --git a/iopsys-ramips/dts/mt7621_asus_rt-ac85p.dts b/iopsys-ramips/dts/mt7621_asus_rt-ac85p.dts
new file mode 100644
index 0000000000000000000000000000000000000000..cc8e0c2c448156ae5847717d018316cd1ef0cc2c
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asus_rt-ac85p.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_asus_rt-acx5p.dtsi"
+
+/ {
+	compatible = "asus,rt-ac85p", "mediatek,mt7621-soc";
+	model = "ASUS RT-AC85P";
+};
diff --git a/iopsys-ramips/dts/mt7621_asus_rt-acx5p.dtsi b/iopsys-ramips/dts/mt7621_asus_rt-acx5p.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..b5e8655cb9b2a9043007a9d46fdcab568986c841
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asus_rt-acx5p.dtsi
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1radio";
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+	};
+};
+
+&i2c {
+	status = "okay";
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0xe0000>;
+			read-only;
+		};
+
+		partition@e0000 {
+			label = "u-boot-env";
+			reg = <0xe0000 0x100000>;
+			read-only;
+		};
+
+		factory: partition@1e0000 {
+			label = "factory";
+			reg = <0x1e0000 0x100000>;
+			read-only;
+		};
+
+		factory2: partition@2e0000 {
+			label = "factory2";
+			reg = <0x2e0000 0x100000>;
+			read-only;
+		};
+
+		partition@3e0000 {
+			label = "kernel";
+			reg = <0x3e0000 0x400000>;
+		};
+
+		partition@7e0000 {
+			label = "ubi";
+			reg = <0x7e0000 0x2e00000>;
+		};
+
+		partition@35e0000 {
+			label = "firmware2";
+			reg = <0x35e0000 0x3200000>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi0: wifi@0,0 {
+		compatible = "pci14c3,7615";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi1: wifi@0,0 {
+		compatible = "pci14c3,7615";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "i2c";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_asus_rt-n56u-b1.dts b/iopsys-ramips/dts/mt7621_asus_rt-n56u-b1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b78e594ffda79ce2d874a696d6227413ca809205
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_asus_rt-n56u-b1.dts
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "asus,rt-n56u-b1", "mediatek,mt7621-soc";
+	model = "ASUS RT-N56U B1";
+
+	aliases {
+		label-mac-device = &wan;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wan {
+			label = "blue:wan";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "blue:lan";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_WPS_BUTTON>;
+			debounce-interval = <60>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x8004>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/WSR-1166.dts b/iopsys-ramips/dts/mt7621_buffalo_wsr-1166dhp.dts
similarity index 63%
rename from iopsys-ramips/dts/WSR-1166.dts
rename to iopsys-ramips/dts/mt7621_buffalo_wsr-1166dhp.dts
index ff033c41e4b92eed823dfd96b473cfed6e9f62ee..f9211463f85971c7ae6de26107a887ffccad60ad 100644
--- a/iopsys-ramips/dts/WSR-1166.dts
+++ b/iopsys-ramips/dts/mt7621_buffalo_wsr-1166dhp.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,98 +14,88 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		internet_g {
-			label = "wsr-1166:green:internet";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "green:internet";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 
 		router_g {
-			label = "wsr-1166:green:router";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "green:router";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		router_o {
-			label = "wsr-1166:orange:router";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "orange:router";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		internet_o {
-			label = "wsr-1166:orange:internet";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "orange:internet";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi_o {
-			label = "wsr-1166:orange:wifi";
-			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+			label = "orange:wifi";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "wsr-1166:green:power";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 		};
 
 		diag {
-			label = "wsr-1166:orange:diag";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			label = "orange:diag";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi_g {
-			label = "wsr-1166:green:wifi";
-			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+			label = "green:wifi";
+			gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		power {
 			label = "power";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_POWER>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		aoss {
 			label = "aoss";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		auto {
 			label = "mode";
-			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		ap {
 			label = "ap";
-			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		router {
 			label = "router";
-			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
@@ -115,14 +103,14 @@
 
 	gpio_poweroff {
 		compatible = "gpio-poweroff";
-		gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+		gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -164,15 +152,42 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
 		};
 	};
 };
 
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
+		function = "gpio";
+	};
+};
+
 &pcie {
 	status = "okay";
 };
diff --git a/iopsys-ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts b/iopsys-ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts
new file mode 100644
index 0000000000000000000000000000000000000000..048eac5a3dd4b9759d875da1f8ca23934e1e7145
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_buffalo_wsr-2533dhpl.dts
@@ -0,0 +1,231 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "buffalo,wsr-2533dhpl", "mediatek,mt7621-soc";
+	model = "Buffalo WSR-2533DHPL";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_diag;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		internet_green {
+			label = "green:internet";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		router_green {
+			label = "green:router";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		router_amber {
+			label = "amber:router";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		internet_amber {
+			label = "amber:internet";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wireless_amber {
+			label = "amber:wireless";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+		};
+
+		led_diag: diag {
+			label = "amber:diag";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+		};
+
+		wireless_green {
+			label = "green:wireless";
+			gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		aoss {
+			label = "aoss";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		auto {
+			label = "auto";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		bridge {
+			label = "wb";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+			linux,input-type = <EV_SW>;
+		};
+
+		router {
+			label = "router";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+			linux,input-type = <EV_SW>;
+		};
+
+		power {
+			label = "power";
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_POWER>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "openwrt,trx";
+				label = "firmware";
+				reg = <0x50000 0x7c0000>;
+			};
+
+			partition@810000 {
+				label = "Kernel2";
+				reg = <0x810000 0x7c0000>;
+				read-only;
+			};
+
+			partition@fd0000 {
+				label = "glbcfg";
+				reg = <0xfd0000 0x010000>;
+				read-only;
+			};
+
+			partition@fe0000 {
+				label = "board_data";
+				reg = <0xfe0000 0x20000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+	mtd-mac-address-increment = <(-1)>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "wdt", "sdhci";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/WSR-600.dts b/iopsys-ramips/dts/mt7621_buffalo_wsr-600dhp.dts
similarity index 60%
rename from iopsys-ramips/dts/WSR-600.dts
rename to iopsys-ramips/dts/mt7621_buffalo_wsr-600dhp.dts
index 0cdd79cdda89815e7fe091218ef689a1ce56eacb..7392b1d7c1090d428ac8e225dcbe241c4dc8d21a 100644
--- a/iopsys-ramips/dts/WSR-600.dts
+++ b/iopsys-ramips/dts/mt7621_buffalo_wsr-600dhp.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,98 +14,88 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wsr-600:green:power";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi_o {
-			label = "wsr-600:orange:wifi";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "orange:wifi";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 
 		diag {
-			label = "wsr-600:orange:diag";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "orange:diag";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi_g {
-			label = "wsr-600:green:wifi";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 
 		router_o {
-			label = "wsr-600:orange:router";
-			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+			label = "orange:router";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
 		};
 
 		router_g {
-			label = "wsr-600:green:router";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			label = "green:router";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 		};
 
 		internet_o {
-			label = "wsr-600:orange:internet";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			label = "orange:internet";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 		};
 
 		internet_g {
-			label = "wsr-600:green:internet";
-			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+			label = "green:internet";
+			gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		power {
 			label = "power";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_POWER>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		aoss {
 			label = "aoss";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		auto {
 			label = "mode";
-			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		ap {
 			label = "ap";
-			gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		router {
 			label = "router";
-			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
@@ -115,14 +103,14 @@
 
 	gpio_poweroff {
 		compatible = "gpio-poweroff";
-		gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+		gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -159,12 +147,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
+		function = "gpio";
 	};
 };
 
@@ -186,6 +172,39 @@
 	};
 };
 
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+		};
+	};
+};
+
 &xhci {
 	status = "disabled";
 };
diff --git a/iopsys-ramips/dts/mt7621_cudy_wr1300.dts b/iopsys-ramips/dts/mt7621_cudy_wr1300.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a66ce942a57391db769c6dc7ec91c2d3a5ef3127
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_cudy_wr1300.dts
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "cudy,wr1300", "mediatek,mt7621-soc";
+	model = "Cudy WR1300";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+		label-mac-device = &gmac0;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "green:sys";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xf80000>;
+			};
+
+			partition@fd0000 {
+				label = "debug";
+				reg = <0xfd0000 0x10000>;
+				read-only;
+			};
+
+			partition@fe0000 {
+				label = "backup";
+				reg = <0xfe0000 0x10000>;
+				read-only;
+			};
+
+			bdinfo: partition@ff0000 {
+				label = "bdinfo";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7603";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		mtd-mac-address = <&bdinfo 0xde00>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		mtd-mac-address = <&bdinfo 0xde00>;
+		mtd-mac-address-increment = <2>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&bdinfo 0xde00>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&bdinfo 0xde00>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "i2c", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/Newifi-D2.dts b/iopsys-ramips/dts/mt7621_d-team_newifi-d2.dts
similarity index 62%
rename from iopsys-ramips/dts/Newifi-D2.dts
rename to iopsys-ramips/dts/mt7621_d-team_newifi-d2.dts
index 31fc42cde2550165e9d50a360e7ffd41ce3f4849..5622855f487cba95c1b4213cd55a5f7eabc5c39e 100644
--- a/iopsys-ramips/dts/Newifi-D2.dts
+++ b/iopsys-ramips/dts/mt7621_d-team_newifi-d2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,11 +12,7 @@
 		led-failsafe = &led_power_blue;
 		led-running = &led_power_blue;
 		led-upgrade = &led_power_blue;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
+		label-mac-device = &gmac0;
 	};
 
 	chosen {
@@ -29,56 +23,55 @@
 		compatible = "gpio-leds";
 
 		power-amber {
-			label = "newifi-d2:amber:power";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "amber:power";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_blue: power-blue {
-			label = "newifi-d2:blue:power";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 		};
 
 		internet-amber {
-			label = "newifi-d2:amber:internet";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "amber:internet";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 		};
 
 		internet-blue {
-			label = "newifi-d2:blue:internet";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "blue:internet";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "newifi-d2:blue:wlan2g";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan2g";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "newifi-d2:blue:wlan5g";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan5g";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "newifi-d2:blue:usb";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			label = "blue:usb";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -90,7 +83,7 @@
 		power_usb3 {
 			gpio-export,name = "power_usb3";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -98,10 +91,11 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <45000000>;
+		broken-flash-reset;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -154,15 +148,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uart2", "uart3";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uart2", "uart3";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/PBR-M1.dts b/iopsys-ramips/dts/mt7621_d-team_pbr-m1.dts
similarity index 58%
rename from iopsys-ramips/dts/PBR-M1.dts
rename to iopsys-ramips/dts/mt7621_d-team_pbr-m1.dts
index e89a7ef93f1d8de8aec03054a62c707ad4d52eb6..2fcdce5f19bbb320cbd5264e8a4f062b46c4cf0c 100644
--- a/iopsys-ramips/dts/PBR-M1.dts
+++ b/iopsys-ramips/dts/mt7621_d-team_pbr-m1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,64 +14,46 @@
 		led-upgrade = &led_sys;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	palmbus: palmbus@1E000000 {
-		i2c: i2c@900 {
-			status = "okay";
-
-			pcf8563: rtc@51 {
-				status = "okay";
-				compatible = "nxp,pcf8563";
-				reg = <0x51>;
-			};
-		};
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		power {
-			label = "pbr-m1:blue:power";
-			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		led_sys: sys {
-			label = "pbr-m1:blue:sys";
-			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+			label = "blue:sys";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "pbr-m1:blue:internet";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			label = "blue:internet";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "pbr-m1:blue:wlan2g";
-			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan2g";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan5g {
-			label = "pbr-m1:blue:wlan5g";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan5g";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -85,25 +65,35 @@
 		power_usb2 {
 			gpio-export,name = "power_usb2";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_usb3 {
 			gpio-export,name = "power_usb3";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_sata {
 			gpio-export,name = "power_sata";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	beeper: beeper {
 		compatible = "gpio-beeper";
-		gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+		gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&i2c {
+	status = "okay";
+
+	rtc@51 {
+		status = "okay";
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
 	};
 };
 
@@ -114,10 +104,12 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+		broken-flash-reset;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -145,14 +137,26 @@
 			partition@50000 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x50000 0xfb0000>;
+				reg = <0x50000 0x1fb0000>;
 			};
 		};
 	};
 };
 
+&pinctrl {
+	uart3_gpio: uart3-gpio {
+		uart3 {
+			groups = "uart3";
+			function = "gpio";
+		};
+	};
+};
+
 &pcie {
 	status = "okay";
+	pinctrl-0 = <&pcie_pins>, <&uart3_gpio>;
+	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
+		      <&gpio 7 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {
@@ -170,15 +174,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2", "jtag";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-1960-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-1960-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0f4fbc1873a148ed10e87dabc0eb68db1d9777e8
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-1960-a1.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-xx60-a1.dtsi"
+
+/ {
+	compatible = "dlink,dir-1960-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-1960 A1";
+};
+
+&leds {
+	usb_white {
+		label = "white:usb";
+		gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&xhci_ehci_port1>;
+		linux,default-trigger = "usbport";
+	};
+};
+
+&wifi0 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <1>;
+};
+
+&wifi1 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <2>;
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-2640-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-2640-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..323a7906000dbbf2c39dd9568d00003a0baafcf4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-2640-a1.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-xx60-a1.dtsi"
+
+/ {
+	compatible = "dlink,dir-2640-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-2640 A1";
+};
+
+&leds {
+	usb2_white {
+		label = "white:usb2";
+		gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&ehci_port2>;
+		linux,default-trigger = "usbport";
+	};
+
+	usb3_white {
+		label = "white:usb3";
+		gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&xhci_ehci_port1>;
+		linux,default-trigger = "usbport";
+	};
+};
+
+&wifi0 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <1>;
+};
+
+&wifi1 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <2>;
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-2660-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-2660-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..fbf233d96f18e75bbedbf57939f8c4409555ec6d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-2660-a1.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-xx60-a1.dtsi"
+
+/ {
+	compatible = "dlink,dir-2660-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-2660 A1";
+};
+
+&leds {
+	usb2_white {
+		label = "white:usb2";
+		gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&ehci_port2>;
+		linux,default-trigger = "usbport";
+	};
+
+	usb3_white {
+		label = "white:usb3";
+		gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&xhci_ehci_port1>;
+		linux,default-trigger = "usbport";
+	};
+};
+
+&wifi0 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <1>;
+};
+
+&wifi1 {
+	mtd-mac-address = <&factory 0xe000>;
+	mtd-mac-address-increment = <2>;
+};
diff --git a/iopsys-ramips/dts/DIR-860L-B1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-860l-b1.dts
similarity index 63%
rename from iopsys-ramips/dts/DIR-860L-B1.dts
rename to iopsys-ramips/dts/mt7621_dlink_dir-860l-b1.dts
index c212e05a20b2db006671391d2a0a14f38b7846df..f843f628013df3c9b680674ee482ab30775b0589 100644
--- a/iopsys-ramips/dts/DIR-860L-B1.dts
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-860l-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,54 +12,45 @@
 		led-failsafe = &led_power_green;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_green;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
+		label-mac-device = &gmac0;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		power {
-			label = "dir-860l-b1:orange:power";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "orange:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power2 {
-			label = "dir-860l-b1:green:power";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 		};
 
 		net {
-			label = "dir-860l-b1:orange:net";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "orange:net";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 		};
 
 		net2 {
-			label = "dir-860l-b1:green:net";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "green:net";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -70,7 +59,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -119,12 +108,48 @@
 	};
 };
 
+&gmac0 {
+	mtd-mac-address = <&radio 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
 &pcie {
 	status = "okay";
+
+	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
+		      <&gpio 8 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {
-	mt76@0,0 {
+	wifi0: mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&radio 0x2000>;
 		ieee80211-freq-limit = <5000000 6000000>;
@@ -132,18 +157,16 @@
 };
 
 &pcie1 {
-	mt76@0,0 {
+	wifi1: mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 0>;
+		mediatek,mtd-eeprom = <&radio 0x0>;
 		ieee80211-freq-limit = <2400000 2500000>;
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uart3", "jtag", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-867-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-867-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b2ba5ecaa9281fa601f577580a748702c25913a9
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-867-a1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-a1.dtsi"
+
+/ {
+	compatible = "dlink,dir-867-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-867 A1";
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-878-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-878-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4bfe5ca43c2143494d4af52c1820d55b95b77618
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-878-a1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-a1.dtsi"
+
+/ {
+	compatible = "dlink,dir-878-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-878 A1";
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-882-a1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-882-a1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..cef0705393772ab35bf818288d7c033bdf2619b2
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-882-a1.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-a1.dtsi"
+#include "mt7621_dlink_dir-882-x1.dtsi"
+
+/ {
+	compatible = "dlink,dir-882-a1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-882 A1";
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-882-r1.dts b/iopsys-ramips/dts/mt7621_dlink_dir-882-r1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..26b6f34707577dbe64840edd68e109ce643888ac
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-882-r1.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-r1.dtsi"
+#include "mt7621_dlink_dir-882-x1.dtsi"
+
+/ {
+	compatible = "dlink,dir-882-r1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-882 R1";
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-882-x1.dtsi b/iopsys-ramips/dts/mt7621_dlink_dir-882-x1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..cafb1df9648fc7cd96cfb8da4f5e3717f6de6720
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-882-x1.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+&leds {
+	usb2 {
+		label = "green:usb2";
+		gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&ehci_port2>;
+		linux,default-trigger = "usbport";
+	};
+
+	usb3 {
+		label = "green:usb3";
+		gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		trigger-sources = <&xhci_ehci_port1>;
+		linux,default-trigger = "usbport";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-8xx-a1.dtsi b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-a1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..95ef0afcd9d5294e0b67afc37a4436ad209759a2
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-a1.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-x1.dtsi"
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x20000>;
+				read-only;
+			};
+
+			partition@60000 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,padding = <96>;
+				label = "firmware";
+				reg = <0x60000 0xfa0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-8xx-r1.dtsi b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-r1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..e93a06d9fea75a22acb965a91e0f9a11a0e18d4e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-r1.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_dlink_dir-8xx-x1.dtsi"
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-8xx-x1.dtsi b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-x1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..7ab0e8bd5d0fa82bbeb0f26c1659e8b6ed8f082d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-8xx-x1.dtsi
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_power_orange;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_net_orange;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		led_power_orange: power_orange {
+			label = "orange:power";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_green: power_green {
+			label = "green:power";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		led_net_orange: net_orange {
+			label = "orange:net";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		net_green {
+			label = "green:net";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_dlink_dir-xx60-a1.dtsi b/iopsys-ramips/dts/mt7621_dlink_dir-xx60-a1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..a54b2be4f061c0c7b3a593810cba68fcc16d5af3
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_dlink_dir-xx60-a1.dtsi
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_power_orange;
+		led-failsafe = &led_power_white;
+		led-running = &led_power_white;
+		led-upgrade = &led_net_orange;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		led_power_orange: power_orange {
+			label = "orange:power";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_white: power_white {
+			label = "white:power";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		led_net_orange: net_orange {
+			label = "orange:net";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		net_white {
+			label = "white:net";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "Bootloader";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "config";
+			reg = <0x80000 0x80000>;
+			read-only;
+		};
+
+		factory: partition@100000 {
+			label = "factory";
+			reg = <0x100000 0x40000>;
+			read-only;
+		};
+
+		partition@140000 {
+			label = "config2";
+			reg = <0x140000 0x40000>;
+			read-only;
+		};
+
+		partition@180000 {
+			label = "firmware";
+			compatible = "openwrt,uimage", "denx,uimage";
+			openwrt,padding = <96>;
+			reg = <0x180000 0x2800000>;
+		};
+
+		partition@2980000 {
+			label = "private";
+			reg = <0x2980000 0x2000000>;
+			read-only;
+		};
+
+		partition@4980000 {
+			label = "firmware2";
+			compatible = "openwrt,uimage", "denx,uimage";
+			openwrt,padding = <96>;
+			reg = <0x4980000 0x2800000>;
+		};
+
+		partition@7180000 {
+			label = "mydlink";
+			reg = <0x7180000 0x600000>;
+			read-only;
+		};
+
+		partition@7780000 {
+			label = "reserved";
+			reg = <0x7780000 0x880000>;
+			read-only;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi0: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi1: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_edimax_ra21s.dts b/iopsys-ramips/dts/mt7621_edimax_ra21s.dts
new file mode 100644
index 0000000000000000000000000000000000000000..1aea9490047de047b2a8552ce572830f55dc655c
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_edimax_ra21s.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_edimax_rx21s.dtsi"
+
+/ {
+	compatible = "edimax,ra21s", "mediatek,mt7621-soc";
+	model = "Edimax RA21S";
+};
diff --git a/iopsys-ramips/dts/mt7621_edimax_re23s.dts b/iopsys-ramips/dts/mt7621_edimax_re23s.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9b9657344601f98084f9f280c759a7293884fe12
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_edimax_re23s.dts
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	compatible = "edimax,re23s", "mediatek,mt7621-soc";
+	model = "Edimax RE23S";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_wifi_red;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+		};
+
+		wifi_green {
+			label = "green:wifi";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		wifi_amber {
+			label = "amber:wifi";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_wifi_red: wifi_red {
+			label = "red:wifi";
+			gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "cimage";
+				reg = <0x50000 0x20000>;
+				read-only;
+			};
+
+			partition@70000 {
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
+				label = "firmware";
+				reg = <0x70000 0xf50000>;
+			};
+
+			partition@fc0000 {
+				label = "freespace";
+				reg = <0xfc0000 0x40000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x8004>;
+};
+
+&switch0 {
+	ports {
+		port@4 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7621_edimax_rg21s.dts b/iopsys-ramips/dts/mt7621_edimax_rg21s.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6ac01dd86d073f55f78d2abbc2cf418a00784738
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_edimax_rg21s.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_edimax_rx21s.dtsi"
+
+/ {
+	compatible = "edimax,rg21s", "mediatek,mt7621-soc";
+	model = "Edimax RG21S";
+};
diff --git a/iopsys-ramips/dts/mt7621_edimax_rx21s.dtsi b/iopsys-ramips/dts/mt7621_edimax_rx21s.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..3f3bae43f168a1edaddbb11a0c0f3c71c0646c76
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_edimax_rx21s.dtsi
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: led_1 {
+			label = "red:led1";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_2 {
+			label = "red:led2";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_3 {
+			label = "red:led3";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_4 {
+			label = "red:led4";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi0: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi1: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/WRC-1167GHBK2-S.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts
similarity index 57%
rename from iopsys-ramips/dts/WRC-1167GHBK2-S.dts
rename to iopsys-ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts
index 9587b3769d5077b0ddf03411c4933398880bb698..b6a73835574722140a026c7c82c8923914ef6f35 100644
--- a/iopsys-ramips/dts/WRC-1167GHBK2-S.dts
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1167ghbk2-s.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,75 +14,96 @@
 		led-upgrade = &led_power_green;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		wlan2g {
-			label = "wrc-1167ghbk2-s:white:wlan2g";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "white:wlan2g";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
 		};
 
 		wlan5g {
-			label = "wrc-1167ghbk2-s:white:wlan5g";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "white:wlan5g";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power_green: power_green {
-			label = "wrc-1167ghbk2-s:green:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+			label = "green:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_blue {
-			label = "wrc-1167ghbk2-s:blue:power";
-			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+			label = "blue:power";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
 		};
 
 		wps {
-			label = "wrc-1167ghbk2-s:red:wps";
-			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+			label = "red:wps";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_red {
-			label = "wrc-1167ghbk2-s:red:power";
-			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+			label = "red:power";
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -133,21 +152,25 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart3", "jtag", "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
 	};
 };
 
 &pcie {
 	status = "okay";
-	/*
-	 * WRC-1167GHBK2-S has MT7615D for 2.4/5 GHz wifi,
-	 * but it's not supported in OpenWrt.
-	 */
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		mtd-mac-address = <&factory 0xe000>;
+		mtd-mac-address-increment = <1>;
+	};
 };
 
 &xhci {
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1167gs2-b.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1167gs2-b.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6349fd487ed998b1ed4df01714f3c70a367644bf
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1167gs2-b.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-1pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1167gs2-b", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1167GS2-B";
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xfff4>;
+};
+
+&wan {
+	mtd-mac-address = <&factory 0xfffa>;
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0xb00000>;
+	};
+
+	partition@b50000 {
+		label = "tm_pattern";
+		reg = <0xb50000 0x380000>;
+		read-only;
+	};
+
+	partition@ed0000 {
+		label = "tm_key";
+		reg = <0xed0000 0x80000>;
+		read-only;
+	};
+
+	partition@f50000 {
+		label = "nvram";
+		reg = <0xf50000 0x30000>;
+		read-only;
+	};
+
+	partition@f80000 {
+		label = "user_data";
+		reg = <0xf80000 0x80000>;
+		read-only;
+	};
+};
+
+&wifi {
+	mtd-mac-address = <&factory 0x4>;
+	mtd-mac-address-increment = <(-1)>;
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1167gst2.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1167gst2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..11b782488ab982ce5726f6b819dd7bd5112c48f6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1167gst2.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-1pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1167gst2", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1167GST2";
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&wan {
+	mtd-mac-address = <&factory 0xe006>;
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0x1800000>;
+	};
+
+	partition@1850000 {
+		label = "tm_pattern";
+		reg = <0x1850000 0x400000>;
+		read-only;
+	};
+
+	partition@1c50000 {
+		label = "tm_key";
+		reg = <0x1c50000 0x100000>;
+		read-only;
+	};
+
+	partition@1d50000 {
+		label = "nvram";
+		reg = <0x1d50000 0xb0000>;
+		read-only;
+	};
+
+	partition@1e00000 {
+		label = "user_data";
+		reg = <0x1e00000 0x200000>;
+		read-only;
+	};
+};
+
+&wifi {
+	mtd-mac-address = <&factory 0xe006>;
+	mtd-mac-address-increment = <1>;
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1750gs.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gs.dts
new file mode 100644
index 0000000000000000000000000000000000000000..71e4c16ddd3815ac4bd310bac16d3dd3bae174b4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gs.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1750gs", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1750GS";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0xb00000>;
+	};
+
+	partition@b50000 {
+		label = "tm_pattern";
+		reg = <0xb50000 0x380000>;
+		read-only;
+	};
+
+	partition@ed0000 {
+		label = "tm_key";
+		reg = <0xed0000 0x80000>;
+		read-only;
+	};
+
+	partition@f50000 {
+		label = "art_block";
+		reg = <0xf50000 0x30000>;
+		read-only;
+	};
+
+	partition@f80000 {
+		label = "user_data";
+		reg = <0xf80000 0x80000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1750gst2.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gst2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4b8888cd914de7ba6eb084407918ec445ee375f4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gst2.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1750gst2", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1750GST2";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0x1800000>;
+	};
+
+	partition@1850000 {
+		label = "tm_pattern";
+		reg = <0x1850000 0x400000>;
+		read-only;
+	};
+
+	partition@1c50000 {
+		label = "tm_key";
+		reg = <0x1c50000 0x100000>;
+		read-only;
+	};
+
+	partition@1d50000 {
+		label = "nvram";
+		reg = <0x1d50000 0xb0000>;
+		read-only;
+	};
+
+	partition@1e00000 {
+		label = "user_data";
+		reg = <0x1e00000 0x200000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1750gsv.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gsv.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6719c347f1388682e18efe3f9d855979a60f52da
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1750gsv.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1750gsv", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1750GSV";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0xb00000>;
+	};
+
+	partition@b50000 {
+		label = "tm_pattern";
+		reg = <0xb50000 0x380000>;
+		read-only;
+	};
+
+	partition@ed0000 {
+		label = "tm_key";
+		reg = <0xed0000 0x80000>;
+		read-only;
+	};
+
+	partition@f50000 {
+		label = "nvram";
+		reg = <0xf50000 0x30000>;
+		read-only;
+	};
+
+	partition@f80000 {
+		label = "user_data";
+		reg = <0xf80000 0x80000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-1900gst.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-1900gst.dts
new file mode 100644
index 0000000000000000000000000000000000000000..675e086a8270d21966acc553a09007df85293295
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-1900gst.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-1900gst", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-1900GST";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0xb00000>;
+	};
+
+	partition@b50000 {
+		label = "tm_pattern";
+		reg = <0xb50000 0x380000>;
+		read-only;
+	};
+
+	partition@ed0000 {
+		label = "tm_key";
+		reg = <0xed0000 0x80000>;
+		read-only;
+	};
+
+	partition@f50000 {
+		label = "art_block";
+		reg = <0xf50000 0x30000>;
+		read-only;
+	};
+
+	partition@f80000 {
+		label = "user_data";
+		reg = <0xf80000 0x80000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-2533ghbk-i.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-2533ghbk-i.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a5436d55d7b07d770949c39b65c8fad308b38b3a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-2533ghbk-i.dts
@@ -0,0 +1,199 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "elecom,wrc-2533ghbk-i", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-2533GHBK-I";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wps {
+			label = "red:wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_power: power {
+			label = "white:power";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "white:wlan2g";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wlan5g {
+			label = "white:wlan5g";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy1radio";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		auto {
+			label = "auto";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x9a0000>;
+			};
+
+			partition@9f0000 {
+				label = "TM_1";
+				reg = <0x9f0000 0x200000>;
+				read-only;
+			};
+
+			partition@bf0000 {
+				label = "TM_2";
+				reg = <0xbf0000 0x200000>;
+				read-only;
+			};
+
+			partition@df0000 {
+				label = "manufacture";
+				reg = <0xdf0000 0x180000>;
+				read-only;
+			};
+
+			partition@f70000 {
+				label = "backup";
+				reg = <0xf70000 0x10000>;
+				read-only;
+			};
+
+			partition@f80000 {
+				label = "storage";
+				reg = <0xf80000 0x80000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst.dts
new file mode 100644
index 0000000000000000000000000000000000000000..dacd540b28b0a6946d324aea44076ce4e002f82a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst.dts
@@ -0,0 +1,38 @@
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-2533gst", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-2533GST";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0xb00000>;
+	};
+
+	partition@b50000 {
+		label = "tm_pattern";
+		reg = <0xb50000 0x380000>;
+		read-only;
+	};
+
+	partition@ed0000 {
+		label = "tm_key";
+		reg = <0xed0000 0x80000>;
+		read-only;
+	};
+
+	partition@f50000 {
+		label = "art_block";
+		reg = <0xf50000 0x30000>;
+		read-only;
+	};
+
+	partition@f80000 {
+		label = "user_data";
+		reg = <0xf80000 0x80000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst2.dts b/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a998b61b734015d6fb599875a8b044148a0c3991
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-2533gst2.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_elecom_wrc-gs-2pci.dtsi"
+
+/ {
+	compatible = "elecom,wrc-2533gst2", "mediatek,mt7621-soc";
+	model = "ELECOM WRC-2533GST2";
+};
+
+&partitions {
+	partition@50000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x50000 0x1800000>;
+	};
+
+	partition@1850000 {
+		label = "tm_pattern";
+		reg = <0x1850000 0x400000>;
+		read-only;
+	};
+
+	partition@1c50000 {
+		label = "tm_key";
+		reg = <0x1c50000 0x100000>;
+		read-only;
+	};
+
+	partition@1d50000 {
+		label = "nvram";
+		reg = <0x1d50000 0xb0000>;
+		read-only;
+	};
+
+	partition@1e00000 {
+		label = "user_data";
+		reg = <0x1e00000 0x200000>;
+		read-only;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-gs-1pci.dtsi b/iopsys-ramips/dts/mt7621_elecom_wrc-gs-1pci.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..7495453d458079d1a4bef1ebef6ca7c1ec30a458
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-gs-1pci.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_elecom_wrc-gs.dtsi"
+
+&leds {
+	wlan2g {
+		label = "white:wlan2g";
+		gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+	};
+
+	wlan5g {
+		label = "white:wlan5g";
+		gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt", "sdhci";
+		function = "gpio";
+	};
+};
+
+&pcie0 {
+	wifi: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-gs-2pci.dtsi b/iopsys-ramips/dts/mt7621_elecom_wrc-gs-2pci.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..642724da10c8b9ef9df3bd37e9008c3ed98590fc
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-gs-2pci.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_elecom_wrc-gs.dtsi"
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&wan {
+	mtd-mac-address = <&factory 0xe006>;
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "jtag", "wdt", "sdhci";
+		function = "gpio";
+	};
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_elecom_wrc-gs.dtsi b/iopsys-ramips/dts/mt7621_elecom_wrc-gs.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..9cf2b666b4e17ef3226a1df55e437ac14d7e9c06
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_elecom_wrc-gs.dtsi
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+		label-mac-device = &wan;
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		led_power_green: power_green {
+			label = "green:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_blue {
+			label = "blue:power";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		wps {
+			label = "red:wps";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		power_red {
+			label = "red:power";
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		client {
+			label = "client";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		ap {
+			label = "ap";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		extender {
+			label = "extender";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		router {
+			label = "router";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		wan: port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/FIREWRT.dts b/iopsys-ramips/dts/mt7621_firefly_firewrt.dts
similarity index 70%
rename from iopsys-ramips/dts/FIREWRT.dts
rename to iopsys-ramips/dts/mt7621_firefly_firewrt.dts
index 2abc01b2afa21da03d2a509b2ad6fb5e5e6e4b3b..62423f02e5c4addd1e8713ac899f08f051415dd2 100644
--- a/iopsys-ramips/dts/FIREWRT.dts
+++ b/iopsys-ramips/dts/mt7621_firefly_firewrt.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,37 +14,27 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "firewrt:green:power";
-			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		power {
 			label = "power";
-			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_POWER>;
 		};
 	};
@@ -59,7 +47,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -116,15 +104,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/GHL-R-001.dts b/iopsys-ramips/dts/mt7621_gehua_ghl-r-001.dts
similarity index 70%
rename from iopsys-ramips/dts/GHL-R-001.dts
rename to iopsys-ramips/dts/mt7621_gehua_ghl-r-001.dts
index 59640a179c2f7b8f1415ef2f3d8c08fc496abfbe..e7b19fa42c1c059c97c0db53d4dfa73edfbac8f7 100644
--- a/iopsys-ramips/dts/GHL-R-001.dts
+++ b/iopsys-ramips/dts/mt7621_gehua_ghl-r-001.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -10,38 +9,28 @@
 	compatible = "gehua,ghl-r-001", "mediatek,mt7621-soc";
 	model = "GeHua GHL-R-001";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		internet {
-			label = "ghl-r-001:blue:internet";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "blue:internet";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "ghl-r-001:blue:usb";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "blue:usb";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -55,9 +44,10 @@
 	status = "okay";
 
 	flash@0 {
-		compatible = "mx25l25635f", "jedec,spi-nor";
+		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
+		broken-flash-reset;
 		m25p,fast-read;
 
 		partitions {
@@ -116,15 +106,39 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
 		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_glinet_gl-mt1300.dts b/iopsys-ramips/dts/mt7621_glinet_gl-mt1300.dts
new file mode 100644
index 0000000000000000000000000000000000000000..49eeb46d5fea961c16cc987e565a67886cb6fe31
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_glinet_gl-mt1300.dts
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "glinet,gl-mt1300", "mediatek,mt7621-soc";
+	model = "GL.iNet GL-MT1300";
+
+	aliases {
+		led-boot = &led_run;
+		led-failsafe = &led_run;
+		led-running = &led_run;
+		led-upgrade = &led_run;
+		label-mac-device = &wan;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		switch {
+			label = "switch";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_run: run {
+			label = "blue:run";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+
+		system {
+			label = "white:system";
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&i2c {
+	status = "okay";
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "mx25l25635f", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x1fb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4000>;
+	mtd-mac-address-increment = <1>;
+};
+
+&switch0 {
+	ports {
+		port@2 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4000>;
+		};
+	};
+};
+
+&uartlite3 {
+	status = "okay";
+};
+
+&state_default {
+	gpio {
+		group = "wdt", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/GB-PC1.dts b/iopsys-ramips/dts/mt7621_gnubee_gb-pc1.dts
similarity index 64%
rename from iopsys-ramips/dts/GB-PC1.dts
rename to iopsys-ramips/dts/mt7621_gnubee_gb-pc1.dts
index e09e9f75a9269673a7ebcc0224c8691af256e1b1..c218521c03cf5bcdfc56fdafd5137615fff52710 100644
--- a/iopsys-ramips/dts/GB-PC1.dts
+++ b/iopsys-ramips/dts/mt7621_gnubee_gb-pc1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,22 +14,12 @@
 		led-upgrade = &led_status;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -40,23 +28,23 @@
 		compatible = "gpio-leds";
 
 		system {
-			label = "gb-pc1:green:system";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "green:system";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "gb-pc1:green:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
 		};
 
 		lan1 {
-			label = "gb-pc1:green:lan1";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "green:lan1";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 
 		lan2 {
-			label = "gb-pc1:green:lan2";
-			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+			label = "green:lan2";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -68,10 +56,11 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <80000000>;
+		broken-flash-reset;
 		m25p,fast-read;
 
 		partitions {
@@ -110,15 +99,27 @@
 	status = "okay";
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "rgmii2", "uart3", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
 		};
+
+		port@4 {
+			status = "okay";
+			label = "lan2";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "rgmii2", "uart3", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/GB-PC2.dts b/iopsys-ramips/dts/mt7621_gnubee_gb-pc2.dts
similarity index 60%
rename from iopsys-ramips/dts/GB-PC2.dts
rename to iopsys-ramips/dts/mt7621_gnubee_gb-pc2.dts
index dff1b3d5f7b6ba5673edc0c6babea52f012605ab..613524d1da5f48895e63cc8671e8d2c8eb86365d 100644
--- a/iopsys-ramips/dts/GB-PC2.dts
+++ b/iopsys-ramips/dts/mt7621_gnubee_gb-pc2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,22 +14,12 @@
 		led-upgrade = &led_status;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -40,33 +28,33 @@
 		compatible = "gpio-leds";
 
 		system {
-			label = "gb-pc2:green:system";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "green:system";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "gb-pc2:green:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
 		};
 
 		lan1 {
-			label = "gb-pc2:green:lan1";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "green:lan1";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 
 		lan2 {
-			label = "gb-pc2:green:lan2";
-			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+			label = "green:lan2";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
 		};
 
 		lan3-yellow {
-			label = "gb-pc2:yellow:lan3";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "yellow:lan3";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		lan3-green {
-			label = "gb-pc2:green:lan3";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "green:lan3";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -78,10 +66,11 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <80000000>;
+		broken-flash-reset;
 		m25p,fast-read;
 
 		partitions {
@@ -120,16 +109,27 @@
 	status = "okay";
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "rgmii2", "uart3", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan2";
 		};
 	};
 };
 
+&state_default {
+	gpio {
+		groups = "jtag", "rgmii2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/HC5962.dts b/iopsys-ramips/dts/mt7621_hiwifi_hc5962.dts
similarity index 59%
rename from iopsys-ramips/dts/HC5962.dts
rename to iopsys-ramips/dts/mt7621_hiwifi_hc5962.dts
index 616de5d488a32ba84df6a66c5dd47ce552f1e3d8..774fb93d9cd652134e0d8466859286ed8cebe57b 100644
--- a/iopsys-ramips/dts/HC5962.dts
+++ b/iopsys-ramips/dts/mt7621_hiwifi_hc5962.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,11 +14,6 @@
 		led-upgrade = &led_status;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -29,27 +22,42 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "hc5962:white:status";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "white:status";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_system: system {
-			label = "hc5962:red:system";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			label = "red:system";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 			panic-indicator;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
+
+	ubi-concat {
+		compatible = "mtd-concat";
+		devices = <&ubiconcat0 &ubiconcat1>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "ubi";
+				reg = <0x0 0x79c0000>;
+			};
+		};
+	};
 };
 
 &nand {
@@ -80,18 +88,12 @@
 
 		partition@140000 {
 			label = "kernel";
-			reg = <0x140000 0x200000>;
+			reg = <0x140000 0x400000>;
 		};
 
-		partition@340000 {
-			label = "ubi";
-			reg = <0x340000 0x1E00000>;
-		};
-
-		partition@2140000 {
-			label = "hw_panic";
-			reg = <0x2140000 0x80000>;
-			read-only;
+		ubiconcat0: partition@540000 {
+			label = "ubiconcat0";
+			reg = <0x540000 0x1c80000>;
 		};
 
 		partition@21c0000 {
@@ -100,30 +102,9 @@
 			read-only;
 		};
 
-		partition@2240000 {
-			label = "backup";
-			reg = <0x2240000 0x80000>;
-			read-only;
-		};
-
-		partition@22c0000 {
-			label = "overly";
-			reg = <0x22c0000 0x1000000>;
-		};
-
-		partition@32c0000 {
-			label = "firmware_backup";
-			reg = <0x32c0000 0x2000000>;
-		};
-
-		partition@52c0000 {
-			label = "oem";
-			reg = <0x52c0000 0x200000>;
-		};
-
-		partition@54c0000 {
-			label = "opt";
-			reg = <0x54c0000 0x2ac0000>;
+		ubiconcat1: partition@2240000 {
+			label = "ubiconcat1";
+			reg = <0x2240000 0x5d40000>;
 		};
 	};
 };
@@ -148,11 +129,33 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "jtag";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WN-AX1167GR.dts b/iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr.dts
similarity index 70%
rename from iopsys-ramips/dts/WN-AX1167GR.dts
rename to iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr.dts
index cc7f7f240ffe276cea7f364ca7c6aa613188459d..879fb68c853bb4e48988e3c0d33b5efb49ced580 100644
--- a/iopsys-ramips/dts/WN-AX1167GR.dts
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,11 +14,6 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -29,42 +22,41 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wn-ax1167gr:green:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "wn-ax1167gr:green:wps";
-			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		auto {
 			label = "auto";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		custom {
 			label = "custom";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
@@ -74,7 +66,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -96,8 +88,8 @@
 				read-only;
 			};
 
-			Factory: partition@40000 {
-				label = "Factory";
+			factory: partition@40000 {
+				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
 			};
@@ -135,16 +127,45 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&iNIC_rf 0x4>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "uart3", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <1>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "jtag";
+		function = "gpio";
 	};
 };
 
@@ -162,7 +183,7 @@
 &pcie1 {
 	mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&Factory 0x0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
 		ieee80211-freq-limit = <5000000 6000000>;
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr2.dts b/iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..8e778ce4fe3a60c6d46790ce58ba3f8d700630b0
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-ax1167gr2.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_iodata_wn-xx-xr.dtsi"
+
+/ {
+	compatible = "iodata,wn-ax1167gr2", "mediatek,mt7621-soc";
+	model = "I-O DATA WN-AX1167GR2";
+};
+
+&partitions {
+	partition@6b00000 {
+		label = "Backup";
+		reg = <0x6b00000 0x1480000>;
+		read-only;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_iodata_wn-ax2033gr.dts b/iopsys-ramips/dts/mt7621_iodata_wn-ax2033gr.dts
new file mode 100644
index 0000000000000000000000000000000000000000..eb6908629ae09a2266949d6ab531864894937c05
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-ax2033gr.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_iodata_wn-xx-xr.dtsi"
+
+/ {
+	compatible = "iodata,wn-ax2033gr", "mediatek,mt7621-soc";
+	model = "I-O DATA WN-AX2033GR";
+};
+
+&partitions {
+	partition@6b00000 {
+		label = "Backup";
+		reg = <0x6b00000 0x1480000>;
+		read-only;
+	};
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2483000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 5710000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_iodata_wn-dx1167r.dts b/iopsys-ramips/dts/mt7621_iodata_wn-dx1167r.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4492f43f9fbbb0648d7c7b791659b7da6d5b2632
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-dx1167r.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_iodata_wn-xx-xr.dtsi"
+
+/ {
+	compatible = "iodata,wn-dx1167r", "mediatek,mt7621-soc";
+	model = "I-O DATA WN-DX1167R";
+};
+
+&partitions {
+	partition@6b00000 {
+		label = "idmkey";
+		reg = <0x6b00000 0x0100000>;
+		read-only;
+	};
+
+	partition@6c00000 {
+		label = "Backup";
+		reg = <0x6c00000 0x1380000>;
+		read-only;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_iodata_wn-dx1200gr.dts b/iopsys-ramips/dts/mt7621_iodata_wn-dx1200gr.dts
new file mode 100644
index 0000000000000000000000000000000000000000..055c1abde0cf1b05503d45b5024dfc46f89a953a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-dx1200gr.dts
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "iodata,wn-dx1200gr", "mediatek,mt7621-soc";
+	model = "I-O DATA WN-DX1200GR";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &wan;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wps {
+			label = "blue:wps";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		repeater {
+			label = "repeater";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x100000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "u-boot-env";
+			reg = <0x100000 0x100000>;
+			read-only;
+		};
+
+		factory: partition@200000 {
+			label = "factory";
+			reg = <0x200000 0x200000>;
+		};
+
+		partition@400000 {
+			label = "kernel";
+			reg = <0x400000 0x400000>;
+		};
+
+		partition@800000 {
+			label = "ubi";
+			reg = <0x800000 0x2e00000>;
+		};
+
+		partition@3600000 {
+			label = "Config";
+			reg = <0x3600000 0x100000>;
+			read-only;
+		};
+
+		partition@3700000 {
+			label = "firmware_2";
+			reg = <0x3700000 0x3200000>;
+		};
+
+		partition@6900000 {
+			label = "Config_2";
+			reg = <0x6900000 0x100000>;
+			read-only;
+		};
+
+		partition@6a00000 {
+			label = "persist";
+			reg = <0x6a00000 0x100000>;
+		};
+
+		partition@6b00000 {
+			label = "idmkey";
+			reg = <0x6b00000 0x100000>;
+			read-only;
+		};
+
+		partition@6c00000 {
+			label = "Backup";
+			reg = <0x6c00000 0x1380000>;
+			read-only;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x1e000>;
+};
+
+&switch0 {
+	ports {
+		wan: port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x1e006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/WN-GX300GR.dts b/iopsys-ramips/dts/mt7621_iodata_wn-gx300gr.dts
similarity index 67%
rename from iopsys-ramips/dts/WN-GX300GR.dts
rename to iopsys-ramips/dts/mt7621_iodata_wn-gx300gr.dts
index 5399a49399ba6c265d593e3ef83f3770b0eaad42..06d024e9a7c75a6e59bcce4b7206d4c495fb319c 100644
--- a/iopsys-ramips/dts/WN-GX300GR.dts
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-gx300gr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,11 +14,6 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -29,42 +22,41 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wn-gx300gr:green:power";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "wn-gx300gr:green:wps";
-			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		auto {
 			label = "auto";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		custom {
 			label = "custom";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
@@ -74,7 +66,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -96,8 +88,8 @@
 				read-only;
 			};
 
-			Factory: partition@40000 {
-				label = "Factory";
+			factory: partition@40000 {
+				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
 			};
@@ -135,16 +127,45 @@
 	};
 };
 
-&ethernet {
-	mtd-mac-address = <&Factory 0x4>;
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "uart3", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <1>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "jtag";
+		function = "gpio";
 	};
 };
 
@@ -155,7 +176,7 @@
 &pcie0 {
 	mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&Factory 0x0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7621_iodata_wn-xx-xr.dtsi b/iopsys-ramips/dts/mt7621_iodata_wn-xx-xr.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..ff9e525ae28deab3957f0a04aa1be325affa6bfc
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wn-xx-xr.dtsi
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &wan;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		repeater {
+			label = "repeater";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions: partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x0100000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "u-boot-env";
+			reg = <0x0100000 0x0100000>;
+			read-only;
+		};
+
+		factory: partition@200000 {
+			label = "factory";
+			reg = <0x0200000 0x0100000>;
+		};
+
+		partition@300000 {
+			label = "SecondBoot";
+			reg = <0x0300000 0x0100000>;
+			read-only;
+		};
+
+		partition@400000 {
+			label = "kernel";
+			reg = <0x0400000 0x0400000>;
+		};
+
+		partition@800000 {
+			label = "ubi";
+			reg = <0x0800000 0x2e00000>;
+		};
+
+		partition@3600000 {
+			label = "Config";
+			reg = <0x3600000 0x0100000>;
+			read-only;
+		};
+
+		partition@3700000 {
+			label = "firmware_2";
+			reg = <0x3700000 0x3200000>;
+		};
+
+		partition@6900000 {
+			label = "Config_2";
+			reg = <0x6900000 0x0100000>;
+			read-only;
+		};
+
+		partition@6a00000 {
+			label = "persist";
+			reg = <0x6a00000 0x0100000>;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		wan: port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7621_iodata_wnpr2600g.dts b/iopsys-ramips/dts/mt7621_iodata_wnpr2600g.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0e808f6894103c28bb737635a7791cc0562a9b09
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iodata_wnpr2600g.dts
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "iodata,wnpr2600g", "mediatek,mt7621-soc";
+	model = "I-O DATA WNPR2600G";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		notification {
+			label = "green:notification";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy1radio";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		auto {
+			label = "auto";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x000000 0x030000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x030000 0x010000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x040000 0x010000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x050000 0xda0000>;
+			};
+
+			partition@df0000 {
+				label = "manufacture";
+				reg = <0xdf0000 0x190000>;
+				read-only;
+			};
+
+			partition@f80000 {
+				label = "storage";
+				reg = <0xf80000 0x080000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7621_iptime_a6ns-m.dts b/iopsys-ramips/dts/mt7621_iptime_a6ns-m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4ebd980521fb62ae121a3c415ca5f76809f8f919
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iptime_a6ns-m.dts
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "iptime,a6ns-m", "mediatek,mt7621-soc";
+	model = "ipTIME A6ns-M";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1radio";
+		};
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uboot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				label = "config";
+				reg = <0x20000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@30000 {
+				label = "factory";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x40000 0xfc0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&uboot 0x1fc20>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&uboot 0x1fc40>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_iptime_a8004t.dts b/iopsys-ramips/dts/mt7621_iptime_a8004t.dts
new file mode 100644
index 0000000000000000000000000000000000000000..df6aed664e781f63d70c167c9c153608c619d842
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_iptime_a8004t.dts
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "iptime,a8004t", "mediatek,mt7621-soc";
+	model = "ipTIME A8004T";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_cpu: cpu {
+			label = "orange:cpu";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "orange:wlan2g";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wlan5g {
+			label = "orange:wlan5g";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1radio";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uboot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				label = "config";
+				reg = <0x20000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@30000 {
+				label = "factory";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x40000 0xfc0000>;
+			};
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&uboot 0x1fc20>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&uboot 0x1fc40>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "jtag", "i2c";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_jcg_jhr-ac876m.dts b/iopsys-ramips/dts/mt7621_jcg_jhr-ac876m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ae312fcc524f25d2c37738d61fa1981fbaeca516
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_jcg_jhr-ac876m.dts
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "jcg,jhr-ac876m", "mediatek,mt7621-soc";
+	model = "JCG JHR-AC876M";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+		led-running = &led_wps;
+		led-upgrade = &led_wps;
+		label-mac-device = &wan;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb3 {
+			label = "blue:usb3";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		usb2 {
+			label = "blue:usb2";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+
+		led_wps: wps {
+			label = "blue:wps";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-active-low;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_jcg_y2.dts b/iopsys-ramips/dts/mt7621_jcg_y2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..06d6579aaa74cea3affd32b0f12f6bf4cfac9c90
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_jcg_y2.dts
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "jcg,y2", "mediatek,mt7621-soc";
+	model = "JCG Y2";
+
+	aliases {
+		led-boot = &led_internet;
+		led-failsafe = &led_internet;
+		led-upgrade = &led_internet;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_internet: internet {
+			label = "blue:internet";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/Newifi-D1.dts b/iopsys-ramips/dts/mt7621_lenovo_newifi-d1.dts
similarity index 69%
rename from iopsys-ramips/dts/Newifi-D1.dts
rename to iopsys-ramips/dts/mt7621_lenovo_newifi-d1.dts
index 2c180585c92700cba48ada2e173be5e4990318fb..fa269007204b1d7a89e563e29d98e5534674b521 100644
--- a/iopsys-ramips/dts/Newifi-D1.dts
+++ b/iopsys-ramips/dts/mt7621_lenovo_newifi-d1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,11 +12,7 @@
 		led-failsafe = &led_blue;
 		led-running = &led_blue;
 		led-upgrade = &led_blue;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
+		label-mac-device = &gmac0;
 	};
 
 	chosen {
@@ -29,29 +23,28 @@
 		compatible = "gpio-leds";
 
 		status-red {
-			label = "newifi-d1:red:status";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "red:status";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 		};
 
 		status-green {
-			label = "newifi-d1:green:status";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		led_blue: status-blue {
-			label = "newifi-d1:blue:status";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "blue:status";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -63,13 +56,13 @@
 		usb2power {
 			gpio-export,name = "usb2power";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
 		};
 
 		usb3power {
 			gpio-export,name = "usb3power";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -81,11 +74,11 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
-		compatible = "mx25l25635f", "jedec,spi-nor";
+	flash@0 {
+		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <25000000>;
-		m25p,fast-read;
+		spi-max-frequency = <45000000>;
+		broken-flash-reset;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -138,15 +131,33 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "uart2", "uart3", "i2c";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan1";
 		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_linksys_ea7300-v1.dts b/iopsys-ramips/dts/mt7621_linksys_ea7300-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..3e50d85e9c36eea23c6e39275af810674817dc38
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_linksys_ea7300-v1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_linksys_ea7xxx.dtsi"
+
+/ {
+	compatible = "linksys,ea7300-v1", "mediatek,mt7621-soc";
+	model = "Linksys EA7300 v1";
+};
diff --git a/iopsys-ramips/dts/mt7621_linksys_ea7300-v2.dts b/iopsys-ramips/dts/mt7621_linksys_ea7300-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4ee148828a8eb808d29846e5518fba918dc9f84e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_linksys_ea7300-v2.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_linksys_ea7xxx.dtsi"
+
+/ {
+	compatible = "linksys,ea7300-v2", "mediatek,mt7621-soc";
+	model = "Linksys EA7300 v2";
+};
diff --git a/iopsys-ramips/dts/mt7621_linksys_ea7500-v2.dts b/iopsys-ramips/dts/mt7621_linksys_ea7500-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..8e13cc26ad093fd990242a7775d5afcf9a75eaf3
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_linksys_ea7500-v2.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_linksys_ea7xxx.dtsi"
+
+/ {
+	compatible = "linksys,ea7500-v2", "mediatek,mt7621-soc";
+	model = "Linksys EA7500 v2";
+};
diff --git a/iopsys-ramips/dts/mt7621_linksys_ea7xxx.dtsi b/iopsys-ramips/dts/mt7621_linksys_ea7xxx.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..ecff6406d588dc8e5653a033b033ab1938725626
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_linksys_ea7xxx.dtsi
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+
+		lan1_green {
+			label = "green:lan1";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2_green {
+			label = "green:lan2";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3_green {
+			label = "green:lan3";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4_green {
+			label = "green:lan4";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "white:power";
+			gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "boot";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "u_env";
+			reg = <0x80000 0x40000>;
+			read-only;
+		};
+
+		factory: partition@c0000 {
+			label = "factory";
+			reg = <0xc0000 0x40000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "s_env";
+			reg = <0x100000 0x40000>;
+		};
+
+		partition@140000 {
+			label = "devinfo";
+			reg = <0x140000 0x40000>;
+			read-only;
+		};
+
+		partition@180000 {
+			label = "kernel";
+			reg = <0x180000 0x400000>;
+		};
+
+		partition@580000 {
+			label = "ubi";
+			reg = <0x580000 0x2400000>;
+		};
+
+		partition@2980000 {
+			label = "alt_kernel";
+			reg = <0x2980000 0x400000>;
+			read-only;
+		};
+
+		partition@2d80000 {
+			label = "alt_rootfs";
+			reg = <0x2d80000 0x2400000>;
+			read-only;
+		};
+
+		partition@5180000 {
+			label = "sysdiag";
+			reg = <0x5180000 0x100000>;
+			read-only;
+		};
+
+		partition@5280000 {
+			label = "syscfg";
+			reg = <0x5280000 0x2d00000>;
+			read-only;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+	};
+};
+
+&pcie1 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/RE6500.dts b/iopsys-ramips/dts/mt7621_linksys_re6500.dts
similarity index 73%
rename from iopsys-ramips/dts/RE6500.dts
rename to iopsys-ramips/dts/mt7621_linksys_re6500.dts
index de5c310608620c782c9398f9a1b5c2c4513f313b..319d0d7fb2156efba58a47b18c19bc6db16f5a2a 100644
--- a/iopsys-ramips/dts/RE6500.dts
+++ b/iopsys-ramips/dts/mt7621_linksys_re6500.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,42 +14,32 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "re6500:orange:wifi";
-			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+			label = "orange:wifi";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_power: power {
-			label = "re6500:white:power";
-			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			label = "white:power";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -60,7 +48,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -97,12 +85,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uart2";
+		function = "gpio";
 	};
 };
 
@@ -126,10 +112,34 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0x2e>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
 &xhci {
 	status = "disabled";
 };
diff --git a/iopsys-ramips/dts/AP-MT7621A-V60.dts b/iopsys-ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts
similarity index 78%
rename from iopsys-ramips/dts/AP-MT7621A-V60.dts
rename to iopsys-ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts
index b613c9c3710d096ec2ff8c0923112ff1e5abc8fa..04996558a42975fb9210a2edfb6d05d6fa5ab487 100644
--- a/iopsys-ramips/dts/AP-MT7621A-V60.dts
+++ b/iopsys-ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts
@@ -1,20 +1,9 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 / {
 	compatible = "mediatek,ap-mt7621a-v60", "mediatek,mt7621-soc";
 	model = "Mediatek AP-MT7621A-V60 EVB";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,name = "Audio-I2S";
@@ -41,17 +30,18 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "rgmii2";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uart2", "rgmii2";
+		function = "gpio";
 	};
+};
+
+&pinctrl {
 	i2s_pins: i2s {
 		i2s {
-			ralink,group = "uart3";
-			ralink,function = "i2s";
+			groups = "uart3";
+			function = "i2s";
 		};
 	};
 };
@@ -81,9 +71,9 @@
 &spi0 {
 	status = "okay";
 
-	mx25l6405d@0 {
+	flash@0 {
 		compatible = "mx25l6405d","jedec,spi-nor";
-		reg = <0 0>;
+		reg = <0>;
 		spi-max-frequency = <10000000>;
 
 		partitions {
@@ -122,10 +112,41 @@
 	status = "okay";
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0x5>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x5>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
 &pcie {
 	status = "okay";
 };
diff --git a/iopsys-ramips/dts/MT7621.dts b/iopsys-ramips/dts/mt7621_mediatek_mt7621-eval-board.dts
similarity index 62%
rename from iopsys-ramips/dts/MT7621.dts
rename to iopsys-ramips/dts/mt7621_mediatek_mt7621-eval-board.dts
index 290083a85528828a00bb51af465d4be812d8826b..c86eea0de5758d1c3d9763a563791c31843565e8 100644
--- a/iopsys-ramips/dts/MT7621.dts
+++ b/iopsys-ramips/dts/mt7621_mediatek_mt7621-eval-board.dts
@@ -1,19 +1,8 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 / {
 	compatible = "mediatek,mt7621-eval-board", "mediatek,mt7621-soc";
 	model = "Mediatek MT7621 evaluation board";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x2000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
 };
 
 &nand {
@@ -50,11 +39,38 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik.dtsi b/iopsys-ramips/dts/mt7621_mikrotik.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..1fc523ea14a87805e298510404305e7028053014
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik.dtsi
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys: keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <33000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "RouterBoot";
+				reg = <0x0 0x40000>;
+				read-only;
+				compatible = "mikrotik,routerboot-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					label = "bootloader1";
+					reg = <0x0 0x0>;
+					read-only;
+				};
+
+				hard_config {
+					read-only;
+				};
+
+				partition@10000 {
+					label = "bootloader2";
+					reg = <0x10000 0xf000>;
+					read-only;
+				};
+
+				soft_config {
+				};
+
+				partition@30000 {
+					label = "bios";
+					reg = <0x30000 0x1000>;
+					read-only;
+				};
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik_routerboard-750gr3.dts b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-750gr3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..7f329b23593fcf80b3c182a3c6dae138cc252520
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-750gr3.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_mikrotik_routerboard-7xx.dtsi"
+
+/ {
+	compatible = "mikrotik,routerboard-750gr3", "mediatek,mt7621-soc";
+	model = "MikroTik RouterBOARD 750Gr3";
+
+	aliases {
+		led-boot = &led_usr;
+		led-failsafe = &led_usr;
+		led-running = &led_usr;
+		led-upgrade = &led_usr;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		pwr {
+			label = "blue:pwr";
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		led_usr: usr {
+			label = "green:usr";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik_routerboard-760igs.dts b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-760igs.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ed0b4e52cf9175803579080bfd2c22174db57fa3
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-760igs.dts
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_mikrotik_routerboard-7xx.dtsi"
+
+/ {
+	compatible = "mikrotik,routerboard-760igs", "mediatek,mt7621-soc";
+	model = "MikroTik RouterBOARD 760iGS";
+
+	aliases {
+		led-boot = &led_pwr;
+		led-failsafe = &led_pwr;
+		led-running = &led_pwr;
+		led-upgrade = &led_pwr;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_pwr: pwr {
+			label = "blue:pwr";
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		sfp {
+			label = "blue:sfp";
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	sfp1: sfp1 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c>;
+		los-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		tx-disable-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <1000>;
+	};
+};
+
+&mdio {
+	ephy7: ethernet-phy@7 {
+		reg = <7>;
+		sfp = <&sfp1>;
+	};
+};
+
+&gmac1 {
+	status = "okay";
+
+	label = "sfp";
+	phy-handle = <&ephy7>;
+};
+
+&i2c {
+	status = "okay";
+};
+
+&state_default {
+	gpio {
+		/* gpio7 (uart3 group) goes high when
+		 * port5 (PoE out) is cabled to a
+		 * Mikrotik PoE-in capable port,
+		 * such as port1 on another rb760iGS */
+		groups = "uart2", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik_routerboard-7xx.dtsi b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-7xx.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..b8fae51c3b3a79034f47c15ebd6fa4ad813b74c2
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-7xx.dtsi
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_mikrotik.dtsi"
+
+/ {
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		buzzer {
+			/* Beeper requires PWM for frequency selection */
+			gpio-export,name = "buzzer";
+			gpio-export,output = <0>;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		usb_power {
+			gpio-export,name = "usb_power";
+			gpio-export,output = <1>;
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&keys {
+	mode {
+		label = "mode";
+		gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		linux,code = <BTN_0>;
+	};
+};
+
+&partitions {
+	partition@40000 {
+		compatible = "mikrotik,minor";
+		label = "firmware";
+		reg = <0x040000 0xfc0000>;
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan5";
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m11g.dts b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m11g.dts
new file mode 100644
index 0000000000000000000000000000000000000000..20a834a3ebfee5e7b5c5154c8428436b4b66bf95
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m11g.dts
@@ -0,0 +1,91 @@
+#include "mt7621_mikrotik.dtsi"
+
+/ {
+	compatible = "mikrotik,routerboard-m11g", "mediatek,mt7621-soc";
+	model = "MikroTik RouterBOARD M11G";
+
+	aliases {
+		led-boot = &led_usr;
+		led-failsafe = &led_usr;
+		led-running = &led_usr;
+		led-upgrade = &led_usr;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_usr: usr {
+			label = "green:usr";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		rssi0 {
+			label = "green:rssi0";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi1 {
+			label = "green:rssi1";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi2 {
+			label = "green:rssi2";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi3 {
+			label = "green:rssi3";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi4 {
+			label = "green:rssi4";
+			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	pcie0_vcc_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie0_vcc";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&partitions {
+	partition@40000 {
+		compatible = "mikrotik,minor";
+		label = "firmware";
+		reg = <0x040000 0xfc0000>;
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "wdt", "rgmii2";
+		function = "gpio";
+	};
+};
+
+&i2c {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m33g.dts b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m33g.dts
new file mode 100644
index 0000000000000000000000000000000000000000..affbaf35b720cafe492f3ed0b14812fa1624c2ef
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_mikrotik_routerboard-m33g.dts
@@ -0,0 +1,129 @@
+#include "mt7621_mikrotik.dtsi"
+
+/ {
+	compatible = "mikrotik,routerboard-m33g", "mediatek,mt7621-soc";
+	model = "MikroTik RouterBOARD M33G";
+
+	aliases {
+		led-boot = &led_usr;
+		led-failsafe = &led_usr;
+		led-running = &led_usr;
+		led-upgrade = &led_usr;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_usr: usr {
+			label = "green:usr";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	pcie0_vcc_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie0_vcc";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	pcie1_vcc_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie1_vcc";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio 10 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	pcie2_vcc_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie2_vcc";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	usb_vcc_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vcc";
+
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+};
+
+&spi0 {
+	flash@1 {
+		compatible = "jedec,spi-nor";
+		reg = <1>;
+		spi-max-frequency = <33000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			// Region <0x0 0x40000> seems reserved by OEM
+
+			partition@40000 {
+				compatible = "mikrotik,minor";
+				label = "firmware";
+				reg = <0x040000 0xfc0000>;
+			};
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "wdt";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&i2c {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/WITI.dtsi b/iopsys-ramips/dts/mt7621_mqmaker_witi.dts
similarity index 68%
rename from iopsys-ramips/dts/WITI.dtsi
rename to iopsys-ramips/dts/mt7621_mqmaker_witi.dts
index 6e474e90bbcdb960ea83f20c9df960d8ede16522..45901474d2bd78934a37ba45154a01ba7f2c65b8 100644
--- a/iopsys-ramips/dts/WITI.dtsi
+++ b/iopsys-ramips/dts/mt7621_mqmaker_witi.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,35 +5,29 @@
 
 / {
 	compatible = "mqmaker,witi", "mediatek,mt7621-soc";
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	palmbus: palmbus@1E000000 {
-		i2c@900 {
-			status = "okay";
-
-			pcf8563: rtc@51 {
-				status = "okay";
-				compatible = "nxp,pcf8563";
-				reg = <0x51>;
-			};
-		};
-	};
+	model = "MQmaker WiTi";
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
+&i2c {
+	status = "okay";
+
+	rtc@51 {
+		status = "okay";
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+	};
+};
+
 &sdhci {
 	status = "okay";
 };
@@ -43,7 +35,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -101,15 +93,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WR1201.dts b/iopsys-ramips/dts/mt7621_mtc_wr1201.dts
similarity index 69%
rename from iopsys-ramips/dts/WR1201.dts
rename to iopsys-ramips/dts/mt7621_mtc_wr1201.dts
index 08c9b2c18fcbb91c784d6916e255263f72ee7692..8a79d9ca9a6cb73da34495c2abc4e50d16cd23fd 100644
--- a/iopsys-ramips/dts/WR1201.dts
+++ b/iopsys-ramips/dts/mt7621_mtc_wr1201.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,50 +12,41 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
+		label-mac-device = &gmac0;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wr1201:green:power";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "wr1201:green:usb";
-			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 
 		eth_link {
-			label = "wr1201:green:eth_link";
-			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+			label = "green:eth_link";
+			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "wr1201:green:wps";
-			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -89,7 +78,7 @@
 			};
 
 			factory: partition@40000 {
-				label = "Factory";
+				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
 			};
@@ -109,10 +98,41 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0x4>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
 &sdhci {
 	status = "okay";
 };
@@ -147,12 +167,9 @@
 	};
 };
 
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "rgmii2";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "rgmii2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/EX6150.dts b/iopsys-ramips/dts/mt7621_netgear_ex6150.dts
similarity index 73%
rename from iopsys-ramips/dts/EX6150.dts
rename to iopsys-ramips/dts/mt7621_netgear_ex6150.dts
index a5827f270d9a2b9e52598a00ffe3e9ee7708f6a0..0da8f6b30c70db99f955db676c178c6560e93b12 100644
--- a/iopsys-ramips/dts/EX6150.dts
+++ b/iopsys-ramips/dts/mt7621_netgear_ex6150.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -17,86 +16,77 @@
 		led-upgrade = &power_amber;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		power_amber: power_amber {
-			label = "ex6150:amber:power";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "amber:power";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 		};
 
 		power_green: power_green {
-			label = "ex6150:green:power";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "ex6150:green:wps";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 		};
 
 		rightarrow {
-			label = "ex6150:blue:rightarrow";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "blue:rightarrow";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 		};
 
 		leftarrow {
-			label = "ex6150:blue:leftarrow";
-			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			label = "blue:leftarrow";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
 		};
 
 		router_green {
-			label = "ex6150:green:router";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			label = "green:router";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
 
 		router_red {
-			label = "ex6150:red:router";
-			gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+			label = "red:router";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
 		};
 
 		client_green {
-			label = "ex6150:green:client";
-			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+			label = "green:client";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
 		client_red {
-			label = "ex6150:red:client";
-			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+			label = "red:client";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		toggle {
 			label = "AP/Extender toggle";
-			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
 			/* Active when switch is set to "Access Point" */
 		};
 	};
@@ -216,6 +206,9 @@
 
 &pcie {
 	status = "okay";
+
+	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
+		      <&gpio 8 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {
@@ -234,15 +227,22 @@
 	};
 };
 
-&ethernet {
-	mtd-mac-address = <&factory 0x00000004>;
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "sdhci", "rgmii2", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "sdhci", "rgmii2", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/R6220.dts b/iopsys-ramips/dts/mt7621_netgear_r6220.dts
similarity index 67%
rename from iopsys-ramips/dts/R6220.dts
rename to iopsys-ramips/dts/mt7621_netgear_r6220.dts
index 28c3a3938dd0553fa260f5408f07580016fda305..cc29d4ea8e55b6ab7b3b84b3ca2bde2e2795a2fd 100644
--- a/iopsys-ramips/dts/R6220.dts
+++ b/iopsys-ramips/dts/mt7621_netgear_r6220.dts
@@ -1,36 +1,12 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-only
 
-#include "R6220.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "mt7621_netgear_sercomm_ayx.dtsi"
 
 / {
 	compatible = "netgear,r6220", "mediatek,mt7621-soc";
 	model = "Netgear R6220";
 };
 
-&led_power {
-	label = "r6220:green:power";
-};
-
-&led_usb {
-	label = "r6220:green:usb";
-};
-
-&led_internet {
-	label = "r6220:green:wan";
-};
-
-&led_wifi {
-	label = "r6220:green:wifi";
-};
-
-&led_wps {
-	label = "r6220:green:wps";
-};
-
 &nand {
 	status = "okay";
 
diff --git a/iopsys-ramips/dts/mt7621_netgear_r6260.dts b/iopsys-ramips/dts/mt7621_netgear_r6260.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b32f26d89093da13e922916274897e98e5575d7d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_r6260.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_chj.dtsi"
+
+/ {
+	compatible = "netgear,r6260", "mediatek,mt7621-soc";
+	model = "Netgear R6260";
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_r6350.dts b/iopsys-ramips/dts/mt7621_netgear_r6350.dts
new file mode 100644
index 0000000000000000000000000000000000000000..22535c9ae63607634330d62a2e0889900289c5d8
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_r6350.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_chj.dtsi"
+
+/ {
+	compatible = "netgear,r6350", "mediatek,mt7621-soc";
+	model = "Netgear R6350";
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_r6700-v2.dts b/iopsys-ramips/dts/mt7621_netgear_r6700-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b93d6aa5a79950fc9a14f7f5a751f8010e1ca81a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_r6700-v2.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_bzv.dtsi"
+
+/ {
+	compatible = "netgear,r6700-v2", "mediatek,mt7621-soc";
+	model = "Netgear R6700 v2";
+};
+
+&leds {
+	guest_wifi {
+		gpios = <&gpio_expander 6 GPIO_ACTIVE_LOW>;
+		label = "white:guest_wifi";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_r6800.dts b/iopsys-ramips/dts/mt7621_netgear_r6800.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c7afc5301658931aa172e814c2f03d966ab45321
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_r6800.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_bzv.dtsi"
+
+/ {
+	compatible = "netgear,r6800", "mediatek,mt7621-soc";
+	model = "Netgear R6800";
+};
+
+&leds {
+	usb2 {
+		gpios = <&gpio_expander 6 GPIO_ACTIVE_LOW>;
+		label = "white:usb2";
+		linux,default-trigger = "usbport";
+		trigger-sources = <&ehci_port2>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_r6850.dts b/iopsys-ramips/dts/mt7621_netgear_r6850.dts
new file mode 100644
index 0000000000000000000000000000000000000000..78e90932164aca7512b2926786cbea8db293ceb9
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_r6850.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_chj.dtsi"
+
+/ {
+	compatible = "netgear,r6850", "mediatek,mt7621-soc";
+	model = "Netgear R6850";
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_sercomm_ayx.dtsi b/iopsys-ramips/dts/mt7621_netgear_sercomm_ayx.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..1a19cd048b2d8b7578427e8432d4bf27ca18f913
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_sercomm_ayx.dtsi
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "mediatek,mt7621-soc";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &gmac0;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+
+		internet {
+			label = "green:wan";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	reg_usb_vbus: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio 10 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&xhci {
+	vbus-supply = <&reg_usb_vbus>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_sercomm_bzv.dtsi b/iopsys-ramips/dts/mt7621_netgear_sercomm_bzv.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..71c95e75bd6d44036a8479a9ddf78b670b5bb1da
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_sercomm_bzv.dtsi
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "mediatek,mt7621-soc";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_power_white;
+		led-failsafe = &led_power_orange;
+		led-running = &led_power_white;
+		led-upgrade = &led_power_orange;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		led_power_orange: power_orange {
+			gpios = <&gpio_expander 0 GPIO_ACTIVE_LOW>;
+			label = "orange:power";
+		};
+
+		led_power_white: power_white {
+			gpios = <&gpio_expander 1 GPIO_ACTIVE_LOW>;
+			label = "white:power";
+		};
+
+		wan_orange {
+			gpios = <&gpio_expander 2 GPIO_ACTIVE_LOW>;
+			label = "orange:wan";
+		};
+
+		wan_white {
+			gpios = <&gpio_expander 3 GPIO_ACTIVE_LOW>;
+			label = "white:wan";
+		};
+
+		wlan2g {
+			gpios = <&gpio_expander 4 GPIO_ACTIVE_LOW>;
+			label = "white:wlan2g";
+			linux,default-trigger = "phy0radio";
+		};
+
+		wlan5g {
+			gpios = <&gpio_expander 5 GPIO_ACTIVE_LOW>;
+			label = "white:wlan5g";
+			linux,default-trigger = "phy1radio";
+		};
+
+		usb3 {
+			gpios = <&gpio_expander 7 GPIO_ACTIVE_LOW>;
+			label = "white:usb3";
+			linux,default-trigger = "usbport";
+			trigger-sources = <&xhci_ehci_port1>;
+		};
+
+		lan1_orange {
+			gpios = <&gpio_expander 8 GPIO_ACTIVE_LOW>;
+			label = "orange:lan1";
+		};
+
+		lan1_white {
+			gpios = <&gpio_expander 9 GPIO_ACTIVE_LOW>;
+			label = "white:lan1";
+		};
+
+		lan2_orange {
+			gpios = <&gpio_expander 10 GPIO_ACTIVE_LOW>;
+			label = "orange:lan2";
+		};
+
+		lan2_white {
+			gpios = <&gpio_expander 11 GPIO_ACTIVE_LOW>;
+			label = "white:lan2";
+		};
+
+		lan3_orange {
+			gpios = <&gpio_expander 12 GPIO_ACTIVE_LOW>;
+			label = "orange:lan3";
+		};
+
+		lan3_white {
+			gpios = <&gpio_expander 13 GPIO_ACTIVE_LOW>;
+			label = "white:lan3";
+		};
+
+		lan4_orange {
+			gpios = <&gpio_expander 14 GPIO_ACTIVE_LOW>;
+			label = "orange:lan4";
+		};
+
+		lan4_white {
+			gpios = <&gpio_expander 15 GPIO_ACTIVE_LOW>;
+			label = "white:lan4";
+		};
+
+		wps {
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
+			label = "white:wps";
+		};
+
+		wlan {
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			label = "white:wlan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <2>;
+		};
+	};
+};
+
+&i2c {
+	status = "okay";
+
+	gpio_expander: i2c0gpio-expander@20{
+		#gpio-cells = <2>;
+		#interrupt-cells = <2>;
+		compatible = "semtech,sx1503q";
+		reg = <0x20>;
+
+		gpio-controller;
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x100000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "SC PART_MAP";
+			reg = <0x100000 0x100000>;
+			read-only;
+		};
+
+		partition@200000 {
+			label = "kernel";
+			reg = <0x200000 0x400000>;
+		};
+
+		partition@600000 {
+			label = "ubi";
+			reg = <0x600000 0x2800000>;
+		};
+
+		partition@2e00000 {
+			label = "reserved0";
+			reg = <0x2e00000 0x1800000>;
+			read-only;
+		};
+
+		factory: partition@4600000 {
+			label = "factory";
+			reg = <0x4600000 0x200000>;
+			read-only;
+		};
+
+		partition@4800000 {
+			label = "reserved1";
+			reg = <0x4800000 0x3800000>;
+			read-only;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/R6350.dts b/iopsys-ramips/dts/mt7621_netgear_sercomm_chj.dtsi
similarity index 59%
rename from iopsys-ramips/dts/R6350.dts
rename to iopsys-ramips/dts/mt7621_netgear_sercomm_chj.dtsi
index 00c9825750bfec6b29ba5403e7bf12ef28aa2c2f..7a15cd1f6cb4e5e062fc3bf509fc5f63a8f104ed 100644
--- a/iopsys-ramips/dts/R6350.dts
+++ b/iopsys-ramips/dts/mt7621_netgear_sercomm_chj.dtsi
@@ -1,5 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-only
 
 #include "mt7621.dtsi"
 
@@ -7,81 +6,137 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "netgear,r6350", "mediatek,mt7621-soc";
-	model = "Netgear R6350";
+	compatible = "mediatek,mt7621-soc";
 
 	aliases {
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
+		label-mac-device = &gmac0;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "r6350:green:power";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "r6350:green:usb";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 
 		internet {
-			label = "r6350:green:wan";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "green:wan";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "r6350:green:wifi";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "green:wifi";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 
-	gpio_export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
+	reg_usb_vbus: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio 10 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&xhci {
+	vbus-supply = <&reg_usb_vbus>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
 
-		usbpower {
-			gpio-export,name = "usbpower";
-			gpio-export,output = <1>;
-			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <2>;
 		};
 	};
 };
 
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
 &nand {
 	status = "okay";
 
@@ -131,37 +186,3 @@
 		};
 	};
 };
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "mediatek,mt76";
-		reg = <0x0 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
-
-&pcie1 {
-	wifi@0,0 {
-		reg = <0x0 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x0>;
-		ieee80211-freq-limit = <2400000 2500000>;
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "uart2", "jtag", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/mt7621_netgear_wac104.dts b/iopsys-ramips/dts/mt7621_netgear_wac104.dts
new file mode 100644
index 0000000000000000000000000000000000000000..fbedeb26450c61c8900130686e6739d4337e40f9
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_wac104.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-only or MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "netgear,wac104", "mediatek,mt7621-soc";
+	model = "Netgear WAC104";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &gmac0;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x100000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "SC PID";
+			reg = <0x100000 0x100000>;
+			read-only;
+		};
+
+		partition@200000 {
+			label = "kernel";
+			reg = <0x200000 0x400000>;
+		};
+
+		partition@600000 {
+			label = "ubi";
+			reg = <0x600000 0x1c00000>;
+		};
+
+		factory: partition@2e00000 {
+			label = "factory";
+			reg = <0x2e00000 0x100000>;
+			read-only;
+		};
+
+		partition@4200000 {
+			label = "reserved";
+			reg = <0x4200000 0x3c00000>;
+			read-only;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_wac124.dts b/iopsys-ramips/dts/mt7621_netgear_wac124.dts
new file mode 100644
index 0000000000000000000000000000000000000000..92860c00af55bc0fadf90aae6ba410f5cad14dd0
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_wac124.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_chj.dtsi"
+
+/ {
+	compatible = "netgear,wac124", "mediatek,mt7621-soc";
+	model = "Netgear WAC124";
+};
diff --git a/iopsys-ramips/dts/mt7621_netgear_wndr3700-v5.dts b/iopsys-ramips/dts/mt7621_netgear_wndr3700-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..90c0ca1276db2b8e1a88b598f28ce32617b6ce95
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netgear_wndr3700-v5.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621_netgear_sercomm_ayx.dtsi"
+
+/ {
+	compatible = "netgear,wndr3700-v5", "mediatek,mt7621-soc";
+	model = "Netgear WNDR3700 v5";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@f30000 {
+				label = "factory";
+				reg = <0xf30000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xee0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_netis_wf2881.dts b/iopsys-ramips/dts/mt7621_netis_wf2881.dts
new file mode 100644
index 0000000000000000000000000000000000000000..7dfd133a4416e2b4f2f7f295501fb223e23e9a08
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_netis_wf2881.dts
@@ -0,0 +1,163 @@
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "netis,wf2881", "mediatek,mt7621-soc";
+	model = "NETIS WF2881";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+		led-running = &led_wps;
+		led-upgrade = &led_wps;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+
+		led_wps: wps {
+			label = "green:wps";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "config";
+			reg = <0x80000 0x80000>;
+			read-only;
+		};
+
+		factory: partition@100000 {
+			label = "factory";
+			reg = <0x100000 0x40000>;
+			read-only;
+		};
+
+		partition@140000 {
+			label = "firmware";
+			reg = <0x140000 0x7e40000>;
+
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			partition@400000 {
+				label = "ubi";
+				reg = <0x400000 0x7a40000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/K2P.dts b/iopsys-ramips/dts/mt7621_phicomm_k2p.dts
similarity index 65%
rename from iopsys-ramips/dts/K2P.dts
rename to iopsys-ramips/dts/mt7621_phicomm_k2p.dts
index 0b330aa20e36b17b9d3de89f4d2756aa77eacb27..83169cd1e9b705ca7b50c48b0f1b245bbd3f8a68 100644
--- a/iopsys-ramips/dts/K2P.dts
+++ b/iopsys-ramips/dts/mt7621_phicomm_k2p.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,41 +14,31 @@
 		led-upgrade = &led_blue;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		stat_r {
-			label = "k2p:red:status";
-			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+			label = "red:status";
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
 		};
 
 		stat_y {
-			label = "k2p:yellow:status";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "yellow:status";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 		};
 
 		led_blue: stat_b {
-			label = "k2p:blue:status";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "blue:status";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -59,7 +47,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -113,15 +101,43 @@
 	};
 };
 
-&ethernet {
-	mtd-mac-address = <&factory 0xe006>;
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/VR500.dts b/iopsys-ramips/dts/mt7621_planex_vr500.dts
similarity index 64%
rename from iopsys-ramips/dts/VR500.dts
rename to iopsys-ramips/dts/mt7621_planex_vr500.dts
index 4d74f2c9ceb648a8fea4a88f5544b69251ab03e9..5f8f190a918462ac5469b40e00b58bbf09719478 100644
--- a/iopsys-ramips/dts/VR500.dts
+++ b/iopsys-ramips/dts/mt7621_planex_vr500.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,31 +14,21 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "vr500:green:power";
-			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -49,7 +37,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -86,11 +74,43 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "sdhci";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/SK-WB8.dts b/iopsys-ramips/dts/mt7621_samknows_whitebox-v8.dts
similarity index 70%
rename from iopsys-ramips/dts/SK-WB8.dts
rename to iopsys-ramips/dts/mt7621_samknows_whitebox-v8.dts
index 9511432e1596c428baf19e43e99f6c429b84b645..9561c97b7e69423148da18283dbfaf24309469f4 100644
--- a/iopsys-ramips/dts/SK-WB8.dts
+++ b/iopsys-ramips/dts/mt7621_samknows_whitebox-v8.dts
@@ -1,6 +1,5 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
+
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>
 
@@ -15,42 +14,34 @@
 		led-upgrade = &led_wps;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "sk-wb8:green:wps";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "sk-wb8:green:usb";
-			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
+
 		wps {
 			label = "wps";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
+
 		reset {
 			label = "reset";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -59,7 +50,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -114,15 +105,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "sdhci";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/SAP-G3200U3.dts b/iopsys-ramips/dts/mt7621_storylink_sap-g3200u3.dts
similarity index 71%
rename from iopsys-ramips/dts/SAP-G3200U3.dts
rename to iopsys-ramips/dts/mt7621_storylink_sap-g3200u3.dts
index d1d6a534b6f29334234892558f5b35fd9658ec7d..d44960a9a1ec4a5d5e723233a37b706d6db911d0 100644
--- a/iopsys-ramips/dts/SAP-G3200U3.dts
+++ b/iopsys-ramips/dts/mt7621_storylink_sap-g3200u3.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,39 +7,29 @@
 	compatible = "storylink,sap-g3200u3", "mediatek,mt7621-soc";
 	model = "STORYLiNK SAP-G3200U3";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		usb {
-			label = "sap-g3200u3:green:usb";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		rfkill {
 			label = "rfkill";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RFKILL>;
 		};
 	};
@@ -50,7 +38,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -113,15 +101,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe006>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart3", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+			mtd-mac-address-increment = <1>;
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "uart3", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/Telco-Electronics-X1.dts b/iopsys-ramips/dts/mt7621_telco-electronics_x1.dts
similarity index 62%
rename from iopsys-ramips/dts/Telco-Electronics-X1.dts
rename to iopsys-ramips/dts/mt7621_telco-electronics_x1.dts
index 33fc1810a20f38e4627fb2653c8d49ce375aabd1..f597d0f63a337e9087afc65a7d193149d3678e96 100644
--- a/iopsys-ramips/dts/Telco-Electronics-X1.dts
+++ b/iopsys-ramips/dts/mt7621_telco-electronics_x1.dts
@@ -1,7 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -23,12 +21,11 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -37,55 +34,50 @@
 		compatible = "gpio-leds";
 
 		system_led: system {
-			label = "x1:green:system";
-			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+			label = "green:system";
+			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_offline {
-			label = "x1:red:modem-offline";
-			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			label = "red:modem-offline";
+			gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
 		};
 
 		modem_4g {
-			label = "x1:blue:modem-4g";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "blue:modem-4g";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_3g {
-			label = "x1:green:modem-3g";
-			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+			label = "green:modem-3g";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_rssi_lowest {
-			label = "x1:green:modem-rssi-lowest";
-			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+			label = "green:modem-rssi-lowest";
+			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_rssi_low {
-			label = "x1:green:modem-rssi-low";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "green:modem-rssi-low";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_rssi_medium {
-			label = "x1:green:modem-rssi-medium";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			label = "green:modem-rssi-medium";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_rssi_high {
-			label = "x1:green:modem-rssi-high";
-			gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+			label = "green:modem-rssi-high";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
 		};
 
 		modem_rssi_highest {
-			label = "x1:green:modem-rssi-highest";
-			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			label = "green:modem-rssi-highest";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
 		};
 	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
 };
 
 &spi0 {
@@ -128,21 +120,45 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe006>;
-	mediatek,portmap = "llllw";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uart2", "wdt", "rgmii2";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/Timecloud.dts b/iopsys-ramips/dts/mt7621_thunder_timecloud.dts
similarity index 72%
rename from iopsys-ramips/dts/Timecloud.dts
rename to iopsys-ramips/dts/mt7621_thunder_timecloud.dts
index 1b8aa9d85d16487973c2edd3f10eec5b11408b5a..fe11f4f4870da1b4b17eecb7c3ec9652b3af8d83 100644
--- a/iopsys-ramips/dts/Timecloud.dts
+++ b/iopsys-ramips/dts/mt7621_thunder_timecloud.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,11 +14,6 @@
 		led-upgrade = &led_statuso;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -29,29 +22,28 @@
 		compatible = "gpio-leds";
 
 		statw {
-			label = "timecloud:white:status";
-			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+			label = "white:status";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_statuso: stato {
-			label = "timecloud:orange:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+			label = "orange:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		BTN_0 {
 			label = "BTN_0";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 	};
@@ -64,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -101,15 +93,22 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "jtag";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@4 {
+			status = "okay";
+			label = "lan";
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "jtag";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_totolink_a7000r.dts b/iopsys-ramips/dts/mt7621_totolink_a7000r.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d0e38f1721b4e519fc9c5bbfa1555e42bd9d185e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_totolink_a7000r.dts
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "totolink,a7000r", "mediatek,mt7621-soc";
+	model = "TOTOLINK A7000R";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "blue:sys";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_totolink_x5000r.dts b/iopsys-ramips/dts/mt7621_totolink_x5000r.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b05d83978d1c58dc193ec89d5244f3abccf022dc
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_totolink_x5000r.dts
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "totolink,x5000r", "mediatek,mt7621-soc";
+	model = "TOTOLINK X5000R";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+		label-mac-device = &gmac0;
+		serial0 = &uartlite;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "blue:sys";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_tplink_eap235-wall-v1.dts b/iopsys-ramips/dts/mt7621_tplink_eap235-wall-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..17308eb605b81a6bf392277f16cee3abf72fefe3
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_tplink_eap235-wall-v1.dts
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "tplink,eap235-wall-v1", "mediatek,mt7621-soc";
+	model = "TP-Link EAP235-Wall v1";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status: status {
+			label = "white:status";
+			color = <LED_COLOR_ID_WHITE>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		led {
+			label = "led";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_LIGHTS_TOGGLE>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+
+		poe_passthrough {
+			gpio-export,name = "poe-passthrough";
+			gpio-export,output = <0>;
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x00000 0x80000>;
+				read-only;
+			};
+
+			partition@80000 {
+				label = "partition-table";
+				reg = <0x80000 0x10000>;
+				read-only;
+			};
+
+			info: partition@90000 {
+				label = "product-info";
+				reg = <0x90000 0x10000>;
+				read-only;
+			};
+
+			partition@a0000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x0a0000 0xd20000>;
+			};
+
+			partition@dc0000 {
+				label = "user-config";
+				reg = <0xdc0000 0x030000>;
+				read-only;
+			};
+
+			/* 0xdf0000 - 0xf30000 unused  */
+
+			partition@f30000 {
+				label = "mutil-log";
+				reg = <0xf30000 0x080000>;
+				read-only;
+			};
+
+			partition@fb0000 {
+				label = "oops";
+				reg = <0xfb0000 0x040000>;
+				read-only;
+			};
+
+			radio: partition@ff0000 {
+				label = "radio";
+				reg = <0xff0000 0x010000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x0>;
+		mtd-mac-address = <&info 0x8>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&info 0x8>;
+		mtd-mac-address-increment = <1>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&info 0x8>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan0";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/RE350.dts b/iopsys-ramips/dts/mt7621_tplink_re350-v1.dts
similarity index 63%
rename from iopsys-ramips/dts/RE350.dts
rename to iopsys-ramips/dts/mt7621_tplink_re350-v1.dts
index 5414fe147ad61b609258fd0f59a36df6c96055ca..9f29ecd8cfec3cffe1c37f6978264fc2cb6f8000 100644
--- a/iopsys-ramips/dts/RE350.dts
+++ b/iopsys-ramips/dts/mt7621_tplink_re350-v1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,79 +14,69 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "re350-v1:blue:power";
-			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2g {
-			label = "re350-v1:blue:wifi2G";
-			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+			label = "blue:wifi2G";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi5g {
-			label = "re350-v1:blue:wifi5G";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "blue:wifi5G";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 
 		wps_r {
-			label = "re350-v1:red:wps";
-			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			label = "red:wps";
+			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
 		};
 
 		wps_b {
-			label = "re350-v1:blue:wps";
-			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+			label = "blue:wps";
+			gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
 		};
 
 		eth {
-			label = "re350-v1:green:eth_act";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "green:eth_act";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 		};
 
 		eth2 {
-			label = "re350-v1:green:eth_link";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			label = "green:eth_link";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		led {
 			label = "led";
-			gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		power {
 			label = "power";
-			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_POWER>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -97,7 +85,7 @@
 &spi0 {
 	status = "okay";
 
-	w25q64@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -141,7 +129,7 @@
 &pcie0 {
 	mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&radio 0>;
+		mediatek,mtd-eeprom = <&radio 0x0>;
 		mtd-mac-address = <&config 0x10008>;
 		mtd-mac-address-increment = <1>;
 	};
@@ -157,15 +145,22 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&config 0x10008>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "rgmii2", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "rgmii2", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_tplink_re500-v1.dts b/iopsys-ramips/dts/mt7621_tplink_re500-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..f199423ed092d1139d61494c229e9ed269736489
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_tplink_re500-v1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_tplink_rexx0-v1.dtsi"
+
+/ {
+	compatible = "tplink,re500-v1", "mediatek,mt7621-soc";
+	model = "TP-Link RE500 v1";
+};
diff --git a/iopsys-ramips/dts/mt7621_tplink_re650-v1.dts b/iopsys-ramips/dts/mt7621_tplink_re650-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..dcc5a3b3e9f48a5ec805fd7e71566644e8d02abd
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_tplink_re650-v1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_tplink_rexx0-v1.dtsi"
+
+/ {
+	compatible = "tplink,re650-v1", "mediatek,mt7621-soc";
+	model = "TP-Link RE650 v1";
+};
diff --git a/iopsys-ramips/dts/mt7621_tplink_rexx0-v1.dtsi b/iopsys-ramips/dts/mt7621_tplink_rexx0-v1.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..45a983098d2fba82f59b541762d3d9e82e2bca72
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_tplink_rexx0-v1.dtsi
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		power {
+			label = "power";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_POWER>;
+		};
+
+		led {
+			label = "led";
+			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_LIGHTS_TOGGLE>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi2g {
+			label = "blue:wifi2g";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi5g {
+			label = "blue:wifi5g";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wps_red {
+			label = "red:wps";
+			gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
+		};
+
+		wps_blue {
+			label = "blue:wps";
+			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
+		};
+
+		eth_act {
+			label = "green:eth_act";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+		};
+
+		eth_link {
+			label = "green:eth_link";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0xde0000>;
+			};
+
+			config: partition@e00000 {
+				label = "config";
+				reg = <0xe00000 0x50000>;
+				read-only;
+			};
+
+			/* range 0xe50000 to 0xff0000 is empty in vendor
+			 * firmware, so we do not use it either
+			 */
+
+			radio: partition@ff0000 {
+				label = "radio";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "rgmii2", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x0>;
+		mtd-mac-address = <&config 0x10008>;
+		mtd-mac-address-increment = <1>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		mtd-mac-address = <&config 0x10008>;
+		mtd-mac-address-increment = <2>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&config 0x10008>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x-sfp.dts b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x-sfp.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9f92178900346015b32f05c44aa804f95d7d4dcb
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x-sfp.dts
@@ -0,0 +1,73 @@
+#include "mt7621_ubnt_edgerouter-x.dtsi"
+
+/ {
+	model = "Ubiquiti EdgeRouter X SFP";
+	compatible = "ubnt,edgerouter-x-sfp", "mediatek,mt7621-soc";
+
+	sfp_eth5: sfp_eth5 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c>;
+		mod-def0-gpio = <&expander0 5 GPIO_ACTIVE_LOW>;
+		maximum-power-milliwatt = <1000>;
+	};
+};
+
+&i2c {
+	status = "okay";
+
+	/*
+	 * PCA9655 GPIO expander
+	 *  0-POE power port eth0
+	 *  1-POE power port eth1
+	 *  2-POE power port eth2
+	 *  3-POE power port eth3
+	 *  4-POE power port eth4
+	 *  5-SFP_MOD_DEF0#
+	 *  6-
+	 *  7-
+	 *  8-Pull up to VCC
+	 *  9-Pull down to GND
+	 * 10-Pull down to GND
+	 * 11-Pull down to GND
+	 * 12-Pull down to GND
+	 * 13-Pull down to GND
+	 * 14-Pull down to GND
+	 * 15-Pull down to GND
+	 */
+	expander0: pca9555@25 {
+		compatible = "nxp,pca9555";
+		interrupt-parent = <&gpio>;
+		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		reg = <0x25>;
+	};
+};
+
+&gpio {
+	sfp_i2c_clk_gate {
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_LOW>;
+		output-high;
+	};
+};
+
+&mdio {
+	ephy7: ethernet-phy@7 {
+		reg = <7>;
+		sfp = <&sfp_eth5>;
+	};
+};
+
+&switch0 {
+	ports {
+		port@5 {
+			reg = <5>;
+			label = "eth5";
+			phy-handle = <&ephy7>;
+			phy-mode = "rgmii-rxid";
+			mtd-mac-address = <&factory 0x22>;
+			mtd-mac-address-increment = <5>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dts b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dts
new file mode 100644
index 0000000000000000000000000000000000000000..bca7c616900f983210aa7d865f2ea4d5b3b4a659
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dts
@@ -0,0 +1,6 @@
+#include "mt7621_ubnt_edgerouter-x.dtsi"
+
+/ {
+	model = "Ubiquiti EdgeRouter X";
+	compatible = "ubnt,edgerouter-x", "mediatek,mt7621-soc";
+};
diff --git a/iopsys-ramips/dts/UBNT-ER-e50.dtsi b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dtsi
similarity index 62%
rename from iopsys-ramips/dts/UBNT-ER-e50.dtsi
rename to iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dtsi
index 1d54713fe678c3f3e3c99c14172656f5b9c1db03..04eb49bfa359fa5feaf1280466de924ac6fb1f0b 100644
--- a/iopsys-ramips/dts/UBNT-ER-e50.dtsi
+++ b/iopsys-ramips/dts/mt7621_ubnt_edgerouter-x.dtsi
@@ -4,31 +4,61 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
+	aliases {
+		label-mac-device = &gmac0;
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0x22>;
+	label = "dsa";
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "eth0";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "eth1";
+			mtd-mac-address = <&factory 0x22>;
+			mtd-mac-address-increment = <1>;
+		};
+
+		port@2 {
+			status = "okay";
+			label = "eth2";
+			mtd-mac-address = <&factory 0x22>;
+			mtd-mac-address-increment = <2>;
+		};
+
+		port@3 {
+			status = "okay";
+			label = "eth3";
+			mtd-mac-address = <&factory 0x22>;
+			mtd-mac-address-increment = <3>;
+		};
+
+		port@4 {
+			status = "okay";
+			label = "eth4";
+			mtd-mac-address = <&factory 0x22>;
+			mtd-mac-address-increment = <4>;
+		};
+	};
 };
 
 &nand {
@@ -73,12 +103,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "pcie", "rgmii2", "jtag";
+		function = "gpio";
 	};
 };
 
@@ -91,7 +119,7 @@
 	 */
 	status = "disabled";
 
-	m25p80@1 {
+	flash@1 {
 		compatible = "jedec,spi-nor";
 		reg = <1>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/mt7621_ubnt_unifi-6-lite.dts b/iopsys-ramips/dts/mt7621_ubnt_unifi-6-lite.dts
new file mode 100644
index 0000000000000000000000000000000000000000..f5425ccfee5c7a4628c75d923fc8d8de0d43b439
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_ubnt_unifi-6-lite.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_ubnt_unifi.dtsi"
+
+/ {
+	compatible = "ubnt,unifi-6-lite", "mediatek,mt7621-soc";
+	model = "Ubiquiti UniFi 6 Lite";
+
+	chosen {
+		bootargs-override = "console=ttyS0,115200";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "mx25l25635f", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x60000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "u-boot-env";
+				reg = <0x60000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@70000 {
+				label = "factory";
+				reg = <0x70000 0x40000>;
+				read-only;
+			};
+
+			eeprom: partition@b0000 {
+				label = "eeprom";
+				reg = <0xb0000 0x10000>;
+				read-only;
+			};
+
+			partition@c0000 {
+				label = "bs";
+				reg = <0xc0000 0x10000>;
+			};
+
+			partition@d0000 {
+				label = "cfg";
+				reg = <0xd0000 0x100000>;
+				read-only;
+			};
+
+			partition@1d0000 {
+				compatible = "denx,fit";
+				label = "firmware";
+				reg = <0x1d0000 0xf10000>;
+			};
+
+			partition@10e0000 {
+				label = "kernel1";
+				reg = <0x10e0000 0xf10000>;
+			};
+		};
+	};
+};
+
+&wlan_2g {
+	mtd-mac-address = <&eeprom 0x0>;
+};
+
+&wlan_5g {
+	mediatek,mtd-eeprom = <&factory 0x20000>;
+	mtd-mac-address = <&eeprom 0x6>;
+	ieee80211-freq-limit = <5000000 6000000>;
+};
diff --git a/iopsys-ramips/dts/mt7621_ubnt_unifi-nanohd.dts b/iopsys-ramips/dts/mt7621_ubnt_unifi-nanohd.dts
new file mode 100644
index 0000000000000000000000000000000000000000..401868362e2fe1bd29c3af965455ff97ec6107d7
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_ubnt_unifi-nanohd.dts
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_ubnt_unifi.dtsi"
+
+/ {
+	compatible = "ubnt,unifi-nanohd", "mediatek,mt7621-soc";
+	model = "Ubiquiti UniFi nanoHD";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "mx25l25635f", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x60000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "u-boot-env";
+				reg = <0x60000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@70000 {
+				label = "factory";
+				reg = <0x70000 0x10000>;
+				read-only;
+			};
+
+			eeprom: partition@80000 {
+				label = "eeprom";
+				reg = <0x80000 0x10000>;
+				read-only;
+			};
+
+			partition@90000 {
+				label = "bs";
+				reg = <0x90000 0x10000>;
+			};
+
+			partition@a0000 {
+				label = "cfg";
+				reg = <0xa0000 0x100000>;
+				read-only;
+			};
+
+			partition@1a0000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x1a0000 0xf30000>;
+			};
+
+			partition@10d0000 {
+				label = "kernel1";
+				reg = <0x10d0000 0xf30000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&wlan_5g {
+	mediatek,mtd-eeprom = <&factory 0x8000>;
+};
diff --git a/iopsys-ramips/dts/mt7621_ubnt_unifi.dtsi b/iopsys-ramips/dts/mt7621_ubnt_unifi.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..e0625ba5005ed1eb9ccd6aaac8e9a420a126df8b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_ubnt_unifi.dtsi
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_white;
+		led-failsafe = &led_white;
+		led-running = &led_blue;
+		led-upgrade = &led_blue;
+		label-mac-device = &gmac0;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_blue: dome_blue {
+			label = "blue:dome";
+			gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_white: dome_white {
+			label = "white:dome";
+			gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wlan_2g: wifi@0,0 {
+		reg = <0x0 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
+
+&pcie1 {
+	wlan_5g: wifi@0,0 {
+		reg = <0x0 0 0 0 0>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&eeprom 0x0>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_unielec_u7621-01-16m.dts b/iopsys-ramips/dts/mt7621_unielec_u7621-01-16m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d063f08711b095118b0367d6eed54db67317ba7d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_unielec_u7621-01-16m.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_unielec_u7621-01.dtsi"
+
+/ {
+	compatible = "unielec,u7621-01-16m", "unielec,u7621-01", "mediatek,mt7621-soc";
+	model = "UniElec U7621-01 (16M flash)";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <14000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_unielec_u7621-01.dtsi b/iopsys-ramips/dts/mt7621_unielec_u7621-01.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..336f68ea61a6eb9f38a5e04728e069ca00d64333
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_unielec_u7621-01.dtsi
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "unielec,u7621-01", "mediatek,mt7621-soc";
+
+	aliases {
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		modem_reset {
+			gpio-export,name = "modem_reset";
+			gpio-export,output = <1>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status: status {
+			label = "green:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+		};
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_unielec_u7621-06-16m.dts b/iopsys-ramips/dts/mt7621_unielec_u7621-06-16m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..e9789cff5d44c41eb8595743d11d0ee20c95338d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_unielec_u7621-06-16m.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7621_unielec_u7621-06.dtsi"
+
+/ {
+	compatible = "unielec,u7621-06-16m", "unielec,u7621-06", "mediatek,mt7621-soc";
+	model = "UniElec U7621-06 (16M flash)";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <14000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			firmware: partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_unielec_u7621-06-64m.dts b/iopsys-ramips/dts/mt7621_unielec_u7621-06-64m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..74e4d6625b54d1b9a6e45707fc9f21bfc0b45c6c
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_unielec_u7621-06-64m.dts
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
+ *  Copyright(c) 2018 Nishant Sharma <codemarauder@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7621_unielec_u7621-06.dtsi"
+
+/ {
+	compatible = "unielec,u7621-06-64m", "unielec,u7621-06", "mediatek,mt7621-soc";
+	model = "UniElec U7621-06 (64M flash)";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			firmware: partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x3fb0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_unielec_u7621-06.dtsi b/iopsys-ramips/dts/mt7621_unielec_u7621-06.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..3b149df85ad92fa058af6e6d9bc4ffe517f32498
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_unielec_u7621-06.dtsi
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "unielec,u7621-06", "mediatek,mt7621-soc";
+
+	aliases {
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		modem_reset {
+			gpio-export,name = "modem_reset";
+			gpio-export,output = <1>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status: status {
+			label = "green:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		led4 {
+			label = "green:led4";
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		led5 {
+			label = "green:led5";
+			gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_wavlink_wl-wn531a6.dts b/iopsys-ramips/dts/mt7621_wavlink_wl-wn531a6.dts
new file mode 100644
index 0000000000000000000000000000000000000000..04f656d0f6c599c8e52c96a3ac9725ba5daafcc4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_wavlink_wl-wn531a6.dts
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "wavlink,wl-wn531a6", "mediatek,mt7621-soc";
+	model = "Wavlink WL-WN531A6";
+
+	aliases {
+		led-boot = &led_status_red;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_red;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset Button";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		touch { /* RH6015C touch sensor -> GPIO 14 */
+			label = "Touch Button";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+
+		turbo {
+			label = "Turbo Button";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+		};
+
+		wps {
+			label = "WPS Button";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_blue: status_blue {
+			label = "blue:power";
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_red: status_red {
+			label = "red:power";
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
+		};
+
+		wifi2g {
+			label = "blue:wifi2g";
+			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&i2c {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xeb0000>;
+			};
+
+			partition@f00000 {
+				label = "vendor";
+				reg = <0xf00000 0x100000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "rgmii2", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&uartlite2 {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7621_wevo_11acnas.dts b/iopsys-ramips/dts/mt7621_wevo_11acnas.dts
new file mode 100644
index 0000000000000000000000000000000000000000..60d31852f096adc14d6b37bae90dd112990be2c4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_wevo_11acnas.dts
@@ -0,0 +1,17 @@
+#include "mt7621_wevo_w2914ns-v2.dtsi"
+
+/ {
+	compatible = "wevo,11acnas", "mediatek,mt7621-soc";
+	model = "WeVO 11AC NAS Router";
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/W2914NSV2.dts b/iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dts
similarity index 50%
rename from iopsys-ramips/dts/W2914NSV2.dts
rename to iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dts
index bd8e809447ee2b20d86a93d9314fe4067fa16278..bd449832e3a85c982e1d923e5551fdcf2c92e8b0 100644
--- a/iopsys-ramips/dts/W2914NSV2.dts
+++ b/iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dts
@@ -1,21 +1,15 @@
-/dts-v1/;
-
-#include "W2914NSV2.dtsi"
+#include "mt7621_wevo_w2914ns-v2.dtsi"
 
 / {
+	compatible = "wevo,w2914ns-v2", "mediatek,mt7621-soc";
 	model = "WeVO W2914NS v2";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		usb {
-			label = "w2914nsv2:green:usb";
-			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
diff --git a/iopsys-ramips/dts/W2914NSV2.dtsi b/iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
similarity index 57%
rename from iopsys-ramips/dts/W2914NSV2.dtsi
rename to iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
index 63cff0c10d886bb56d3817d859cdd0af5e0cecd1..ffa86a4810b322cf63f479e287f7f78276d8a5ae 100644
--- a/iopsys-ramips/dts/W2914NSV2.dtsi
+++ b/iopsys-ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
@@ -4,41 +4,35 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "wevo,w2914ns-v2", "mediatek,mt7621-soc";
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
+	aliases {
+		label-mac-device = &wan;
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
 };
 
-&xhci {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -78,30 +72,67 @@
 
 &pcie0 {
 	wifi@0,0 {
-		compatible = "pci14c3,7603";
+		compatible = "mediatek,mt76";
 		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x0000>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
 	};
 };
 
 &pcie1 {
 	wifi@0,0 {
-		compatible = "pci14c3,7662";
+		compatible = "mediatek,mt76";
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x8000>;
 		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
 		};
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x2e>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_winstars_ws-wn583a6.dts b/iopsys-ramips/dts/mt7621_winstars_ws-wn583a6.dts
new file mode 100644
index 0000000000000000000000000000000000000000..803bf5cf2407f9a3a0d55701105ac36742a2632f
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_winstars_ws-wn583a6.dts
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "winstars,ws-wn583a6", "mediatek,mt7621-soc";
+	model = "Winstars WS-WN583A6";
+
+	aliases {
+		led-boot = &led_status_red;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_red;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		night_light_white {
+			label = "white:night_light";
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+		};
+
+		status_amber {
+			label = "amber:status";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_red: status_red {
+			label = "red:status";
+			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt", "rgmii2";
+		function = "gpio";
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/MIR3P.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3-pro.dts
similarity index 64%
rename from iopsys-ramips/dts/MIR3P.dts
rename to iopsys-ramips/dts/mt7621_xiaomi_mi-router-3-pro.dts
index ff250136f27aebcaf6fb43d36993bc742c45f642..b9101b7ccbbf0314d852d463286657351251c43e 100644
--- a/iopsys-ramips/dts/MIR3P.dts
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3-pro.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -7,7 +6,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "xiaomi,mir3p", "mediatek,mt7621-soc";
+	compatible = "xiaomi,mi-router-3-pro", "mediatek,mt7621-soc";
 	model = "Xiaomi Mi Router 3 Pro";
 
 	aliases {
@@ -15,11 +14,7 @@
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
 		led-upgrade = &led_status_yellow;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x04000000>;
+		label-mac-device = &gmac0;
 	};
 
 	chosen {
@@ -30,48 +25,51 @@
 		compatible = "gpio-leds";
 
 		led_status_red: status_red {
-			label = "mir3p:red:status";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "red:status";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_blue: status_blue {
-			label = "mir3p:blue:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+			label = "blue:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_yellow: status_yellow {
-			label = "mir3p:yellow:status";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			label = "yellow:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wan_amber {
-			label = "mir3p:amber:wan";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "amber:wan";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:04:1Gbps";
 		};
 
 		lan3_amber {
-			label = "mir3p:amber:lan3";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "amber:lan3";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:01:1Gbps";
 		};
 
 		lan2_amber {
-			label = "mir3p:amber:lan2";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "amber:lan2";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:02:1Gbps";
 		};
 
 		lan1_amber {
-			label = "mir3p:amber:lan1";
-			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+			label = "amber:lan1";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:03:1Gbps";
 		};
 	};
 
-	button {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+	keys {
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -81,7 +79,7 @@
 		regulator-name = "usb_vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio 12 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
 };
@@ -116,7 +114,7 @@
 		};
 
 		factory: partition@c0000 {
-			label = "Factory";
+			label = "factory";
 			reg = <0x0c0000 0x40000>;
 			read-only;
 		};
@@ -177,16 +175,38 @@
 	};
 };
 
-&ethernet {
-	mtd-mac-address = <&factory 0xe000>;
-	mediatek,portmap = "llllw";
+&gmac0 {
+	mtd-mac-address = <&factory 0xe006>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uart2", "uart3", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
 		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "uart3", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g-v2.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..fe03ff1e6a6beff927dee92ed9a31ef2d970e51d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g-v2.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_mi-router-4a-3g-v2.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-3g-v2", "mediatek,mt7621-soc";
+	model = "Xiaomi Mi Router 3G v2";
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g.dts
new file mode 100644
index 0000000000000000000000000000000000000000..40ea6625d4a3577de0e3904e688fd8206317b737
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-3g.dts
@@ -0,0 +1,117 @@
+#include "mt7621_xiaomi_nand_128m.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-3g", "mediatek,mt7621-soc";
+	model = "Xiaomi Mi Router 3G";
+
+	aliases {
+		led-boot = &led_status_yellow;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_yellow;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_red: status_red {
+			label = "red:status";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_yellow: status_yellow {
+			label = "yellow:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_amber {
+			label = "amber:wan";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:01:1Gbps";
+		};
+
+		lan1_amber {
+			label = "amber:lan1";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:03:1Gbps";
+		};
+
+		lan2_amber {
+			label = "amber:lan2";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "dsa-0.0:02:1Gbps";
+		};
+	};
+
+	reg_usb_vbus: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio 12 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&xhci {
+	vbus-supply = <&reg_usb_vbus>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7603";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe006>;
+};
+
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..18cbe0c013f126f3f2eb1fb0e3579300d2f466ef
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4.dts
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_nand_128m.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-4", "mediatek,mt7621-soc";
+	model = "Xiaomi Mi Router 4";
+
+	aliases {
+		led-boot = &led_status_yellow;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_yellow;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_red: status_red {
+			label = "red:status";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_yellow: status_yellow {
+			label = "yellow:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&keys {
+	minet {
+		label = "minet";
+		gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		linux,code = <KEY_WPS_BUTTON>;
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7603";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-3g-v2.dtsi b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-3g-v2.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..cc5abf09b6b20882a4c6a97202a9b437d5bd9a6d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-3g-v2.dtsi
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_status_yellow;
+		led-failsafe = &led_status_yellow;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_yellow;
+		label-mac-device = &wan;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_yellow: status_yellow {
+			label = "yellow:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "Bdata";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@50000 {
+				label = "factory";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "crash";
+				reg = <0x60000 0x10000>;
+				read-only;
+			};
+
+			partition@70000 {
+				label = "cfg_bak";
+				reg = <0x70000 0x10000>;
+				read-only;
+			};
+
+			partition@80000 {
+				label = "overlay";
+				reg = <0x80000 0x100000>;
+				read-only;
+			};
+
+			firmware: partition@180000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x180000 0xe80000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "pci14c3,7603";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		wan: port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-gigabit.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-gigabit.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4387d3b79f8e6b6cb404320b9a67c7534011e6ff
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-4a-gigabit.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_mi-router-4a-3g-v2.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-4a-gigabit", "mediatek,mt7621-soc";
+	model = "Xiaomi Mi Router 4A Gigabit Edition";
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6cca16a79b5298550be0c45bd0ba474d190cf44b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_mi-router-ac2100.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_router-ac2100.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-ac2100", "mediatek,mt7621-soc";
+	model = "Xiaomi Mi Router AC2100";
+
+	aliases {
+		led-boot = &led_status_yellow;
+		led-failsafe = &led_status_yellow;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_blue;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wan_yellow {
+			label = "yellow:wan";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_blue {
+			label = "blue:wan";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_yellow: status_yellow {
+			label = "yellow:status";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/MIR3G.dts b/iopsys-ramips/dts/mt7621_xiaomi_nand_128m.dtsi
similarity index 51%
rename from iopsys-ramips/dts/MIR3G.dts
rename to iopsys-ramips/dts/mt7621_xiaomi_nand_128m.dtsi
index b0b63f8085c73d3b3d2e2e80729faa9ea23d8abf..12e6bccc2e26969bed62b23bf9e09e4f62ae9674 100644
--- a/iopsys-ramips/dts/MIR3G.dts
+++ b/iopsys-ramips/dts/mt7621_xiaomi_nand_128m.dtsi
@@ -1,4 +1,4 @@
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include "mt7621.dtsi"
 
@@ -6,82 +6,19 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "xiaomi,mir3g", "mediatek,mt7621-soc";
-	model = "Xiaomi Mi Router 3G";
-
-	aliases {
-		led-boot = &led_status_yellow;
-		led-failsafe = &led_status_red;
-		led-running = &led_status_blue;
-		led-upgrade = &led_status_yellow;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200n8";
 	};
 
-	leds {
-		compatible = "gpio-leds";
-
-		led_status_red: status_red {
-			label = "mir3g:red:status";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
-		};
-
-		led_status_blue: status_blue {
-			label = "mir3g:blue:status";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-		};
-
-		led_status_yellow: status_yellow {
-			label = "mir3g:yellow:status";
-			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-		};
-
-		wan_amber {
-			label = "mir3g:amber:wan";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
-		};
-
-		lan1_amber {
-			label = "mir3g:amber:lan1";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
-		};
-
-		lan2_amber {
-			label = "mir3g:amber:lan2";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	button {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+	keys: keys {
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
-
-	reg_usb_vbus: regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
-};
-
-&xhci {
-	vbus-supply = <&reg_usb_vbus>;
 };
 
 &nand {
@@ -110,7 +47,7 @@
 		};
 
 		factory: partition@100000 {
-			label = "Factory";
+			label = "factory";
 			reg = <0x100000 0x40000>;
 			read-only;
 		};
@@ -145,6 +82,7 @@
 		 * image to both kernel partitions.
 		 */
 
+		/* We keep stock xiaomi firmware (kernel0) here */
 		partition@200000 {
 			label = "kernel_stock";
 			reg = <0x200000 0x400000>;
@@ -169,39 +107,3 @@
 		};
 	};
 };
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "pci14c3,7603";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x0000>;
-		ieee80211-freq-limit = <2400000 2500000>;
-	};
-};
-
-&pcie1 {
-	wifi@0,0 {
-		compatible = "pci14c3,7662";
-		reg = <0x0000 0 0 0 0>;
-		mediatek,mtd-eeprom = <&factory 0x8000>;
-		ieee80211-freq-limit = <5000000 6000000>;
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0xe000>;
-	mediatek,portmap = "lwlll";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uart2", "uart3", "wdt";
-			ralink,function = "gpio";
-		};
-	};
-};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts b/iopsys-ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4299de318bf19ce9e2b1d22998d6a3a909315773
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_redmi-router-ac2100.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_router-ac2100.dtsi"
+
+/ {
+	compatible = "xiaomi,redmi-router-ac2100", "mediatek,mt7621-soc";
+	model = "Xiaomi Redmi Router AC2100";
+
+	aliases {
+		led-boot = &led_status_amber;
+		led-failsafe = &led_status_amber;
+		led-running = &led_status_white;
+		led-upgrade = &led_status_white;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_amber: status_amber {
+			label = "amber:status";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_white: status_white {
+			label = "white:status";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_amber {
+			label = "amber:wan";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_white {
+			label = "white:wan";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaomi_router-ac2100.dtsi b/iopsys-ramips/dts/mt7621_xiaomi_router-ac2100.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..7e6b3afcdf008dc6506bd09b207ec64770a59bbf
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaomi_router-ac2100.dtsi
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_xiaomi_nand_128m.dtsi"
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan3";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart2", "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_xiaoyu_xy-c5.dts b/iopsys-ramips/dts/mt7621_xiaoyu_xy-c5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b90ff92c70495952a77089fe9797b22d17d814bc
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_xiaoyu_xy-c5.dts
@@ -0,0 +1,127 @@
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "xiaoyu,xy-c5", "mediatek,mt7621-soc";
+	model = "XiaoYu XY-C5";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		work {
+			label = "green:work";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_sys: sys {
+			label = "green:sys";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x1fb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0x4>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/CreativeBox-v1.dts b/iopsys-ramips/dts/mt7621_xzwifi_creativebox-v1.dts
similarity index 68%
rename from iopsys-ramips/dts/CreativeBox-v1.dts
rename to iopsys-ramips/dts/mt7621_xzwifi_creativebox-v1.dts
index 06cec3b02744b01a3215e710b5abb94527637d25..182b6db5b3dbb09438c6ff1d2543bc32c6574300 100644
--- a/iopsys-ramips/dts/CreativeBox-v1.dts
+++ b/iopsys-ramips/dts/mt7621_xzwifi_creativebox-v1.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -17,12 +16,6 @@
 		led-upgrade = &led_sys;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1C000000>,
-		      <0x20000000 0x4000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -31,41 +24,40 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "creativebox-v1:blue:power";
-			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		led_sys: sys {
-			label = "creativebox-v1:blue:sys";
-			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+			label = "blue:sys";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "creativebox-v1:blue:internet";
-			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+			label = "blue:internet";
+			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "creativebox-v1:blue:wlan2g";
-			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan2g";
+			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
 		wlan5g {
-			label = "creativebox-v1:blue:wlan5g";
-			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan5g";
+			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -77,19 +69,19 @@
 		power_usb2 {
 			gpio-export,name = "power_usb2";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_usb3 {
 			gpio-export,name = "power_usb3";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
 		};
 
 		power_sata {
 			gpio-export,name = "power_sata";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -101,6 +93,7 @@
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
+		broken-flash-reset;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -159,15 +152,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WR1200JS.dts b/iopsys-ramips/dts/mt7621_youhua_wr1200js.dts
similarity index 68%
rename from iopsys-ramips/dts/WR1200JS.dts
rename to iopsys-ramips/dts/mt7621_youhua_wr1200js.dts
index 6fd087ca0992e69493ecf3d95bfc6ea433e59b07..a77d13c71c1d86099b81582789f32c2fc39ab181 100644
--- a/iopsys-ramips/dts/WR1200JS.dts
+++ b/iopsys-ramips/dts/mt7621_youhua_wr1200js.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,11 +12,6 @@
 		led-failsafe = &led_wps;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -27,42 +20,41 @@
 		compatible = "gpio-leds";
 
 		internet {
-			label = "wr1200js:blue:internet";
-			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+			label = "blue:internet";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "wr1200js:blue:wps";
-			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			label = "blue:wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "wr1200js:blue:usb";
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+			label = "blue:usb";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		wifi {
 			label = "wifi";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RFKILL>;
 		};
 	};
@@ -71,7 +63,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -132,15 +124,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uart2", "uart3", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart2", "uart3", "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/YOUKU-YK2.dts b/iopsys-ramips/dts/mt7621_youku_yk-l2.dts
similarity index 73%
rename from iopsys-ramips/dts/YOUKU-YK2.dts
rename to iopsys-ramips/dts/mt7621_youku_yk-l2.dts
index 55fdf2f224302a5cb0a1deb899d5f872a5918e72..627188873d08a6126a427ce7d2ee79e6fcc0df30 100644
--- a/iopsys-ramips/dts/YOUKU-YK2.dts
+++ b/iopsys-ramips/dts/mt7621_youku_yk-l2.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7621.dtsi"
 
@@ -17,11 +16,6 @@
 		led-upgrade = &led_wps;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
@@ -30,37 +24,36 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "yk-l2:blue:power";
-			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			label = "blue:power";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		led_wps: wps {
-			label = "yk-l2:blue:wps";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "blue:wps";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "yk-l2:blue:usb";
-			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+			label = "blue:usb";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
 			linux,default-trigger = "usbport";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -70,10 +63,6 @@
 	status = "okay";
 };
 
-&xhci {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
@@ -143,15 +132,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
 		};
 	};
 };
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/ZBT-WE1326.dts b/iopsys-ramips/dts/mt7621_zbtlink_zbt-we1326.dts
similarity index 68%
rename from iopsys-ramips/dts/ZBT-WE1326.dts
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-we1326.dts
index 2f6f94f3ffd917fcad07ca142789b74382a8dff1..cd71166f4d8bd6348b6a0e2d2e0d038ac6e4851f 100644
--- a/iopsys-ramips/dts/ZBT-WE1326.dts
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-we1326.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,37 +5,38 @@
 
 / {
 	compatible = "zbtlink,zbt-we1326", "mediatek,mt7621-soc";
-	model = "ZBT-WE1326";
+	model = "Zbtlink ZBT-WE1326";
+
+	aliases {
+		label-mac-device = &wifi1;
+	};
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -74,16 +73,46 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
 &pcie {
 	status = "okay";
 };
 
 &pcie0 {
-	mt76@0,0 {
+	wifi0: mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x8000>;
 		ieee80211-freq-limit = <5000000 6000000>;
@@ -91,7 +120,7 @@
 };
 
 &pcie1 {
-	mt76@0,0 {
+	wifi1: mt76@0,0 {
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x0000>;
 		ieee80211-freq-limit = <2400000 2500000>;
diff --git a/iopsys-ramips/dts/ZBT-WE3526.dts b/iopsys-ramips/dts/mt7621_zbtlink_zbt-we3526.dts
similarity index 73%
rename from iopsys-ramips/dts/ZBT-WE3526.dts
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-we3526.dts
index 30c941c9c8dc9cb5ecaf7062cab20b2ebe86bef6..10e08cd3d054b86acda744c0ece36a2e12e3f402 100644
--- a/iopsys-ramips/dts/ZBT-WE3526.dts
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-we3526.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,35 +5,27 @@
 
 / {
 	compatible = "zbtlink,zbt-we3526", "mediatek,mt7621-soc";
-	model = "ZBT-WE3526";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
+	model = "Zbtlink ZBT-WE3526";
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	palmbus: palmbus@1E000000 {
-		i2c@900 {
-			status = "okay";
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
+&i2c {
+	status = "okay";
+};
+
 &sdhci {
 	status = "okay";
 };
@@ -43,7 +33,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -105,15 +95,43 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
 		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe006>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WG2626.dts b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg2626.dts
similarity index 70%
rename from iopsys-ramips/dts/ZBT-WG2626.dts
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-wg2626.dts
index 4ceee9bd6f025bfff130172aaab899a9597de6b5..d0d656ba6db8296f7a3d01dc0346af2f985b4667 100644
--- a/iopsys-ramips/dts/ZBT-WG2626.dts
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg2626.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7621.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,7 +5,7 @@
 
 / {
 	compatible = "zbtlink,zbt-wg2626", "mediatek,mt7621-soc";
-	model = "ZBT-WG2626";
+	model = "Zbtlink ZBT-WG2626";
 
 	aliases {
 		led-boot = &led_status;
@@ -16,28 +14,16 @@
 		led-upgrade = &led_status;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	palmbus: palmbus@1E000000 {
-		i2c@900 {
-			status = "okay";
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -46,12 +32,16 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "zbt-wg2626:green:status";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
+&i2c {
+	status = "okay";
+};
+
 &sdhci {
 	status = "okay";
 };
@@ -59,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -116,15 +106,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
 		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/ZBT-WG3526-16M.dts b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-16m.dts
similarity index 63%
rename from iopsys-ramips/dts/ZBT-WG3526-16M.dts
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-16m.dts
index 73fc55e1f5afde2427b1bbb03f5628f924790921..4094ef135217edbc53a7258b0da7a8a10a3a8ffe 100644
--- a/iopsys-ramips/dts/ZBT-WG3526-16M.dts
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-16m.dts
@@ -1,10 +1,8 @@
-/dts-v1/;
-
-#include "ZBT-WG3526.dtsi"
+#include "mt7621_zbtlink_zbt-wg3526.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-wg3526-16m", "zbtlink,zbt-wg3526", "mediatek,mt7621-soc";
-	model = "ZBT-WG3526 (16M)";
+	model = "Zbtlink ZBT-WG3526 (16M)";
 };
 
 &firmware {
diff --git a/iopsys-ramips/dts/ZBT-WG3526-32M.dts b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts
similarity index 63%
rename from iopsys-ramips/dts/ZBT-WG3526-32M.dts
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts
index d61d38dd9934a7e239291a8685b746032d5326cd..fe4bc72f39dffb96a4df55992153bd6fd37c9bd5 100644
--- a/iopsys-ramips/dts/ZBT-WG3526-32M.dts
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts
@@ -1,10 +1,8 @@
-/dts-v1/;
-
-#include "ZBT-WG3526.dtsi"
+#include "mt7621_zbtlink_zbt-wg3526.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-wg3526-32m", "zbtlink,zbt-wg3526", "mediatek,mt7621-soc";
-	model = "ZBT-WG3526 (32M)";
+	model = "Zbtlink ZBT-WG3526 (32M)";
 };
 
 &firmware {
diff --git a/iopsys-ramips/dts/ZBT-WG3526.dtsi b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi
similarity index 69%
rename from iopsys-ramips/dts/ZBT-WG3526.dtsi
rename to iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi
index 0cf94d57d26f96531f1b6887a05506547fecf961..515d37ceaa6471886f6bd438dfe34d19895c886a 100644
--- a/iopsys-ramips/dts/ZBT-WG3526.dtsi
+++ b/iopsys-ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi
@@ -11,30 +11,19 @@
 		led-failsafe = &led_status;
 		led-running = &led_status;
 		led-upgrade = &led_status;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
+		label-mac-device = &wifi0;
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	palmbus: palmbus@1E000000 {
-		i2c@900 {
-			status = "okay";
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -43,12 +32,16 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "zbt-wg3526:green:status";
-			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
+&i2c {
+	status = "okay";
+};
+
 &sdhci {
 	status = "okay";
 };
@@ -56,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -97,7 +90,7 @@
 };
 
 &pcie0 {
-	wifi@0,0 {
+	wifi0: wifi@0,0 {
 		compatible = "pci14c3,7603";
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x0000>;
@@ -105,7 +98,7 @@
 };
 
 &pcie1 {
-	wifi@0,0 {
+	wifi1: wifi@0,0 {
 		compatible = "pci14c3,7662";
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x8000>;
@@ -117,15 +110,44 @@
 	};
 };
 
-&ethernet {
+&gmac0 {
 	mtd-mac-address = <&factory 0xe000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
-			ralink,function = "gpio";
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
 		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "wan";
+			mtd-mac-address = <&factory 0xe000>;
+			mtd-mac-address-increment = <1>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "rgmii2";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7621_zio_freezio.dts b/iopsys-ramips/dts/mt7621_zio_freezio.dts
new file mode 100644
index 0000000000000000000000000000000000000000..be7e5dcf98991a20ebee87776d51c3125fa2cab4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_zio_freezio.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621_wevo_w2914ns-v2.dtsi"
+
+/ {
+	compatible = "zio,freezio", "mediatek,mt7621-soc";
+	model = "ZIO FREEZIO";
+
+	leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&xhci_ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7621_zyxel_wap6805.dts b/iopsys-ramips/dts/mt7621_zyxel_wap6805.dts
new file mode 100644
index 0000000000000000000000000000000000000000..0596dc71d677d79a094b8498c4059d0544acc45f
--- /dev/null
+++ b/iopsys-ramips/dts/mt7621_zyxel_wap6805.dts
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zyxel,wap6805", "mediatek,mt7621-soc";
+	model = "ZyXEL WAP6805";
+
+	aliases {
+		led-boot = &led_status_green;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_green;
+		led-upgrade = &led_status_green;
+		label-mac-device = &gmac0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_red: status_red {
+			label = "red:status";
+			gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
+		};
+
+		status_blink {
+			label = "blink:status";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_green: status_green {
+			label = "green:status";
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "Bootloader";
+			reg = <0x0 0x100000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "MRD";
+			reg = <0x100000 0x100000>;
+			read-only;
+		};
+
+		factory: partition@200000 {
+			label = "Factory";
+			reg = <0x200000 0x100000>;
+			read-only;
+		};
+
+		partition@300000 {
+			label = "Config";
+			reg = <0x300000 0x100000>;
+		};
+
+		partition@400000 {
+			label = "Kernel";
+			reg = <0x400000 0x2000000>;
+		};
+
+		partition@800000 {
+			label = "ubi";
+			reg = <0x800000 0x1c00000>;
+		};
+
+		partition@2400000 {
+			label = "Kernel2";
+			reg = <0x2400000 0x2000000>;
+		};
+
+		partition@4400000 {
+			label = "Private";
+			reg = <0x4400000 0x100000>;
+		};
+
+		partition@4500000 {
+			label = "Log";
+			reg = <0x4500000 0x1000000>;
+		};
+
+		partition@5500000 {
+			label = "App";
+			reg = <0x5500000 0x2b00000>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0>;
+	};
+};
+
+&gmac0 {
+	mtd-mac-address = <&factory 0xe000>;
+};
+
+&gmac1 {
+	status = "okay";
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan4";
+		};
+		port@1 {
+			status = "okay";
+			label = "lan3";
+		};
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+		port@3 {
+			status = "okay";
+			label = "lan1";
+		};
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart3", "jtag", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an.dtsi b/iopsys-ramips/dts/mt7628an.dtsi
index 61016c8b4081235fefba6c37afa3b7fb1d5b2819..aa46de713412a2d0f2f6b28ef9834ca141127826 100644
--- a/iopsys-ramips/dts/mt7628an.dtsi
+++ b/iopsys-ramips/dts/mt7628an.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -81,36 +83,18 @@
 			interrupts = <3>;
 		};
 
-		gpio@600 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
+		gpio: gpio@600 {
+			compatible = "mediatek,mt7621-gpio";
 			reg = <0x600 0x100>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
-			gpio0: bank@0 {
-				reg = <0>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
-
-			gpio1: bank@1 {
-				reg = <1>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
+			#interrupt-cells = <2>;
+			interrupt-controller;
 
-			gpio2: bank@2 {
-				reg = <2>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
+			gpio-controller;
+			#gpio-cells = <2>;
 		};
 
 		i2c: i2c@900 {
@@ -284,85 +268,85 @@
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1_pins: spi_cs1 {
 			spi_cs1 {
-				ralink,group = "spi cs1";
-				ralink,function = "spi cs1";
+				groups = "spi cs1";
+				function = "spi cs1";
 			};
 		};
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		i2s_pins: i2s {
 			i2s {
-				ralink,group = "i2s";
-				ralink,function = "i2s";
+				groups = "i2s";
+				function = "i2s";
 			};
 		};
 
 		uart0_pins: uartlite {
 			uartlite {
-				ralink,group = "uart0";
-				ralink,function = "uart0";
+				groups = "uart0";
+				function = "uart0";
 			};
 		};
 
 		uart1_pins: uart1 {
 			uart1 {
-				ralink,group = "uart1";
-				ralink,function = "uart1";
+				groups = "uart1";
+				function = "uart1";
 			};
 		};
 
 		uart2_pins: uart2 {
 			uart2 {
-				ralink,group = "uart2";
-				ralink,function = "uart2";
+				groups = "uart2";
+				function = "uart2";
 			};
 		};
 
 		sdxc_pins: sdxc {
 			sdxc {
-				ralink,group = "sdmode";
-				ralink,function = "sdxc";
+				groups = "sdmode";
+				function = "sdxc";
 			};
 		};
 
 		pwm0_pins: pwm0 {
 			pwm0 {
-				ralink,group = "pwm0";
-				ralink,function = "pwm0";
+				groups = "pwm0";
+				function = "pwm0";
 			};
 		};
 
 		pwm1_pins: pwm1 {
 			pwm1 {
-				ralink,group = "pwm1";
-				ralink,function = "pwm1";
+				groups = "pwm1";
+				function = "pwm1";
 			};
 		};
 
 		pcm_i2s_pins: pcm_i2s {
 			pcm_i2s {
-				ralink,group = "i2s";
-				ralink,function = "pcm";
+				groups = "i2s";
+				function = "pcm";
 			};
 		};
 
 		refclk_pins: refclk {
 			refclk {
-				ralink,group = "refclk";
-				ralink,function = "refclk";
+				groups = "refclk";
+				function = "refclk";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/mt7628an_alfa-network_awusfree1.dts b/iopsys-ramips/dts/mt7628an_alfa-network_awusfree1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d4f6a093d42bd8eabf96ed3c2a1a2a6883c2e46b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_alfa-network_awusfree1.dts
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright (C) 2018 Piotr Dymacz <pepe2k@gmail.com>
+ *  All rights reserved.
+ */
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "alfa-network,awusfree1", "mediatek,mt7628an-soc";
+	model = "ALFA Network AWUSFREE1";
+
+	aliases {
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "orange:system";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&esw {
+	mediatek,portdisable = <0x1e>;
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x2e>;
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "wdt", "wled_an";
+		function = "gpio";
+	};
+
+	ext_lna {
+		groups = "uart1";
+		function = "sw_r";
+	};
+
+	ext_pa {
+		groups = "i2s";
+		function = "antenna";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x1000>;
+			};
+
+			partition@31000 {
+				label = "config";
+				reg = <0x31000 0xf000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7628an_asus_rt-n10p-v3.dts b/iopsys-ramips/dts/mt7628an_asus_rt-n10p-v3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b638c2138feba572168b508a769f6a56638587fd
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_asus_rt-n10p-v3.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7628an_asus_rt-n1x.dtsi"
+
+/ {
+	compatible = "asus,rt-n10p-v3", "mediatek,mt7628an-soc";
+	model = "Asus RT-N10P V3";
+};
diff --git a/iopsys-ramips/dts/mt7628an_asus_rt-n11p-b1.dts b/iopsys-ramips/dts/mt7628an_asus_rt-n11p-b1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d62d4ad480ba6e6ced82a266cad21799a8b34eb6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_asus_rt-n11p-b1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7628an_asus_rt-n1x.dtsi"
+
+/ {
+	compatible = "asus,rt-n11p-b1", "mediatek,mt7628an-soc";
+	model = "Asus RT-N11P B1";
+};
diff --git a/iopsys-ramips/dts/mt7628an_asus_rt-n12-vp-b1.dts b/iopsys-ramips/dts/mt7628an_asus_rt-n12-vp-b1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..8c44c36087efade22458dbf6bfb9074a639c310b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_asus_rt-n12-vp-b1.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7628an_asus_rt-n1x.dtsi"
+
+/ {
+	compatible = "asus,rt-n12-vp-b1", "mediatek,mt7628an-soc";
+	model = "Asus RT-N12 VP B1";
+};
diff --git a/iopsys-ramips/dts/VIXMINI.dts b/iopsys-ramips/dts/mt7628an_asus_rt-n1x.dtsi
similarity index 60%
rename from iopsys-ramips/dts/VIXMINI.dts
rename to iopsys-ramips/dts/mt7628an_asus_rt-n1x.dtsi
index 5a52fe2a1be06f24d8afb80a77d6c7ac85f5c9ab..239bb08230cffdfb7c3fa4d2e4c2a84afda67e70 100644
--- a/iopsys-ramips/dts/VIXMINI.dts
+++ b/iopsys-ramips/dts/mt7628an_asus_rt-n1x.dtsi
@@ -1,15 +1,11 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-/{
-	compatible = "glinet,vixmini", "mediatek,mt7628an-soc";
-	model = "GL.iNet VIXMINI";
-
+/ {
 	aliases {
 		led-boot = &led_power;
 		led-failsafe = &led_power;
@@ -17,69 +13,49 @@
 		led-upgrade = &led_power;
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
+	keys {
+		compatible = "gpio-keys";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "vixmini:blue:power";
-			default-state = "on";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "vixmini:white:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
-	};
 
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
-	};
-};
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "wled_an", "p1led_an";
-			ralink,function = "gpio";
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&ethernet {
-	mtd-mac-address = <&factory 0x4>;
-};
-
-&wmac {
-	status = "okay";
-
-	ralink,mtd-eeprom = <&factory 0x0>;
-};
-
 &spi0 {
 	status = "okay";
 
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <40000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -112,3 +88,34 @@
 		};
 	};
 };
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+};
+
+&wmac {
+	status = "okay";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "p0led_an", "p1led_an", "refclk", "wled_an";
+		function = "gpio";
+	};
+};
+
+&usbphy {
+	status = "disabled";
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/WCR-1166DS.dts b/iopsys-ramips/dts/mt7628an_buffalo_wcr-1166ds.dts
similarity index 65%
rename from iopsys-ramips/dts/WCR-1166DS.dts
rename to iopsys-ramips/dts/mt7628an_buffalo_wcr-1166ds.dts
index 602ea8c5dec91230b52bf069e4dd881f129a1eb5..cb4c61ecbd230e9cde298b7f424c16a84e3d489e 100644
--- a/iopsys-ramips/dts/WCR-1166DS.dts
+++ b/iopsys-ramips/dts/mt7628an_buffalo_wcr-1166ds.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -17,25 +15,24 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		aoss {
 			label = "aoss";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		ap {
 			label = "ap";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 			linux,input-type = <EV_SW>;
 		};
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -44,43 +41,43 @@
 		compatible = "gpio-leds";
 
 		router_o {
-			label = "wcr-1166ds:orange:router";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "orange:router";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 
 		router_g {
-			label = "wcr-1166ds:green:router";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			label = "green:router";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 		};
 
 		internet_o {
-			label = "wcr-1166ds:orange:internet";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+			label = "orange:internet";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
 		};
 
 		internet_g {
-			label = "wcr-1166ds:green:internet";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+			label = "green:internet";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
 		};
 
 		wireless_o {
-			label = "wcr-1166ds:orange:wireless";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "orange:wireless";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 
 		wireless_g {
-			label = "wcr-1166ds:green:wireless";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "green:wireless";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		diag {
-			label = "wcr-1166ds:orange:diag";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "orange:diag";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "wcr-1166ds:green:power";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -110,19 +107,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart1", "wled_an", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt", "refclk", "gpio", "i2s";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uart1", "wled_an", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt", "refclk", "gpio", "i2s";
+		function = "gpio";
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/WR1000.dts b/iopsys-ramips/dts/mt7628an_cudy_wr1000.dts
similarity index 69%
rename from iopsys-ramips/dts/WR1000.dts
rename to iopsys-ramips/dts/mt7628an_cudy_wr1000.dts
index c06f9b8f724c30febeeb0e02bf84388f7fb34c6f..adc998860003fa809a086ecdf23178860c0fd760 100644
--- a/iopsys-ramips/dts/WR1000.dts
+++ b/iopsys-ramips/dts/mt7628an_cudy_wr1000.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7628an.dtsi"
 
@@ -14,21 +13,21 @@
 		led-boot = &led_wps;
 		led-failsafe = &led_wps;
 		led-upgrade = &led_wps;
+		label-mac-device = &wmac;
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "rfkill";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -37,29 +36,29 @@
 		compatible = "gpio-leds";
 
 		lan1 {
-			label = "wr1000:blue:lan1";
-			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+			label = "blue:lan1";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
 		};
 
 		lan2 {
-			label = "wr1000:blue:lan2";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "blue:lan2";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "wr1000:blue:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+			label = "blue:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2g {
-			label = "wr1000:blue:wlan2g";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "blue:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
 		led_wps: wps {
-			label = "wr1000:blue:wps";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "blue:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -100,18 +99,15 @@
 				label = "firmware";
 				reg = <0x50000 0x7b0000>;
 			};
-
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2s", "refclk", "wdt", "p4led_an",
-					"p3led_an", "p2led_an", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2s", "refclk", "wdt", "p4led_an",
+				"p3led_an", "p2led_an", "wled_an";
+		function = "gpio";
 	};
 };
 
@@ -138,7 +134,7 @@
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x2e>;
+	mtd-mac-address = <&factory 0x28>;
 };
 
 &esw {
diff --git a/iopsys-ramips/dts/PBR-D1.dts b/iopsys-ramips/dts/mt7628an_d-team_pbr-d1.dts
similarity index 72%
rename from iopsys-ramips/dts/PBR-D1.dts
rename to iopsys-ramips/dts/mt7628an_d-team_pbr-d1.dts
index 6d98a4492f026b4ab2ea08f98cac63d0ffd761a6..e5c52322b66de3a3e242405ba879a8bd69ea483f 100644
--- a/iopsys-ramips/dts/PBR-D1.dts
+++ b/iopsys-ramips/dts/mt7628an_d-team_pbr-d1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,35 +22,29 @@
 		serial0 = &uart2;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		usb {
-			label = "pbr-d1:orange:usb";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			label = "orange:usb";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_power: power {
-			label = "pbr-d1:orange:power";
-			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "orange:power";
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 38 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 70 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -66,32 +58,30 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio";
+		function = "gpio";
+	};
 
-		i2c {
-			ralink,group = "i2c";
-			ralink,function = "gpio";
-		};
+	i2c {
+		groups = "i2c";
+		function = "gpio";
+	};
 
-		i2s {
-			ralink,group = "i2s";
-			ralink,function = "gpio";
-		};
+	i2s {
+		groups = "i2s";
+		function = "gpio";
+	};
 
-		spis {
-			ralink,group = "spis";
-			ralink,function = "gpio";
-		};
+	spis {
+		groups = "spis";
+		function = "gpio";
+	};
 
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
+	wdt {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
 
@@ -101,7 +91,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
diff --git a/iopsys-ramips/dts/DUZUN-DM06.dts b/iopsys-ramips/dts/mt7628an_duzun_dm06.dts
similarity index 82%
rename from iopsys-ramips/dts/DUZUN-DM06.dts
rename to iopsys-ramips/dts/mt7628an_duzun_dm06.dts
index 7325e2c699609850c25026974588cd103518371e..f0d3dcb62ad227b737346d0e3cb856f4323a8b1d 100644
--- a/iopsys-ramips/dts/DUZUN-DM06.dts
+++ b/iopsys-ramips/dts/mt7628an_duzun_dm06.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,24 +7,18 @@
 	compatible = "duzun,dm06", "mediatek,mt7628an-soc";
 	model = "DuZun DM06";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <100>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -54,19 +46,13 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "uart1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wdt", "uart1";
+		function = "gpio";
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &i2c {
 	status = "okay";
 
@@ -84,7 +70,7 @@
 };
 
 &esw {
-	mediatek,portmap = <0x3>;
+	mediatek,portmap = <0x3e>;
 	mediatek,portdisable = <0x3c>;
 };
 
@@ -106,7 +92,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <60000000>;
diff --git a/iopsys-ramips/dts/mt7628an_elecom_wrc-1167fs.dts b/iopsys-ramips/dts/mt7628an_elecom_wrc-1167fs.dts
new file mode 100644
index 0000000000000000000000000000000000000000..aa60b8a2c66b5ae308c17c62a9b0b2ade553d572
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_elecom_wrc-1167fs.dts
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "elecom,wrc-1167fs", "mediatek,mt7628an-soc";
+	model = "ELECOM WRC-1167FS";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wps {
+			label = "red:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		internet {
+			label = "green:internet";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		ap {
+			label = "ap";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x730000>;
+			};
+
+			partition@780000 {
+				label = "storage";
+				reg = <0x780000 0x80000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+	mediatek,portdisable = <0x27>;
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wled_an", "p3led_an", "p4led_an", "wdt", "refclk", "i2c", "i2s";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/GL-MT300N-V2.dts b/iopsys-ramips/dts/mt7628an_glinet_gl-mt300n-v2.dts
similarity index 66%
rename from iopsys-ramips/dts/GL-MT300N-V2.dts
rename to iopsys-ramips/dts/mt7628an_glinet_gl-mt300n-v2.dts
index e4220736d2a8e7ff40c229344f089ebfbd3ffd9c..c5e0c2e02b2251bbe71aa09c4039415ed8da63d8 100644
--- a/iopsys-ramips/dts/GL-MT300N-V2.dts
+++ b/iopsys-ramips/dts/mt7628an_glinet_gl-mt300n-v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,56 +12,51 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "gl-mt300n-v2:green:power";
+			label = "green:power";
 			default-state = "on";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "gl-mt300n-v2:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "gl-mt300n-v2:red:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "red:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		BTN_0 {
 			label = "BTN_0";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 
 		BTN_1 {
 			label = "BTN_1";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_1>;
 		};
 	};
@@ -75,17 +68,15 @@
 		usb {
 			gpio-export,name = "usb";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "gpio", "wled_an", "p0led_an", "p1led_an", "i2s";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wdt", "gpio", "wled_an", "p0led_an", "p1led_an", "i2s";
+		function = "gpio";
 	};
 };
 
@@ -95,13 +86,12 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -141,11 +131,3 @@
 &uart1 {
 	status = "okay";
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/mt7628an_glinet_microuter-n300.dts b/iopsys-ramips/dts/mt7628an_glinet_microuter-n300.dts
new file mode 100644
index 0000000000000000000000000000000000000000..09afe7211b00c34a6ca83d882c192c2b1677daa8
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_glinet_microuter-n300.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_glinet_vixmini_microuter.dtsi"
+
+/ {
+	compatible = "glinet,microuter-n300", "mediatek,mt7628an-soc";
+	model = "GL.iNet microuter-N300";
+};
+
+&firmware_part {
+		reg = <0x50000 0xfb0000>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_glinet_vixmini.dts b/iopsys-ramips/dts/mt7628an_glinet_vixmini.dts
new file mode 100644
index 0000000000000000000000000000000000000000..02c29d1ba06c366c29591be8b124b85d2a76ab2f
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_glinet_vixmini.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_glinet_vixmini_microuter.dtsi"
+
+/ {
+	compatible = "glinet,vixmini", "mediatek,mt7628an-soc";
+	model = "GL.iNet VIXMINI";
+};
+
+&firmware_part {
+		reg = <0x50000 0x7b0000>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_glinet_vixmini_microuter.dtsi b/iopsys-ramips/dts/mt7628an_glinet_vixmini_microuter.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..738968d1f9f67688d18260b2d359c72bda6f98a6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_glinet_vixmini_microuter.dtsi
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power_blue;
+		led-failsafe = &led_power_blue;
+		led-running = &led_power_blue;
+		led-upgrade = &led_power_blue;
+
+		label-mac-device = &ethernet;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_blue: power {
+			label = "blue:power";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "white:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "wled_an", "p1led_an";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&wmac {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			/*
+			 * Firmware-partition size is model-specific
+			 * due to different flash sizes.
+			 */
+			firmware_part: partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts b/iopsys-ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts
new file mode 100644
index 0000000000000000000000000000000000000000..2ef042292554a2b52b77c91f45eaad3eda27c7eb
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "hak5,wifi-pineapple-mk7", "mediatek,mt7628an-soc";
+	model = "Hak5 WiFi Pineapple Mark 7";
+
+	aliases {
+		led-boot = &led_system_blue;
+		led-failsafe = &led_system_blue;
+		led-upgrade = &led_system_blue;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		system_red {
+			label = "red:system";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		system_green {
+			label = "green:system";
+			gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_system_blue: system_blue {
+			label = "blue:system";
+			gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		usb-power {
+			gpio-export,name = "usb-power";
+			gpio-export,output = <1>;
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	sdhci@10130000 {
+		compatible = "ralink,mt7620-sdhci";
+		reg = <0x10130000 4000>;
+
+		interrupt-parent = <&intc>;
+		interrupts = <14>;
+
+		status = "okay";
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "gpio", "i2c", "i2s";
+		function = "gpio";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x1fb0000>;
+			};
+		};
+	};
+};
+
+&ethernet {
+	status = "okay";
+
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/HLK-7628N.dts b/iopsys-ramips/dts/mt7628an_hilink_hlk-7628n.dts
similarity index 72%
rename from iopsys-ramips/dts/HLK-7628N.dts
rename to iopsys-ramips/dts/mt7628an_hilink_hlk-7628n.dts
index 71c6b60ac2622dd7368d9285b57270f18d067135..69987b3566e964e1f31736c81d7e8c7a2d1b4747 100644
--- a/iopsys-ramips/dts/HLK-7628N.dts
+++ b/iopsys-ramips/dts/mt7628an_hilink_hlk-7628n.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7628an.dtsi"
 
@@ -10,22 +9,12 @@
 	compatible = "hilink,hlk-7628n", "mediatek,mt7628an-soc";
 	model = "HILINK HLK-7628N";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -34,18 +23,16 @@
 		compatible = "gpio-leds";
 
 		wlan {
-			label = "hlk-7628n:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c";
+		function = "gpio";
 	};
 };
 
@@ -96,4 +83,3 @@
 &wmac {
 	status = "okay";
 };
-
diff --git a/iopsys-ramips/dts/mt7628an_hilink_hlk-7688a.dts b/iopsys-ramips/dts/mt7628an_hilink_hlk-7688a.dts
new file mode 100644
index 0000000000000000000000000000000000000000..969488e4167970e6b856521ddbe682acf59b8687
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_hilink_hlk-7688a.dts
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "hilink,hlk-7688a", "mediatek,mt7628an-soc";
+	model = "Hi-Link HLK-7688A";
+
+	aliases {
+		led-boot = &led_wlan;
+		led-failsafe = &led_wlan;
+		led-upgrade = &led_wlan;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_wlan: wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&i2c {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x1fb0000>;
+			};
+		};
+	};
+
+	spidev@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "linux,spidev";
+		reg = <1>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7628an_hiwifi_hc5661a.dts b/iopsys-ramips/dts/mt7628an_hiwifi_hc5661a.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9e4068ce8c7241c3931d52e11c12d43eabc0444e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_hiwifi_hc5661a.dts
@@ -0,0 +1,41 @@
+#include "mt7628an_hiwifi_hc5x61a.dtsi"
+
+/ {
+	compatible = "hiwifi,hc5661a", "mediatek,mt7628an-soc";
+	model = "HiWiFi HC5661A";
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "blue:system";
+			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		};
+
+		internet {
+			label = "blue:internet";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7628an_hiwifi_hc5761a.dts b/iopsys-ramips/dts/mt7628an_hiwifi_hc5761a.dts
new file mode 100644
index 0000000000000000000000000000000000000000..828e5b8b2d09cd870136382ed136f8fb0a136984
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_hiwifi_hc5761a.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_hiwifi_hc5x61a.dtsi"
+
+/ {
+	compatible = "hiwifi,hc5761a", "mediatek,mt7628an-soc";
+	model = "HiWiFi HC5761A";
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "blue:system";
+			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		};
+
+		internet {
+			label = "blue:internet";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 40 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		usb_power {
+			gpio-export,name = "usb_power";
+			gpio-export,output = <0>;
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_hiwifi_hc5861b.dts b/iopsys-ramips/dts/mt7628an_hiwifi_hc5861b.dts
new file mode 100644
index 0000000000000000000000000000000000000000..326c412b0e24ee681b53bcff4e098002f40b313e
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_hiwifi_hc5861b.dts
@@ -0,0 +1,54 @@
+#include "mt7628an_hiwifi_hc5x61a.dtsi"
+
+/ {
+	compatible = "hiwifi,hc5861b", "mediatek,mt7628an-soc";
+	model = "HiWiFi HC5861B";
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "green:system";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		mtd-mac-address = <&factory 0x2e>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/HC5661A.dts b/iopsys-ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
similarity index 61%
rename from iopsys-ramips/dts/HC5661A.dts
rename to iopsys-ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
index 25f1ff1a027e35cb500f66b0418e0e41d31956c4..7bd394c3464cfe0b469f2f7dde70b4f5d3b9ee97 100644
--- a/iopsys-ramips/dts/HC5661A.dts
+++ b/iopsys-ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
@@ -1,4 +1,4 @@
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include "mt7628an.dtsi"
 
@@ -6,8 +6,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "hiwifi,hc5661a", "mediatek,mt7628an-soc";
-	model = "HiWiFi HC5661A";
+	compatible = "hiwifi,hc5x61a", "mediatek,mt7628an-soc";
 
 	aliases {
 		led-boot = &led_system;
@@ -20,57 +19,25 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_system: system {
-			label = "hc5661a:blue:system";
-			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
-		};
-		internet {
-			label = "hc5661a:blue:internet";
-			gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
-		};
-		wlan2g {
-			label = "hc5661a:blue:wlan2g";
-			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "refclk", "wled_an";
-			ralink,function = "gpio";
-		};
-	};
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		linux,modalias = "m25p80", "w25q128";
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -124,7 +91,6 @@
 
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
-	mediatek,portmap = "wllll";
 };
 
 &wmac {
diff --git a/iopsys-ramips/dts/mt7628an_iptime.dtsi b/iopsys-ramips/dts/mt7628an_iptime.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..8a33c37f7aad265cc59076aa72a0d41fe3d40192
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_iptime.dtsi
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &ethernet;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			debounce-interval = <60>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+			debounce-interval = <60>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uboot: partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				label = "config";
+				reg = <0x20000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@30000 {
+				label = "factory";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x40000 0x7c0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart1", "wdt";
+		function = "gpio";
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&ethernet {
+	mtd-mac-address = <&uboot 0x1fc20>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7628an_iptime_a3.dts b/iopsys-ramips/dts/mt7628an_iptime_a3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d90a075af564ee03d83d695b5489b4ffb6933350
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_iptime_a3.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_iptime.dtsi"
+
+/ {
+	compatible = "iptime,a3", "mediatek,mt7628an-soc";
+	model = "ipTIME A3";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+	mediatek,portdisable = <0x32>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_iptime_a604m.dts b/iopsys-ramips/dts/mt7628an_iptime_a604m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..2f626f1adf7031dbd27cf1c0ba94a3d39eed5b42
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_iptime_a604m.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_iptime.dtsi"
+
+/ {
+	compatible = "iptime,a604m", "mediatek,mt7628an-soc";
+	model = "ipTIME A604M";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uart1", "wdt";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_jotale_js76x8-16m.dts b/iopsys-ramips/dts/mt7628an_jotale_js76x8-16m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..8bf91fe2d1af03af4405e9766b2ccbddd3b66e8f
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_jotale_js76x8-16m.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_jotale_js76x8.dtsi"
+
+/ {
+	compatible = "jotale,js76x8-16m", "jotale,js76x8", "mediatek,mt7628an-soc";
+	model = "Jotale JS76x8 (16M)";
+};
+
+&firmware {
+	reg = <0x50000 0xfb0000>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_jotale_js76x8-32m.dts b/iopsys-ramips/dts/mt7628an_jotale_js76x8-32m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..07e8be7848cff90e303a612676b7bb517115d15d
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_jotale_js76x8-32m.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_jotale_js76x8.dtsi"
+
+/ {
+	compatible = "jotale,js76x8-32m", "jotale,js76x8", "mediatek,mt7628an-soc";
+	model = "Jotale JS76x8 (32M)";
+};
+
+&firmware {
+	reg = <0x50000 0x1fb0000>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_jotale_js76x8-8m.dts b/iopsys-ramips/dts/mt7628an_jotale_js76x8-8m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..414737634c94fe540d99a1eb0c0bf0b306ef1046
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_jotale_js76x8-8m.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_jotale_js76x8.dtsi"
+
+/ {
+	compatible = "jotale,js76x8-8m", "mediatek,mt7628an-soc";
+	model = "Jotale JS76x8 (8M)";
+};
+
+&firmware {
+	reg = <0x50000 0x7b0000>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_jotale_js76x8.dtsi b/iopsys-ramips/dts/mt7628an_jotale_js76x8.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..3fd173914e970d1c94cbe3a1ae1a73c2b1ff4b0a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_jotale_js76x8.dtsi
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "jotale,js76x8", "mediatek,mt7628an-soc";
+
+	aliases {
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "green:system";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			firmware: partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				/* reg property is set based on flash size in DTS files */
+			};
+		};
+	};
+};
+
+&i2c {
+	status = "okay";
+};
+
+&i2s {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&sdhci {
+	status = "okay";
+	mediatek,cd-low;
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/LINKIT7688.dts b/iopsys-ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
similarity index 68%
rename from iopsys-ramips/dts/LINKIT7688.dts
rename to iopsys-ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
index 7106c3b33ac365d79a97ebd78e4cf5bd39a8dbd0..cbec8c9d406685c00f449e6744ed3ad781327f0c 100644
--- a/iopsys-ramips/dts/LINKIT7688.dts
+++ b/iopsys-ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,11 +22,6 @@
 		serial0 = &uart2;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	bootstrap {
 		compatible = "mediatek,linkit";
 
@@ -39,54 +32,51 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "linkit-smart-7688:orange:wifi";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "orange:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio";
+		function = "gpio";
+	};
 
-		refclk {
-			ralink,group = "refclk";
-			ralink,function = "gpio";
-		};
+	refclk {
+		groups = "refclk";
+		function = "gpio";
+	};
 
-		i2s {
-			ralink,group = "i2s";
-			ralink,function = "gpio";
-		};
+	i2s {
+		groups = "i2s";
+		function = "gpio";
+	};
 
-		spis {
-			ralink,group = "spis";
-			ralink,function = "gpio";
-		};
+	spis {
+		groups = "spis";
+		function = "gpio";
+	};
 
-		wled_an {
-			ralink,group = "wled_an";
-			ralink,function = "gpio";
-		};
+	wled_an {
+		groups = "wled_an";
+		function = "gpio";
+	};
 
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
+	wdt {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
 
@@ -96,7 +86,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
@@ -157,7 +147,7 @@
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x28>;
+	mtd-mac-address = <&factory 0x2e>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/MT7628.dts b/iopsys-ramips/dts/mt7628an_mediatek_mt7628an-eval-board.dts
similarity index 80%
rename from iopsys-ramips/dts/MT7628.dts
rename to iopsys-ramips/dts/mt7628an_mediatek_mt7628an-eval-board.dts
index b4afc8ce967636d5a9009f8be5847dcaf05ab3db..5418dac886ee4f8ef41edd2ce7ef05bf84ec2b27 100644
--- a/iopsys-ramips/dts/MT7628.dts
+++ b/iopsys-ramips/dts/mt7628an_mediatek_mt7628an-eval-board.dts
@@ -1,23 +1,14 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 / {
 	compatible = "mediatek,mt7628an-eval-board", "mediatek,mt7628an-soc";
 	model = "Mediatek MT7628AN evaluation board";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x2000000>;
-	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c";
+		function = "gpio";
 	};
 };
 
@@ -28,7 +19,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/MAC1200RV2.dts b/iopsys-ramips/dts/mt7628an_mercury_mac1200r-v2.dts
similarity index 86%
rename from iopsys-ramips/dts/MAC1200RV2.dts
rename to iopsys-ramips/dts/mt7628an_mercury_mac1200r-v2.dts
index 190dcf1b0da907d11028e3fd3deac20e6704df8f..7aa678a1adb3d9f3975c23e5659e06333aee8254 100644
--- a/iopsys-ramips/dts/MAC1200RV2.dts
+++ b/iopsys-ramips/dts/mt7628an_mercury_mac1200r-v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,20 +14,12 @@
 		led-upgrade = &led_status;
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x2000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
+
 		led_status: status {
-			label = "mac1200rv2:green:status";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "green:status";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -37,9 +27,9 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
-		reg = <0 0>;
+		reg = <0>;
 		spi-max-frequency = <10000000>;
 
 		partitions {
diff --git a/iopsys-ramips/dts/mt7628an_netgear_r6020.dts b/iopsys-ramips/dts/mt7628an_netgear_r6020.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6ae74743312c003853a6dfc32f4ae2da8c272066
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_netgear_r6020.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_netgear_r6xxx.dtsi"
+
+/ {
+	compatible = "netgear,r6020", "mediatek,mt7628an-soc";
+	model = "Netgear R6020";
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "p2led_an", "p3led_an",
+		         "p4led_an", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&partitions {
+	partition@90000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x90000 0x6f0000>;
+	};
+
+	partition@780000 {
+		label = "ML";
+		reg = <0x780000 0x20000>;
+		read-only;
+	};
+
+	partition@7a0000 {
+		label = "ML1";
+		reg = <0x7a0000 0x20000>;
+		read-only;
+	};
+
+	partition@7c0000 {
+		label = "ML2";
+		reg = <0x7c0000 0x20000>;
+		read-only;
+	};
+
+	partition@7e0000 {
+		label = "POT";
+		reg = <0x7e0000 0x10000>;
+		read-only;
+	};
+
+	partition@7f0000 {
+		label = "reserved";
+		reg = <0x7f0000 0x10000>;
+		read-only;
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7628an_netgear_r6080.dts b/iopsys-ramips/dts/mt7628an_netgear_r6080.dts
new file mode 100644
index 0000000000000000000000000000000000000000..73cfc47a6cc8dfeb5792c9b8ea2fdc1e83aecde1
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_netgear_r6080.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_netgear_r6xxx.dtsi"
+
+/ {
+	compatible = "netgear,r6080", "mediatek,mt7628an-soc";
+	model = "Netgear R6080";
+
+	aliases {
+		label-mac-device = &ethernet;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "p2led_an", "p3led_an",
+		         "p4led_an", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&partitions {
+	partition@90000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x90000 0x760000>;
+	};
+
+	partition@7f0000 {
+		label = "reserved";
+		reg = <0x7f0000 0x10000>;
+		read-only;
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/mt7628an_netgear_r6120.dts b/iopsys-ramips/dts/mt7628an_netgear_r6120.dts
new file mode 100644
index 0000000000000000000000000000000000000000..f4d9823cd29a635518899f91b03cd725e14ebcdf
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_netgear_r6120.dts
@@ -0,0 +1,49 @@
+#include "mt7628an_netgear_r6xxx.dtsi"
+
+/ {
+	compatible = "netgear,r6120", "mediatek,mt7628an-soc";
+	model = "Netgear R6120";
+
+	aliases {
+		label-mac-device = &ethernet;
+	};
+
+	usb-regulator {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB-power";
+		gpio = <&gpio 45 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+
+		regulator-always-on;
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "p2led_an", "p3led_an",
+		         "p4led_an", "wdt", "wled_an", "uart1";
+		function = "gpio";
+	};
+};
+
+&partitions {
+	partition@90000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x90000 0xf60000>;
+	};
+
+	partition@ff0000 {
+		label = "reserved";
+		reg = <0xff0000 0x10000>;
+		read-only;
+	};
+};
+
+&wifi5 {
+	mtd-mac-address = <&factory 0x4>;
+	mtd-mac-address-increment = <(2)>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_netgear_r6xxx.dtsi b/iopsys-ramips/dts/mt7628an_netgear_r6xxx.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..c3d7da2f090924064875f7b9b98eede592767de1
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_netgear_r6xxx.dtsi
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g_green {
+			label = "green:wlan2g";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan2g_orange {
+			label = "orange:wlan2g";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <86000000>;
+		m25p,fast-read;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x40000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x20000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "nvram";
+				reg = <0x60000 0x30000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&wmac {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi5: wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_onion_omega2.dts b/iopsys-ramips/dts/mt7628an_onion_omega2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a34638bb0e03836072cb2d46403535bd17019998
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_onion_omega2.dts
@@ -0,0 +1,10 @@
+#include "mt7628an_onion_omega2.dtsi"
+
+/ {
+	compatible = "onion,omega2", "mediatek,mt7628an-soc";
+	model = "Onion Omega2";
+};
+
+&firmware {
+	reg = <0x50000 0xfb0000>;
+};
diff --git a/iopsys-ramips/dts/OMEGA2.dtsi b/iopsys-ramips/dts/mt7628an_onion_omega2.dtsi
similarity index 54%
rename from iopsys-ramips/dts/OMEGA2.dtsi
rename to iopsys-ramips/dts/mt7628an_onion_omega2.dtsi
index e36602d6c9adf737f3fb31e43f0dc1f86cb3b648..b6d2df47563db0ab00e1e0552ed61008f5b123ac 100644
--- a/iopsys-ramips/dts/OMEGA2.dtsi
+++ b/iopsys-ramips/dts/mt7628an_onion_omega2.dtsi
@@ -7,10 +7,10 @@
 	compatible = "onion,omega2", "mediatek,mt7628an-soc";
 
 	aliases {
-		led-boot = &system_led;
-		led-failsafe = &system_led;
-		led-running = &system_led;
-		led-upgrade = &system_led;
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
 	};
 
 	chosen {
@@ -20,83 +20,73 @@
 	leds {
 		compatible = "gpio-leds";
 
-		system_led: system {
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+		led_system: system {
+			label = "amber:system";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
-
-		perst {
-			ralink,group = "perst";
-			ralink,function = "gpio";
-		};
-
-		refclk {
-			ralink,group = "refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio";
+		function = "gpio";
+	};
 
-		i2s {
-			ralink,group = "i2s";
-			ralink,function = "gpio";
-		};
+	perst {
+		groups = "perst";
+		function = "gpio";
+	};
 
-		spis {
-			ralink,group = "spis";
-			ralink,function = "gpio";
-		};
+	refclk {
+		groups = "refclk";
+		function = "gpio";
+	};
 
-		wled_kn {
-			ralink,group = "wled_kn";
-			ralink,function = "gpio";
-		};
+	i2s {
+		groups = "i2s";
+		function = "gpio";
+	};
 
-		wled_an {
-			ralink,group = "wled_an";
-			ralink,function = "gpio";
-		};
+	spis {
+		groups = "spis";
+		function = "gpio";
+	};
 
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
+	wled_kn {
+		groups = "wled_kn";
+		function = "gpio";
+	};
 
-		pwm0 {
-			ralink,group = "pwm0";
-			ralink,function = "gpio";
-		};
+	wled_an {
+		groups = "wled_an";
+		function = "gpio";
+	};
 
-		pwm1 {
-			ralink,group = "pwm1";
-			ralink,function = "gpio";
-		};
+	wdt {
+		groups = "wdt";
+		function = "gpio";
 	};
-};
 
-&gpio1 {
-	status = "okay";
-};
+	pwm0 {
+		groups = "pwm0";
+		function = "gpio";
+	};
 
-&gpio2 {
-	status = "okay";
+	pwm1 {
+		groups = "pwm1";
+		function = "gpio";
+	};
 };
 
 &spi0 {
@@ -105,7 +95,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
@@ -162,7 +152,7 @@
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x28>;
+	mtd-mac-address = <&factory 0x2e>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/mt7628an_onion_omega2p.dts b/iopsys-ramips/dts/mt7628an_onion_omega2p.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4ec07dbd91da62df823ee9378bc6e0025549538b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_onion_omega2p.dts
@@ -0,0 +1,10 @@
+#include "mt7628an_onion_omega2.dtsi"
+
+/ {
+	compatible = "onion,omega2p", "onion,omega2", "mediatek,mt7628an-soc";
+	model = "Onion Omega2+";
+};
+
+&firmware {
+	reg = <0x50000 0x1fb0000>;
+};
diff --git a/iopsys-ramips/dts/RAK633.dts b/iopsys-ramips/dts/mt7628an_rakwireless_rak633.dts
similarity index 81%
rename from iopsys-ramips/dts/RAK633.dts
rename to iopsys-ramips/dts/mt7628an_rakwireless_rak633.dts
index 8fc54982441a88f004fb6423d66f05d5b80fc6c3..63c4901ec252cc5d8eb3c6286f849d0dd023ddab 100644
--- a/iopsys-ramips/dts/RAK633.dts
+++ b/iopsys-ramips/dts/mt7628an_rakwireless_rak633.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7628an.dtsi"
 
@@ -10,27 +9,20 @@
 	compatible = "rakwireless,rak633", "mediatek,mt7628an-soc";
 	model = "Rakwireless RAK633";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "rak633:blue:wifi";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "blue:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		wled_an {
-			ralink,group = "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	wled_an {
+		groups = "wled_an";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7628an_ravpower_rp-wd009.dts b/iopsys-ramips/dts/mt7628an_ravpower_rp-wd009.dts
new file mode 100644
index 0000000000000000000000000000000000000000..6962651e1b1ae6506082cf634c32bce25a4981a2
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_ravpower_rp-wd009.dts
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "ravpower,rp-wd009", "mediatek,mt7628an-soc";
+	model = "RAVPower RP-WD009";
+
+	aliases {
+		led-boot = &led_globe;
+		led-failsafe = &led_globe;
+		led-running = &led_globe;
+		led-upgrade = &led_globe;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_globe: globe {
+			label = "white:globe";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2 {
+			label = "white:wlan2";
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5 {
+			label = "white:wlan5";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		sd_white {
+			label = "white:sd";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		sd_red {
+			label = "red:sd";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		/* Power interrupt on Pin 39 */
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		backup {
+			label = "backup";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_COPY>;
+		};
+	};
+};
+
+&gpio {
+	mt7610-power {
+		gpio-hog;
+		gpios = <20 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "mt7610-power";
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart1", "wled_an", "p0led_an", "p2led_an", "p3led_an",
+				"p4led_an", "uart2", "pwm0", "i2s";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&i2c {
+	status = "okay";
+
+	/* Custom PMIC at 0x0a */
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5470000 6000000>;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "loader";
+				reg = <0x50000 0x180000>;
+			};
+
+			partition@1d0000 {
+				label = "params";
+				reg = <0x1d0000 0x10000>;
+				read-only;
+			};
+
+			partition@1e0000 {
+				label = "user_backup";
+				reg = <0x1e0000 0x10000>;
+				read-only;
+			};
+
+			partition@1f0000 {
+				label = "user";
+				reg = <0x1f0000 0x10000>;
+				read-only;
+			};
+
+			partition@200000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x200000 0xdf0000>;
+			};
+
+			partition@ff0000 {
+				label = "mode";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&wmac {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+};
diff --git a/iopsys-ramips/dts/SKW92A.dts b/iopsys-ramips/dts/mt7628an_skylab_skw92a.dts
similarity index 67%
rename from iopsys-ramips/dts/SKW92A.dts
rename to iopsys-ramips/dts/mt7628an_skylab_skw92a.dts
index dddb794a8f69bc9e288ca72f21fc1fdf814b9241..6e1cb396b8942c1ad7ac7106fbcaf5178d525293 100644
--- a/iopsys-ramips/dts/SKW92A.dts
+++ b/iopsys-ramips/dts/mt7628an_skylab_skw92a.dts
@@ -1,12 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-/{
+/ {
 	compatible = "skylab,skw92a", "mediatek,mt7628an-soc";
 	model = "SKYLAB SKW92A";
 
@@ -15,47 +14,35 @@
 		led-failsafe = &led_power;
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_power: wps {
-			label = "skw92a:green:wps";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "skw92a:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wdt", "refclk", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wdt", "refclk", "wled_an";
+		function = "gpio";
 	};
 };
 
@@ -65,7 +52,6 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &spi0 {
@@ -111,11 +97,3 @@
 &uart1 {
 	status = "okay";
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/W06.dts b/iopsys-ramips/dts/mt7628an_tama_w06.dts
similarity index 66%
rename from iopsys-ramips/dts/W06.dts
rename to iopsys-ramips/dts/mt7628an_tama_w06.dts
index 55b117c19423deba85ab002fc984b9229611e829..2be5f3fc88928fcfd57b502c067697687cdcdecf 100644
--- a/iopsys-ramips/dts/W06.dts
+++ b/iopsys-ramips/dts/mt7628an_tama_w06.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,67 +7,51 @@
 	compatible = "tama,w06", "mediatek,mt7628an-soc";
 	model = "Tama W06";
 
-	memory@0{
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		wps {
-			label = "w06:green:wps";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "w06:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		wireless {
-			label = "w06:green:wlan";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&ehci {
-	status = "okay";
-};
-
 &ethernet {
 	mtd-mac-address = <&factory 0x28>;
 };
 
-&ohci {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart1", "p0led_an", "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uart1", "p0led_an", "wdt";
+		function = "gpio";
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/mt7628an_totolink_a3.dts b/iopsys-ramips/dts/mt7628an_totolink_a3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..246dfadddd897c20da39eb9dd12316b16fc26624
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_totolink_a3.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_iptime.dtsi"
+
+/ {
+	compatible = "totolink,a3", "mediatek,mt7628an-soc";
+	model = "TOTOLINK A3";
+
+	aliases {
+		led-boot = &led_cpu;
+		led-failsafe = &led_cpu;
+		led-running = &led_cpu;
+		led-upgrade = &led_cpu;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_cpu: cpu {
+			label = "blue:cpu";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "blue:wlan";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+	mediatek,portdisable = <0x32>;
+};
diff --git a/iopsys-ramips/dts/TOTOLINK-LR1200.dts b/iopsys-ramips/dts/mt7628an_totolink_lr1200.dts
similarity index 61%
rename from iopsys-ramips/dts/TOTOLINK-LR1200.dts
rename to iopsys-ramips/dts/mt7628an_totolink_lr1200.dts
index 70bbfd2272ad62151da30db92aa5447976125a06..ab5fdd32469e21c02b8d15e09cfe1839f5d0cf33 100644
--- a/iopsys-ramips/dts/TOTOLINK-LR1200.dts
+++ b/iopsys-ramips/dts/mt7628an_totolink_lr1200.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "mt7628an.dtsi"
 
@@ -17,80 +16,80 @@
 		led-upgrade = &led_sys;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_sys: sys {
-			label = "lr1200:blue:sys";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "blue:sys";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
+
 		sms {
-			label = "lr1200:blue:sms";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "blue:sms";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
+
 		wifi {
-			label = "lr1200:blue:wifi";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "blue:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
+
 		3g {
-			label = "lr1200:blue:3g";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "blue:3g";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 		};
+
 		4g {
-			label = "lr1200:blue:4g";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+			label = "blue:4g";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
 		};
+
 		rssi1 {
-			label = "lr1200:blue:rssi1";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			label = "blue:rssi1";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 		};
+
 		rssi2 {
-			label = "lr1200:blue:rssi2";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "blue:rssi2";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 		};
+
 		rssi3 {
-			label = "lr1200:blue:rssi3";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			label = "blue:rssi3";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
 		};
+
 		rssi4 {
-			label = "lr1200:blue:rssi4";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			label = "blue:rssi4";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&gpio1 {
+&gpio {
 	gpio_modem_reset {
 		gpio-hog;
-		gpios = <13 GPIO_ACTIVE_HIGH>;
+		gpios = <45 GPIO_ACTIVE_HIGH>;
 		output-high;
 		line-name = "modem-reset";
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio", "i2c", "i2s", "refclk", "uart1", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio", "i2c", "i2s", "refclk", "uart1", "wdt", "wled_an";
+		function = "gpio";
 	};
 };
 
@@ -117,7 +116,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
diff --git a/iopsys-ramips/dts/TPLINK-8M-SPLIT-UBOOT.dtsi b/iopsys-ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
similarity index 90%
rename from iopsys-ramips/dts/TPLINK-8M-SPLIT-UBOOT.dtsi
rename to iopsys-ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
index ff98da79fa56f36f81896f3eb9bf07de0e8335a2..b6ce7b1f562dd2a54932f393c889b1bec7ef5a76 100644
--- a/iopsys-ramips/dts/TPLINK-8M-SPLIT-UBOOT.dtsi
+++ b/iopsys-ramips/dts/mt7628an_tplink_8m-split-uboot.dtsi
@@ -1,14 +1,17 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
 #include "mt7628an.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
 / {
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
+	aliases {
+		label-mac-device = &ethernet;
 	};
 };
 
@@ -69,14 +72,6 @@
 	};
 };
 
-&ehci {
-	status = "disabled";
-};
-
-&ohci {
-	status = "disabled";
-};
-
 &wmac {
 	status = "okay";
 	mtd-mac-address = <&rom 0xf100>;
diff --git a/iopsys-ramips/dts/TPLINK-8M.dtsi b/iopsys-ramips/dts/mt7628an_tplink_8m.dtsi
similarity index 86%
rename from iopsys-ramips/dts/TPLINK-8M.dtsi
rename to iopsys-ramips/dts/mt7628an_tplink_8m.dtsi
index 8ae75ab50687609ce0e5e995bf59e66f13ffcd71..2faf8a87fe0cee81af5b33989e5f0f3e2876acf4 100644
--- a/iopsys-ramips/dts/TPLINK-8M.dtsi
+++ b/iopsys-ramips/dts/mt7628an_tplink_8m.dtsi
@@ -1,20 +1,22 @@
 #include "mt7628an.dtsi"
 
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
 / {
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
+	aliases {
+		label-mac-device = &ethernet;
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -51,14 +53,6 @@
 	};
 };
 
-&ehci {
-	status = "disabled";
-};
-
-&ohci {
-	status = "disabled";
-};
-
 &wmac {
 	status = "okay";
 	mtd-mac-address = <&factory 0xf100>;
diff --git a/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v4.dts b/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..58743db6b4d4c88c9162b4efd3164e0c36deb828
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v4.dts
@@ -0,0 +1,107 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,archer-c20-v4", "mediatek,mt7628an-soc";
+	model = "TP-Link Archer C20 v4";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&wmac {
+	mtd-mac-address-increment = <(-2)>;
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&state_default {
+	gpio {
+		groups = "i2s", "gpio", "refclk", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x28000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&factory 0xf100>;
+		mtd-mac-address-increment = <(-1)>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v5.dts b/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..d76ce34ca9a39b7ef3f203997783369c3413c7fe
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_archer-c20-v5.dts
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_8m-split-uboot.dtsi"
+
+/ {
+	compatible = "tplink,archer-c20-v5", "mediatek,mt7628an-soc";
+	model = "TP-Link Archer C20 v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "i2s", "gpio", "refclk", "p0led_an", "p1led_an",
+					"p2led_an", "p3led_an", "p4led_an", "wdt";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&rom 0xf100>;
+		mtd-mac-address-increment = <(-1)>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v3.dts b/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4966d56a68fe58f74dbb07e8814dacb3daa51dba
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v3.dts
@@ -0,0 +1,102 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,archer-c50-v3", "mediatek,mt7628an-soc";
+	model = "TP-Link Archer C50 v3";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5 {
+			label = "green:wlan5g";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "gpio", "p0led_an", "p1led_an", "p2led_an",
+				   "p3led_an", "p4led_an", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x28000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&factory 0xf100>;
+		mtd-mac-address-increment = <(-1)>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v4.dts b/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..11bf903531b0b6b9ef993325a2206a725c686156
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_archer-c50-v4.dts
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_8m-split-uboot.dtsi"
+
+/ {
+	compatible = "tplink,archer-c50-v4", "mediatek,mt7628an-soc";
+	model = "TP-Link Archer C50 v4";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2 {
+			label = "green:wlan2g";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5 {
+			label = "green:wlan5g";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "p0led_an", "p1led_an", "p2led_an",
+				   "p3led_an", "p4led_an", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&rom 0xf100>;
+		mtd-mac-address-increment = <(-1)>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re200-v2.dts b/iopsys-ramips/dts/mt7628an_tplink_re200-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a7e5e5110d4a4e34443458fa733647d8c3c7f305
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re200-v2.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_re200.dtsi"
+
+/ {
+	compatible = "tplink,re200-v2", "mediatek,mt7628an-soc";
+	model = "TP-Link RE200 v2";
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re200-v3.dts b/iopsys-ramips/dts/mt7628an_tplink_re200-v3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..2c4e09ee2ea91795933281f5487e7ee4969a5ed8
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re200-v3.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_re200.dtsi"
+
+/ {
+	compatible = "tplink,re200-v3", "mediatek,mt7628an-soc";
+	model = "TP-Link RE200 v3";
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re200-v4.dts b/iopsys-ramips/dts/mt7628an_tplink_re200-v4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..83f1f3accadb97345549f375cf747514dc5fa419
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re200-v4.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_re200.dtsi"
+
+/ {
+	compatible = "tplink,re200-v4", "mediatek,mt7628an-soc";
+	model = "TP-Link RE200 v4";
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re200.dtsi b/iopsys-ramips/dts/mt7628an_tplink_re200.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..95addff3c02652e95f31095da49a5ffc4b7237a4
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re200.dtsi
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		label-mac-device = &ethernet;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600n8";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			label = "green:wifi";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi2g_green {
+			label = "green:wifi2g";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi5g_green {
+			label = "green:wifi5g";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wifi2g_red {
+			label = "red:wifi2g";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi5g_red {
+			label = "red:wifi5g";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0x7a0000>;
+			};
+
+			config: partition@7c0000 {
+				label = "config";
+				reg = <0x7c0000 0x30000>;
+				read-only;
+			};
+
+			radio: partition@7f0000 {
+				label = "radio";
+				reg = <0x7f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "p4led_an", "p3led_an", "p2led_an", "p1led_an",
+				"p0led_an", "wled_an", "i2c", "wdt", "refclk";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&config 0x2008>;
+};
+
+&wmac {
+	status = "okay";
+
+	mediatek,mtd-eeprom = <&radio 0x0>;
+	mtd-mac-address = <&config 0x2008>;
+	mtd-mac-address-increment = <1>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&config 0x2008>;
+		mtd-mac-address-increment = <2>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re220-v2.dts b/iopsys-ramips/dts/mt7628an_tplink_re220-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..82d385a24d78e3af55bc7ec41c2ee3ae99f44531
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re220-v2.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_re200.dtsi"
+
+/ {
+	compatible = "tplink,re220-v2", "mediatek,mt7628an-soc";
+	model = "TP-Link RE220 v2";
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_re305-v1.dts b/iopsys-ramips/dts/mt7628an_tplink_re305-v1.dts
new file mode 100644
index 0000000000000000000000000000000000000000..22e15eb7a1a812362567970c120414de59fa0777
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_re305-v1.dts
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,re305-v1", "mediatek,mt7628an-soc";
+	model = "TP-Link RE305 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "blue:wlan2g";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5g {
+			label = "blue:wlan5g";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		rssi1 {
+			label = "red:rssi";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi2 {
+			label = "blue:rssi";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0x5e0000>;
+			};
+
+			config: partition@600000 {
+				label = "config";
+				reg = <0x600000 0x50000>;
+				read-only;
+			};
+
+			/*
+				The flash space between 0x650000 and 0x7f0000 is blank in the
+				stock firmware so it is left out as well.
+			*/
+
+			radio: partition@7f0000 {
+				label = "radio";
+				reg = <0x7f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "refclk", "wdt", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&config 0x10008>;
+		mtd-mac-address-increment = <2>;
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	mediatek,mtd-eeprom = <&radio 0x0>;
+	mtd-mac-address = <&config 0x10008>;
+	mtd-mac-address-increment = <1>;
+};
+
+&ethernet {
+	mtd-mac-address = <&config 0x10008>;
+};
diff --git a/iopsys-ramips/dts/TL-MR3020V3.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-mr3020-v3.dts
similarity index 65%
rename from iopsys-ramips/dts/TL-MR3020V3.dts
rename to iopsys-ramips/dts/mt7628an_tplink_tl-mr3020-v3.dts
index 361754bced7c800ddd136397b5e89f4df37fa3ad..5bc12758d4ef2158c1847d305858f66adb807758 100644
--- a/iopsys-ramips/dts/TL-MR3020V3.dts
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-mr3020-v3.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,30 +18,24 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		modec1 {
 			label = "sw1";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 
 		modec2 {
 			label = "sw2";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_1>;
 		};
 	};
@@ -52,32 +44,32 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "tl-mr3020-v3:green:power";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		wan {
-			label = "tl-mr3020-v3:green:3g";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "green:3g";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ehci_port1>, <&ohci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wlan {
-			label = "tl-mr3020-v3:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
 		wps {
-			label = "tl-mr3020-v3:green:wps";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "tl-mr3020-v3:green:lan";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "green:lan";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -85,7 +77,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -122,20 +114,10 @@
 	};
 };
 
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2s", "refclk", "wdt", "p2led_an", "p1led_an", "p0led_an", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2s", "refclk", "wdt", "p2led_an", "p1led_an", "p0led_an", "wled_an";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-mr3420-v5.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-mr3420-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..173b4cddcad1752dcad09b6cc52d368c9b62a074
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-mr3420-v5.dts
@@ -0,0 +1,81 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-mr3420-v5", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-MR3420 v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_amber {
+			label = "amber:wan";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "i2s", "p2led_an", "refclk", "uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v4.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a142be78703e03f82ec31223e3e390220b873ba6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v4.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-mr6400-v4", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-MR6400 v4";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "white:power";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "white:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "white:wlan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		lan {
+			label = "white:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		signal1 {
+			label = "white:signal1";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		signal2 {
+			label = "white:signal2";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		signal3 {
+			label = "white:signal3";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "refclk", "uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+	mediatek,portdisable = <0x21>;
+};
+
+&wmac {
+	mtd-mac-address = <&factory 0x1f100>;
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x1f100>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v5.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..7ab19632e8c576bc23774179038e59d20fd0aeaa
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-mr6400-v5.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-mr6400-v5", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-MR6400 v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wlan {
+			label = "white:wlan";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		lan {
+			label = "white:lan";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "white:power";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "white:wan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		signal1 {
+			label = "white:signal1";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		signal2 {
+			label = "white:signal2";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		signal3 {
+			label = "white:signal3";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "uart1", "wdt";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x37>;
+	mediatek,portdisable = <0x30>;
+};
+
+&wmac {
+	mtd-mac-address = <&factory 0x1f100>;
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x1f100>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wa801nd-v5.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wa801nd-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..de9a48445adc00663a5df6557db9ef621cbfd8e7
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wa801nd-v5.dts
@@ -0,0 +1,75 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wa801nd-v5", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WA801ND v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wps_red {
+			label = "red:wps";
+			gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
+		};
+
+		wps_green {
+			label = "green:wps";
+			gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "perst", "refclk",
+				"uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/TL-WR802NV4.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr802n-v4.dts
similarity index 55%
rename from iopsys-ramips/dts/TL-WR802NV4.dts
rename to iopsys-ramips/dts/mt7628an_tplink_tl-wr802n-v4.dts
index c1324212e8d3dcf75f9c430493b8417ffbd56dc5..bce34045c6e0cbec6c8ea943e02e46fdf647c7bb 100644
--- a/iopsys-ramips/dts/TL-WR802NV4.dts
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr802n-v4.dts
@@ -1,10 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
-#include "TPLINK-8M.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "mt7628an_tplink_8m.dtsi"
 
 / {
 	compatible = "tplink,tl-wr802n-v4", "mediatek,mt7628an-soc";
@@ -18,12 +14,11 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -32,18 +27,24 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "tl-wr802n-v4:green:power";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "refclk", "wdt";
-			ralink,function = "gpio";
-		};
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "refclk", "wdt";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v4.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v4.dts
new file mode 100644
index 0000000000000000000000000000000000000000..8a8ba81ec309c3e0192a44a18dfbcde6cc4dfe21
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v4.dts
@@ -0,0 +1,71 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wr840n-v4", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR840N v4";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p2led_an", "perst", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
diff --git a/iopsys-ramips/dts/TL-WR840NV5.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v5.dts
similarity index 72%
rename from iopsys-ramips/dts/TL-WR840NV5.dts
rename to iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v5.dts
index 849d264723917b2b047d5d21c23ea91eb53bbd22..1f8f7f4babc88f579a6a45fa38a201807365b576 100644
--- a/iopsys-ramips/dts/TL-WR840NV5.dts
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr840n-v5.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,33 +18,28 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
+
 	/* LED used is dual-color,dual lead LED */
 	leds {
 		compatible = "gpio-leds";
 
 		led_power_green: power {
-			label = "tl-wr840n-v5:green:power";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 
 		orange {
-			label = "tl-wr840n-v5:orange:power";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "orange:power";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -54,7 +47,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -96,7 +89,6 @@
 &wmac {
 	status = "okay";
 	mtd-mac-address = <&factory 0xf100>;
-	mediatek,mtd-eeprom = <&factory 0x0>;
 };
 
 &ethernet {
@@ -107,11 +99,9 @@
 	mediatek,portmap = <0x3e>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "p2led_an", "perst";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "p0led_an", "p2led_an", "perst";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v13.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v13.dts
new file mode 100644
index 0000000000000000000000000000000000000000..5c7f9836b6a9ae0808658d9d2416a94069fb138c
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v13.dts
@@ -0,0 +1,97 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wr841n-v13", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR841N v13";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+		};
+
+		lan1 {
+			label = "green:lan1";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2 {
+			label = "green:lan2";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3 {
+			label = "green:lan3";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4 {
+			label = "green:lan4";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "perst", "refclk", "uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v14.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v14.dts
new file mode 100644
index 0000000000000000000000000000000000000000..a1a83bf2377434e61526d2f92c51ddcbe64cb02a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr841n-v14.dts
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,tl-wr841n-v14", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR841N v14";
+
+	aliases {
+		led-boot = &led_wlan;
+		led-failsafe = &led_wlan;
+		led-upgrade = &led_wlan;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_green {
+			label = "green:wan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wlan: wlan {
+			label = "green:wlan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wan_orange {
+			label = "orange:wan";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "boot";
+				reg = <0x0 0x10000>;
+				read-only;
+			};
+
+			partition@10000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x10000 0x3e0000>;
+			};
+
+			factory: partition@3f0000 {
+				label = "factory";
+				reg = <0x3f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&wmac {
+	status = "okay";
+
+	mtd-mac-address = <&factory 0xf100>;
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0xf100>;
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&state_default {
+	gpio {
+		groups = "p4led_an", "p3led_an", "p2led_an", "p1led_an", "p0led_an", "wdt";
+		function = "gpio";
+	};
+};
+
+&gpio {
+	led_wlan_enable {
+		gpio-hog;
+		gpios = <43 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr842n-v5.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr842n-v5.dts
new file mode 100644
index 0000000000000000000000000000000000000000..9077ec00cecfba40b35ee73c148dd96d888f47c1
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr842n-v5.dts
@@ -0,0 +1,81 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wr842n-v5", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR842N v5";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_amber {
+			label = "amber:wan";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "i2s", "p2led_an", "refclk", "uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr850n-v2.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr850n-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..7abeae9c07b69492b0b04c5ed4ff87af6369b2b6
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr850n-v2.dts
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wr850n-v2", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR850N v2";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&state_default {
+	gpio {
+		groups = "p0led_an", "p2led_an", "perst", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_tplink_tl-wr902ac-v3.dts b/iopsys-ramips/dts/mt7628an_tplink_tl-wr902ac-v3.dts
new file mode 100644
index 0000000000000000000000000000000000000000..77a68acf340af5e1c56fffcb115f018295e4dc6b
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_tplink_tl-wr902ac-v3.dts
@@ -0,0 +1,98 @@
+#include "mt7628an_tplink_8m.dtsi"
+
+/ {
+	compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
+	model = "TP-Link TL-WR902AC v3";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		sw1 {
+			label = "sw1";
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+
+		sw2 {
+			label = "sw2";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "i2s", "p0led_an", "p2led_an", "p4led_an", "uart1", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x28000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&factory 0xf100>;
+		mtd-mac-address-increment = <(-1)>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_unielec_u7628-01-16m.dts b/iopsys-ramips/dts/mt7628an_unielec_u7628-01-16m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c25a31f0abcbaa2f327c2d61b17c44570f3b5685
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_unielec_u7628-01-16m.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7628an_unielec_u7628-01.dtsi"
+
+/ {
+	compatible = "unielec,u7628-01-16m", "unielec,u7628-01", "mediatek,mt7628an-soc";
+	model = "UniElec U7628-01 (16M flash)";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <12000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_unielec_u7628-01.dtsi b/iopsys-ramips/dts/mt7628an_unielec_u7628-01.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..f0a6b1df5de769981ea9d8fdf06079500d8549da
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_unielec_u7628-01.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
+ *  Copyright(c) 2017 Piotr Dymacz <pepe2k@gmail.com>.
+ *  All rights reserved.
+ */
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "unielec,u7628-01", "mediatek,mt7628an-soc";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			label = "green:wlan";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		lan1 {
+			label = "green:lan1";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2 {
+			label = "green:lan2";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3 {
+			label = "green:lan3";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4 {
+			label = "green:lan4";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&wmac {
+	status = "okay";
+};
+
+&state_default {
+	gpio {
+		groups = "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
diff --git a/iopsys-ramips/dts/VOCORE2LITE.dts b/iopsys-ramips/dts/mt7628an_vocore_vocore2-lite.dts
similarity index 77%
rename from iopsys-ramips/dts/VOCORE2LITE.dts
rename to iopsys-ramips/dts/mt7628an_vocore_vocore2-lite.dts
index db45a95a810559c68f0bd1fc0bb8ff5b3e957e33..f8bdc27c4c6ff2fff25e0c73948a4499c1b0950c 100644
--- a/iopsys-ramips/dts/VOCORE2LITE.dts
+++ b/iopsys-ramips/dts/mt7628an_vocore_vocore2-lite.dts
@@ -1,11 +1,7 @@
-/dts-v1/;
-
-#include "VOCORE2.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
+#include "mt7628an_vocore_vocore2.dtsi"
 
 / {
-	compatible = "vocore,vocore2lite", "vocore,vocore2", "mediatek,mt7628an-soc";
+	compatible = "vocore,vocore2-lite", "vocore,vocore2", "mediatek,mt7628an-soc";
 	model = "VoCore2-Lite";
 
 	aliases {
@@ -19,8 +15,8 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "vocore2lite:green:status";
-			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+			label = "green:status";
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -28,7 +24,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/VOCORE2.dts b/iopsys-ramips/dts/mt7628an_vocore_vocore2.dts
similarity index 84%
rename from iopsys-ramips/dts/VOCORE2.dts
rename to iopsys-ramips/dts/mt7628an_vocore_vocore2.dts
index a78d2cc733e054ccc2760b285e3fbc6164f513bf..f4bb8720d313ef91a0cbf9116eaa33f0979af83b 100644
--- a/iopsys-ramips/dts/VOCORE2.dts
+++ b/iopsys-ramips/dts/mt7628an_vocore_vocore2.dts
@@ -1,8 +1,4 @@
-/dts-v1/;
-
-#include "VOCORE2.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
+#include "mt7628an_vocore_vocore2.dtsi"
 
 / {
 	compatible = "vocore,vocore2", "mediatek,mt7628an-soc";
@@ -19,8 +15,8 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "vocore2:fuchsia:status";
-			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+			label = "fuchsia:status";
+			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -28,7 +24,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/VOCORE2.dtsi b/iopsys-ramips/dts/mt7628an_vocore_vocore2.dtsi
similarity index 73%
rename from iopsys-ramips/dts/VOCORE2.dtsi
rename to iopsys-ramips/dts/mt7628an_vocore_vocore2.dtsi
index 4e32ed5a35c51acca8adfdf2d516977ed4d604ec..bffcdf67c61e632d27ce02afb2094c1102330b91 100644
--- a/iopsys-ramips/dts/VOCORE2.dtsi
+++ b/iopsys-ramips/dts/mt7628an_vocore_vocore2.dtsi
@@ -1,20 +1,23 @@
 #include "mt7628an.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+
 / {
 	compatible = "vocore,vocore2", "mediatek,mt7628an-soc";
 
+	aliases {
+		label-mac-device = &wmac;
+	};
+
 	chosen {
 		bootargs = "console=ttyS2,115200";
 	};
 };
 
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "wled_an", "refclk", "wdt";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "wled_an", "refclk", "wdt";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WL-WN570HA1.dts b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn570ha1.dts
similarity index 62%
rename from iopsys-ramips/dts/WL-WN570HA1.dts
rename to iopsys-ramips/dts/mt7628an_wavlink_wl-wn570ha1.dts
index 3336a383415a00360477adafde4d128ba6bcbd91..9cea8b43f3bf478403223fc08cc23cedc3bbe7d2 100644
--- a/iopsys-ramips/dts/WL-WN570HA1.dts
+++ b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn570ha1.dts
@@ -1,29 +1,18 @@
-/dts-v1/;
+#include "mt7628an.dtsi"
+
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>
 
-#include "mt7628an.dtsi"
-
 / {
 	compatible = "wavlink,wl-wn570ha1", "mediatek,mt7628an-soc";
 	model = "Wavlink WL-WN570HA1";
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -32,44 +21,42 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "wl-wn570ha1:green:power";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		wan {
-			label = "wl-wn570ha1:green:wan";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "green:wan";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi-high {
-			label = "wl-wn570ha1:green:wifi-high";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-high";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi-med {
-			label = "wl-wn570ha1:green:wifi-med";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-med";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi-low {
-			label = "wl-wn570ha1:green:wifi-low";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-low";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "wl-wn570ha1:green:wifi";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wifi";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "wled_an", "p0led_an", "wdt", "refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "wled_an", "p0led_an", "wdt", "refclk";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WL-WN575A3.dts b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn575a3.dts
similarity index 65%
rename from iopsys-ramips/dts/WL-WN575A3.dts
rename to iopsys-ramips/dts/mt7628an_wavlink_wl-wn575a3.dts
index 8cadd7e427f18115f696ec18309cbf3ebd1d4685..d6d418f1b9f91c31ec3ad139bf54900b9078e43e 100644
--- a/iopsys-ramips/dts/WL-WN575A3.dts
+++ b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn575a3.dts
@@ -1,35 +1,24 @@
-/dts-v1/;
+#include "mt7628an.dtsi"
+
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>
 
-#include "mt7628an.dtsi"
-
 / {
 	compatible = "wavlink,wl-wn575a3", "mediatek,mt7628an-soc";
 	model = "Wavlink WL-WN575A3";
 
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -38,33 +27,31 @@
 		compatible = "gpio-leds";
 
 		wifi-high {
-			label = "wl-wn575a3:green:wifi-high";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-high";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi-med {
-			label = "wl-wn575a3:green:wifi-med";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-med";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi-low {
-			label = "wl-wn575a3:green:wifi-low";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wifi-low";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "wl-wn575a3:green:wps";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "wled_an", "gpio", "refclk", "wdt", "p0led_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "wled_an", "gpio", "refclk", "wdt", "p0led_an";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/mt7628an_wavlink_wl-wn577a2.dts b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn577a2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..b5f8ff03a80d610220d24e0920a409e2fa6c9ebd
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_wavlink_wl-wn577a2.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "wavlink,wl-wn577a2", "maginon,wlr-755", "mediatek,mt7628an-soc";
+	model = "WAVLINK WL-WN577A2";
+
+	aliases {
+		led-boot = &led_wps;
+		led-failsafe = &led_wps;
+		led-running = &led_wps;
+		led-upgrade = &led_wps;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			label = "green:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wps: wps {
+			label = "green:wps";
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "wdt", "p0led_an", "p3led_an", "p4led_an";
+		function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&wmac {
+	status = "okay";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+};
+
+&usbphy {
+	status = "disabled";
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
diff --git a/iopsys-ramips/dts/WIDORA-NEO-16M.dts b/iopsys-ramips/dts/mt7628an_widora_neo-16m.dts
similarity index 94%
rename from iopsys-ramips/dts/WIDORA-NEO-16M.dts
rename to iopsys-ramips/dts/mt7628an_widora_neo-16m.dts
index 9ed6b15334395e48e73a7b59d8d9cc9a303ae5bf..c6bd640a6d48ae55a41bcacb769a5782b25f8bca 100644
--- a/iopsys-ramips/dts/WIDORA-NEO-16M.dts
+++ b/iopsys-ramips/dts/mt7628an_widora_neo-16m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WIDORA-NEO.dtsi"
+#include "mt7628an_widora_neo.dtsi"
 
 / {
 	compatible = "widora,neo-16m", "widora,neo", "mediatek,mt7628an-soc";
@@ -13,7 +11,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
diff --git a/iopsys-ramips/dts/WIDORA-NEO-32M.dts b/iopsys-ramips/dts/mt7628an_widora_neo-32m.dts
similarity index 94%
rename from iopsys-ramips/dts/WIDORA-NEO-32M.dts
rename to iopsys-ramips/dts/mt7628an_widora_neo-32m.dts
index cfd6ba709cece493f45268990d6f95658f75521c..adc74e6643ce8bc91552b600e9d0665cce192460 100644
--- a/iopsys-ramips/dts/WIDORA-NEO-32M.dts
+++ b/iopsys-ramips/dts/mt7628an_widora_neo-32m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WIDORA-NEO.dtsi"
+#include "mt7628an_widora_neo.dtsi"
 
 / {
 	compatible = "widora,neo-32m", "widora,neo", "mediatek,mt7628an-soc";
@@ -13,7 +11,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
diff --git a/iopsys-ramips/dts/WIDORA-NEO.dtsi b/iopsys-ramips/dts/mt7628an_widora_neo.dtsi
similarity index 54%
rename from iopsys-ramips/dts/WIDORA-NEO.dtsi
rename to iopsys-ramips/dts/mt7628an_widora_neo.dtsi
index af3a1b1a1e978b20c01af0fb76f522bb6f5a9625..4c60ad95aaae384a55a75e3ad498ad1538968789 100644
--- a/iopsys-ramips/dts/WIDORA-NEO.dtsi
+++ b/iopsys-ramips/dts/mt7628an_widora_neo.dtsi
@@ -17,28 +17,22 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "widora:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&wgpio 0 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		wps {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -52,47 +46,45 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio";
+		function = "gpio";
+	};
 
-		perst {
-			ralink,group = "perst";
-			ralink,function = "gpio";
-		};
+	perst {
+		groups = "perst";
+		function = "gpio";
+	};
 
-		refclk {
-			ralink,group = "refclk";
-			ralink,function = "gpio";
-		};
+	refclk {
+		groups = "refclk";
+		function = "gpio";
+	};
 
-		i2s {
-			ralink,group = "i2s";
-			ralink,function = "gpio";
-		};
+	i2s {
+		groups = "i2s";
+		function = "gpio";
+	};
 
-		spis {
-			ralink,group = "spis";
-			ralink,function = "gpio";
-		};
+	spis {
+		groups = "spis";
+		function = "gpio";
+	};
 
-		wled_kn {
-			ralink,group = "wled_kn";
-			ralink,function = "gpio";
-		};
+	wled_kn {
+		groups = "wled_kn";
+		function = "gpio";
+	};
 
-		wled_an {
-			ralink,group = "wled_an";
-			ralink,function = "wled_an";
-		};
+	wled_an {
+		groups = "wled_an";
+		function = "wled_an";
+	};
 
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
+	wdt {
+		groups = "wdt";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WIZFI630S.dts b/iopsys-ramips/dts/mt7628an_wiznet_wizfi630s.dts
similarity index 61%
rename from iopsys-ramips/dts/WIZFI630S.dts
rename to iopsys-ramips/dts/mt7628an_wiznet_wizfi630s.dts
index 13c8f68f151d9f13d594a5e3747cb690b8ec400a..1246651204420d5d76a99f1f0aa2d26458e32550 100644
--- a/iopsys-ramips/dts/WIZFI630S.dts
+++ b/iopsys-ramips/dts/mt7628an_wiznet_wizfi630s.dts
@@ -1,5 +1,4 @@
-//SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include "mt7628an.dtsi"
 
@@ -14,11 +13,6 @@
 		bootargs = "console=ttyS1,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	aliases {
 		led-boot = &led_run;
 		led-failsafe = &led_run;
@@ -32,93 +26,67 @@
 		compatible = "gpio-leds";
 
 		led_run: run {
-			label = "wizfi630s:green:run";
-			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+			label = "green:run";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
 		};
 
 		ledwps {
-			label = "wizfi630s:green:wps";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "green:wps";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		leduart1 {
-			label = "wizfi630s:green:uart1";
-			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			label = "green:uart1";
+			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
 		};
 
 		leduart2 {
-			label = "wizfi630s:green:uart2";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "green:uart2";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
+		compatible = "gpio-keys";
+
 		#address-cells = <1>;
 		#size-cells = <0>;
-		poll-interval = <20>;
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		scm1 {
 			label = "SCM1";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_1>;
+			linux,input-type = <EV_SW>;
 		};
 
 		scm2 {
 			label = "SCM2";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_2>;
+			linux,input-type = <EV_SW>;
 		};
-
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
-
-		i2s {
-			ralink,group = "i2s";
-			ralink,function = "gpio";
-		};
-
-		wdt {
-			ralink,group = "wdt";
-			ralink,function = "gpio";
-		};
-
-
-		i2c {
-			ralink,group = "i2c";
-			ralink,function = "gpio";
-		};
-
-		refclk {
-			ralink,group = "refclk";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio", "i2s", "i2c", "wdt", "refclk", "p1led_an", "p2led_an";
+		function = "gpio";
 	};
 };
 
-&wmac {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
@@ -129,7 +97,6 @@
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <40000000>;
-		m25p,chunked-io = <31>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -163,11 +130,11 @@
 	};
 };
 
-&i2c {
+&uart1 {
 	status = "okay";
 };
 
-&uart1 {
+&uart2 {
 	status = "okay";
 };
 
@@ -176,11 +143,12 @@
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x28>;
+	mtd-mac-address = <&factory 0x2e>;
 };
 
 &esw {
 	mediatek,portmap = <0x3e>;
+	mediatek,portdisable = <0x26>;
 };
 
 &sdhci {
diff --git a/iopsys-ramips/dts/WRTNODE2.dtsi b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi
similarity index 82%
rename from iopsys-ramips/dts/WRTNODE2.dtsi
rename to iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi
index 471533b48de4e5846cea84f6b8d362e2d888c63b..a3330fb2ebd9760a1dbfc37663538ae9f0d0d16a 100644
--- a/iopsys-ramips/dts/WRTNODE2.dtsi
+++ b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi
@@ -11,12 +11,11 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -25,7 +24,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -60,14 +59,6 @@
 			};
 		};
 	};
-
-	spidev@1 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "linux,spidev";
-		reg = <1>;
-		spi-max-frequency = <10000000>;
-	};
 };
 
 &uart1 {
diff --git a/iopsys-ramips/dts/WRTNODE2P.dts b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2p.dts
similarity index 59%
rename from iopsys-ramips/dts/WRTNODE2P.dts
rename to iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2p.dts
index cd668d601eb42f9462d069a24792c03cd2870738..88ec3f0c306446987b32c816b50049cf71882133 100644
--- a/iopsys-ramips/dts/WRTNODE2P.dts
+++ b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2p.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WRTNODE2.dtsi"
+#include "mt7628an_wrtnode_wrtnode2.dtsi"
 
 / {
 	compatible = "wrtnode,wrtnode2p", "wrtnode,wrtnode2", "mediatek,mt7628an-soc";
@@ -17,17 +15,15 @@
 		compatible = "gpio-leds";
 
 		led_indicator: indicator {
-			label = "wrtnode:blue:indicator";
-			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			label = "blue:indicator";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "gpio";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/WRTNODE2R.dts b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2r.dts
similarity index 54%
rename from iopsys-ramips/dts/WRTNODE2R.dts
rename to iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2r.dts
index bfe533c0c36a07b3e4483b207ac6cf6f6e1ec314..511354ae5e9562c039303999dda0c252723aefe2 100644
--- a/iopsys-ramips/dts/WRTNODE2R.dts
+++ b/iopsys-ramips/dts/mt7628an_wrtnode_wrtnode2r.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WRTNODE2.dtsi"
+#include "mt7628an_wrtnode_wrtnode2.dtsi"
 
 / {
 	compatible = "wrtnode,wrtnode2r", "wrtnode,wrtnode2", "mediatek,mt7628an-soc";
@@ -20,24 +18,34 @@
 		pinctrl-0 = <&led_pins>;
 
 		led_indicator: indicator {
-			label = "wrtnode:blue:indicator";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "blue:indicator";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio";
+		function = "gpio";
 	};
+};
 
+&pinctrl {
 	led_pins: led {
 		gpio {
-			ralink,group = "wled_an";
-			ralink,function = "gpio";
+			groups = "wled_an";
+			function = "gpio";
 		};
 	};
 };
+
+&spi0 {
+	spidev@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "linux,spidev";
+		reg = <1>;
+		spi-max-frequency = <10000000>;
+	};
+};
diff --git a/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4.dtsi b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..0f5897f5c593b844400f946b6c746596d3e08b93
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4.dtsi
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	aliases {
+		led-boot = &led_power_yellow;
+		led-failsafe = &led_power_yellow;
+		led-running = &led_power_blue;
+		led-upgrade = &led_power_yellow;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_blue: power_blue {
+			label = "blue:power";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_yellow: power_yellow {
+			label = "yellow:power";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash0: flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bootloader";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				label = "config";
+				reg = <0x20000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@30000 {
+				label = "factory";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "crash";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "cfg_bak";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+
+			/* additional partitions in DTS */
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "gpio", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4a-100m.dts b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4a-100m.dts
new file mode 100644
index 0000000000000000000000000000000000000000..37797fc368cb1c5545a74f0ecc4cfcde717c6dbb
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4a-100m.dts
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_xiaomi_mi-router-4.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-4a-100m", "mediatek,mt7628an-soc";
+	model = "Xiaomi Mi Router 4A (100M Edition)";
+};
+
+&partitions {
+	partition@60000 {
+		label = "overlay";
+		reg = <0x60000 0x100000>;
+		read-only;
+	};
+
+	partition@160000 {
+		label = "firmware";
+		reg = <0x160000 0xea0000>;
+		compatible = "denx,uimage";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x4>;
+	mtd-mac-address-increment = <(-1)>;
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+	mediatek,portdisable = <0x2a>;
+};
diff --git a/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4c.dts b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4c.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4389a9daf4c9b08f352afd7c665ffaf10578ef4a
--- /dev/null
+++ b/iopsys-ramips/dts/mt7628an_xiaomi_mi-router-4c.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an_xiaomi_mi-router-4.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-4c", "mediatek,mt7628an-soc";
+	model = "Xiaomi Mi Router 4C";
+
+	aliases {
+		label-mac-device = &ethernet;
+	};
+};
+
+&flash0 {
+	spi-max-frequency = <40000000>;
+};
+
+&partitions {
+	partition@60000 {
+		label = "overlay";
+		reg = <0x60000 0x100000>;
+		read-only;
+	};
+
+	partition@160000 {
+		label = "firmware";
+		reg = <0x160000 0xea0000>;
+		compatible = "denx,uimage";
+	};
+};
+
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	mediatek,portmap = <0x3d>;
+	mediatek,portdisable = <0x29>;
+};
diff --git a/iopsys-ramips/dts/MIWIFI-NANO.dts b/iopsys-ramips/dts/mt7628an_xiaomi_miwifi-nano.dts
similarity index 55%
rename from iopsys-ramips/dts/MIWIFI-NANO.dts
rename to iopsys-ramips/dts/mt7628an_xiaomi_miwifi-nano.dts
index 210c00cfb954386472785de0f9cf0ad76227c59a..ae6a72ebc3f726c95c2e4b102364cee7592d8d15 100644
--- a/iopsys-ramips/dts/MIWIFI-NANO.dts
+++ b/iopsys-ramips/dts/mt7628an_xiaomi_miwifi-nano.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,62 +5,70 @@
 
 / {
 	compatible = "xiaomi,miwifi-nano", "mediatek,mt7628an-soc";
-	model = "MiWiFi Nano";
+	model = "Xiaomi MiWiFi Nano";
 
 	aliases {
-		led-boot = &led_blue;
-		led-failsafe = &led_blue;
-		led-running = &led_blue;
-		led-upgrade = &led_blue;
+		led-boot = &led_status_amber;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_amber;
+		label-mac-device = &ethernet;
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
-		led_blue: status_blue {
-			label = "miwifi-nano:blue:status";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		led_status_blue: status_blue {
+			label = "blue:status";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 		};
-		status_red {
-			label = "miwifi-nano:red:status";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+
+		led_status_red: status_red {
+			label = "red:status";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
-		status_amber {
-			label = "miwifi-nano:amber:status";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+
+		led_status_amber: status_amber {
+			label = "amber:status";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "refclk", "wled_an", "gpio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio", "refclk", "wdt", "wled_an";
+		function = "gpio";
 	};
 };
 
+&ehci {
+	status = "disabled";
+};
+
+&ohci {
+	status = "disabled";
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+	mediatek,portdisable = <0x2a>;
+};
+
 &wmac {
 	status = "okay";
 };
@@ -74,10 +80,10 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <40000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
@@ -93,7 +99,6 @@
 			partition@30000 {
 				label = "u-boot-env";
 				reg = <0x30000 0x10000>;
-				read-only;
 			};
 
 			factory: partition@40000 {
diff --git a/iopsys-ramips/dts/ZBT-WE1226.dts b/iopsys-ramips/dts/mt7628an_zbtlink_zbt-we1226.dts
similarity index 67%
rename from iopsys-ramips/dts/ZBT-WE1226.dts
rename to iopsys-ramips/dts/mt7628an_zbtlink_zbt-we1226.dts
index 52de96b5547946b48e8017eb56dc1eecd1be29b4..ac2a01eabaf833309c7d852bc850082e2a3dfd38 100644
--- a/iopsys-ramips/dts/ZBT-WE1226.dts
+++ b/iopsys-ramips/dts/mt7628an_zbtlink_zbt-we1226.dts
@@ -1,9 +1,8 @@
-/dts-v1/;
+#include "mt7628an.dtsi"
+
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>
 
-#include "mt7628an.dtsi"
-
 / {
 	compatible = "zbtlink,zbt-we1226", "mediatek,mt7628an-soc";
 	model = "Zbtlink ZBT-WE1226";
@@ -19,18 +18,12 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x4000000>;
-	};
-
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -39,40 +32,38 @@
 		compatible = "gpio-leds";
 
 		wan {
-			label = "zbt-we1226:green:wan";
-			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+			label = "green:wan";
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
 		};
 
 		lan1 {
-			label = "zbt-we1226:green:lan1";
-			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+			label = "green:lan1";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
 		};
 
 		lan2 {
-			label = "zbt-we1226:green:lan2";
-			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+			label = "green:lan2";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wlan: wlan {
-			label = "zbt-we1226:green:wlan";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:wlan";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "p0led_an", "p1led_an", "p4led_an", "wdt", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "p0led_an", "p1led_an", "p4led_an", "wdt", "wled_an";
+		function = "gpio";
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ki_rb.dts b/iopsys-ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts
similarity index 73%
rename from iopsys-ramips/dts/ki_rb.dts
rename to iopsys-ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts
index 7a647f96c9fa695905994ecf6306028d5d806f25..5e92cd2126133d6a7bf4e47fbd7f9c9578ed06d8 100644
--- a/iopsys-ramips/dts/ki_rb.dts
+++ b/iopsys-ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7628an.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,34 +14,28 @@
 		led-upgrade = &led_power;
 	};
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,57600n8";
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 
 		fn {
 			label = "fn";
-			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+			gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
 			linux,code = <BTN_0>;
 		};
 	};
@@ -52,24 +44,24 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "keenetic-extra-ii:green:power";
-			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			label = "green:power";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 			default-state = "keep";
 		};
 
 		internet {
-			label = "keenetic-extra-ii:green:internet";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+			label = "green:internet";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "keenetic-extra-ii:green:wifi";
-			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			label = "green:wifi";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "keenetic-extra-ii:green:usb";
-			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			label = "green:usb";
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
@@ -82,7 +74,7 @@
 		usbpower {
 			gpio-export,name = "usbpower";
 			gpio-export,output = <1>;
-			gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
@@ -90,7 +82,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -113,7 +105,7 @@
 			};
 
 			factory: partition@40000 {
-				label = "rf-eeprom";
+				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
 			};
@@ -175,14 +167,6 @@
 	};
 };
 
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
 };
@@ -193,7 +177,6 @@
 
 &wmac {
 	status = "okay";
-	mediatek,mtd-eeprom = <&factory 0x0>;
 };
 
 &pcie {
@@ -205,15 +188,12 @@
 		reg = <0x0000 0 0 0 0>;
 		mediatek,mtd-eeprom = <&factory 0x8000>;
 		ieee80211-freq-limit = <5000000 6000000>;
-		mtd-mac-address = <&factory 0x8004>;
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "gpio", "i2s", "refclk", "spi cs1", "uart1", "wled_an";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "gpio", "i2s", "refclk", "spi cs1", "uart1", "wled_an";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/rt2880.dtsi b/iopsys-ramips/dts/rt2880.dtsi
index 762fe49e7c3a34a81ab9bbc575e23a82a170cbdd..092b37a0c2bdb6086a8866df388ef2f646d866d8 100644
--- a/iopsys-ramips/dts/rt2880.dtsi
+++ b/iopsys-ramips/dts/rt2880.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -80,7 +82,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -94,7 +96,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -110,7 +112,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <32>;
+			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -153,29 +155,29 @@
 
 		state_default: pinctrl0 {
 			sdram {
-				ralink,group = "sdram";
-				ralink,function = "sdram";
+				groups = "sdram";
+				function = "sdram";
 			};
 		};
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/AR670W.dts b/iopsys-ramips/dts/rt2880_airlink101_ar670w.dts
similarity index 86%
rename from iopsys-ramips/dts/AR670W.dts
rename to iopsys-ramips/dts/rt2880_airlink101_ar670w.dts
index 96e4a8cbe26ed2054dd837d2338c99404a3888f1..9d78ca142c31f1cc65491e3d52664cda54d3b353 100644
--- a/iopsys-ramips/dts/AR670W.dts
+++ b/iopsys-ramips/dts/rt2880_airlink101_ar670w.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@bdc00000 {
+	flash@bdc00000 {
 		compatible = "cfi-flash";
 		reg = <0xbc400000 0x800000>;
 		bank-width = <2>;
@@ -50,12 +48,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "ar670w:green:power";
+			label = "green:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wpsblue {
-			label = "ar670w:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -78,16 +76,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "uartlite";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "uartlite";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/AR725W.dts b/iopsys-ramips/dts/rt2880_airlink101_ar725w.dts
similarity index 84%
rename from iopsys-ramips/dts/AR725W.dts
rename to iopsys-ramips/dts/rt2880_airlink101_ar725w.dts
index 5e3782ac28292a522c310e98e362916339ce7ea8..7038fc6590b45455ff43fb3cf777507a6168c508 100644
--- a/iopsys-ramips/dts/AR725W.dts
+++ b/iopsys-ramips/dts/rt2880_airlink101_ar725w.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@bdc00000 {
+	flash@bdc00000 {
 		compatible = "cfi-flash";
 		reg = <0xbc400000 0x800000>;
 		bank-width = <2>;
@@ -55,17 +53,17 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "ar725w:green:power";
+			label = "green:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
 		};
 
 		wpsred {
-			label = "ar725w:red:wps";
+			label = "red:wps";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		wpsblue {
-			label = "ar725w:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -88,16 +86,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "uartlite";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "uartlite";
+		function = "gpio";
 	};
 };
 
@@ -122,5 +114,5 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/RT-N15.dts b/iopsys-ramips/dts/rt2880_asus_rt-n15.dts
similarity index 87%
rename from iopsys-ramips/dts/RT-N15.dts
rename to iopsys-ramips/dts/rt2880_asus_rt-n15.dts
index 4ed6c1ed45f931a62de66776ca299ee602438dbe..4b832faaf1bce9353b6cec939231dc127a736152 100644
--- a/iopsys-ramips/dts/RT-N15.dts
+++ b/iopsys-ramips/dts/rt2880_asus_rt-n15.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -18,7 +16,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -82,22 +80,16 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "rt-n15:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartlite", "mdio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartlite", "mdio";
+		function = "gpio";
 	};
 };
 
@@ -120,5 +112,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/F5D8235_V1.dts b/iopsys-ramips/dts/rt2880_belkin_f5d8235-v1.dts
similarity index 83%
rename from iopsys-ramips/dts/F5D8235_V1.dts
rename to iopsys-ramips/dts/rt2880_belkin_f5d8235-v1.dts
index 04728c582ee394f9d1a7cd497679ae6d6beeccc7..cbaa3e832f65a7f1a9d1516ed82d896eab197d51 100644
--- a/iopsys-ramips/dts/F5D8235_V1.dts
+++ b/iopsys-ramips/dts/rt2880_belkin_f5d8235-v1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-failsafe = &led_wired_blue;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0xbc400000 0x800000>;
 		bank-width = <2>;
@@ -121,84 +119,78 @@
 		compatible = "gpio-leds";
 
 		internet {
-			label = "f5d8235-v1:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 
 		internet2 {
-			label = "f5d8235-v1:amber:internet";
+			label = "amber:internet";
 			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
 		};
 
 		modem {
-			label = "f5d8235-v1:blue:modem";
+			label = "blue:modem";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		modem2 {
-			label = "f5d8235-v1:amber:modem";
+			label = "amber:modem";
 			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 		};
 
 		router {
-			label = "f5d8235-v1:blue:router";
+			label = "blue:router";
 			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
 		};
 
 		storage {
-			label = "f5d8235-v1:blue:storage";
+			label = "blue:storage";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		storage2 {
-			label = "f5d8235-v1:amber:storage";
+			label = "amber:storage";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		security {
-			label = "f5d8235-v1:blue:security";
+			label = "blue:security";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		security2 {
-			label = "f5d8235-v1:amber:security";
+			label = "amber:security";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wired_blue: wired {
-			label = "f5d8235-v1:blue:wired";
+			label = "blue:wired";
 			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 		};
 
 		wired2 {
-			label = "f5d8235-v1:amber:wired";
+			label = "amber:wired";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		wireless {
-			label = "f5d8235-v1:blue:wireless";
+			label = "blue:wireless";
 			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 		};
 
 		wireless2 {
-			label = "f5d8235-v1:amber:wireless";
+			label = "amber:wireless";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "mdio", "uartlite";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "mdio", "uartlite";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WLI-TX4-AG300N.dts b/iopsys-ramips/dts/rt2880_buffalo_wli-tx4-ag300n.dts
similarity index 89%
rename from iopsys-ramips/dts/WLI-TX4-AG300N.dts
rename to iopsys-ramips/dts/rt2880_buffalo_wli-tx4-ag300n.dts
index dcd30eb60ff96d3b6d93cd835e41acea3c2189ce..a1f10ae45da38834abca2b71ec83d92a2833c5d5 100644
--- a/iopsys-ramips/dts/WLI-TX4-AG300N.dts
+++ b/iopsys-ramips/dts/rt2880_buffalo_wli-tx4-ag300n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -18,7 +16,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -82,26 +80,22 @@
 		compatible = "gpio-leds";
 
 		diag {
-			label = "wli-tx4-ag300n:red:diag";
+			label = "red:diag";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "wli-tx4-ag300n:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		security {
-			label = "wli-tx4-ag300n:blue:security";
+			label = "blue:security";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &ethernet {
 	status = "okay";
 	mtd-mac-address = <&factory 0x4>;
@@ -121,5 +115,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WZR-AGL300NH.dts b/iopsys-ramips/dts/rt2880_buffalo_wzr-agl300nh.dts
similarity index 84%
rename from iopsys-ramips/dts/WZR-AGL300NH.dts
rename to iopsys-ramips/dts/rt2880_buffalo_wzr-agl300nh.dts
index c6a90d426a3d2b7624c0c7433d5eb4c6764ed1eb..cd9e918404f46d81be7631864186e59657fcdf2a 100644
--- a/iopsys-ramips/dts/WZR-AGL300NH.dts
+++ b/iopsys-ramips/dts/rt2880_buffalo_wzr-agl300nh.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -18,7 +16,7 @@
 		led-upgrade = &led_router;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -88,37 +86,31 @@
 		compatible = "gpio-leds";
 
 		led_router: router {
-			label = "wzr-agl300nh:green:router";
+			label = "green:router";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		diag {
-			label = "wzr-agl300nh:red:diag";
+			label = "red:diag";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		security_g {
-			label = "wzr-agl300nh:orange:security_g";
+			label = "orange:security_g";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		security_n {
-			label = "wzr-agl300nh:orange:security_n";
+			label = "orange:security_n";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartlite", "mdio";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartlite", "mdio";
+		function = "gpio";
 	};
 };
 
@@ -145,5 +137,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DAP-1522-A1.dts b/iopsys-ramips/dts/rt2880_dlink_dap-1522-a1.dts
similarity index 86%
rename from iopsys-ramips/dts/DAP-1522-A1.dts
rename to iopsys-ramips/dts/rt2880_dlink_dap-1522-a1.dts
index 56e3990bfe4e87f2e51da6888c4782977c981c98..3de9dc755c784da3c2f0074516a4a6c38dea234c 100644
--- a/iopsys-ramips/dts/DAP-1522-A1.dts
+++ b/iopsys-ramips/dts/rt2880_dlink_dap-1522-a1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	cfi@bc400000 {
+	flash@bc400000 {
 		compatible = "cfi-flash";
 		reg = <0xbc400000 0x800000>;
 		bank-width = <2>;
@@ -88,41 +86,35 @@
 		compatible = "gpio-leds";
 
 		wps {
-			label = "dap-1522-a1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
 		};
 
 		ap {
-			label = "dap-1522-a1:blue:ap";
+			label = "blue:ap";
 			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
 		};
 
 		sta {
-			label = "dap-1522-a1:red:sta";
+			label = "red:sta";
 			gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "dap-1522-a1:blue:status";
+			label = "blue:status";
 			gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio2 {
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartlite", "pci";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartlite", "pci";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/V11STFE.dts b/iopsys-ramips/dts/rt2880_ralink_v11st-fe.dts
similarity index 90%
rename from iopsys-ramips/dts/V11STFE.dts
rename to iopsys-ramips/dts/rt2880_ralink_v11st-fe.dts
index 5007f271bba38530f4dd93d322fe2877cfbe9f04..39045bf0267806ee6ba066ebabf7bbce7f30165a 100644
--- a/iopsys-ramips/dts/V11STFE.dts
+++ b/iopsys-ramips/dts/rt2880_ralink_v11st-fe.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt2880.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -67,16 +65,12 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "v11st-fe:green:status";
+			label = "green:status";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &ethernet {
 	status = "okay";
 };
@@ -86,5 +80,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/rt3050.dtsi b/iopsys-ramips/dts/rt3050.dtsi
index 84ddb061e6abc8db76e19f826072a14ffeaac533..847c2169f08e3c747b5229f9e00aa246f7e38ea3 100644
--- a/iopsys-ramips/dts/rt3050.dtsi
+++ b/iopsys-ramips/dts/rt3050.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -109,7 +111,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -129,7 +131,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -145,7 +147,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <12>;
+			ralink,num-gpios = <12>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -245,36 +247,36 @@
 
 		state_default: pinctrl0 {
 			sdram {
-				ralink,group = "sdram";
-				ralink,function = "sdram";
+				groups = "sdram";
+				function = "sdram";
 			};
 		};
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		rgmii_pins: rgmii {
 			rgmii {
-				ralink,group = "rgmii";
-				ralink,function = "rgmii";
+				groups = "rgmii";
+				function = "rgmii";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/CARAMBOLA.dts b/iopsys-ramips/dts/rt3050_8devices_carambola.dts
similarity index 84%
rename from iopsys-ramips/dts/CARAMBOLA.dts
rename to iopsys-ramips/dts/rt3050_8devices_carambola.dts
index aaaea8fd4edccb7e7c4c799f11e08460088f5ead..4ad23ff26da7a2e4552924ae89abf188f06f5900 100644
--- a/iopsys-ramips/dts/CARAMBOLA.dts
+++ b/iopsys-ramips/dts/rt3050_8devices_carambola.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,7 +11,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -75,7 +71,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/ALL0256N-4M.dts b/iopsys-ramips/dts/rt3050_allnet_all0256n-4m.dts
similarity index 89%
rename from iopsys-ramips/dts/ALL0256N-4M.dts
rename to iopsys-ramips/dts/rt3050_allnet_all0256n-4m.dts
index 60421a4229092f152570b05a43152715dac25fca..efb96da57a9584f45425427fd8300150e006fb87 100644
--- a/iopsys-ramips/dts/ALL0256N-4M.dts
+++ b/iopsys-ramips/dts/rt3050_allnet_all0256n-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "ALL0256N.dtsi"
+#include "rt3050_allnet_all0256n.dtsi"
 
 / {
 	compatible = "allnet,all0256n-4m", "allnet,all0256n", "ralink,rt3050-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -41,7 +39,7 @@
 			partition@50000 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x50000 0x3c8000>;
+				reg = <0x50000 0x3b0000>;
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/ALL0256N-8M.dts b/iopsys-ramips/dts/rt3050_allnet_all0256n-8m.dts
similarity index 93%
rename from iopsys-ramips/dts/ALL0256N-8M.dts
rename to iopsys-ramips/dts/rt3050_allnet_all0256n-8m.dts
index 3832d1a7d3c3733b3c09ad4df39cc1af9ad86e38..866d9a9b35539ddb837610010e0444efa9bb2ecb 100644
--- a/iopsys-ramips/dts/ALL0256N-8M.dts
+++ b/iopsys-ramips/dts/rt3050_allnet_all0256n-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "ALL0256N.dtsi"
+#include "rt3050_allnet_all0256n.dtsi"
 
 / {
 	compatible = "allnet,all0256n-8m", "allnet,all0256n", "ralink,rt3050-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ALL0256N.dtsi b/iopsys-ramips/dts/rt3050_allnet_all0256n.dtsi
similarity index 67%
rename from iopsys-ramips/dts/ALL0256N.dtsi
rename to iopsys-ramips/dts/rt3050_allnet_all0256n.dtsi
index d31547c33528cc1d4468a72281d687ac34c71319..7458165bc44c2f7afa11f3b080e82f1d16d88cc0 100644
--- a/iopsys-ramips/dts/ALL0256N.dtsi
+++ b/iopsys-ramips/dts/rt3050_allnet_all0256n.dtsi
@@ -10,17 +10,17 @@
 		compatible = "gpio-leds";
 
 		rssilow {
-			label = "all0256n:green:rssilow";
+			label = "green:rssilow";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		rssimed {
-			label = "all0256n:green:rssimed";
+			label = "green:rssimed";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		rssihigh {
-			label = "all0256n:green:rssihigh";
+			label = "green:rssihigh";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -37,16 +37,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -59,5 +53,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/ASL26555-16M.dts b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555-16m.dts
similarity index 94%
rename from iopsys-ramips/dts/ASL26555-16M.dts
rename to iopsys-ramips/dts/rt3050_alphanetworks_asl26555-16m.dts
index fce92ff0f378e130528a72e749af61dcab8d7ff6..9cc29d0afd5d94b4fc4c3b298b3e6fda96d7f1e4 100644
--- a/iopsys-ramips/dts/ASL26555-16M.dts
+++ b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555-16m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "ASL26555.dtsi"
+#include "rt3050_alphanetworks_asl26555.dtsi"
 
 / {
 	compatible = "alphanetworks,asl26555-16m", "alphanetworks,asl26555", "ralink,rt3050-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ASL26555-8M.dts b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555-8m.dts
similarity index 94%
rename from iopsys-ramips/dts/ASL26555-8M.dts
rename to iopsys-ramips/dts/rt3050_alphanetworks_asl26555-8m.dts
index 8411990be9dcbfb938aba6d92832a341186814f4..c5465b4812efa538acc33f72adfc0676a2ab31ce 100644
--- a/iopsys-ramips/dts/ASL26555-8M.dts
+++ b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "ASL26555.dtsi"
+#include "rt3050_alphanetworks_asl26555.dtsi"
 
 / {
 	compatible = "alphanetworks,asl26555-8m", "alphanetworks,asl26555", "ralink,rt3050-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/ASL26555.dtsi b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555.dtsi
similarity index 76%
rename from iopsys-ramips/dts/ASL26555.dtsi
rename to iopsys-ramips/dts/rt3050_alphanetworks_asl26555.dtsi
index d1c21f8082a5fe540eb10173b0c7b3cb01612fae..028238a3d2a7829b1e6cf28021586530aea304dc 100644
--- a/iopsys-ramips/dts/ASL26555.dtsi
+++ b/iopsys-ramips/dts/rt3050_alphanetworks_asl26555.dtsi
@@ -34,59 +34,53 @@
 		compatible = "gpio-leds";
 
 		eth {
-			label = "asl26555:green:eth";
+			label = "green:eth";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wan-red {
-			label = "asl26555:red:wan";
+			label = "red:wan";
 			gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 		};
 
 		wan-green {
-			label = "asl26555:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
 		};
 
 		wlan {
-			label = "asl26555:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_power_green: power-green {
-			label = "asl26555:green:power";
+			label = "green:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
 		};
 
 		power-red {
-			label = "asl26555:red:power";
+			label = "red:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 		};
 
 		3g-green {
-			label = "asl26555:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		3g-red {
-			label = "asl26555:red:3g";
+			label = "red:3g";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/FREESTATION5.dts b/iopsys-ramips/dts/rt3050_arcwireless_freestation5.dts
similarity index 83%
rename from iopsys-ramips/dts/FREESTATION5.dts
rename to iopsys-ramips/dts/rt3050_arcwireless_freestation5.dts
index b924229a7e092e8cf657dcfc4b244b5f565f46ea..44b2ad4185edef4f49b24fcbb0ac6ceb54fcecab 100644
--- a/iopsys-ramips/dts/FREESTATION5.dts
+++ b/iopsys-ramips/dts/rt3050_arcwireless_freestation5.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,7 +11,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -72,28 +70,26 @@
 		 * not present in the Freestation5 device.
 		 */
 		wifi {
-			label = "freestation5:unknown:wifi";
+			label = "unknown:wifi";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		powerg {
-			label = "freestation5:unknown:powerg";
+			label = "unknown:powerg";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "freestation5:unknown:usb";
+			label = "unknown:usb";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -106,7 +102,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/RT-G32-B1.dts b/iopsys-ramips/dts/rt3050_asus_rt-g32-b1.dts
similarity index 85%
rename from iopsys-ramips/dts/RT-G32-B1.dts
rename to iopsys-ramips/dts/rt3050_asus_rt-g32-b1.dts
index 8f0544e7ef36dcc6bf461f4554626971a148e263..0baa2feac9445e95ca47550345f8d94022bb7453 100644
--- a/iopsys-ramips/dts/RT-G32-B1.dts
+++ b/iopsys-ramips/dts/rt3050_asus_rt-g32-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -30,7 +28,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -67,12 +65,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -85,5 +81,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&devconf 0>;
+	ralink,mtd-eeprom = <&devconf 0x0>;
 };
diff --git a/iopsys-ramips/dts/RT-N10-PLUS.dts b/iopsys-ramips/dts/rt3050_asus_rt-n10-plus.dts
similarity index 93%
rename from iopsys-ramips/dts/RT-N10-PLUS.dts
rename to iopsys-ramips/dts/rt3050_asus_rt-n10-plus.dts
index 3b77a4ce3c6b80815c74a5eff0b6836182a50a54..5c1975595fec7c4b68c5e6618654e46ee399a8c9 100644
--- a/iopsys-ramips/dts/RT-N10-PLUS.dts
+++ b/iopsys-ramips/dts/rt3050_asus_rt-n10-plus.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,7 +55,7 @@
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "rt-n10-plus:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -89,5 +87,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&devconf 0>;
+	ralink,mtd-eeprom = <&devconf 0x0>;
 };
diff --git a/iopsys-ramips/dts/WL-330N.dts b/iopsys-ramips/dts/rt3050_asus_wl-330n.dts
similarity index 84%
rename from iopsys-ramips/dts/WL-330N.dts
rename to iopsys-ramips/dts/rt3050_asus_wl-330n.dts
index 48a6e3a4cff7a1c08dc22f0c6de4cbf3ea4a8b35..cc6cd382460a94da0002f355cc64527ff6968e8d 100644
--- a/iopsys-ramips/dts/WL-330N.dts
+++ b/iopsys-ramips/dts/rt3050_asus_wl-330n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		link {
-			label = "wl-330n:blue:link";
+			label = "blue:link";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "wl-330n:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -51,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -88,12 +86,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -106,5 +102,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WL-330N3G.dts b/iopsys-ramips/dts/rt3050_asus_wl-330n3g.dts
similarity index 84%
rename from iopsys-ramips/dts/WL-330N3G.dts
rename to iopsys-ramips/dts/rt3050_asus_wl-330n3g.dts
index 8453147b6b76cd80322feb5e186ffe8ab4c0ece5..c2513c5dd53309656f8baf1ae0ba883becd00995 100644
--- a/iopsys-ramips/dts/WL-330N3G.dts
+++ b/iopsys-ramips/dts/rt3050_asus_wl-330n3g.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,17 +18,17 @@
 		compatible = "gpio-leds";
 
 		3g {
-			label = "wl-330n3g:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		3g2 {
-			label = "wl-330n3g:red:3g";
+			label = "red:3g";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "wl-330n3g:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -56,7 +54,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -93,12 +91,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -111,7 +107,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/DCS-930.dts b/iopsys-ramips/dts/rt3050_dlink_dcs-930.dts
similarity index 83%
rename from iopsys-ramips/dts/DCS-930.dts
rename to iopsys-ramips/dts/rt3050_dlink_dcs-930.dts
index 1c44e28fe4579102fdc403799e10157f5d88c70f..ff01fe2709baa340fe3a3c9be8fb6c2b8e7118a5 100644
--- a/iopsys-ramips/dts/DCS-930.dts
+++ b/iopsys-ramips/dts/rt3050_dlink_dcs-930.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x400000>;
 		bank-width = <2>;
@@ -57,17 +55,17 @@
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "dcs-930:red:alert";
+			label = "red:alert";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "dcs-930:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dcs-930:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -90,12 +88,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -108,7 +104,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/DIR-300-B1.dts b/iopsys-ramips/dts/rt3050_dlink_dir-300-b1.dts
similarity index 81%
rename from iopsys-ramips/dts/DIR-300-B1.dts
rename to iopsys-ramips/dts/rt3050_dlink_dir-300-b1.dts
index 8bc77e422d6f98537cdeb5a91f498480bec399ac..7699dcaabbf2ee676b6a5bead5a5d038e17e321f 100644
--- a/iopsys-ramips/dts/DIR-300-B1.dts
+++ b/iopsys-ramips/dts/rt3050_dlink_dir-300-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status_green;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -39,7 +37,7 @@
 				read-only;
 			};
 
-			factory: partition@40000 {
+			partition@40000 {
 				label = "devconf";
 				reg = <0x40000 0x10000>;
 				read-only;
@@ -74,38 +72,36 @@
 		compatible = "gpio-leds";
 
 		status {
-			label = "dir-300-b1:amber:status";
+			label = "amber:status";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_green: status2 {
-			label = "dir-300-b1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "dir-300-b1:amber:wan";
+			label = "amber:wan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wan2 {
-			label = "dir-300-b1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-300-b1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/DIR-600-B1.dts b/iopsys-ramips/dts/rt3050_dlink_dir-600-b1.dts
similarity index 83%
rename from iopsys-ramips/dts/DIR-600-B1.dts
rename to iopsys-ramips/dts/rt3050_dlink_dir-600-b1.dts
index a77bfd717fc42c6198762933f4bbf2405a201606..21f0a73212e1069effa07efc52e2f256f0501803 100644
--- a/iopsys-ramips/dts/DIR-600-B1.dts
+++ b/iopsys-ramips/dts/rt3050_dlink_dir-600-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status_green;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -74,38 +72,36 @@
 		compatible = "gpio-leds";
 
 		status {
-			label = "dir-600-b1:amber:status";
+			label = "amber:status";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_green: status2 {
-			label = "dir-600-b1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "dir-600-b1:amber:wan";
+			label = "amber:wan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wan2 {
-			label = "dir-600-b1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-600-b1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/DIR-615-D.dts b/iopsys-ramips/dts/rt3050_dlink_dir-615-d.dts
similarity index 77%
rename from iopsys-ramips/dts/DIR-615-D.dts
rename to iopsys-ramips/dts/rt3050_dlink_dir-615-d.dts
index 5f8ea1b224be0d6f5bf3efcc24d78a47aa4a27dc..e84c9d9cb78a6713e53eed2f8d4381880f1ab67f 100644
--- a/iopsys-ramips/dts/DIR-615-D.dts
+++ b/iopsys-ramips/dts/rt3050_dlink_dir-615-d.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "dlink,dir-615-d1", "ralink,rt3050-soc";
+	compatible = "dlink,dir-615-d", "ralink,rt3050-soc";
 	model = "D-Link DIR-615 D";
 
 	aliases {
@@ -14,9 +12,10 @@
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
 		led-upgrade = &led_status_green;
+		label-mac-device = &wmac;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -73,29 +72,29 @@
 	leds {
 		compatible = "gpio-leds";
 
-		status {
-			label = "dir-615-d:amber:status";
+		status_amber {
+			label = "amber:status";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
-		led_status_green: status2 {
-			label = "dir-615-d:green:status";
+		led_status_green: status_green {
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
-		wan {
-			label = "dir-615-d:amber:wan";
+		wan_amber {
+			label = "amber:wan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
-		wan2 {
-			label = "dir-615-d:green:wan";
+		wan_green {
+			label = "green:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-615-d:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -109,13 +108,9 @@
 	ralink,mtd-eeprom = <&devdata 0x4000>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
+		function = "gpio";
 	};
 };
-
-
diff --git a/iopsys-ramips/dts/DIR-620-A1.dts b/iopsys-ramips/dts/rt3050_dlink_dir-620-a1.dts
similarity index 80%
rename from iopsys-ramips/dts/DIR-620-A1.dts
rename to iopsys-ramips/dts/rt3050_dlink_dir-620-a1.dts
index 24fdec8ed4eeda1f66ac86ffc52c01a4c316c0e8..c134803f67070edf9863e297d8f651c7ff804c11 100644
--- a/iopsys-ramips/dts/DIR-620-A1.dts
+++ b/iopsys-ramips/dts/rt3050_dlink_dir-620-a1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status_green;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -74,43 +72,41 @@
 		compatible = "gpio-leds";
 
 		status {
-			label = "dir-620-a1:amber:status";
+			label = "amber:status";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_green: status2 {
-			label = "dir-620-a1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "dir-620-a1:amber:wan";
+			label = "amber:wan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wan2 {
-			label = "dir-620-a1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-620-a1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 		};
 
 		wps2 {
-			label = "dir-620-a1:amber:wps";
+			label = "amber:wps";
 			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -123,7 +119,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/3G-6200N.dts b/iopsys-ramips/dts/rt3050_edimax_3g-6200n.dts
similarity index 80%
rename from iopsys-ramips/dts/3G-6200N.dts
rename to iopsys-ramips/dts/rt3050_edimax_3g-6200n.dts
index 38598122178f4fbcf6b35e53c4d79af97fd44f65..07ff8bc9bc467ec3363e2c6f09548f352477bf8a 100644
--- a/iopsys-ramips/dts/3G-6200N.dts
+++ b/iopsys-ramips/dts/rt3050_edimax_3g-6200n.dts
@@ -1,9 +1,8 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
 	compatible = "edimax,3g-6200n", "ralink,rt3050-soc";
@@ -16,7 +15,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -52,7 +51,9 @@
 			};
 
 			partition@50000 {
-				compatible = "edimax,uimage";
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 				label = "firmware";
 				reg = <0x50000 0x390000>;
 			};
@@ -63,17 +64,17 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "3g-6200n:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "3g-6200n:amber:wlan";
+			label = "amber:wlan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "3g-6200n:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
@@ -98,12 +99,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -116,7 +115,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/3G-6200NL.dts b/iopsys-ramips/dts/rt3050_edimax_3g-6200nl.dts
similarity index 78%
rename from iopsys-ramips/dts/3G-6200NL.dts
rename to iopsys-ramips/dts/rt3050_edimax_3g-6200nl.dts
index 7742561e508f54f4052578d419e205e3ebae3133..f339b7ebe8bd9dad8a297c7ef63b36bb89c51518 100644
--- a/iopsys-ramips/dts/3G-6200NL.dts
+++ b/iopsys-ramips/dts/rt3050_edimax_3g-6200nl.dts
@@ -1,9 +1,8 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
 	compatible = "edimax,3g-6200nl", "ralink,rt3050-soc";
@@ -16,7 +15,7 @@
 		led-upgrade = &led_internet;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -52,7 +51,9 @@
 			};
 
 			partition@50000 {
-				compatible = "edimax,uimage";
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 				label = "firmware";
 				reg = <0x50000 0x390000>;
 			};
@@ -63,12 +64,12 @@
 		compatible = "gpio-leds";
 
 		led_internet: internet {
-			label = "3g-6200nl:green:internet";
+			label = "green:internet";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "3g-6200nl:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -85,12 +86,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,7 +102,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/D105.dts b/iopsys-ramips/dts/rt3050_huawei_d105.dts
similarity index 84%
rename from iopsys-ramips/dts/D105.dts
rename to iopsys-ramips/dts/rt3050_huawei_d105.dts
index 10732cc5ec2bd437b69561e7b1052bb835d8bbce..2784b0c580c5243ad061f731df9341be61a142b2 100644
--- a/iopsys-ramips/dts/D105.dts
+++ b/iopsys-ramips/dts/rt3050_huawei_d105.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "d105:red:power";
+			label = "red:power";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "d105:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
@@ -81,12 +79,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -99,7 +95,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/JHR-N805R.dts b/iopsys-ramips/dts/rt3050_jcg_jhr-n805r.dts
similarity index 85%
rename from iopsys-ramips/dts/JHR-N805R.dts
rename to iopsys-ramips/dts/rt3050_jcg_jhr-n805r.dts
index 702d779aa2d59972b419ef18f3d207ffc1c3a2f6..581edc6dfcd7b161f8763add3a1953af8243d616 100644
--- a/iopsys-ramips/dts/JHR-N805R.dts
+++ b/iopsys-ramips/dts/rt3050_jcg_jhr-n805r.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "jhr-n805r:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -37,19 +35,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -95,5 +91,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/NW718.dts b/iopsys-ramips/dts/rt3050_netcore_nw718.dts
similarity index 84%
rename from iopsys-ramips/dts/NW718.dts
rename to iopsys-ramips/dts/rt3050_netcore_nw718.dts
index 61af498fd89ecb6a3cf3e198749e6ac42c1bec5d..124a2ba13cdfb18c6081abadd0219ebc28100362 100644
--- a/iopsys-ramips/dts/NW718.dts
+++ b/iopsys-ramips/dts/rt3050_netcore_nw718.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,19 +18,19 @@
 		compatible = "gpio-leds";
 
 		led_cpu: cpu {
-			label = "nw718:amber:cpu";
+			label = "amber:cpu";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "nw718:amber:usb";
+			label = "amber:usb";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wps {
-			label = "nw718:amber:wps";
+			label = "amber:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -58,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
@@ -95,12 +93,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -113,7 +109,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/WCR150GN.dts b/iopsys-ramips/dts/rt3050_sparklan_wcr-150gn.dts
similarity index 82%
rename from iopsys-ramips/dts/WCR150GN.dts
rename to iopsys-ramips/dts/rt3050_sparklan_wcr-150gn.dts
index b209676807fcca84c626ed7c6137a9432c2017c5..e4574919061b367f636a96928b9a269a48c2e81a 100644
--- a/iopsys-ramips/dts/WCR150GN.dts
+++ b/iopsys-ramips/dts/rt3050_sparklan_wcr-150gn.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "sparklan,wcr150gn", "ralink,rt3050-soc";
+	compatible = "sparklan,wcr-150gn", "ralink,rt3050-soc";
 	model = "Sparklan WCR-150GN";
 
 	aliases {
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,14 +55,14 @@
 		compatible = "gpio-leds";
 
 		user {
-			label = "wcr-150gn:amber:user";
+			label = "amber:user";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_power: power {
-			label = "wcr-150gn:amber:power";
+			label = "amber:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -87,12 +85,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -105,7 +101,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/RUT5XX.dts b/iopsys-ramips/dts/rt3050_teltonika_rut5xx.dts
similarity index 85%
rename from iopsys-ramips/dts/RUT5XX.dts
rename to iopsys-ramips/dts/rt3050_teltonika_rut5xx.dts
index 52638f94e6f509671b8307168881a6b4d40b223b..742edbb11da4fbcc31003060f0de95c61aa2473e 100644
--- a/iopsys-ramips/dts/RUT5XX.dts
+++ b/iopsys-ramips/dts/rt3050_teltonika_rut5xx.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "rut5xx:green:status";
+			label = "green:status";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -40,7 +38,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -77,12 +75,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -95,7 +91,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/W150M.dts b/iopsys-ramips/dts/rt3050_tenda_w150m.dts
similarity index 79%
rename from iopsys-ramips/dts/W150M.dts
rename to iopsys-ramips/dts/rt3050_tenda_w150m.dts
index e128580ec80b92435ce40e7d9c80999a8ccb711c..2826993a9a4de0b877bfef8c709c03e367a21301 100644
--- a/iopsys-ramips/dts/W150M.dts
+++ b/iopsys-ramips/dts/rt3050_tenda_w150m.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_ap;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -48,7 +46,7 @@
 			partition@50000 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x50000 0x3c8000>;
+				reg = <0x50000 0x3b0000>;
 			};
 		};
 	};
@@ -57,32 +55,32 @@
 		compatible = "gpio-leds";
 
 		3grouter {
-			label = "w150m:blue:3grouter";
+			label = "blue:3grouter";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_ap: ap {
-			label = "w150m:blue:ap";
+			label = "blue:ap";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wisprouter {
-			label = "w150m:blue:wisprouter";
+			label = "blue:wisprouter";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wirelessrouter {
-			label = "w150m:blue:wirelessrouter";
+			label = "blue:wirelessrouter";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "w150m:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wpsreset {
-			label = "w150m:blue:wpsreset";
+			label = "blue:wpsreset";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -105,12 +103,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -123,5 +119,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/TEW-638APB-V2.dts b/iopsys-ramips/dts/rt3050_trendnet_tew-638apb-v2.dts
similarity index 85%
rename from iopsys-ramips/dts/TEW-638APB-V2.dts
rename to iopsys-ramips/dts/rt3050_trendnet_tew-638apb-v2.dts
index a014b32802545080c013c85d5f5f38bfb78c3449..7df592bebd1e71d47c1dd8da550e60389cab7cbc 100644
--- a/iopsys-ramips/dts/TEW-638APB-V2.dts
+++ b/iopsys-ramips/dts/rt3050_trendnet_tew-638apb-v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps_green;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x400000>;
 		bank-width = <2>;
@@ -74,23 +72,21 @@
 		compatible = "gpio-leds";
 
 		wps {
-			label = "tew-638apb-v2:orange:wps";
+			label = "orange:wps";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps_green: wps2 {
-			label = "tew-638apb-v2:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,5 +99,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WR6202.dts b/iopsys-ramips/dts/rt3052_accton_wr6202.dts
similarity index 84%
rename from iopsys-ramips/dts/WR6202.dts
rename to iopsys-ramips/dts/rt3052_accton_wr6202.dts
index 26ec6de8f72ac7ef47ab076cd988fcf5d280c48e..fac721cd7683aeb59333a9d033b98df7426270da 100644
--- a/iopsys-ramips/dts/WR6202.dts
+++ b/iopsys-ramips/dts/rt3052_accton_wr6202.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -7,7 +5,7 @@
 
 / {
 	compatible = "accton,wr6202", "ralink,rt3052-soc";
-	model = "AWB WR6202";
+	model = "Accton WR6202";
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
@@ -17,12 +15,12 @@
 		compatible = "gpio-leds";
 
 		wps {
-			label = "wr6202:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "wr6202:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -44,7 +42,7 @@
 		};
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -93,12 +91,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -111,7 +107,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/W502U.dts b/iopsys-ramips/dts/rt3052_alfa-network_w502u.dts
similarity index 81%
rename from iopsys-ramips/dts/W502U.dts
rename to iopsys-ramips/dts/rt3052_alfa-network_w502u.dts
index a53c47819b47c2225b71684857260650ffd3cd49..d88df8ca25beb95388c379c24e8360f2df6225ff 100644
--- a/iopsys-ramips/dts/W502U.dts
+++ b/iopsys-ramips/dts/rt3052_alfa-network_w502u.dts
@@ -1,13 +1,11 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "alfanetworks,w502u", "ralink,rt3052-soc";
-	model = "ALFA Networks W502U";
+	compatible = "alfa-network,w502u", "ralink,rt3052-soc";
+	model = "ALFA Network W502U";
 
 	aliases {
 		led-boot = &led_wps;
@@ -20,7 +18,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -61,14 +59,14 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "w502u:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_wps: wps {
-			label = "w502u:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -91,12 +89,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -109,7 +105,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/ATP-52B.dts b/iopsys-ramips/dts/rt3052_argus_atp-52b.dts
similarity index 84%
rename from iopsys-ramips/dts/ATP-52B.dts
rename to iopsys-ramips/dts/rt3052_argus_atp-52b.dts
index 2fa5c19d04f388b9ff8c6e8532d783d1c7697677..39afaa582e18942b76f91156b72bcb1e49f2394b 100644
--- a/iopsys-ramips/dts/ATP-52B.dts
+++ b/iopsys-ramips/dts/rt3052_argus_atp-52b.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_run;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -55,12 +53,12 @@
 		compatible = "gpio-leds";
 
 		led_run: run {
-			label = "atp-52b:green:run";
+			label = "green:run";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		net {
-			label = "atp-52b:amber:net";
+			label = "amber:net";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -83,16 +81,13 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
-
 &ethernet {
 	mtd-mac-address = <&factory 0x4>;
 };
@@ -102,7 +97,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/AWAPN2403.dts b/iopsys-ramips/dts/rt3052_asiarf_awapn2403.dts
similarity index 84%
rename from iopsys-ramips/dts/AWAPN2403.dts
rename to iopsys-ramips/dts/rt3052_asiarf_awapn2403.dts
index 97f105a631d436ba77193c8d4eda6d7d86760575..5d73043425b6c68e297a5c926c098b105d8030f6 100644
--- a/iopsys-ramips/dts/AWAPN2403.dts
+++ b/iopsys-ramips/dts/rt3052_asiarf_awapn2403.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,12 +14,11 @@
 		led-upgrade = &led_wps;
 	};
 
-
 	leds {
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "awapn2403:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -41,7 +38,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -78,12 +75,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -92,5 +87,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/RT-N13U.dts b/iopsys-ramips/dts/rt3052_asus_rt-n13u.dts
similarity index 84%
rename from iopsys-ramips/dts/RT-N13U.dts
rename to iopsys-ramips/dts/rt3052_asus_rt-n13u.dts
index c3a3d2346ffb4f412f2037d4f54ac0488d1a16a0..a67a839dccec970bb662a139201b5dcfc99fd53d 100644
--- a/iopsys-ramips/dts/RT-N13U.dts
+++ b/iopsys-ramips/dts/rt3052_asus_rt-n13u.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "rt-n13u:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "rt-n13u:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -85,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,7 +99,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/MR-102N.dts b/iopsys-ramips/dts/rt3052_aximcom_mr-102n.dts
similarity index 85%
rename from iopsys-ramips/dts/MR-102N.dts
rename to iopsys-ramips/dts/rt3052_aximcom_mr-102n.dts
index e290bd60bb90fee7fee606da594078ed1b3b8664..2d5f07746f6af7541d965a9617ad8608c94d7af0 100644
--- a/iopsys-ramips/dts/MR-102N.dts
+++ b/iopsys-ramips/dts/rt3052_aximcom_mr-102n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -67,19 +65,19 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "mr-102n:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		led_status: status {
-			label = "mr-102n:amber:status";
+			label = "amber:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "mr-102n:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -102,12 +100,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -121,10 +117,9 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-
 &otg {
 	status = "okay";
 };
diff --git a/iopsys-ramips/dts/HW550-3G.dts b/iopsys-ramips/dts/rt3052_aztech_hw550-3g.dts
similarity index 84%
rename from iopsys-ramips/dts/HW550-3G.dts
rename to iopsys-ramips/dts/rt3052_aztech_hw550-3g.dts
index 372d18e75e2cbf85cadbf38ca77070ffc7dd031b..f58a519b117ef347bc73a4dcaa43810f45f4744e 100644
--- a/iopsys-ramips/dts/HW550-3G.dts
+++ b/iopsys-ramips/dts/rt3052_aztech_hw550-3g.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,24 +55,24 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "hw550-3g:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		3g {
-			label = "hw550-3g:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "hw550-3g:green:status";
+			label = "green:status";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "hw550-3g:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -103,12 +101,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -121,7 +117,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/F5D8235_V2.dts b/iopsys-ramips/dts/rt3052_belkin_f5d8235-v2.dts
similarity index 81%
rename from iopsys-ramips/dts/F5D8235_V2.dts
rename to iopsys-ramips/dts/rt3052_belkin_f5d8235-v2.dts
index 93725e933699c735eb5684c896de254cabec9f81..a9db2882f3bdc9cfde8d25e3e66e5960b5d936f2 100644
--- a/iopsys-ramips/dts/F5D8235_V2.dts
+++ b/iopsys-ramips/dts/rt3052_belkin_f5d8235-v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_router;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -61,60 +59,58 @@
 		compatible = "gpio-leds";
 
 		internet {
-			label = "f5d8235-v2:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 		};
 
 		internet2 {
-			label = "f5d8235-v2:amber:internet";
+			label = "amber:internet";
 			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 		};
 
 		modem {
-			label = "f5d8235-v2:blue:modem";
+			label = "blue:modem";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		modem2 {
-			label = "f5d8235-v2:amber:modem";
+			label = "amber:modem";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		led_router: router {
-			label = "f5d8235-v2:blue:router";
+			label = "blue:router";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		storage {
-			label = "f5d8235-v2:blue:storage";
+			label = "blue:storage";
 			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		storage2 {
-			label = "f5d8235-v2:amber:storage";
+			label = "amber:storage";
 			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
 		};
 
 		security {
-			label = "f5d8235-v2:blue:security";
+			label = "blue:security";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		security2 {
-			label = "f5d8235-v2:amber:security";
+			label = "amber:security";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WHR-G300N.dts b/iopsys-ramips/dts/rt3052_buffalo_whr-g300n.dts
similarity index 85%
rename from iopsys-ramips/dts/WHR-G300N.dts
rename to iopsys-ramips/dts/rt3052_buffalo_whr-g300n.dts
index 3871b55495aa09d6498e1347df4983854ba1e492..ca6259d30399b3aebad0ed0abf8d67feae6a2692 100644
--- a/iopsys-ramips/dts/WHR-G300N.dts
+++ b/iopsys-ramips/dts/rt3052_buffalo_whr-g300n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -15,7 +13,7 @@
 		led-upgrade = &led_diag;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -62,17 +60,17 @@
 		compatible = "gpio-leds";
 
 		led_diag: diag {
-			label = "whr-g300n:red:diag";
+			label = "red:diag";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		router {
-			label = "whr-g300n:green:router";
+			label = "green:router";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		security {
-			label = "whr-g300n:amber:security";
+			label = "amber:security";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -107,12 +105,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -125,5 +121,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DAP-1350.dts b/iopsys-ramips/dts/rt3052_dlink_dap-1350.dts
similarity index 86%
rename from iopsys-ramips/dts/DAP-1350.dts
rename to iopsys-ramips/dts/rt3052_dlink_dap-1350.dts
index 06d490cacc8030b2daa4ed060591b37ef604d45b..a2584e005e2615b743e0f52cdbb6d35fa0cb3e9d 100644
--- a/iopsys-ramips/dts/DAP-1350.dts
+++ b/iopsys-ramips/dts/rt3052_dlink_dap-1350.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -67,17 +65,17 @@
 		compatible = "gpio-leds";
 
 		led_power_blue: power {
-			label = "dap-1350:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		power2 {
-			label = "dap-1350:red:power";
+			label = "red:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dap-1350:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -112,12 +110,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -130,7 +126,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&devdata 0>;
+	ralink,mtd-eeprom = <&devdata 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/ESR-9753.dts b/iopsys-ramips/dts/rt3052_engenius_esr-9753.dts
similarity index 84%
rename from iopsys-ramips/dts/ESR-9753.dts
rename to iopsys-ramips/dts/rt3052_engenius_esr-9753.dts
index 4b55af0691ca5207e57c4542223bb7809984e44e..4566e7a16688c0ad0da750f7b54fba662034d057 100644
--- a/iopsys-ramips/dts/ESR-9753.dts
+++ b/iopsys-ramips/dts/rt3052_engenius_esr-9753.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "esr-9753:orange:power";
+			label = "orange:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "esr-9753:orange:wps";
+			label = "orange:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -85,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,5 +99,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/FONERA20N.dts b/iopsys-ramips/dts/rt3052_fon_fonera-20n.dts
similarity index 85%
rename from iopsys-ramips/dts/FONERA20N.dts
rename to iopsys-ramips/dts/rt3052_fon_fonera-20n.dts
index 83ce17317497b3b89e1a4d28845a692535bd7c53..9d89c6e2f9ae92f354dcd5deb4159b5e144a9591 100644
--- a/iopsys-ramips/dts/FONERA20N.dts
+++ b/iopsys-ramips/dts/rt3052_fon_fonera-20n.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "fon,fonera20n", "ralink,rt3052-soc";
+	compatible = "fon,fonera-20n", "ralink,rt3052-soc";
 	model = "La Fonera 2.0N";
 
 	aliases {
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,17 +55,17 @@
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "fonera20n:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "fonera20n:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "fonera20n:orange:usb";
+			label = "orange:usb";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
@@ -93,12 +91,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi", "jtag", "mdio", "rgmii", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -149,7 +145,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/BROADWAY.dts b/iopsys-ramips/dts/rt3052_hauppauge_broadway.dts
similarity index 82%
rename from iopsys-ramips/dts/BROADWAY.dts
rename to iopsys-ramips/dts/rt3052_hauppauge_broadway.dts
index 353cfbf415763a8049a2d0548475267009acfb6e..6734f5b3369c34e21254e967e90872ac88bdcf71 100644
--- a/iopsys-ramips/dts/BROADWAY.dts
+++ b/iopsys-ramips/dts/rt3052_hauppauge_broadway.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,7 +7,7 @@
 	compatible = "hauppauge,broadway", "ralink,rt3052-soc";
 	model = "Hauppauge Broadway";
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -50,14 +48,14 @@
 		compatible = "gpio-leds";
 
 		diskmounted {
-			label = "broadway:red:diskmounted";
+			label = "red:diskmounted";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wps_active {
-			label = "broadway:red:wps_active";
+			label = "red:wps_active";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -74,12 +72,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -92,7 +88,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/HG255D.dts b/iopsys-ramips/dts/rt3052_huawei_hg255d.dts
similarity index 83%
rename from iopsys-ramips/dts/HG255D.dts
rename to iopsys-ramips/dts/rt3052_huawei_hg255d.dts
index df8a72c8cb0d2361edcfddda7492d0842c717521..92ea59bc4c6cda2cfd4108e6de2d2fb84f5099e5 100644
--- a/iopsys-ramips/dts/HG255D.dts
+++ b/iopsys-ramips/dts/rt3052_huawei_hg255d.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x1000000>;
 		bank-width = <2>;
@@ -63,34 +61,34 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "hg255d:green:power";
+			label = "green:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "hg255d:green:internet";
+			label = "green:internet";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "hg255d:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "hg255d:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wps {
-			label = "hg255d:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		voice {
-			label = "hg255d:green:voice";
+			label = "green:voice";
 			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -119,12 +117,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -137,7 +133,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/JHR-N825R.dts b/iopsys-ramips/dts/rt3052_jcg_jhr-n825r.dts
similarity index 84%
rename from iopsys-ramips/dts/JHR-N825R.dts
rename to iopsys-ramips/dts/rt3052_jcg_jhr-n825r.dts
index 4c0640b881a6304de226c0f5b55cba86697c0f98..7b71af402fa4d717e3862655627d1118ef465f74 100644
--- a/iopsys-ramips/dts/JHR-N825R.dts
+++ b/iopsys-ramips/dts/rt3052_jcg_jhr-n825r.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_system;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -56,7 +54,7 @@
 	leds {
 		compatible = "gpio-leds";
 		led_system: system {
-			label = "jhr-n825r:red:power";
+			label = "red:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -72,12 +70,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -90,5 +86,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/JHR-N926R.dts b/iopsys-ramips/dts/rt3052_jcg_jhr-n926r.dts
similarity index 85%
rename from iopsys-ramips/dts/JHR-N926R.dts
rename to iopsys-ramips/dts/rt3052_jcg_jhr-n926r.dts
index 9414828594f3250630adaebbfd292c52b5c1bbec..543144394f8d44a1b29d4137a0cefeda95ccb937 100644
--- a/iopsys-ramips/dts/JHR-N926R.dts
+++ b/iopsys-ramips/dts/rt3052_jcg_jhr-n926r.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_system;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,22 +55,22 @@
 		compatible = "gpio-leds";
 
 		wlan1 {
-			label = "jhr-n926r:red:wlan";
+			label = "red:wlan";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan2 {
-			label = "jhr-n926r:yellow:wlan";
+			label = "yellow:wlan";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan3 {
-			label = "jhr-n926r:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 
 		led_system: system {
-			label = "jhr-n926r:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -118,12 +116,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -136,5 +132,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MOFI3500-3GN.dts b/iopsys-ramips/dts/rt3052_mofinetwork_mofi3500-3gn.dts
similarity index 83%
rename from iopsys-ramips/dts/MOFI3500-3GN.dts
rename to iopsys-ramips/dts/rt3052_mofinetwork_mofi3500-3gn.dts
index d20f2d2703efc9f3e84d22e9d8be3a0098c027e1..245f01c79777b0ec0ed78c83f92332858a4b8c87 100644
--- a/iopsys-ramips/dts/MOFI3500-3GN.dts
+++ b/iopsys-ramips/dts/rt3052_mofinetwork_mofi3500-3gn.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_status;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,24 +55,24 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "mofi3500-3gn:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		3g {
-			label = "mofi3500-3gn:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status: status {
-			label = "mofi3500-3gn:green:status";
+			label = "green:status";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "mofi3500-3gn:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -103,12 +101,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -118,7 +114,7 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/WNCE2001.dts b/iopsys-ramips/dts/rt3052_netgear_wnce2001.dts
similarity index 86%
rename from iopsys-ramips/dts/WNCE2001.dts
rename to iopsys-ramips/dts/rt3052_netgear_wnce2001.dts
index 3f0d93d8a4c7248d86649f50d6073f040d343810..e5d70bd803f088082d9361103e5a01bcdd318572 100644
--- a/iopsys-ramips/dts/WNCE2001.dts
+++ b/iopsys-ramips/dts/rt3052_netgear_wnce2001.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,22 +22,22 @@
 		compatible = "gpio-leds";
 
 		led_power_green: power-green {
-			label = "wnce2001:green:power";
+			label = "green:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		power-red {
-			label = "wnce2001:red:power";
+			label = "red:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan-green {
-			label = "wnce2001:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 		};
 
 		wlan-red {
-			label = "wnce2001:red:wlan";
+			label = "red:wlan";
 			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -77,7 +75,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -131,12 +129,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -145,5 +141,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/BC2.dts b/iopsys-ramips/dts/rt3052_nexaira_bc2.dts
similarity index 84%
rename from iopsys-ramips/dts/BC2.dts
rename to iopsys-ramips/dts/rt3052_nexaira_bc2.dts
index 324909e82fcf015f07a2db76dbade6b9a6b52074..d3d5afe64b33bdd49211d5060d4b21cd1dcfa964 100644
--- a/iopsys-ramips/dts/BC2.dts
+++ b/iopsys-ramips/dts/rt3052_nexaira_bc2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,7 +7,7 @@
 	compatible = "nexaira,bc2", "ralink,rt3052-soc";
 	model = "NexAira BC2";
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -50,7 +48,7 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "bc2:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
@@ -69,12 +67,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -87,7 +83,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/MINIEMBWIFI.dts b/iopsys-ramips/dts/rt3052_omnima_miniembwifi.dts
similarity index 83%
rename from iopsys-ramips/dts/MINIEMBWIFI.dts
rename to iopsys-ramips/dts/rt3052_omnima_miniembwifi.dts
index 2f045c7884b47b09417e9141ded59eb155566a57..bc3dd5ee56b5eb8a1ee1bf3434c4906e66a18d4e 100644
--- a/iopsys-ramips/dts/MINIEMBWIFI.dts
+++ b/iopsys-ramips/dts/rt3052_omnima_miniembwifi.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "miniembwifi:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "miniembwifi:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -41,7 +39,7 @@
 		};
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -79,12 +77,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -97,7 +93,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/PSR-680W.dts b/iopsys-ramips/dts/rt3052_petatel_psr-680w.dts
similarity index 85%
rename from iopsys-ramips/dts/PSR-680W.dts
rename to iopsys-ramips/dts/rt3052_petatel_psr-680w.dts
index 260d0a14441956545a4afdc9484598dcba12ddac..b17097cb4595a31df74dc892de9cb1eb442831a6 100644
--- a/iopsys-ramips/dts/PSR-680W.dts
+++ b/iopsys-ramips/dts/rt3052_petatel_psr-680w.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -61,7 +59,7 @@
 		compatible = "gpio-leds";
 
 		led_wan: wan {
-			label = "psr-680w:red:wan";
+			label = "red:wan";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -78,12 +76,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -96,7 +92,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/MZK-W300NH2.dts b/iopsys-ramips/dts/rt3052_planex_mzk-w300nh2.dts
similarity index 84%
rename from iopsys-ramips/dts/MZK-W300NH2.dts
rename to iopsys-ramips/dts/rt3052_planex_mzk-w300nh2.dts
index ab749fc43d3ecb3968dad2b7de4366b0a8861c74..ff199f890b25fe3816781b3f429903c57400c888 100644
--- a/iopsys-ramips/dts/MZK-W300NH2.dts
+++ b/iopsys-ramips/dts/rt3052_planex_mzk-w300nh2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -63,17 +61,17 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "mzk-w300nh2:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "mzk-w300nh2:amber:wlan";
+			label = "amber:wlan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "mzk-w300nh2:amber:wps";
+			label = "amber:wps";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -102,12 +100,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -120,5 +116,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MZK-WDPR.dts b/iopsys-ramips/dts/rt3052_planex_mzk-wdpr.dts
similarity index 85%
rename from iopsys-ramips/dts/MZK-WDPR.dts
rename to iopsys-ramips/dts/rt3052_planex_mzk-wdpr.dts
index 17591268b6ea7535f5df2f0e81e9b5bcd4d93b7e..7f660d61d5e1e5ab8fadf6efe177b00f50c598ee 100644
--- a/iopsys-ramips/dts/MZK-WDPR.dts
+++ b/iopsys-ramips/dts/rt3052_planex_mzk-wdpr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -12,7 +10,7 @@
 		bootargs = "console=ttyS0,115200";
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 
@@ -67,12 +65,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -85,7 +81,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/IP2202.dts b/iopsys-ramips/dts/rt3052_poray_ip2202.dts
similarity index 85%
rename from iopsys-ramips/dts/IP2202.dts
rename to iopsys-ramips/dts/rt3052_poray_ip2202.dts
index 31478da694e8570d08a1465c40499331ab448016..f3dab80073cc9dad934ead73bf3e81ea10915752 100644
--- a/iopsys-ramips/dts/IP2202.dts
+++ b/iopsys-ramips/dts/rt3052_poray_ip2202.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_run;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_run: run {
-			label = "ip2202:green:run";
+			label = "green:run";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		net {
-			label = "ip2202:amber:net";
+			label = "amber:net";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -79,12 +77,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/PWH2004.dts b/iopsys-ramips/dts/rt3052_prolink_pwh2004.dts
similarity index 82%
rename from iopsys-ramips/dts/PWH2004.dts
rename to iopsys-ramips/dts/rt3052_prolink_pwh2004.dts
index 3280c93afbc3eef1b938e7fa2e7e77e99bfabc83..312007c68f07688cac1812fe04065102f25e4543 100644
--- a/iopsys-ramips/dts/PWH2004.dts
+++ b/iopsys-ramips/dts/rt3052_prolink_pwh2004.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "pwh2004:red:wifi";
+			label = "red:wifi";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "pwh2004:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -79,12 +77,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -93,5 +89,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/V22RW-2X2.dts b/iopsys-ramips/dts/rt3052_ralink_v22rw-2x2.dts
similarity index 84%
rename from iopsys-ramips/dts/V22RW-2X2.dts
rename to iopsys-ramips/dts/rt3052_ralink_v22rw-2x2.dts
index df56c808192082b647b743693b5a3d85fe52cfe9..2689febf7fc33ac7954c6921a29f90cb01f8aa47 100644
--- a/iopsys-ramips/dts/V22RW-2X2.dts
+++ b/iopsys-ramips/dts/rt3052_ralink_v22rw-2x2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_security;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_security: security {
-			label = "v22rw-2x2:green:security";
+			label = "green:security";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "v22rw-2x2:red:wps";
+			label = "red:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -85,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -99,7 +95,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/WL-351.dts b/iopsys-ramips/dts/rt3052_sitecom_wl-351.dts
similarity index 87%
rename from iopsys-ramips/dts/WL-351.dts
rename to iopsys-ramips/dts/rt3052_sitecom_wl-351.dts
index 1b31bda7361f6abdef0d543f0b5c9cf1094a65e4..f4aa24ec5a29aea339a9186bbd62ce36c8f3a39e 100644
--- a/iopsys-ramips/dts/WL-351.dts
+++ b/iopsys-ramips/dts/rt3052_sitecom_wl-351.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,17 +55,17 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wl-351:amber:power";
+			label = "amber:power";
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 
 		unpopulated {
-			label = "wl-351:amber:unpopulated";
+			label = "amber:unpopulated";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		unpopulated2 {
-			label = "wl-351:blue:unpopulated";
+			label = "blue:unpopulated";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -96,12 +94,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -125,7 +121,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/SL-R7205.dts b/iopsys-ramips/dts/rt3052_skyline_sl-r7205.dts
similarity index 85%
rename from iopsys-ramips/dts/SL-R7205.dts
rename to iopsys-ramips/dts/rt3052_skyline_sl-r7205.dts
index 3d8a9ec4644adbc9013dda5586bfb6f802a7934b..89e6c9ed710b00b3d152e133c85e9c0e1b26465e 100644
--- a/iopsys-ramips/dts/SL-R7205.dts
+++ b/iopsys-ramips/dts/rt3052_skyline_sl-r7205.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wifi;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,7 +55,7 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "sl-r7205:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -80,12 +78,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -98,7 +94,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/3G300M.dts b/iopsys-ramips/dts/rt3052_tenda_3g300m.dts
similarity index 81%
rename from iopsys-ramips/dts/3G300M.dts
rename to iopsys-ramips/dts/rt3052_tenda_3g300m.dts
index a463890dea566bc8a86b6c903b9b7948062e158c..dcebe64af424f004ba1af3bc06953ab314eb3b02 100644
--- a/iopsys-ramips/dts/3G300M.dts
+++ b/iopsys-ramips/dts/rt3052_tenda_3g300m.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,34 +18,34 @@
 		compatible = "gpio-leds";
 
 		3grouter {
-			label = "3g300m:blue:3grouter";
+			label = "blue:3grouter";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		led_ap: ap {
-			label = "3g300m:blue:ap";
+			label = "blue:ap";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wisprouter {
-			label = "3g300m:blue:wisprouter";
+			label = "blue:wisprouter";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wirelessrouter {
-			label = "3g300m:blue:wirelessrouter";
+			label = "blue:wirelessrouter";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "3g300m:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wpsreset {
-			label = "3g300m:blue:wpsreset";
+			label = "blue:wpsreset";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -73,7 +71,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -110,12 +108,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -128,7 +124,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/W306R_V20.dts b/iopsys-ramips/dts/rt3052_tenda_w306r-v2.dts
similarity index 83%
rename from iopsys-ramips/dts/W306R_V20.dts
rename to iopsys-ramips/dts/rt3052_tenda_w306r-v2.dts
index 233a6d2e460224a8770b90af06ff875369c860b3..f6c1b2d2b5ac94f0d776a723ddaa864f9ed1639f 100644
--- a/iopsys-ramips/dts/W306R_V20.dts
+++ b/iopsys-ramips/dts/rt3052_tenda_w306r-v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_sys;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_sys: sys {
-			label = "w306r-v20:green:sys";
+			label = "green:sys";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "w306r-v20:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -79,12 +77,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -97,5 +93,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WR512-3GN-4M.dts b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-4m.dts
similarity index 88%
rename from iopsys-ramips/dts/WR512-3GN-4M.dts
rename to iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-4m.dts
index beba8055053300f405ad153a13965d1cf705d576..d3393c074926c1dd6546ec242492bb15f59f7bf4 100644
--- a/iopsys-ramips/dts/WR512-3GN-4M.dts
+++ b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-4m.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
-#include "WR512-3GN.dtsi"
+#include "rt3052_unbranded_wr512-3gn.dtsi"
 
 / {
 	compatible = "unbranded,wr512-3gn-4m", "unbranded,wr512-3gn", "ralink,rt3052-soc";
 	model = "WR512-3GN (4M)";
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -38,7 +36,7 @@
 			partition@50000 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x50000 0x3c8000>;
+				reg = <0x50000 0x3b0000>;
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/WR512-3GN-8M.dts b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-8m.dts
similarity index 92%
rename from iopsys-ramips/dts/WR512-3GN-8M.dts
rename to iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-8m.dts
index 118c69a340928b8854f5cdd0304a4ce7cba458f2..ce25dc93b1c8a994268dc7c541548645c80f60c8 100644
--- a/iopsys-ramips/dts/WR512-3GN-8M.dts
+++ b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn-8m.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
-#include "WR512-3GN.dtsi"
+#include "rt3052_unbranded_wr512-3gn.dtsi"
 
 / {
 	compatible = "unbranded,wr512-3gn-8m", "unbranded,wr512-3gn", "ralink,rt3052-soc";
 	model = "WR512-3GN (8M)";
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
diff --git a/iopsys-ramips/dts/WR512-3GN.dtsi b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn.dtsi
similarity index 73%
rename from iopsys-ramips/dts/WR512-3GN.dtsi
rename to iopsys-ramips/dts/rt3052_unbranded_wr512-3gn.dtsi
index 5761b8b532e700fa36546f94598044efb1c726f9..dad0da16d54e798ec209645315406418bd792f22 100644
--- a/iopsys-ramips/dts/WR512-3GN.dtsi
+++ b/iopsys-ramips/dts/rt3052_unbranded_wr512-3gn.dtsi
@@ -17,27 +17,27 @@
 		compatible = "gpio-leds";
 
 		3g {
-			label = "wr512-3gn:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		gateway {
-			label = "wr512-3gn:green:gateway";
+			label = "green:gateway";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		ap {
-			label = "wr512-3gn:green:ap";
+			label = "green:ap";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "wr512-3gn:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		station {
-			label = "wr512-3gn:green:station";
+			label = "green:station";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -60,12 +60,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -74,7 +72,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/XDXRN502J.dts b/iopsys-ramips/dts/rt3052_unbranded_xdx-rn502j.dts
similarity index 79%
rename from iopsys-ramips/dts/XDXRN502J.dts
rename to iopsys-ramips/dts/rt3052_unbranded_xdx-rn502j.dts
index 0cab20f8f68b767701a951c5a3bde3ab232dc6c9..d94da950293ab79e4d1c1fd79095143b88bfe19d 100644
--- a/iopsys-ramips/dts/XDXRN502J.dts
+++ b/iopsys-ramips/dts/rt3052_unbranded_xdx-rn502j.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "unbranded,xdxrn502j", "ralink,rt3052-soc";
+	compatible = "unbranded,xdx-rn502j", "ralink,rt3052-soc";
 	model = "XDX RN502J";
 
 	aliases {
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		wifi {
-			label = "xdxrn502j:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "xdxrn502j:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -79,12 +77,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -97,7 +93,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/UR-326N4G.dts b/iopsys-ramips/dts/rt3052_upvel_ur-326n4g.dts
similarity index 81%
rename from iopsys-ramips/dts/UR-326N4G.dts
rename to iopsys-ramips/dts/rt3052_upvel_ur-326n4g.dts
index d67c2e0ec5febe9bda15162c980885ac0419b616..fc71437b48d7fbaa15b4d609dede43987fcafe65 100644
--- a/iopsys-ramips/dts/UR-326N4G.dts
+++ b/iopsys-ramips/dts/rt3052_upvel_ur-326n4g.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,27 +55,27 @@
 		compatible = "gpio-leds";
 
 		3g {
-			label = "ur-326n4g:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		gateway {
-			label = "ur-326n4g:green:gateway";
+			label = "green:gateway";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		ap {
-			label = "ur-326n4g:green:ap";
+			label = "green:ap";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "ur-326n4g:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		station {
-			label = "ur-326n4g:green:station";
+			label = "green:station";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -100,12 +98,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -118,7 +114,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/UR-336UN.dts b/iopsys-ramips/dts/rt3052_upvel_ur-336un.dts
similarity index 81%
rename from iopsys-ramips/dts/UR-336UN.dts
rename to iopsys-ramips/dts/rt3052_upvel_ur-336un.dts
index 937278db92e7519fcde047568546381503458f0d..2c00ca89456aa481c31f031a26c886401d86c248 100644
--- a/iopsys-ramips/dts/UR-336UN.dts
+++ b/iopsys-ramips/dts/rt3052_upvel_ur-336un.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,27 +55,27 @@
 		compatible = "gpio-leds";
 
 		3g {
-			label = "ur-336un:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		gateway {
-			label = "ur-336un:green:gateway";
+			label = "green:gateway";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		ap {
-			label = "ur-336un:green:ap";
+			label = "green:ap";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "ur-336un:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		station {
-			label = "ur-336un:green:station";
+			label = "green:station";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -100,12 +98,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -118,7 +114,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/kn.dts b/iopsys-ramips/dts/rt3052_zyxel_keenetic.dts
similarity index 86%
rename from iopsys-ramips/dts/kn.dts
rename to iopsys-ramips/dts/rt3052_zyxel_keenetic.dts
index 1f9928e59af039e6a3e01df87014e7a91f33db3d..6c65d34f166e4752b8a3ff064b79577e1880a8e0 100644
--- a/iopsys-ramips/dts/kn.dts
+++ b/iopsys-ramips/dts/rt3052_zyxel_keenetic.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -48,7 +46,7 @@
 			partition@50000 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x50000 0x3b0000>;
+				reg = <0x50000 0x7b0000>;
 			};
 		};
 	};
@@ -57,19 +55,19 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "kn:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "kn:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&otg_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wps {
-			label = "kn:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -99,12 +97,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "uartf";
+		function = "gpio";
 	};
 };
 
@@ -117,7 +113,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &otg {
diff --git a/iopsys-ramips/dts/NBG-419N.dts b/iopsys-ramips/dts/rt3052_zyxel_nbg-419n.dts
similarity index 84%
rename from iopsys-ramips/dts/NBG-419N.dts
rename to iopsys-ramips/dts/rt3052_zyxel_nbg-419n.dts
index 625e1616d8e1f9fe03fe86f9abf84acc0586f183..db4f8d4a31fc209e32616b16e647297c599d6cd6 100644
--- a/iopsys-ramips/dts/NBG-419N.dts
+++ b/iopsys-ramips/dts/rt3052_zyxel_nbg-419n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3050.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	cfi@1f000000 {
+	flash@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
 		bank-width = <2>;
@@ -57,12 +55,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "nbg-419n:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "nbg-419n:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -85,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,5 +99,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/rt3352.dtsi b/iopsys-ramips/dts/rt3352.dtsi
index 548a6bb84ae02c81ac494d6d79f906577a86a439..2a51b14de1ffd7fe883f320618c826f123a3d93f 100644
--- a/iopsys-ramips/dts/rt3352.dtsi
+++ b/iopsys-ramips/dts/rt3352.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -107,7 +109,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -126,7 +128,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -142,7 +144,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <6>;
+			ralink,num-gpios = <6>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -261,43 +263,43 @@
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		mdio_pins: mdio {
 			mdio {
-				ralink,group = "mdio";
-				ralink,function = "mdio";
+				groups = "mdio";
+				function = "mdio";
 			};
 		};
 
 		rgmii_pins: rgmii {
 			rgmii {
-				ralink,group = "rgmii";
-				ralink,function = "rgmii";
+				groups = "rgmii";
+				function = "rgmii";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi_cs1";
-				ralink,function = "spi_cs1";
+				groups = "spi_cs1";
+				function = "spi_cs1";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/ALL5002.dts b/iopsys-ramips/dts/rt3352_allnet_all5002.dts
similarity index 83%
rename from iopsys-ramips/dts/ALL5002.dts
rename to iopsys-ramips/dts/rt3352_allnet_all5002.dts
index a604ec1511d19f4afd67eeecb2bd6c9fb77ebb8a..3aa132a727b3327b27810f5173a7d57b9cb4d365 100644
--- a/iopsys-ramips/dts/ALL5002.dts
+++ b/iopsys-ramips/dts/rt3352_allnet_all5002.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3352.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -34,25 +32,21 @@
 		compatible = "gpio-leds";
 
 		ld1 {
-			label = "all5002:green:ld1";
+			label = "green:ld1";
 			gpios = <&pcf0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		ld2 {
-			label = "all5002:green:ld2";
+			label = "green:ld2";
 			gpios = <&pcf0 1 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -89,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -107,7 +99,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/DIR-615-H1.dts b/iopsys-ramips/dts/rt3352_dlink_dir-615-h1.dts
similarity index 83%
rename from iopsys-ramips/dts/DIR-615-H1.dts
rename to iopsys-ramips/dts/rt3352_dlink_dir-615-h1.dts
index 79d4717f57bda766ac418776fd53c322c1af4b33..2233c9018c856c9837c78a1d5eeb7bf2aa746ada 100644
--- a/iopsys-ramips/dts/DIR-615-H1.dts
+++ b/iopsys-ramips/dts/rt3352_dlink_dir-615-h1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3352.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,34 +12,35 @@
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
 		led-upgrade = &led_status_green;
+		label-mac-device = &wmac;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		status {
-			label = "dir-615-h1:amber:status";
+			label = "amber:status";
 			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_status_green: status2 {
-			label = "dir-615-h1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
 		};
 
 		wan {
-			label = "dir-615-h1:amber:wan";
+			label = "amber:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		wan2 {
-			label = "dir-615-h1:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-615-h1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -67,7 +66,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -104,12 +103,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -124,5 +121,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DIR-620-D1.dts b/iopsys-ramips/dts/rt3352_dlink_dir-620-d1.dts
similarity index 85%
rename from iopsys-ramips/dts/DIR-620-D1.dts
rename to iopsys-ramips/dts/rt3352_dlink_dir-620-d1.dts
index 74fd4af7536b3d8021104edd8b806545702655a8..50b762ce5a585188b6cd26694477d1680a453231 100644
--- a/iopsys-ramips/dts/DIR-620-D1.dts
+++ b/iopsys-ramips/dts/rt3352_dlink_dir-620-d1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3352.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dir-620-d1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "dir-620-d1:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -45,7 +43,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -82,12 +80,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -102,7 +98,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/rt3352_zyxel_nbg-419n-v2.dts b/iopsys-ramips/dts/rt3352_zyxel_nbg-419n-v2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..84bb645c5afb50c85c87acf1d9a0cccc6e855fe5
--- /dev/null
+++ b/iopsys-ramips/dts/rt3352_zyxel_nbg-419n-v2.dts
@@ -0,0 +1,125 @@
+#include "rt3352.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zyxel,nbg-419n-v2", "ralink,rt3352-soc";
+	model = "ZyXEL NBG-419N v2";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+
+		usb {
+			label = "green:usb";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+		reset {
+			label = "reset";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		rfkill {
+			label = "rfkill";
+			linux,input-type = <EV_SW>;
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "rgmii", "mdio", "uartf";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/RT-N56U.dts b/iopsys-ramips/dts/rt3662_asus_rt-n56u.dts
similarity index 84%
rename from iopsys-ramips/dts/RT-N56U.dts
rename to iopsys-ramips/dts/rt3662_asus_rt-n56u.dts
index 9c2a32a9888febf152fd28f3649f1e172caed991..98426b86f06ca1319da747ccc816b56b41543a60 100644
--- a/iopsys-ramips/dts/RT-N56U.dts
+++ b/iopsys-ramips/dts/rt3662_asus_rt-n56u.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "asus,rt-n56u", "ralink,rt3883-soc";
+	compatible = "asus,rt-n56u", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "Asus RT-N56U";
 
 	aliases {
@@ -16,7 +14,7 @@
 		led-upgrade = &led_power;
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -80,22 +78,22 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "rt-n56u:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "rt-n56u:blue:lan";
+			label = "blue:lan";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "rt-n56u:blue:wan";
+			label = "blue:wan";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "rt-n56u:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -105,12 +103,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -139,7 +135,7 @@
 &wmac {
 	status = "okay";
 	ralink,2ghz = <0>;
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/DIR-645.dts b/iopsys-ramips/dts/rt3662_dlink_dir-645.dts
similarity index 83%
rename from iopsys-ramips/dts/DIR-645.dts
rename to iopsys-ramips/dts/rt3662_dlink_dir-645.dts
index 35d011ebba4fbdeacc61f9e81c7bd843d42d6a23..23313759c7960897ea89edbef314e662dd6d9d1a 100644
--- a/iopsys-ramips/dts/DIR-645.dts
+++ b/iopsys-ramips/dts/rt3662_dlink_dir-645.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "dlink,dir-645", "ralink,rt3883-soc";
+	compatible = "dlink,dir-645", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "D-Link DIR-645";
 
 	aliases {
@@ -29,13 +27,13 @@
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
 		};
 
 		wps {
 			label = "wps";
-			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_WPS_BUTTON>;
 		};
 	};
@@ -44,12 +42,12 @@
 		compatible = "gpio-leds";
 
 		inet {
-			label = "dir-645:green:inet";
+			label = "green:inet";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps: wps {
-			label = "dir-645:green:wps";
+			label = "green:wps";
 			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -73,7 +71,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
@@ -121,12 +119,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -140,7 +136,7 @@
 
 &wmac {
 	ralink,5ghz = <0>;
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/BR-6475ND.dts b/iopsys-ramips/dts/rt3662_edimax_br-6475nd.dts
similarity index 82%
rename from iopsys-ramips/dts/BR-6475ND.dts
rename to iopsys-ramips/dts/rt3662_edimax_br-6475nd.dts
index f7fb8b5c40e90ca6cced5a96a6ff6124ce8a4e92..56d9dc08948d930820de5a6f3421ceb4b057da39 100644
--- a/iopsys-ramips/dts/BR-6475ND.dts
+++ b/iopsys-ramips/dts/rt3662_edimax_br-6475nd.dts
@@ -1,12 +1,11 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
 
 / {
-	compatible = "edimax,br-6475nd", "ralink,rt3883-soc";
+	compatible = "edimax,br-6475nd", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "Edimax BR-6475nD";
 
 	aliases {
@@ -38,22 +37,22 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "br-6475nd:green:power";
+			label = "green:power";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan {
-			label = "br-6475nd:amber:wlan";
+			label = "amber:wlan";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		wlan_5ghz {
-			label = "br-6475nd:amber:wlan_5ghz";
+			label = "amber:wlan_5ghz";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -88,7 +87,9 @@
 			};
 
 			partition@70000 {
-				compatible = "edimax,uimage";
+				compatible = "openwrt,uimage", "denx,uimage";
+				openwrt,offset = <FW_EDIMAX_OFFSET>;
+				openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 				reg = <0x00070000 0x00790000>;
 				label = "firmware";
 			};
@@ -121,12 +122,10 @@
 	*/
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -134,17 +133,13 @@
 	status = "okay";
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &uartlite {
 	status = "okay";
 };
 
 &ethernet {
 	status = "okay";
-	mtd-mac-address = <&devdata 0x0d>;
+	mtd-mac-address = <&devdata 0xd>;
 
 	port@0 {
 		mediatek,fixed-link = <1000 1 1 1>;
@@ -153,7 +148,7 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pci {
diff --git a/iopsys-ramips/dts/rt3662_engenius_esr600h.dts b/iopsys-ramips/dts/rt3662_engenius_esr600h.dts
new file mode 100644
index 0000000000000000000000000000000000000000..cce44ed4c3aaeb02e38e6ff15d35e94972b4e5a5
--- /dev/null
+++ b/iopsys-ramips/dts/rt3662_engenius_esr600h.dts
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rt3883.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "engenius,esr600h", "ralink,rt3662-soc", "ralink,rt3883-soc";
+	model = "EnGenius ESR600H";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		wps {
+			label = "blue:wps";
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		reset-wps {
+			label = "reset-wps";
+			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		usb {
+			gpio-export,name = "usb";
+			gpio-export,output = <1>;
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x1000>;
+			};
+
+			partition@32000 {
+				label = "config";
+				reg = <0x32000 0xe000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	status = "okay";
+
+	port@0 {
+		phy-handle = <&phy0>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+
+			qca,ar8327-initvals = <
+				0x04 0x07600000 /* PORT0 PAD MODE CTRL */
+				0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
+				0x10 0x40000000 /* Power-on Strapping: 176-pin interface configuration */
+				0x50 0xc437c437 /* LED Control Register 0 */
+				0x54 0xc337c337 /* LED Control Register 1 */
+				0x58 0x00000000 /* LED Control Register 2 */
+				0x5c 0x03ffff00 /* LED Control Register 3 */
+				0x7c 0x0000007e /* PORT0_STATUS */
+				0x94 0x0000007e /* PORT6 STATUS */
+			>;
+		};
+	};
+};
+
+&pci {
+	status = "okay";
+};
+
+&pci1 {
+	status = "okay";
+
+	wifi@0,1,0 {
+		compatible = "pci1814,3091";
+		reg = <0x0 1 0 0 0>;
+		ralink,5ghz = <0>;
+		ralink,mtd-eeprom = <&factory 0x8000>;
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	ralink,2ghz = <0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
diff --git a/iopsys-ramips/dts/WMDR-143N.dts b/iopsys-ramips/dts/rt3662_loewe_wmdr-143n.dts
similarity index 85%
rename from iopsys-ramips/dts/WMDR-143N.dts
rename to iopsys-ramips/dts/rt3662_loewe_wmdr-143n.dts
index 66711420ac9ccbe5d25565b67bde7dbdd0594c9b..2501c1725154ad337798fb0367598cce238ebb22 100644
--- a/iopsys-ramips/dts/WMDR-143N.dts
+++ b/iopsys-ramips/dts/rt3662_loewe_wmdr-143n.dts
@@ -1,16 +1,14 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 / {
-	compatible = "loewe,wmdr-143n", "ralink,rt3883-soc";
+	compatible = "loewe,wmdr-143n", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "Loewe WMDR-143N";
 };
 
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
@@ -64,6 +62,5 @@
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0>;
-	mtd-mac-address = <&factory 0x4>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/HPM.dts b/iopsys-ramips/dts/rt3662_omnima_hpm.dts
similarity index 84%
rename from iopsys-ramips/dts/HPM.dts
rename to iopsys-ramips/dts/rt3662_omnima_hpm.dts
index 7ccd0781444681d2859b8a4aa623919fb9f8c34b..c0f30ec6c772bf5df782970d7d52c91c5dc7c2b2 100644
--- a/iopsys-ramips/dts/HPM.dts
+++ b/iopsys-ramips/dts/rt3662_omnima_hpm.dts
@@ -1,12 +1,10 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "omnima,hpm", "ralink,rt3883-soc";
+	compatible = "omnima,hpm", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "Omnima HPM";
 
 	aliases {
@@ -35,34 +33,34 @@
 		compatible = "gpio-leds";
 
 		power {
-			label = "hpm:orange:power";
+			label = "orange:power";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		led_status: status {
-			label = "hpm:green:status";
+			label = "green:status";
 			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 			default-state = "on";
 		};
 
 		eth {
-			label = "hpm:green:eth";
+			label = "green:eth";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		eth2 {
-			label = "hpm:red:eth";
+			label = "red:eth";
 			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi {
-			label = "hpm:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "hpm:red:wifi";
+			label = "red:wifi";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -89,7 +87,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		spi-max-frequency = <25000000>;
 		reg = <0>;
@@ -126,12 +124,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -150,7 +146,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/CY-SWR1100.dts b/iopsys-ramips/dts/rt3662_samsung_cy-swr1100.dts
similarity index 77%
rename from iopsys-ramips/dts/CY-SWR1100.dts
rename to iopsys-ramips/dts/rt3662_samsung_cy-swr1100.dts
index afffee2bd465204e04cd90bbecbace943eb9eefb..ad417856b3a81a70229564bf9599d31d287840bd 100644
--- a/iopsys-ramips/dts/CY-SWR1100.dts
+++ b/iopsys-ramips/dts/rt3662_samsung_cy-swr1100.dts
@@ -1,20 +1,20 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	compatible = "samsung,cy-swr1100", "ralink,rt3883-soc";
+	compatible = "samsung,cy-swr1100", "ralink,rt3662-soc", "ralink,rt3883-soc";
 	model = "Samsung CY-SWR1100";
 
 	aliases {
-		led-boot = &led_wps;
-		led-failsafe = &led_wps;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -49,8 +49,9 @@
 			};
 
 			partition@40000 {
-				label = "devdata";
+				label = "devconf";
 				reg = <0x40000 0x10000>;
+				read-only;
 			};
 
 			partition@50000 {
@@ -69,8 +70,7 @@
 	};
 
 	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <100>;
+		compatible = "gpio-keys";
 
 		reset {
 			label = "reset";
@@ -88,17 +88,22 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_wps: wps {
-			label = "cy-swr1100:blue:wps";
+		wps {
+			label = "blue:wps";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "cy-swr1100:blue:usb";
+			label = "blue:usb";
 			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
+
+		led_power: power {
+			label = "blue:power";
+			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+		};
 	};
 };
 
@@ -106,12 +111,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "spi";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "spi";
+		function = "gpio";
 	};
 };
 
@@ -130,9 +133,8 @@
 	status = "okay";
 
 	wifi@0,0 {
-		compatible = "pci0,0";
+		compatible = "pci1814,3091";
 		reg = <0x10000 0 0 0 0>;
-		ralink,5ghz = <0>;
 		ralink,mtd-eeprom = <&factory 0x2000>;
 	};
 };
@@ -140,7 +142,7 @@
 &wmac {
 	status = "okay";
 	ralink,2ghz = <0>;
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &ehci {
diff --git a/iopsys-ramips/dts/rt3883.dtsi b/iopsys-ramips/dts/rt3883.dtsi
index fffac169113fd48d51cf8e0e8ea6d1751b61db69..a605d60ca7935db1d0dbe447b5f0e3cd8be1ab30 100644
--- a/iopsys-ramips/dts/rt3883.dtsi
+++ b/iopsys-ramips/dts/rt3883.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -116,7 +118,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -130,7 +132,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,nr-gpio = <16>;
+			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -146,7 +148,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,nr-gpio = <32>;
+			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -162,7 +164,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
-			ralink,nr-gpio = <24>;
+			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -281,36 +283,36 @@
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "pci";
-				ralink,function = "pci-func";
+				groups = "pci";
+				function = "pci-func";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 
 		pci_pins: pci {
 			pci {
-				ralink,group = "pci";
-				ralink,function = "pci-fnc";
+				groups = "pci";
+				function = "pci-fnc";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/F9K1109V1.dts b/iopsys-ramips/dts/rt3883_belkin_f9k1109v1.dts
similarity index 65%
rename from iopsys-ramips/dts/F9K1109V1.dts
rename to iopsys-ramips/dts/rt3883_belkin_f9k1109v1.dts
index cdd2b6b7142e8bfeb8b1b2d7be320a8efefb67fc..78c9bb4b6d54713180964200b24fcd15024ab7eb 100644
--- a/iopsys-ramips/dts/F9K1109V1.dts
+++ b/iopsys-ramips/dts/rt3883_belkin_f9k1109v1.dts
@@ -1,10 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
-#include "F9K110x.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "rt3883_belkin_f9k110x.dtsi"
 
 / {
 	compatible = "belkin,f9k1109v1", "ralink,rt3883-soc";
@@ -21,35 +17,38 @@
 		compatible = "gpio-leds";
 
 		led_status_amber: internet_amber {
-			label = "f9k1109v1:amber:internet";
+			label = "amber:internet";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_blue: internet_blue {
-			label = "f9k1109v1:blue:internet";
+			label = "blue:internet";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		usb1 {
-			label = "f9k1109v1:green:usb1";
+			label = "green:usb1";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port1>, <&ehci_port1>;
+			linux,default-trigger = "usbport";
 		};
 
 		usb2 {
-			label = "f9k1109v1:green:usb2";
+			label = "green:usb2";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			trigger-sources = <&ohci_port2>, <&ehci_port2>;
+			linux,default-trigger = "usbport";
 		};
 
 		wps_amber {
-			label = "f9k1109v1:amber:wps";
+			label = "amber:wps";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		wps_blue {
-			label = "f9k1109v1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 		};
-
 	};
 
 	keys {
@@ -69,3 +68,17 @@
 		};
 	};
 };
+
+&ehci {
+	ehci_port2: port@2 {
+		reg = <2>;
+		#trigger-source-cells = <0>;
+	};
+};
+
+&ohci {
+	ohci_port2: port@2 {
+		reg = <2>;
+		#trigger-source-cells = <0>;
+	};
+};
diff --git a/iopsys-ramips/dts/F9K110x.dtsi b/iopsys-ramips/dts/rt3883_belkin_f9k110x.dtsi
similarity index 88%
rename from iopsys-ramips/dts/F9K110x.dtsi
rename to iopsys-ramips/dts/rt3883_belkin_f9k110x.dtsi
index a34c3f3600e30685601eab95381aae51b58b3f1f..0b2c7602d1c6b1c041c5bace129164b4308bbbf0 100644
--- a/iopsys-ramips/dts/F9K110x.dtsi
+++ b/iopsys-ramips/dts/rt3883_belkin_f9k110x.dtsi
@@ -14,11 +14,6 @@
 		gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
 		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
 	};
-
-};
-
-&gpio1 {
-	status = "okay";
 };
 
 &spi0 {
@@ -74,18 +69,16 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
 &wmac {
 	status = "okay";
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &pci {
diff --git a/iopsys-ramips/dts/WLR-6000.dts b/iopsys-ramips/dts/rt3883_sitecom_wlr-6000.dts
similarity index 93%
rename from iopsys-ramips/dts/WLR-6000.dts
rename to iopsys-ramips/dts/rt3883_sitecom_wlr-6000.dts
index 2b1f7076583133fbf8965520628e82b83e324aa4..ccf9917dac6a9f935fd341317759506ec44b34e4 100644
--- a/iopsys-ramips/dts/WLR-6000.dts
+++ b/iopsys-ramips/dts/rt3883_sitecom_wlr-6000.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -31,12 +29,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "wlr-6000:red:power";
+			label = "red:power";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
 		};
 
 		ops {
-			label = "wlr-6000:white:ops";
+			label = "white:ops";
 			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -57,12 +55,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -101,7 +97,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <8600000>;
diff --git a/iopsys-ramips/dts/TEW-691GR.dts b/iopsys-ramips/dts/rt3883_trendnet_tew-691gr.dts
similarity index 90%
rename from iopsys-ramips/dts/TEW-691GR.dts
rename to iopsys-ramips/dts/rt3883_trendnet_tew-691gr.dts
index aeed7fbb24439507c90625edba053028b584678a..03e504a6d19f4ee13b97fd9ca6aa1e222b6a11c9 100644
--- a/iopsys-ramips/dts/TEW-691GR.dts
+++ b/iopsys-ramips/dts/rt3883_trendnet_tew-691gr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps;
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -79,7 +77,7 @@
 		compatible = "gpio-leds";
 
 		led_wps: wps {
-			label = "tew-691gr:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -89,12 +87,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/TEW-692GR.dts b/iopsys-ramips/dts/rt3883_trendnet_tew-692gr.dts
similarity index 91%
rename from iopsys-ramips/dts/TEW-692GR.dts
rename to iopsys-ramips/dts/rt3883_trendnet_tew-692gr.dts
index 03395a92dd7d854dbe9f893fae2d4a3a6322c9a7..95a2bb75f3e2a4fccfe08f6846c2923149493746 100644
--- a/iopsys-ramips/dts/TEW-692GR.dts
+++ b/iopsys-ramips/dts/rt3883_trendnet_tew-692gr.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt3883.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -16,7 +14,7 @@
 		led-upgrade = &led_wps_green;
 	};
 
-	nor-flash@1c000000 {
+	flash@1c000000 {
 		compatible = "cfi-flash";
 		reg = <0x1c000000 0x800000>;
 		bank-width = <2>;
@@ -73,12 +71,12 @@
 		compatible = "gpio-leds";
 
 		wps {
-			label = "tew-692gr:orange:wps";
+			label = "orange:wps";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		led_wps_green: wps2 {
-			label = "tew-692gr:green:wps";
+			label = "green:wps";
 			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -88,12 +86,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "spi", "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "spi", "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/rt5350.dtsi b/iopsys-ramips/dts/rt5350.dtsi
index 89a3903118669183da174e244da42402d291cd62..da282b55ec82a101e903c7d40099d59ad2b12071 100644
--- a/iopsys-ramips/dts/rt5350.dtsi
+++ b/iopsys-ramips/dts/rt5350.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -116,7 +118,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,nr-gpio = <22>;
+			ralink,num-gpios = <22>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -133,7 +135,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <22>;
-			ralink,nr-gpio = <6>;
+			ralink,num-gpios = <6>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -275,43 +277,43 @@
 
 		i2c_pins: i2c_pins {
 			i2c_pins {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
 		spi_pins: spi_pins {
 			spi_pins {
-				ralink,group = "spi";
-				ralink,function = "spi";
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		phy_led_pins: phy_led {
 			phy_led {
-				ralink,group = "led";
-				ralink,function = "led";
+				groups = "led";
+				function = "led";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 
 		uartf_pins: uartf {
 			uartf {
-				ralink,group = "uartf";
-				ralink,function = "uartf";
+				groups = "uartf";
+				function = "uartf";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi_cs1";
-				ralink,function = "spi_cs1";
+				groups = "spi_cs1";
+				function = "spi_cs1";
 			};
 		};
 	};
diff --git a/iopsys-ramips/dts/PX-4885-4M.dts b/iopsys-ramips/dts/rt5350_7links_px-4885-4m.dts
similarity index 89%
rename from iopsys-ramips/dts/PX-4885-4M.dts
rename to iopsys-ramips/dts/rt5350_7links_px-4885-4m.dts
index ee2068f8f414457231889e2df2df5301f0b9e405..383bde706f08c42ab328c1a223c4e9ab6e98c0b2 100644
--- a/iopsys-ramips/dts/PX-4885-4M.dts
+++ b/iopsys-ramips/dts/rt5350_7links_px-4885-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "PX-4885.dtsi"
+#include "rt5350_7links_px-4885.dtsi"
 
 / {
 	compatible = "7links,px-4885-4m", "7links,px-4885", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -32,7 +30,7 @@
 				read-only;
 			};
 
-			factory: partition@40000 {
+			devconf: partition@40000 {
 				label = "devconf";
 				reg = <0x40000 0x10000>;
 				read-only;
diff --git a/iopsys-ramips/dts/PX-4885-8M.dts b/iopsys-ramips/dts/rt5350_7links_px-4885-8m.dts
similarity index 89%
rename from iopsys-ramips/dts/PX-4885-8M.dts
rename to iopsys-ramips/dts/rt5350_7links_px-4885-8m.dts
index a52ba2edae5192fc77d8ed555c9ef0dbfedcd27b..25c635aa11a0665c43cd89d58b0adbe5fefe7620 100644
--- a/iopsys-ramips/dts/PX-4885-8M.dts
+++ b/iopsys-ramips/dts/rt5350_7links_px-4885-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "PX-4885.dtsi"
+#include "rt5350_7links_px-4885.dtsi"
 
 / {
 	compatible = "7links,px-4885-8m", "7links,px-4885", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -32,7 +30,7 @@
 				read-only;
 			};
 
-			factory: partition@40000 {
+			devconf: partition@40000 {
 				label = "devconf";
 				reg = <0x40000 0x10000>;
 				read-only;
diff --git a/iopsys-ramips/dts/PX-4885.dtsi b/iopsys-ramips/dts/rt5350_7links_px-4885.dtsi
similarity index 74%
rename from iopsys-ramips/dts/PX-4885.dtsi
rename to iopsys-ramips/dts/rt5350_7links_px-4885.dtsi
index 032a89cd1a94708c41ec6f3a170113107cc0df5b..a15d140f3e5b14261c51f742332c83f54a5d3046 100644
--- a/iopsys-ramips/dts/PX-4885.dtsi
+++ b/iopsys-ramips/dts/rt5350_7links_px-4885.dtsi
@@ -28,12 +28,12 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "px-4885:orange:wifi";
+			label = "orange:wifi";
 			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
 		};
 
 		storage {
-			label = "px-4885:blue:storage";
+			label = "blue:storage";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -41,17 +41,15 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x28>;
+	mtd-mac-address = <&devconf 0x28>;
 };
 
 &esw {
@@ -59,5 +57,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&devconf 0x0>;
 };
diff --git a/iopsys-ramips/dts/AIR3GII.dts b/iopsys-ramips/dts/rt5350_airlive_air3gii.dts
similarity index 82%
rename from iopsys-ramips/dts/AIR3GII.dts
rename to iopsys-ramips/dts/rt5350_airlive_air3gii.dts
index 111119eea42b3c2d4be8ae6c2aca7063ee081554..0a62c755e60d79529fe3fdfc06bae4710d1e1155 100644
--- a/iopsys-ramips/dts/AIR3GII.dts
+++ b/iopsys-ramips/dts/rt5350_airlive_air3gii.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,12 +11,12 @@
 		compatible = "gpio-leds";
 
 		wlan {
-			label = "air3gii:green:wlan";
+			label = "green:wlan";
 			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
 		};
 
 		mobile {
-			label = "air3gii:green:mobile";
+			label = "green:mobile";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -37,14 +35,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -81,12 +75,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -99,5 +91,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/ALL5003.dts b/iopsys-ramips/dts/rt5350_allnet_all5003.dts
similarity index 80%
rename from iopsys-ramips/dts/ALL5003.dts
rename to iopsys-ramips/dts/rt5350_allnet_all5003.dts
index 8a3488a7e0e0ac7006558c8beb224c03a93e91aa..96dde0fbf1cb40d295e077cbf9df27f388287429 100644
--- a/iopsys-ramips/dts/ALL5003.dts
+++ b/iopsys-ramips/dts/rt5350_allnet_all5003.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -34,25 +32,21 @@
 		compatible = "gpio-leds";
 
 		ld1 {
-			label = "all5003:green:ld1";
+			label = "green:ld1";
 			gpios = <&pcf0 0 GPIO_ACTIVE_LOW>;
 		};
 
 		ld2 {
-			label = "all5003:green:ld2";
+			label = "green:ld2";
 			gpios = <&pcf0 1 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -89,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -107,13 +99,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/AWM002-EVB-4M.dts b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb-4m.dts
similarity index 92%
rename from iopsys-ramips/dts/AWM002-EVB-4M.dts
rename to iopsys-ramips/dts/rt5350_asiarf_awm002-evb-4m.dts
index c8045a0f90fcdbcf24e76e342794b629b922d899..56f1cedebdf38b5ec515d03b6e4a8130f86c8702 100644
--- a/iopsys-ramips/dts/AWM002-EVB-4M.dts
+++ b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "AWM002-EVB.dtsi"
+#include "rt5350_asiarf_awm002-evb.dtsi"
 
 / {
 	compatible = "asiarf,awm002-evb-4m", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80: m25p80@0 {
+	flash@0 {
 		reg = <0>;
 		compatible = "jedec,spi-nor";
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/AWM002-EVB-8M.dts b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb-8m.dts
similarity index 92%
rename from iopsys-ramips/dts/AWM002-EVB-8M.dts
rename to iopsys-ramips/dts/rt5350_asiarf_awm002-evb-8m.dts
index d7e9bd8340f9e48e77d2257367ff8c32cbd1bf7e..43b599abe67a9318feefb02cb82ec809beb40318 100644
--- a/iopsys-ramips/dts/AWM002-EVB-8M.dts
+++ b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "AWM002-EVB.dtsi"
+#include "rt5350_asiarf_awm002-evb.dtsi"
 
 / {
 	compatible = "asiarf,awm002-evb-8m", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80: m25p80@0 {
+	flash@0 {
 		reg = <0>;
 		compatible = "jedec,spi-nor";
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/AWM002-EVB.dtsi b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb.dtsi
similarity index 70%
rename from iopsys-ramips/dts/AWM002-EVB.dtsi
rename to iopsys-ramips/dts/rt5350_asiarf_awm002-evb.dtsi
index 384b2efec0a995e207a5c6fb08b18dd8a0aa6c99..80965a48b83478e761265976ef5d98058abcdc24 100644
--- a/iopsys-ramips/dts/AWM002-EVB.dtsi
+++ b/iopsys-ramips/dts/rt5350_asiarf_awm002-evb.dtsi
@@ -10,17 +10,17 @@
 		compatible = "gpio-leds";
 
 		tx {
-			label = "awm002-evb:green:tx";
+			label = "green:tx";
 			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
 		};
 
 		rx {
-			label = "awm002-evb:green:rx";
+			label = "green:rx";
 			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "awm002-evb:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -48,26 +48,16 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag";
+		function = "gpio";
 	};
 };
 
 &esw {
 	mediatek,portmap = <0x3f>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/F7C027.dts b/iopsys-ramips/dts/rt5350_belkin_f7c027.dts
similarity index 86%
rename from iopsys-ramips/dts/F7C027.dts
rename to iopsys-ramips/dts/rt5350_belkin_f7c027.dts
index f3bf00e30a32cdf0226b2aef81e3437542767c7c..e3691b75bdb47e6d81dbf7cb0c76fc0c9599992d 100644
--- a/iopsys-ramips/dts/F7C027.dts
+++ b/iopsys-ramips/dts/rt5350_belkin_f7c027.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,22 +18,22 @@
 		compatible = "gpio-leds";
 
 		status {
-			label = "f7c027:blue:status";
+			label = "blue:status";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		power {
-			label = "f7c027:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		led_status_orange: orange {
-			label = "f7c027:orange:status";
+			label = "orange:status";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		relay {
-			label = "f7c027:device:relay";
+			label = "device:relay";
 			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -67,7 +65,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -130,14 +128,12 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
diff --git a/iopsys-ramips/dts/DCS-930L-B1.dts b/iopsys-ramips/dts/rt5350_dlink_dcs-930l-b1.dts
similarity index 82%
rename from iopsys-ramips/dts/DCS-930L-B1.dts
rename to iopsys-ramips/dts/rt5350_dlink_dcs-930l-b1.dts
index 0fff5e8b5c7aa4292249f309afdb3dbde42e7bb1..58a84073015592acd971102fb02ccf53ebc9f342 100644
--- a/iopsys-ramips/dts/DCS-930L-B1.dts
+++ b/iopsys-ramips/dts/rt5350_dlink_dcs-930l-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "dcs-930l-b1:red:power";
+			label = "red:power";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dcs-930l-b1:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -51,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -88,12 +86,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -106,13 +102,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DIR-300-B7.dts b/iopsys-ramips/dts/rt5350_dlink_dir-300-b7.dts
similarity index 86%
rename from iopsys-ramips/dts/DIR-300-B7.dts
rename to iopsys-ramips/dts/rt5350_dlink_dir-300-b7.dts
index 2b6af163bc55f92be9f7d2567ece3a98cebb58de..bcc02f3cda309519550d5da864c282062d58f5d1 100644
--- a/iopsys-ramips/dts/DIR-300-B7.dts
+++ b/iopsys-ramips/dts/rt5350_dlink_dir-300-b7.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dir-300-b7:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-300-b7:blue:wps";
+			label = "blue:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -51,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -88,12 +86,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -109,5 +105,5 @@
 &wmac {
 	status = "okay";
 	ralink,led-polarity = <1>;
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DIR-320-B1.dts b/iopsys-ramips/dts/rt5350_dlink_dir-320-b1.dts
similarity index 84%
rename from iopsys-ramips/dts/DIR-320-B1.dts
rename to iopsys-ramips/dts/rt5350_dlink_dir-320-b1.dts
index 040a223986c08e006f9aa8bdb84f819af18f2be1..7d9bb0e359e715094dbba851bca6ea13665ff1fa 100644
--- a/iopsys-ramips/dts/DIR-320-B1.dts
+++ b/iopsys-ramips/dts/rt5350_dlink_dir-320-b1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,17 +18,17 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dir-320-b1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		usb {
-			label = "dir-320-b1:green:usb";
+			label = "green:usb";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-320-b1:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -73,7 +71,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -110,12 +108,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -129,13 +125,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/DIR-610-A1.dts b/iopsys-ramips/dts/rt5350_dlink_dir-610-a1.dts
similarity index 88%
rename from iopsys-ramips/dts/DIR-610-A1.dts
rename to iopsys-ramips/dts/rt5350_dlink_dir-610-a1.dts
index 7a0323e219ca1fe87e692fa29f76d914794bc47b..5bd87190a54dc3408ac520fd2552b8331e7c6513 100644
--- a/iopsys-ramips/dts/DIR-610-A1.dts
+++ b/iopsys-ramips/dts/rt5350_dlink_dir-610-a1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "dir-610-a1:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "dir-610-a1:green:wps";
+			label = "green:wps";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -51,7 +49,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -88,12 +86,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/DWR-512-B.dts b/iopsys-ramips/dts/rt5350_dlink_dwr-512-b.dts
similarity index 86%
rename from iopsys-ramips/dts/DWR-512-B.dts
rename to iopsys-ramips/dts/rt5350_dlink_dwr-512-b.dts
index a08ea5d03c9d551d87e9cb7e0ecad2b448ed9c72..48fb1d4ffd254defb57c655d6ba72bb053cb870a 100644
--- a/iopsys-ramips/dts/DWR-512-B.dts
+++ b/iopsys-ramips/dts/rt5350_dlink_dwr-512-b.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -37,27 +35,27 @@
 		compatible = "gpio-leds";
 
 		sms {
-			label = "dwr-512-b:green:sms";
+			label = "green:sms";
 			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
 		};
 		led_status: status {
-			label = "dwr-512-b:green:status";
+			label = "green:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 		2g {
-			label = "dwr-512-b:green:2g";
+			label = "green:2g";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 		3g {
-			label = "dwr-512-b:green:3g";
+			label = "green:3g";
 			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
 		};
 		sstrengthr {
-			label = "dwr-512-b:red:sigstrength";
+			label = "red:sigstrength";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 		sstrengthg {
-			label = "dwr-512-b:green:sigstrength";
+			label = "green:sigstrength";
 			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -125,12 +123,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
diff --git a/iopsys-ramips/dts/WIZARD8800.dts b/iopsys-ramips/dts/rt5350_easyacc_wizard-8800.dts
similarity index 68%
rename from iopsys-ramips/dts/WIZARD8800.dts
rename to iopsys-ramips/dts/rt5350_easyacc_wizard-8800.dts
index af105b5af532d537a13ea180a027be5eef286324..3b1fdd4a8ef52a2d3b09f2470b83e75e139aad56 100644
--- a/iopsys-ramips/dts/WIZARD8800.dts
+++ b/iopsys-ramips/dts/rt5350_easyacc_wizard-8800.dts
@@ -1,24 +1,14 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 / {
-	compatible = "easyacc,wizard8800", "ralink,rt5350-soc";
+	compatible = "easyacc,wizard-8800", "ralink,rt5350-soc";
 	model = "EASYACC WI-STOR WIZARD 8800";
 };
 
-&gpio0 {
-	status = "okay";
-};
-
-&gpio1 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -55,12 +45,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -72,14 +60,6 @@
 	mediatek,portmap = <0x2f>;
 };
 
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MPRA1.dts b/iopsys-ramips/dts/rt5350_hame_mpr-a1.dts
similarity index 83%
rename from iopsys-ramips/dts/MPRA1.dts
rename to iopsys-ramips/dts/rt5350_hame_mpr-a1.dts
index 328351a5507315e879820b56ab34326949d37958..1386ec920b2fc5f0779ce9a8f4f8a46c05e15eaa 100644
--- a/iopsys-ramips/dts/MPRA1.dts
+++ b/iopsys-ramips/dts/rt5350_hame_mpr-a1.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "mpr-a1:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		power {
-			label = "mpr-a1:red:power";
+			label = "red:power";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -62,7 +60,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -99,16 +97,10 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -121,13 +113,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MPRA2.dts b/iopsys-ramips/dts/rt5350_hame_mpr-a2.dts
similarity index 84%
rename from iopsys-ramips/dts/MPRA2.dts
rename to iopsys-ramips/dts/rt5350_hame_mpr-a2.dts
index fedb5b061ee2e47f9b350044cf50fbbb23a13ff2..f9365d5700d36c8a34216a60b6382df3e8f14899 100644
--- a/iopsys-ramips/dts/MPRA2.dts
+++ b/iopsys-ramips/dts/rt5350_hame_mpr-a2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_system: system {
-			label = "mpr-a2:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		power {
-			label = "mpr-a2:red:power";
+			label = "red:power";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -62,7 +60,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -99,12 +97,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -118,13 +114,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/HLKRM04.dts b/iopsys-ramips/dts/rt5350_hilink_hlk-rm04.dts
similarity index 81%
rename from iopsys-ramips/dts/HLKRM04.dts
rename to iopsys-ramips/dts/rt5350_hilink_hlk-rm04.dts
index 7b2791fa62d0365f838eaa827eea3ae8b775c653..83b1fb2a6d0e4953dd45fb389ca8a96cc55c9cb2 100644
--- a/iopsys-ramips/dts/HLKRM04.dts
+++ b/iopsys-ramips/dts/rt5350_hilink_hlk-rm04.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -9,11 +7,6 @@
 	compatible = "hilink,hlk-rm04", "ralink,rt5350-soc";
 	model = "HILINK HLK-RM04";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x1000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS1,57600";
 	};
@@ -60,7 +53,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -97,17 +90,15 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag";
+		function = "gpio";
+	};
 
-		uartf_gpio {
-			ralink,group = "uartf";
-			ralink,function = "gpio uartf";
-		};
+	uartf_gpio {
+		groups = "uartf";
+		function = "gpio uartf";
 	};
 };
 
@@ -116,13 +107,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/HT-TM02.dts b/iopsys-ramips/dts/rt5350_hootoo_ht-tm02.dts
similarity index 82%
rename from iopsys-ramips/dts/HT-TM02.dts
rename to iopsys-ramips/dts/rt5350_hootoo_ht-tm02.dts
index 4e73c6988dd535884fa70a3d21acec88e1fa3094..543fda74b72d44d41dd9365774cb94560c69c930 100644
--- a/iopsys-ramips/dts/HT-TM02.dts
+++ b/iopsys-ramips/dts/rt5350_hootoo_ht-tm02.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_wlan: wlan {
-			label = "ht-tm02:blue:wlan";
+			label = "blue:wlan";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		lan {
-			label = "ht-tm02:green:lan";
+			label = "green:lan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -49,14 +47,10 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -93,12 +87,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -112,13 +104,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/M2M.dts b/iopsys-ramips/dts/rt5350_intenso_memory2move.dts
similarity index 85%
rename from iopsys-ramips/dts/M2M.dts
rename to iopsys-ramips/dts/rt5350_intenso_memory2move.dts
index 122c70e21f3b3198fddda5d2d575b1003afd8d1f..8ab2a87304d4fedd0fa20e28e90058227c79c711 100644
--- a/iopsys-ramips/dts/M2M.dts
+++ b/iopsys-ramips/dts/rt5350_intenso_memory2move.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,12 +22,12 @@
 		compatible = "gpio-leds";
 
 		led_wifi: wifi {
-			label = "m2m:blue:wifi";
+			label = "blue:wifi";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		wan {
-			label = "m2m:green:wan";
+			label = "green:wan";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -55,7 +53,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -78,7 +76,7 @@
 			};
 
 			factory: partition@40000 {
-				label = "Factory";
+				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
 			};
@@ -92,12 +90,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -109,14 +105,6 @@
 	mediatek,portmap = <0x2f>;
 };
 
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
 &wmac {
 	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WT1520-4M.dts b/iopsys-ramips/dts/rt5350_nexx_wt1520-4m.dts
similarity index 94%
rename from iopsys-ramips/dts/WT1520-4M.dts
rename to iopsys-ramips/dts/rt5350_nexx_wt1520-4m.dts
index 1f54efe429b67ec3d37dd1e20adedd0c85b1c661..0b1b57c99a7c77da66d179ef6a6a0bef514c8894 100644
--- a/iopsys-ramips/dts/WT1520-4M.dts
+++ b/iopsys-ramips/dts/rt5350_nexx_wt1520-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WT1520.dtsi"
+#include "rt5350_nexx_wt1520.dtsi"
 
 / {
 	compatible = "nexx,wt1520-4m", "nexx,wt1520", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/WT1520-8M.dts b/iopsys-ramips/dts/rt5350_nexx_wt1520-8m.dts
similarity index 94%
rename from iopsys-ramips/dts/WT1520-8M.dts
rename to iopsys-ramips/dts/rt5350_nexx_wt1520-8m.dts
index e238826aae63644ab4714386bf5c66515ab1f41c..c28dae346815b5bef54ca81e8875685c0df27479 100644
--- a/iopsys-ramips/dts/WT1520-8M.dts
+++ b/iopsys-ramips/dts/rt5350_nexx_wt1520-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "WT1520.dtsi"
+#include "rt5350_nexx_wt1520.dtsi"
 
 / {
 	compatible = "nexx,wt1520-8m", "nexx,wt1520", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/WT1520.dtsi b/iopsys-ramips/dts/rt5350_nexx_wt1520.dtsi
similarity index 59%
rename from iopsys-ramips/dts/WT1520.dtsi
rename to iopsys-ramips/dts/rt5350_nexx_wt1520.dtsi
index 28d498bc87c32d817377f0cb656818c3147e9626..540fd253ebe9810447b80216b6a7b2f66a0b2044 100644
--- a/iopsys-ramips/dts/WT1520.dtsi
+++ b/iopsys-ramips/dts/rt5350_nexx_wt1520.dtsi
@@ -6,11 +6,6 @@
 / {
 	compatible = "nexx,wt1520", "ralink,rt5350-soc";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x2000000>;
-	};
-
 	keys {
 		compatible = "gpio-keys-polled";
 		poll-interval = <20>;
@@ -23,12 +18,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -37,13 +30,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/NIXCORE-16M.dts b/iopsys-ramips/dts/rt5350_nixcore_x1-16m.dts
similarity index 93%
rename from iopsys-ramips/dts/NIXCORE-16M.dts
rename to iopsys-ramips/dts/rt5350_nixcore_x1-16m.dts
index 328217787f85e379db72b89d3faf7085155f2cb8..19b7f39cf41b40eaca2106f35e0910232eee5943 100644
--- a/iopsys-ramips/dts/NIXCORE-16M.dts
+++ b/iopsys-ramips/dts/rt5350_nixcore_x1-16m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "NIXCORE.dtsi"
+#include "rt5350_nixcore_x1.dtsi"
 
 / {
 	compatible = "nixcore,x1-16m", "nixcore,x1", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/NIXCORE-8M.dts b/iopsys-ramips/dts/rt5350_nixcore_x1-8m.dts
similarity index 93%
rename from iopsys-ramips/dts/NIXCORE-8M.dts
rename to iopsys-ramips/dts/rt5350_nixcore_x1-8m.dts
index f32bcf3f497db5ed48238c4c33a8da9bd90f6e7d..888c67ddf01179450cd47d7c905c870a267aa826 100644
--- a/iopsys-ramips/dts/NIXCORE-8M.dts
+++ b/iopsys-ramips/dts/rt5350_nixcore_x1-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "NIXCORE.dtsi"
+#include "rt5350_nixcore_x1.dtsi"
 
 / {
 	compatible = "nixcore,x1-8m", "nixcore,x1", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/NIXCORE.dtsi b/iopsys-ramips/dts/rt5350_nixcore_x1.dtsi
similarity index 90%
rename from iopsys-ramips/dts/NIXCORE.dtsi
rename to iopsys-ramips/dts/rt5350_nixcore_x1.dtsi
index 1702d74db7f25cbef0f8f4f5c9617cc1e7960479..2459c6b65bc43de7172520ba471b2e86813781ad 100644
--- a/iopsys-ramips/dts/NIXCORE.dtsi
+++ b/iopsys-ramips/dts/rt5350_nixcore_x1.dtsi
@@ -108,10 +108,6 @@
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &gpio1 {
 	status = "okay";
 };
@@ -125,12 +121,10 @@
 	reset-names = "gpio uartf";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "led", "spi_cs1";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "led", "spi_cs1";
+		function = "gpio";
 	};
 };
 
@@ -143,13 +137,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/RT5350F-OLINUXINO-EVB.dts b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino-evb.dts
similarity index 91%
rename from iopsys-ramips/dts/RT5350F-OLINUXINO-EVB.dts
rename to iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino-evb.dts
index 5c7b3c7c423f7e8a8d6749ec01928b0d20655ab0..88f4b0e0c9c2e6bf1bdf304e8a99a99cc5a16644 100644
--- a/iopsys-ramips/dts/RT5350F-OLINUXINO-EVB.dts
+++ b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino-evb.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "RT5350F-OLINUXINO.dtsi"
+#include "rt5350_olimex_rt5350f-olinuxino.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
diff --git a/iopsys-ramips/dts/RT5350F-OLINUXINO.dts b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dts
similarity index 69%
rename from iopsys-ramips/dts/RT5350F-OLINUXINO.dts
rename to iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dts
index 2e0dcb155818f9b8bfb90d636d3802b2bac72596..a2b4c8ccfad6ba0e06c6619056ff98649f656de7 100644
--- a/iopsys-ramips/dts/RT5350F-OLINUXINO.dts
+++ b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "RT5350F-OLINUXINO.dtsi"
+#include "rt5350_olimex_rt5350f-olinuxino.dtsi"
 
 / {
 	compatible = "olimex,rt5350f-olinuxino", "ralink,rt5350-soc";
diff --git a/iopsys-ramips/dts/RT5350F-OLINUXINO.dtsi b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dtsi
similarity index 75%
rename from iopsys-ramips/dts/RT5350F-OLINUXINO.dtsi
rename to iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dtsi
index 88b412c8d69c44f5aa92d3484e86e4aabbd93670..7d85109becba5b889fb505dedbffb0eabf815d64 100644
--- a/iopsys-ramips/dts/RT5350F-OLINUXINO.dtsi
+++ b/iopsys-ramips/dts/rt5350_olimex_rt5350f-olinuxino.dtsi
@@ -9,11 +9,10 @@
 	};
 };
 
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -50,20 +49,14 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag";
-			ralink,function = "gpio";
-		};
-		uartf_gpio {
-			ralink,group = "uartf";
-			ralink,function = "gpio uartf";
-		};
+&state_default {
+	gpio {
+		groups = "jtag";
+		function = "gpio";
+	};
+	uartf_gpio {
+		groups = "uartf";
+		function = "gpio uartf";
 	};
 };
 
@@ -77,18 +70,10 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
 
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
-
 &i2c {
 	status = "okay";
 };
@@ -96,4 +81,3 @@
 &uart {
 	status = "okay";
 };
-
diff --git a/iopsys-ramips/dts/MINIEMBPLUG.dts b/iopsys-ramips/dts/rt5350_omnima_miniembplug.dts
similarity index 82%
rename from iopsys-ramips/dts/MINIEMBPLUG.dts
rename to iopsys-ramips/dts/rt5350_omnima_miniembplug.dts
index 5db1ce48a161ce06810e61d75290d78c55432124..499b555da41b4c675769e51360420625b7cfd274 100644
--- a/iopsys-ramips/dts/MINIEMBPLUG.dts
+++ b/iopsys-ramips/dts/rt5350_omnima_miniembplug.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,12 +11,12 @@
 		compatible = "gpio-leds";
 
 		wlan {
-			label = "miniembplug:red:wlan";
+			label = "red:wlan";
 			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
 		};
 
 		mobile {
-			label = "miniembplug:green:mobile";
+			label = "green:mobile";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -55,23 +53,17 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
-&gpio0 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -117,13 +109,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/MZK-DP150N.dts b/iopsys-ramips/dts/rt5350_planex_mzk-dp150n.dts
similarity index 85%
rename from iopsys-ramips/dts/MZK-DP150N.dts
rename to iopsys-ramips/dts/rt5350_planex_mzk-dp150n.dts
index 41fb6e06d8fc0d5677067039c802d80871c6aa2a..d3d1ebe26fc93cf56e28e0abc7613fe482e40227 100644
--- a/iopsys-ramips/dts/MZK-DP150N.dts
+++ b/iopsys-ramips/dts/rt5350_planex_mzk-dp150n.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "mzk-dp150n:green:power";
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -37,14 +35,10 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -89,12 +83,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -107,6 +99,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
diff --git a/iopsys-ramips/dts/M3.dts b/iopsys-ramips/dts/rt5350_poray_m3.dts
similarity index 84%
rename from iopsys-ramips/dts/M3.dts
rename to iopsys-ramips/dts/rt5350_poray_m3.dts
index 1c894aff1271c699214a517a8d7116da81e66128..b6bad0ab77823c5142f364f44484986a408f1ee1 100644
--- a/iopsys-ramips/dts/M3.dts
+++ b/iopsys-ramips/dts/rt5350_poray_m3.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "m3:blue:status";
+			label = "blue:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -47,7 +45,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -84,12 +82,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -103,14 +99,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/M4-4M.dts b/iopsys-ramips/dts/rt5350_poray_m4-4m.dts
similarity index 94%
rename from iopsys-ramips/dts/M4-4M.dts
rename to iopsys-ramips/dts/rt5350_poray_m4-4m.dts
index 53a58b3d490d72e492c93763db3057f912f4bf2c..f6f6a5a332da1e4da69aada146e04dca14290147 100644
--- a/iopsys-ramips/dts/M4-4M.dts
+++ b/iopsys-ramips/dts/rt5350_poray_m4-4m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "M4.dtsi"
+#include "rt5350_poray_m4.dtsi"
 
 / {
 	compatible = "poray,m4-4m", "poray,m4", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/M4-8M.dts b/iopsys-ramips/dts/rt5350_poray_m4-8m.dts
similarity index 94%
rename from iopsys-ramips/dts/M4-8M.dts
rename to iopsys-ramips/dts/rt5350_poray_m4-8m.dts
index b947a36d08aa1f9eacf8452064b013516132270b..2cf5891495b10e5b6a2c4c21df1ad3a417d90499 100644
--- a/iopsys-ramips/dts/M4-8M.dts
+++ b/iopsys-ramips/dts/rt5350_poray_m4-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "M4.dtsi"
+#include "rt5350_poray_m4.dtsi"
 
 / {
 	compatible = "poray,m4-8m", "poray,m4", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/M4.dtsi b/iopsys-ramips/dts/rt5350_poray_m4.dtsi
similarity index 74%
rename from iopsys-ramips/dts/M4.dtsi
rename to iopsys-ramips/dts/rt5350_poray_m4.dtsi
index df8db131e96f8dfedc8233407d65e79cd3c4ddf6..9b36961ffb06699c8cbfafed8a644ac450fc66fe 100644
--- a/iopsys-ramips/dts/M4.dtsi
+++ b/iopsys-ramips/dts/rt5350_poray_m4.dtsi
@@ -17,7 +17,7 @@
 		compatible = "gpio-leds";
 
 		led_status: status {
-			label = "m4:blue:status";
+			label = "blue:status";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -34,12 +34,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -53,14 +51,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/X5.dts b/iopsys-ramips/dts/rt5350_poray_x5.dts
similarity index 84%
rename from iopsys-ramips/dts/X5.dts
rename to iopsys-ramips/dts/rt5350_poray_x5.dts
index 7e3d8b6f03a4dad5541978313a1424acc8c476d4..9c00da82ed1639febeb8d011f3004382610a08c2 100644
--- a/iopsys-ramips/dts/X5.dts
+++ b/iopsys-ramips/dts/rt5350_poray_x5.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,22 +18,22 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "x5:green:power";
+			label = "green:power";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
 		20 {
-			label = "x5:green:20";
+			label = "green:20";
 			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 		};
 
 		50 {
-			label = "x5:green:50";
+			label = "green:50";
 			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 		};
 
 		80 {
-			label = "x5:green:80";
+			label = "green:80";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -79,7 +77,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -116,12 +114,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -135,14 +131,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/X8.dts b/iopsys-ramips/dts/rt5350_poray_x8.dts
similarity index 83%
rename from iopsys-ramips/dts/X8.dts
rename to iopsys-ramips/dts/rt5350_poray_x8.dts
index 3b6d60478fdb7873af2e9b308a9cac90f2f94a9c..b60bb99ee91181a87ca5bf8dcbdc97822a299563 100644
--- a/iopsys-ramips/dts/X8.dts
+++ b/iopsys-ramips/dts/rt5350_poray_x8.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,7 +18,7 @@
 		compatible = "gpio-leds";
 
 		led_power: power {
-			label = "x8:green:power";
+			label = "green:power";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -40,7 +38,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -77,12 +75,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -96,14 +92,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/3G150B.dts b/iopsys-ramips/dts/rt5350_tenda_3g150b.dts
similarity index 83%
rename from iopsys-ramips/dts/3G150B.dts
rename to iopsys-ramips/dts/rt5350_tenda_3g150b.dts
index 9d136255161bd2c193daa37fb17c540517b51e9e..35ccee15848884907c30a8ed81c91b8a83a26f0f 100644
--- a/iopsys-ramips/dts/3G150B.dts
+++ b/iopsys-ramips/dts/rt5350_tenda_3g150b.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		led_ap: ap {
-			label = "3g150b:blue:ap";
+			label = "blue:ap";
 			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 		};
 
 		3g {
-			label = "3g150b:blue:3g";
+			label = "blue:3g";
 			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
@@ -58,7 +56,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -95,16 +93,10 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -117,14 +109,6 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 	ralink,led-polarity = <1>;
 };
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
-};
diff --git a/iopsys-ramips/dts/TEW-714TRU.dts b/iopsys-ramips/dts/rt5350_trendnet_tew-714tru.dts
similarity index 84%
rename from iopsys-ramips/dts/TEW-714TRU.dts
rename to iopsys-ramips/dts/rt5350_trendnet_tew-714tru.dts
index 00e3d2df12eb1c755f84615ce23e882395acba4c..13d1a16741c260532ead20fbcf1ce03df1ddc205 100644
--- a/iopsys-ramips/dts/TEW-714TRU.dts
+++ b/iopsys-ramips/dts/rt5350_trendnet_tew-714tru.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -13,14 +11,14 @@
 		compatible = "gpio-leds";
 
 		usb {
-			label = "tew-714tru:red:usb";
+			label = "red:usb";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 			trigger-sources = <&ohci_port1>, <&ehci_port1>;
 			linux,default-trigger = "usbport";
 		};
 
 		wifi {
-			label = "tew-714tru:green:wifi";
+			label = "green:wifi";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -61,7 +59,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -98,12 +96,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -117,13 +113,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/A5-V11.dts b/iopsys-ramips/dts/rt5350_unbranded_a5-v11.dts
similarity index 83%
rename from iopsys-ramips/dts/A5-V11.dts
rename to iopsys-ramips/dts/rt5350_unbranded_a5-v11.dts
index 707963d691351f17419542570cd04b88a9a2058e..089b85629b90920f754adac068b562470052a437 100644
--- a/iopsys-ramips/dts/A5-V11.dts
+++ b/iopsys-ramips/dts/rt5350_unbranded_a5-v11.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -14,18 +12,19 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
 		system {
-			label = "a5-v11:blue:system";
+			label = "blue:system";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		led_power: power {
-			label = "a5-v11:red:power";
+			label = "red:power";
 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -62,7 +61,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -99,16 +98,10 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -122,13 +115,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/VOCORE-16M.dts b/iopsys-ramips/dts/rt5350_vocore_vocore-16m.dts
similarity index 93%
rename from iopsys-ramips/dts/VOCORE-16M.dts
rename to iopsys-ramips/dts/rt5350_vocore_vocore-16m.dts
index 30781b53b2f44aab06705015c0a731004149d0eb..e28563c6089197ef2691772dc93a516d08c73f42 100644
--- a/iopsys-ramips/dts/VOCORE-16M.dts
+++ b/iopsys-ramips/dts/rt5350_vocore_vocore-16m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "VOCORE.dtsi"
+#include "rt5350_vocore_vocore.dtsi"
 
 / {
 	compatible = "vocore,vocore-16m", "vocore,vocore", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/VOCORE-8M.dts b/iopsys-ramips/dts/rt5350_vocore_vocore-8m.dts
similarity index 93%
rename from iopsys-ramips/dts/VOCORE-8M.dts
rename to iopsys-ramips/dts/rt5350_vocore_vocore-8m.dts
index ec301965c8e6bddfa4f7a0b7fd35d8452f10e328..4fa291a2e2db905825ca26502f67932b87ac3dc7 100644
--- a/iopsys-ramips/dts/VOCORE-8M.dts
+++ b/iopsys-ramips/dts/rt5350_vocore_vocore-8m.dts
@@ -1,6 +1,4 @@
-/dts-v1/;
-
-#include "VOCORE.dtsi"
+#include "rt5350_vocore_vocore.dtsi"
 
 / {
 	compatible = "vocore,vocore-8m", "vocore,vocore", "ralink,rt5350-soc";
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
diff --git a/iopsys-ramips/dts/VOCORE.dtsi b/iopsys-ramips/dts/rt5350_vocore_vocore.dtsi
similarity index 92%
rename from iopsys-ramips/dts/VOCORE.dtsi
rename to iopsys-ramips/dts/rt5350_vocore_vocore.dtsi
index c5c26e77c803b968756810ef5564a7abdd5006a1..0c829196691705a3e1ada4c098536eff4f073677 100644
--- a/iopsys-ramips/dts/VOCORE.dtsi
+++ b/iopsys-ramips/dts/rt5350_vocore_vocore.dtsi
@@ -10,6 +10,7 @@
 		led-failsafe = &led_status;
 		led-running = &led_status;
 		led-upgrade = &led_status;
+		label-mac-device = &ethernet;
 	};
 
 	gpio-export {
@@ -143,13 +144,13 @@
 
 		led_status: status {
 			/* UARTF_RXD */
-			label = "vocore:green:status";
+			label = "green:status";
 			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 		};
 
 		eth {
 			/* UARTF_DTR_N */
-			label = "vocore:orange:eth";
+			label = "orange:eth";
 			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -163,12 +164,10 @@
 	status = "okay";
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uartf", "led";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "uartf", "led";
+		function = "gpio";
 	};
 };
 
@@ -182,15 +181,7 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &spi1 {
diff --git a/iopsys-ramips/dts/NCS601W.dts b/iopsys-ramips/dts/rt5350_wansview_ncs601w.dts
similarity index 77%
rename from iopsys-ramips/dts/NCS601W.dts
rename to iopsys-ramips/dts/rt5350_wansview_ncs601w.dts
index ff6ccd2247113a97cf22ea3c725ab0a67a0d0f3b..adb4034e8a5847e6041e397c4b0916f277d65472 100644
--- a/iopsys-ramips/dts/NCS601W.dts
+++ b/iopsys-ramips/dts/rt5350_wansview_ncs601w.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 / {
@@ -10,7 +8,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -47,12 +45,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -65,13 +61,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/WIZFI630A.dts b/iopsys-ramips/dts/rt5350_wiznet_wizfi630a.dts
similarity index 83%
rename from iopsys-ramips/dts/WIZFI630A.dts
rename to iopsys-ramips/dts/rt5350_wiznet_wizfi630a.dts
index f88d5ae63fa4eb7c742d166a7ab20eb3a465d26e..2cb61011843e00f29ede4ca206f4cb395e24b184 100644
--- a/iopsys-ramips/dts/WIZFI630A.dts
+++ b/iopsys-ramips/dts/rt5350_wiznet_wizfi630a.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,22 +22,22 @@
 		compatible = "gpio-leds";
 
 		led_run: run {
-			label = "wizfi630a::run";
+			label = ":run";
 			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
 		};
 
 		wps {
-			label = "wizfi630a::wps";
+			label = ":wps";
 			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 		};
 
 		uart1 {
-			label = "wizfi630a::uart1";
+			label = ":uart1";
 			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
 		};
 
 		uart2 {
-			label = "wizfi630a::uart2";
+			label = ":uart2";
 			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -74,14 +72,10 @@
 	};
 };
 
-&gpio1 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -128,12 +122,10 @@
 	pinctrl-0 = <&uartf_pins>;
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag" ;
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag" ;
+		function = "gpio";
 	};
 };
 
@@ -146,13 +138,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
-};
-
-&ehci {
-	status = "okay";
-};
-
-&ohci {
-	status = "okay";
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/ZL5900V2.dts b/iopsys-ramips/dts/rt5350_zorlik_zl5900v2.dts
similarity index 85%
rename from iopsys-ramips/dts/ZL5900V2.dts
rename to iopsys-ramips/dts/rt5350_zorlik_zl5900v2.dts
index a59bb238bf6ce4efeeaa37d5ce52255733f03b4a..0879c11206b97c8d2b587f238036d1087c2fc87a 100644
--- a/iopsys-ramips/dts/ZL5900V2.dts
+++ b/iopsys-ramips/dts/rt5350_zorlik_zl5900v2.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "rt5350.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -20,12 +18,12 @@
 		compatible = "gpio-leds";
 
 		lan {
-			label = "zl5900v2:green:lan";
+			label = "green:lan";
 			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
 		};
 
 		led_power: power {
-			label = "zl5900v2:blue:power";
+			label = "blue:power";
 			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
 		};
 	};
@@ -45,7 +43,7 @@
 &spi0 {
 	status = "okay";
 
-	m25p80@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -82,12 +80,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -100,5 +96,5 @@
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/dts/rt5350_zyxel_keenetic-lite-b.dts b/iopsys-ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
new file mode 100644
index 0000000000000000000000000000000000000000..bc16e2c5c1a62b2746c45f45bbfd751abaf4a3bf
--- /dev/null
+++ b/iopsys-ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rt5350.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "zyxel,keenetic-lite-b", "ralink,rt5350-soc";
+	model = "ZyXEL Keenetic Lite Rev.B";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "green:wps";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <60000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uartf";
+		function = "gpio";
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+	mediatek,led_polarity = <0x17>;
+};
+
+&wmac {
+	ralink,led-polarity = <1>;
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/iopsys-ramips/dts/kn_st.dts b/iopsys-ramips/dts/rt5350_zyxel_keenetic-start.dts
similarity index 80%
rename from iopsys-ramips/dts/kn_st.dts
rename to iopsys-ramips/dts/rt5350_zyxel_keenetic-start.dts
index 16ab9567c0d6a6431af62fa2597b2ce52cbb6645..eb7d7ed46bb83cf20b81b37a05cb2051f5f66aa4 100644
--- a/iopsys-ramips/dts/kn_st.dts
+++ b/iopsys-ramips/dts/rt5350_zyxel_keenetic-start.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
 
 #include "rt5350.dtsi"
 
@@ -11,22 +10,23 @@
 	model = "ZyXEL Keenetic Start";
 
 	aliases {
-		led-boot = &led_status;
-		led-failsafe = &led_status;
-		led-running = &led_status;
-		led-upgrade = &led_status;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
 	};
 
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: power {
-			label = "zyxel:green:power";
+		led_power: power {
+			label = "green:power";
 			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
 		};
 
 		internet {
-			label = "zyxel:green:internet";
+			label = "green:internet";
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -89,12 +89,10 @@
 	};
 };
 
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "i2c", "jtag", "uartf";
-			ralink,function = "gpio";
-		};
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "uartf";
+		function = "gpio";
 	};
 };
 
@@ -102,7 +100,6 @@
 	mtd-mac-address = <&factory 0x28>;
 };
 
-
 &esw {
 	mediatek,portmap = <0x2f>;
 	mediatek,led_polarity = <0x17>;
@@ -111,5 +108,5 @@
 &wmac {
 	status = "okay";
 	ralink,led-polarity = <1>;
-	ralink,mtd-eeprom = <&factory 0>;
+	ralink,mtd-eeprom = <&factory 0x0>;
 };
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Kconfig b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Kconfig
deleted file mode 100644
index 822806fd856f3b1e6687188c42d08151af565f33..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Kconfig
+++ /dev/null
@@ -1,70 +0,0 @@
-config NET_VENDOR_MEDIATEK
-	tristate "Mediatek/Ralink ethernet driver"
-	depends on RALINK
-	help
-	  This driver supports the ethernet mac inside the Mediatek and Ralink WiSoCs
-
-config NET_MEDIATEK_SOC
-	def_tristate NET_VENDOR_MEDIATEK
-
-if NET_MEDIATEK_SOC
-choice
-	prompt "MAC type"
-
-config NET_MEDIATEK_RT2880
-	bool "RT2882"
-	depends on MIPS && SOC_RT288X
-
-config NET_MEDIATEK_RT3050
-	bool "RT3050/MT7628"
-	depends on MIPS && (SOC_RT305X || SOC_MT7620)
-
-config NET_MEDIATEK_RT3883
-	bool "RT3883"
-	depends on MIPS && SOC_RT3883
-
-config NET_MEDIATEK_MT7620
-	bool "MT7620"
-	depends on MIPS && SOC_MT7620
-
-config NET_MEDIATEK_MT7621
-	bool "MT7621"
-	depends on MIPS && SOC_MT7621
-
-endchoice
-
-config NET_MEDIATEK_OFFLOAD
-	def_bool NET_MEDIATEK_SOC
-	depends on NET_MEDIATEK_MT7621
-
-config NET_MEDIATEK_HW_QOS
-	def_bool NET_MEDIATEK_SOC
-	depends on NET_MEDIATEK_MT7623
-
-config NET_MEDIATEK_MDIO
-	def_bool NET_MEDIATEK_SOC
-	depends on (NET_MEDIATEK_RT2880 || NET_MEDIATEK_RT3883 || NET_MEDIATEK_MT7620 || NET_MEDIATEK_MT7621)
-	select PHYLIB
-
-config NET_MEDIATEK_MDIO_RT2880
-	def_bool NET_MEDIATEK_SOC
-	depends on (NET_MEDIATEK_RT2880 || NET_MEDIATEK_RT3883)
-	select NET_MEDIATEK_MDIO
-
-config NET_MEDIATEK_MDIO_MT7620
-	def_bool NET_MEDIATEK_SOC
-	depends on (NET_MEDIATEK_MT7620 || NET_MEDIATEK_MT7621)
-	select NET_MEDIATEK_MDIO
-
-config NET_MEDIATEK_ESW_RT3050
-	def_tristate NET_MEDIATEK_SOC
-	depends on NET_MEDIATEK_RT3050
-
-config NET_MEDIATEK_GSW_MT7620
-	def_tristate NET_MEDIATEK_SOC
-	depends on NET_MEDIATEK_MT7620
-
-config NET_MEDIATEK_GSW_MT7621
-	def_tristate NET_MEDIATEK_SOC
-	depends on NET_MEDIATEK_MT7621
-endif
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Makefile b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Makefile
deleted file mode 100644
index b038ae369948a10ebdd360e76d41354970efae66..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# Makefile for the Ralink SoCs built-in ethernet macs
-#
-
-mtk-eth-soc-y					+= mtk_eth_soc.o ethtool.o
-
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO)		+= mdio.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO_RT2880)	+= mdio_rt2880.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO_MT7620)	+= mdio_mt7620.o
-
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_OFFLOAD)	+= mtk_offload.o mtk_debugfs.o
-
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_RT2880)	+= soc_rt2880.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_RT3050)	+= soc_rt3050.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_RT3883)	+= soc_rt3883.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7620)	+= soc_mt7620.o
-mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7621)	+= soc_mt7621.o
-
-obj-$(CONFIG_NET_MEDIATEK_ESW_RT3050)		+= esw_rt3050.o
-obj-$(CONFIG_NET_MEDIATEK_GSW_MT7620)		+= gsw_mt7620.o mt7530.o
-obj-$(CONFIG_NET_MEDIATEK_GSW_MT7621)		+= gsw_mt7621.o mt7530.o
-obj-$(CONFIG_NET_MEDIATEK_SOC)			+= mtk-eth-soc.o
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7621.c b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7621.c
deleted file mode 100644
index 89be23900738095a8180532d5dd7e585f01bb7c4..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7621.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/*   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; version 2 of the License
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   Copyright (C) 2009-2015 John Crispin <blogic@openwrt.org>
- *   Copyright (C) 2009-2015 Felix Fietkau <nbd@nbd.name>
- *   Copyright (C) 2013-2015 Michael Lee <igvtee@gmail.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/platform_device.h>
-#include <linux/of_device.h>
-#include <linux/of_irq.h>
-
-#include <ralink_regs.h>
-
-#include "mtk_eth_soc.h"
-#include "gsw_mt7620.h"
-
-void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned reg)
-{
-	iowrite32(val, gsw->base + reg);
-}
-
-u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned reg)
-{
-	return ioread32(gsw->base + reg);
-}
-
-static irqreturn_t gsw_interrupt_mt7621(int irq, void *_priv)
-{
-	struct fe_priv *priv = (struct fe_priv *)_priv;
-	struct mt7620_gsw *gsw = (struct mt7620_gsw *)priv->soc->swpriv;
-	u32 reg, i;
-
-	reg = mt7530_mdio_r32(gsw, 0x700c);
-	mt7530_mdio_w32(gsw, 0x700c, reg);
-
-	for (i = 0; i < 5; i++)
-		if (reg & BIT(i)) {
-			unsigned int link;
-
-			link = mt7530_mdio_r32(gsw,
-					       0x3008 + (i * 0x100)) & 0x1;
-
-			if (link != priv->link[i]) {
-				priv->link[i] = link;
-				if (link)
-					netdev_info(priv->netdev,
-						    "port %d link up\n", i);
-				else
-					netdev_info(priv->netdev,
-						    "port %d link down\n", i);
-			}
-		}
-
-	mt7620_handle_carrier(priv);
-
-	return IRQ_HANDLED;
-}
-
-static void mt7621_hw_init(struct mt7620_gsw *gsw, struct device_node *np)
-{
-	u32 i;
-	u32 val;
-
-	/* wardware reset the switch */
-	fe_reset(RST_CTRL_MCM);
-	mdelay(10);
-
-	/* reduce RGMII2 PAD driving strength */
-	rt_sysc_m32(3 << 4, 0, SYSC_PAD_RGMII2_MDIO);
-
-	/* gpio mux - RGMII1=Normal mode */
-	rt_sysc_m32(BIT(14), 0, SYSC_GPIO_MODE);
-
-	/* set GMAC1 RGMII mode */
-	rt_sysc_m32(3 << 12, 0, SYSC_REG_CFG1);
-
-	/* enable MDIO to control MT7530 */
-	rt_sysc_m32(3 << 12, 0, SYSC_GPIO_MODE);
-
-	/* turn off all PHYs */
-	for (i = 0; i <= 4; i++) {
-		val = _mt7620_mii_read(gsw, i, 0x0);
-		val |= BIT(11);
-		_mt7620_mii_write(gsw, i, 0x0, val);
-	}
-
-	/* reset the switch */
-	mt7530_mdio_w32(gsw, 0x7000, 0x3);
-	usleep_range(10, 20);
-
-	if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) {
-		/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
-		mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR);
-		mt7530_mdio_w32(gsw, 0x3600, 0x5e30b);
-	} else {
-		/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
-		mtk_switch_w32(gsw, 0x2305e33b, GSW_REG_MAC_P0_MCR);
-		mt7530_mdio_w32(gsw, 0x3600, 0x5e33b);
-	}
-
-	/* (GE2, Link down) */
-	mtk_switch_w32(gsw, 0x8000, GSW_REG_MAC_P1_MCR);
-
-	/* Set switch max RX frame length to 2k */
-	mt7530_mdio_w32(gsw, GSW_REG_GMACCR, 0x3F0B);
-
-	/* Enable Port 6, P5 as GMAC5, P5 disable */
-	val = mt7530_mdio_r32(gsw, 0x7804);
-	val &= ~BIT(8);
-	val |= BIT(6) | BIT(13) | BIT(16);
-	mt7530_mdio_w32(gsw, 0x7804, val);
-
-	val = rt_sysc_r32(0x10);
-	val = (val >> 6) & 0x7;
-	if (val >= 6) {
-		/* 25Mhz Xtal - do nothing */
-	} else if (val >= 3) {
-		/* 40Mhz */
-
-		/* disable MT7530 core clock */
-		_mt7620_mii_write(gsw, 0, 13, 0x1f);
-		_mt7620_mii_write(gsw, 0, 14, 0x410);
-		_mt7620_mii_write(gsw, 0, 13, 0x401f);
-		_mt7620_mii_write(gsw, 0, 14, 0x0);
-
-		/* disable MT7530 PLL */
-		_mt7620_mii_write(gsw, 0, 13, 0x1f);
-		_mt7620_mii_write(gsw, 0, 14, 0x40d);
-		_mt7620_mii_write(gsw, 0, 13, 0x401f);
-		_mt7620_mii_write(gsw, 0, 14, 0x2020);
-
-		/* for MT7530 core clock = 500Mhz */
-		_mt7620_mii_write(gsw, 0, 13, 0x1f);
-		_mt7620_mii_write(gsw, 0, 14, 0x40e);
-		_mt7620_mii_write(gsw, 0, 13, 0x401f);
-		_mt7620_mii_write(gsw, 0, 14, 0x119);
-
-		/* enable MT7530 PLL */
-		_mt7620_mii_write(gsw, 0, 13, 0x1f);
-		_mt7620_mii_write(gsw, 0, 14, 0x40d);
-		_mt7620_mii_write(gsw, 0, 13, 0x401f);
-		_mt7620_mii_write(gsw, 0, 14, 0x2820);
-
-		usleep_range(20, 40);
-
-		/* enable MT7530 core clock */
-		_mt7620_mii_write(gsw, 0, 13, 0x1f);
-		_mt7620_mii_write(gsw, 0, 14, 0x410);
-		_mt7620_mii_write(gsw, 0, 13, 0x401f);
-	} else {
-		/* 20Mhz Xtal - TODO */
-	}
-
-	/* RGMII */
-	_mt7620_mii_write(gsw, 0, 14, 0x1);
-
-	/* set MT7530 central align */
-	val = mt7530_mdio_r32(gsw, 0x7830);
-	val &= ~BIT(0);
-	val |= BIT(1);
-	mt7530_mdio_w32(gsw, 0x7830, val);
-	val = mt7530_mdio_r32(gsw, 0x7a40);
-	val &= ~BIT(30);
-	mt7530_mdio_w32(gsw, 0x7a40, val);
-	mt7530_mdio_w32(gsw, 0x7a78, 0x855);
-
-	/* delay setting for 10/1000M */
-	mt7530_mdio_w32(gsw, 0x7b00, 0x102);
-	mt7530_mdio_w32(gsw, 0x7b04, 0x14);
-
-	/* lower Tx Driving*/
-	mt7530_mdio_w32(gsw, 0x7a54, 0x44);
-	mt7530_mdio_w32(gsw, 0x7a5c, 0x44);
-	mt7530_mdio_w32(gsw, 0x7a64, 0x44);
-	mt7530_mdio_w32(gsw, 0x7a6c, 0x44);
-	mt7530_mdio_w32(gsw, 0x7a74, 0x44);
-	mt7530_mdio_w32(gsw, 0x7a7c, 0x44);
-
-	/* turn on all PHYs */
-	for (i = 0; i <= 4; i++) {
-		val = _mt7620_mii_read(gsw, i, 0);
-		val &= ~BIT(11);
-		_mt7620_mii_write(gsw, i, 0, val);
-	}
-
-	/* enable irq */
-	mt7530_mdio_w32(gsw, 0x7008, 0x1f);
-	val = mt7530_mdio_r32(gsw, 0x7808);
-	val |= 3 << 16;
-	mt7530_mdio_w32(gsw, 0x7808, val);
-}
-
-static const struct of_device_id mediatek_gsw_match[] = {
-	{ .compatible = "mediatek,mt7621-gsw" },
-	{},
-};
-MODULE_DEVICE_TABLE(of, mediatek_gsw_match);
-
-int mtk_gsw_init(struct fe_priv *priv)
-{
-	struct device_node *np = priv->switch_np;
-	struct platform_device *pdev = of_find_device_by_node(np);
-	struct mt7620_gsw *gsw;
-
-	if (!pdev)
-		return -ENODEV;
-
-	if (!of_device_is_compatible(np, mediatek_gsw_match->compatible))
-		return -EINVAL;
-
-	gsw = platform_get_drvdata(pdev);
-	priv->soc->swpriv = gsw;
-
-	if (gsw->irq) {
-		request_irq(gsw->irq, gsw_interrupt_mt7621, 0,
-			    "gsw", priv);
-		disable_irq(gsw->irq);
-	}
-
-	mt7621_hw_init(gsw, np);
-
-	if (gsw->irq)
-		enable_irq(gsw->irq);
-
-	return 0;
-}
-
-static int mt7621_gsw_probe(struct platform_device *pdev)
-{
-	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	struct mt7620_gsw *gsw;
-
-	gsw = devm_kzalloc(&pdev->dev, sizeof(struct mt7620_gsw), GFP_KERNEL);
-	if (!gsw)
-		return -ENOMEM;
-
-	gsw->base = devm_ioremap_resource(&pdev->dev, res);
-	if (IS_ERR(gsw->base))
-		return PTR_ERR(gsw->base);
-
-	gsw->dev = &pdev->dev;
-	gsw->irq = platform_get_irq(pdev, 0);
-
-	platform_set_drvdata(pdev, gsw);
-
-	return 0;
-}
-
-static int mt7621_gsw_remove(struct platform_device *pdev)
-{
-	platform_set_drvdata(pdev, NULL);
-
-	return 0;
-}
-
-static struct platform_driver gsw_driver = {
-	.probe = mt7621_gsw_probe,
-	.remove = mt7621_gsw_remove,
-	.driver = {
-		.name = "mt7621-gsw",
-		.owner = THIS_MODULE,
-		.of_match_table = mediatek_gsw_match,
-	},
-};
-
-module_platform_driver(gsw_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
-MODULE_DESCRIPTION("GBit switch driver for Mediatek MT7621 SoC");
-MODULE_VERSION(MTK_FE_DRV_VERSION);
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_debugfs.c b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_debugfs.c
deleted file mode 100644
index 2938119e891e751d0622b5cb933b6bdbb2e0a977..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_debugfs.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; version 2 of the License
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   Copyright (C) 2014-2016 Sean Wang <sean.wang@mediatek.com>
- *   Copyright (C) 2016-2017 John Crispin <blogic@openwrt.org>
- */
-
-#include "mtk_offload.h"
-
-static const char *mtk_foe_entry_state_str[] = {
-	"INVALID",
-	"UNBIND",
-	"BIND",
-	"FIN"
-};
-
-static const char *mtk_foe_packet_type_str[] = {
-	"IPV4_HNAPT",
-	"IPV4_HNAT",
-	"IPV6_1T_ROUTE",
-	"IPV4_DSLITE",
-	"IPV6_3T_ROUTE",
-	"IPV6_5T_ROUTE",
-	"IPV6_6RD",
-};
-
-#define IPV4_HNAPT                      0
-#define IPV4_HNAT                       1
-#define IS_IPV4_HNAPT(x)	(((x)->bfib1.pkt_type == IPV4_HNAPT) ? 1: 0)
-struct mtk_eth *_eth;
-#define es(entry)		(mtk_foe_entry_state_str[entry->bfib1.state])
-//#define ei(entry, end)		(MTK_PPE_TBL_SZ - (int)(end - entry))
-#define ei(entry, end)		(MTK_PPE_ENTRY_CNT - (int)(end - entry))
-#define pt(entry)		(mtk_foe_packet_type_str[entry->ipv4_hnapt.bfib1.pkt_type])
-
-static int mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private)
-{
-	struct mtk_eth *eth = _eth;
-	struct mtk_foe_entry *entry, *end;
-	int i = 0;
-
-	entry = eth->foe_table;
-	end = eth->foe_table + MTK_PPE_ENTRY_CNT;
-
-	while (entry < end) {
-		if (IS_IPV4_HNAPT(entry)) {
-			__be32 saddr = htonl(entry->ipv4_hnapt.sip);
-			__be32 daddr = htonl(entry->ipv4_hnapt.dip);
-			__be32 nsaddr = htonl(entry->ipv4_hnapt.new_sip);
-			__be32 ndaddr = htonl(entry->ipv4_hnapt.new_dip);
-			unsigned char h_dest[ETH_ALEN];
-			unsigned char h_source[ETH_ALEN];
-
-			*((u32*) h_source) = swab32(entry->ipv4_hnapt.smac_hi);
-			*((u16*) &h_source[4]) = swab16(entry->ipv4_hnapt.smac_lo);
-			*((u32*) h_dest) = swab32(entry->ipv4_hnapt.dmac_hi);
-			*((u16*) &h_dest[4]) = swab16(entry->ipv4_hnapt.dmac_lo);
-			seq_printf(m,
-				   "(%x)0x%05x|state=%s|type=%s|"
-				   "%pI4:%d->%pI4:%d=>%pI4:%d->%pI4:%d|%pM=>%pM|"
-				   "etype=0x%04x|info1=0x%x|info2=0x%x|"
-				   "vlan1=%d|vlan2=%d\n",
-				   i,
-				   ei(entry, end), es(entry), pt(entry),
-				   &saddr, entry->ipv4_hnapt.sport,
-				   &daddr, entry->ipv4_hnapt.dport,
-				   &nsaddr, entry->ipv4_hnapt.new_sport,
-				   &ndaddr, entry->ipv4_hnapt.new_dport, h_source,
-				   h_dest, ntohs(entry->ipv4_hnapt.etype),
-				   entry->ipv4_hnapt.info_blk1,
-				   entry->ipv4_hnapt.info_blk2,
-				   entry->ipv4_hnapt.vlan1,
-				   entry->ipv4_hnapt.vlan2);
-		} else
-			seq_printf(m, "0x%05x state=%s\n",
-				   ei(entry, end), es(entry));
-		entry++;
-		i++;
-	}
-
-	return 0;
-}
-
-static int mtk_ppe_debugfs_foe_open(struct inode *inode, struct file *file)
-{
-	return single_open(file, mtk_ppe_debugfs_foe_show, file->private_data);
-}
-
-static const struct file_operations mtk_ppe_debugfs_foe_fops = {
-	.open = mtk_ppe_debugfs_foe_open,
-	.read = seq_read,
-	.llseek = seq_lseek,
-	.release = single_release,
-};
-
-int mtk_ppe_debugfs_init(struct mtk_eth *eth)
-{
-	struct dentry *root;
-
-	_eth = eth;
-
-	root = debugfs_create_dir("mtk_ppe", NULL);
-	if (!root)
-		return -ENOMEM;
-
-	debugfs_create_file("all_entry", S_IRUGO, root, eth, &mtk_ppe_debugfs_foe_fops);
-
-	return 0;
-}
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.c b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.c
deleted file mode 100644
index 6c23bbc036c8271e1555b572e2de7411354ec2b3..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/*   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; version 2 of the License
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   Copyright (C) 2018 John Crispin <john@phrozen.org>
- */
-
-#include "mtk_offload.h"
-
-#define INVALID	0
-#define UNBIND	1
-#define BIND	2
-#define FIN	3
-
-#define IPV4_HNAPT			0
-#define IPV4_HNAT			1
-
-static u32
-mtk_flow_hash_v4(struct flow_offload_tuple *tuple)
-{
-	u32 ports = ntohs(tuple->src_port)  << 16 | ntohs(tuple->dst_port);
-	u32 src = ntohl(tuple->dst_v4.s_addr);
-	u32 dst = ntohl(tuple->src_v4.s_addr);
-	u32 hash = (ports & src) | ((~ports) & dst);
-	u32 hash_23_0 = hash & 0xffffff;
-	u32 hash_31_24 = hash & 0xff000000;
-
-	hash = ports ^ src ^ dst ^ ((hash_23_0 << 8) | (hash_31_24 >> 24));
-	hash = ((hash & 0xffff0000) >> 16 ) ^ (hash & 0xfffff);
-	hash &= 0x7ff;
-	hash *= 2;;
-
-	return hash;
-}
-
-static int
-mtk_foe_prepare_v4(struct mtk_foe_entry *entry,
-		   struct flow_offload_tuple *tuple,
-		   struct flow_offload_tuple *dest_tuple,
-		   struct flow_offload_hw_path *src,
-		   struct flow_offload_hw_path *dest)
-{
-	int is_mcast = !!is_multicast_ether_addr(dest->eth_dest);
-
-	if (tuple->l4proto == IPPROTO_UDP)
-		entry->ipv4_hnapt.bfib1.udp = 1;
-
-	entry->ipv4_hnapt.etype = htons(ETH_P_IP);
-	entry->ipv4_hnapt.bfib1.pkt_type = IPV4_HNAPT;
-	entry->ipv4_hnapt.iblk2.fqos = 0;
-	entry->ipv4_hnapt.bfib1.ttl = 1;
-	entry->ipv4_hnapt.bfib1.cah = 1;
-	entry->ipv4_hnapt.bfib1.ka = 1;
-	entry->ipv4_hnapt.iblk2.mcast = is_mcast;
-	entry->ipv4_hnapt.iblk2.dscp = 0;
-	entry->ipv4_hnapt.iblk2.port_mg = 0x3f;
-	entry->ipv4_hnapt.iblk2.port_ag = 0x1f;
-#ifdef CONFIG_NET_MEDIATEK_HW_QOS
-	entry->ipv4_hnapt.iblk2.qid = 1;
-	entry->ipv4_hnapt.iblk2.fqos = 1;
-#endif
-#ifdef CONFIG_RALINK
-	entry->ipv4_hnapt.iblk2.dp = 1;
-	if ((dest->flags & FLOW_OFFLOAD_PATH_VLAN) && (dest->vlan_id > 1))
-		entry->ipv4_hnapt.iblk2.qid += 8;
-#else
-	entry->ipv4_hnapt.iblk2.dp = (dest->dev->name[3] - '0') + 1;
-#endif
-
-	entry->ipv4_hnapt.sip = ntohl(tuple->src_v4.s_addr);
-	entry->ipv4_hnapt.dip = ntohl(tuple->dst_v4.s_addr);
-	entry->ipv4_hnapt.sport = ntohs(tuple->src_port);
-	entry->ipv4_hnapt.dport = ntohs(tuple->dst_port);
-
-	entry->ipv4_hnapt.new_sip = ntohl(dest_tuple->dst_v4.s_addr);
-	entry->ipv4_hnapt.new_dip = ntohl(dest_tuple->src_v4.s_addr);
-	entry->ipv4_hnapt.new_sport = ntohs(dest_tuple->dst_port);
-	entry->ipv4_hnapt.new_dport = ntohs(dest_tuple->src_port);
-
-	entry->bfib1.state = BIND;
-
-	if (dest->flags & FLOW_OFFLOAD_PATH_PPPOE) {
-		entry->bfib1.psn = 1;
-		entry->ipv4_hnapt.etype = htons(ETH_P_PPP_SES);
-		entry->ipv4_hnapt.pppoe_id = dest->pppoe_sid;
-	}
-
-	if (dest->flags & FLOW_OFFLOAD_PATH_VLAN) {
-		entry->ipv4_hnapt.vlan1 = dest->vlan_id;
-		entry->bfib1.vlan_layer = 1;
-
-		switch (dest->vlan_proto) {
-		case htons(ETH_P_8021Q):
-			entry->ipv4_hnapt.bfib1.vpm = 1;
-			break;
-		case htons(ETH_P_8021AD):
-			entry->ipv4_hnapt.bfib1.vpm = 2;
-			break;
-		default:
-			return -EINVAL;
-		}
-	}
-
-	return 0;
-}
-
-static void
-mtk_foe_set_mac(struct mtk_foe_entry *entry, u8 *smac, u8 *dmac)
-{
-	entry->ipv4_hnapt.dmac_hi = swab32(*((u32*) dmac));
-	entry->ipv4_hnapt.dmac_lo = swab16(*((u16*) &dmac[4]));
-	entry->ipv4_hnapt.smac_hi = swab32(*((u32*) smac));
-	entry->ipv4_hnapt.smac_lo = swab16(*((u16*) &smac[4]));
-}
-
-static int
-mtk_check_entry_available(struct mtk_eth *eth, u32 hash)
-{
-	struct mtk_foe_entry entry = ((struct mtk_foe_entry *)eth->foe_table)[hash];
-
-	return (entry.bfib1.state == BIND)? 0:1;
-}
-
-static void
-mtk_foe_write(struct mtk_eth *eth, u32 hash,
-	      struct mtk_foe_entry *entry)
-{
-	struct mtk_foe_entry *table = (struct mtk_foe_entry *)eth->foe_table;
-
-	memcpy(&table[hash], entry, sizeof(*entry));
-}
-
-int mtk_flow_offload(struct mtk_eth *eth,
-		     enum flow_offload_type type,
-		     struct flow_offload *flow,
-		     struct flow_offload_hw_path *src,
-		     struct flow_offload_hw_path *dest)
-{
-	struct flow_offload_tuple *otuple = &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple;
-	struct flow_offload_tuple *rtuple = &flow->tuplehash[FLOW_OFFLOAD_DIR_REPLY].tuple;
-	u32 time_stamp = mtk_r32(eth, 0x0010) & (0x7fff);
-	u32 ohash, rhash;
-	struct mtk_foe_entry orig = {
-		.bfib1.time_stamp = time_stamp,
-		.bfib1.psn = 0,
-	};
-	struct mtk_foe_entry reply = {
-		.bfib1.time_stamp = time_stamp,
-		.bfib1.psn = 0,
-	};
-
-	if (otuple->l4proto != IPPROTO_TCP && otuple->l4proto != IPPROTO_UDP)
-		return -EINVAL;
-	
-	if (type == FLOW_OFFLOAD_DEL) {
-		flow = NULL;
-		synchronize_rcu();
-		return 0;
-	}
-
-	switch (otuple->l3proto) {
-	case AF_INET:
-		if (mtk_foe_prepare_v4(&orig, otuple, rtuple, src, dest) ||
-		    mtk_foe_prepare_v4(&reply, rtuple, otuple, dest, src))
-			return -EINVAL;
-
-		ohash = mtk_flow_hash_v4(otuple);
-		rhash = mtk_flow_hash_v4(rtuple);
-		break;
-
-	case AF_INET6:
-		return -EINVAL;
-
-	default:
-		return -EINVAL;
-	}
-
-	/* Two-way hash: when hash collision occurs, the hash value will be shifted to the next position. */
-	if (!mtk_check_entry_available(eth, ohash)){       
-		if (!mtk_check_entry_available(eth, ohash + 1))
-			return -EINVAL;
-                ohash += 1;
-        }
-        if (!mtk_check_entry_available(eth, rhash)){
-		if (!mtk_check_entry_available(eth, rhash + 1))
-                        return -EINVAL;
-                rhash += 1;
-	}
-
-	mtk_foe_set_mac(&orig, dest->eth_src, dest->eth_dest);
-	mtk_foe_set_mac(&reply, src->eth_src, src->eth_dest);
-	mtk_foe_write(eth, ohash, &orig);
-	mtk_foe_write(eth, rhash, &reply);
-	rcu_assign_pointer(eth->foe_flow_table[ohash], flow);
-	rcu_assign_pointer(eth->foe_flow_table[rhash], flow);
-
-	return 0;
-}
-
-#ifdef CONFIG_NET_MEDIATEK_HW_QOS
-
-#define QDMA_TX_SCH_TX	  0x1a14
-
-static void mtk_ppe_scheduler(struct mtk_eth *eth, int id, u32 rate)
-{
-	int exp = 0, shift = 0;
-	u32 reg = mtk_r32(eth, QDMA_TX_SCH_TX);
-	u32 val = 0;
-
-	if (rate)
-		val = BIT(11);
-
-	while (rate > 127) {
-		rate /= 10;
-		exp++;
-	}
-
-	val |= (rate & 0x7f) << 4;
-	val |= exp & 0xf;
-	if (id)
-		shift = 16;
-	reg &= ~(0xffff << shift);
-	reg |= val << shift;
-	mtk_w32(eth, val, QDMA_TX_SCH_TX);
-}
-
-#define QTX_CFG(x)	(0x1800 + (x * 0x10))
-#define QTX_SCH(x)	(0x1804 + (x * 0x10))
-
-static void mtk_ppe_queue(struct mtk_eth *eth, int id, int sched, int weight, int resv, u32 min_rate, u32 max_rate)
-{
-	int max_exp = 0, min_exp = 0;
-	u32 reg;
-
-	if (id >= 16)
-		return;
-
-	reg = mtk_r32(eth, QTX_SCH(id));
-	reg &= 0x70000000;
-
-	if (sched)
-		reg |= BIT(31);
-
-	if (min_rate)
-		reg |= BIT(27);
-
-	if (max_rate)
-		reg |= BIT(11);
-
-	while (max_rate > 127) {
-		max_rate /= 10;
-		max_exp++;
-	}
-
-	while (min_rate > 127) {
-		min_rate /= 10;
-		min_exp++;
-	}
-
-	reg |= (min_rate & 0x7f) << 20;
-	reg |= (min_exp & 0xf) << 16;
-	reg |= (weight & 0xf) << 12;
-	reg |= (max_rate & 0x7f) << 4;
-	reg |= max_exp & 0xf;
-	mtk_w32(eth, reg, QTX_SCH(id));
-
-	resv &= 0xff;
-	reg = mtk_r32(eth, QTX_CFG(id));
-	reg &= 0xffff0000;
-	reg |= (resv << 8) | resv;
-	mtk_w32(eth, reg, QTX_CFG(id));
-}
-#endif
-
-static int mtk_init_foe_table(struct mtk_eth *eth)
-{
-	if (eth->foe_table)
-		return 0;
-
-	eth->foe_flow_table = devm_kcalloc(eth->dev, MTK_PPE_ENTRY_CNT,
-					   sizeof(*eth->foe_flow_table),
-					   GFP_KERNEL);
-	if (!eth->foe_flow_table)
-		return -EINVAL;
-
-	/* map the FOE table */
-	eth->foe_table = dmam_alloc_coherent(eth->dev, MTK_PPE_TBL_SZ,
-					     &eth->foe_table_phys, GFP_KERNEL);
-	if (!eth->foe_table) {
-		dev_err(eth->dev, "failed to allocate foe table\n");
-		kfree(eth->foe_flow_table);
-		return -ENOMEM;
-	}
-
-
-	return 0;
-}
-
-static int mtk_ppe_start(struct mtk_eth *eth)
-{
-	int ret;
-
-	ret = mtk_init_foe_table(eth);
-	if (ret)
-		return ret;
-
-	/* tell the PPE about the tables base address */
-	mtk_w32(eth, eth->foe_table_phys, MTK_REG_PPE_TB_BASE);
-
-	/* flush the table */
-	memset(eth->foe_table, 0, MTK_PPE_TBL_SZ);
-
-	/* setup hashing */
-	mtk_m32(eth,
-		MTK_PPE_TB_CFG_HASH_MODE_MASK | MTK_PPE_TB_CFG_TBL_SZ_MASK,
-		MTK_PPE_TB_CFG_HASH_MODE1 | MTK_PPE_TB_CFG_TBL_SZ_4K,
-		MTK_REG_PPE_TB_CFG);
-
-	/* set the default hashing seed */
-	mtk_w32(eth, MTK_PPE_HASH_SEED, MTK_REG_PPE_HASH_SEED);
-
-	/* each foe entry is 64bytes and is setup by cpu forwarding*/
-	mtk_m32(eth, MTK_PPE_CAH_CTRL_X_MODE | MTK_PPE_TB_CFG_ENTRY_SZ_MASK |
-		MTK_PPE_TB_CFG_SMA_MASK,
-		MTK_PPE_TB_CFG_ENTRY_SZ_64B |  MTK_PPE_TB_CFG_SMA_FWD_CPU,
-		MTK_REG_PPE_TB_CFG);
-
-	/* set ip proto */
-	mtk_w32(eth, 0xFFFFFFFF, MTK_REG_PPE_IP_PROT_CHK);
-
-	/* setup caching */
-	mtk_m32(eth, 0, MTK_PPE_CAH_CTRL_X_MODE, MTK_REG_PPE_CAH_CTRL);
-	mtk_m32(eth, MTK_PPE_CAH_CTRL_X_MODE, MTK_PPE_CAH_CTRL_EN,
-		MTK_REG_PPE_CAH_CTRL);
-
-	/* enable FOE */
-	mtk_m32(eth, 0, MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN |
-		MTK_PPE_FLOW_CFG_IPV4_NAPT_EN | MTK_PPE_FLOW_CFG_IPV4_NAT_EN |
-		MTK_PPE_FLOW_CFG_IPV4_GREK_EN,
-		MTK_REG_PPE_FLOW_CFG);
-
-	/* setup flow entry un/bind aging */
-	mtk_m32(eth, 0,
-		MTK_PPE_TB_CFG_UNBD_AGE | MTK_PPE_TB_CFG_NTU_AGE |
-		MTK_PPE_TB_CFG_FIN_AGE | MTK_PPE_TB_CFG_UDP_AGE |
-		MTK_PPE_TB_CFG_TCP_AGE,
-		MTK_REG_PPE_TB_CFG);
-
-	mtk_m32(eth, MTK_PPE_UNB_AGE_MNP_MASK | MTK_PPE_UNB_AGE_DLTA_MASK,
-		MTK_PPE_UNB_AGE_MNP | MTK_PPE_UNB_AGE_DLTA,
-		MTK_REG_PPE_UNB_AGE);
-	mtk_m32(eth, MTK_PPE_BND_AGE0_NTU_DLTA_MASK |
-		MTK_PPE_BND_AGE0_UDP_DLTA_MASK,
-		MTK_PPE_BND_AGE0_NTU_DLTA | MTK_PPE_BND_AGE0_UDP_DLTA,
-		MTK_REG_PPE_BND_AGE0);
-	mtk_m32(eth, MTK_PPE_BND_AGE1_FIN_DLTA_MASK |
-		MTK_PPE_BND_AGE1_TCP_DLTA_MASK,
-		MTK_PPE_BND_AGE1_FIN_DLTA | MTK_PPE_BND_AGE1_TCP_DLTA,
-		MTK_REG_PPE_BND_AGE1);
-
-	/* setup flow entry keep alive */
-	mtk_m32(eth, MTK_PPE_TB_CFG_KA_MASK, MTK_PPE_TB_CFG_KA,
-		MTK_REG_PPE_TB_CFG);
-	mtk_w32(eth, MTK_PPE_KA_UDP | MTK_PPE_KA_TCP | MTK_PPE_KA_T, MTK_REG_PPE_KA);
-
-	/* setup flow entry rate limit */
-	mtk_w32(eth, (0x3fff << 16) | 0x3fff, MTK_REG_PPE_BIND_LMT_0);
-	mtk_w32(eth, MTK_PPE_NTU_KA | 0x3fff, MTK_REG_PPE_BIND_LMT_1);
-	mtk_m32(eth, MTK_PPE_BNDR_RATE_MASK, 1, MTK_REG_PPE_BNDR);
-
-	/* enable the PPE */
-	mtk_m32(eth, 0, MTK_PPE_GLO_CFG_EN, MTK_REG_PPE_GLO_CFG);
-
-#ifdef CONFIG_RALINK
-	/* set the default forwarding port to QDMA */
-	mtk_w32(eth, 0x0, MTK_REG_PPE_DFT_CPORT);
-#else
-	/* set the default forwarding port to QDMA */
-	mtk_w32(eth, 0x55555555, MTK_REG_PPE_DFT_CPORT);
-#endif
-
-	/* allow packets with TTL=0 */
-	mtk_m32(eth, MTK_PPE_GLO_CFG_TTL0_DROP, 0, MTK_REG_PPE_GLO_CFG);
-
-	/* send all traffic from gmac to the ppe */
-	mtk_m32(eth, 0xffff, 0x4444, MTK_GDMA_FWD_CFG(0));
-	mtk_m32(eth, 0xffff, 0x4444, MTK_GDMA_FWD_CFG(1));
-
-	dev_info(eth->dev, "PPE started\n");
-
-#ifdef CONFIG_NET_MEDIATEK_HW_QOS
-	mtk_ppe_scheduler(eth, 0, 500000);
-	mtk_ppe_scheduler(eth, 1, 500000);
-	mtk_ppe_queue(eth, 0, 0, 7, 32, 250000, 0);
-	mtk_ppe_queue(eth, 1, 0, 7, 32, 250000, 0);
-	mtk_ppe_queue(eth, 8, 1, 7, 32, 250000, 0);
-	mtk_ppe_queue(eth, 9, 1, 7, 32, 250000, 0);
-#endif
-
-	return 0;
-}
-
-static int mtk_ppe_busy_wait(struct mtk_eth *eth)
-{
-	unsigned long t_start = jiffies;
-	u32 r = 0;
-
-	while (1) {
-		r = mtk_r32(eth, MTK_REG_PPE_GLO_CFG);
-		if (!(r & MTK_PPE_GLO_CFG_BUSY))
-			return 0;
-		if (time_after(jiffies, t_start + HZ))
-			break;
-		usleep_range(10, 20);
-	}
-
-	dev_err(eth->dev, "ppe: table busy timeout - resetting\n");
-	reset_control_reset(eth->rst_ppe);
-
-	return -ETIMEDOUT;
-}
-
-static int mtk_ppe_stop(struct mtk_eth *eth)
-{
-	u32 r1 = 0, r2 = 0;
-	int i;
-
-	/* discard all traffic while we disable the PPE */
-	mtk_m32(eth, 0xffff, 0x7777, MTK_GDMA_FWD_CFG(0));
-	mtk_m32(eth, 0xffff, 0x7777, MTK_GDMA_FWD_CFG(1));
-
-	if (mtk_ppe_busy_wait(eth))
-		return -ETIMEDOUT;
-
-	/* invalidate all flow table entries */
-	for (i = 0; i < MTK_PPE_ENTRY_CNT; i++)
-		eth->foe_table[i].bfib1.state = FOE_STATE_INVALID;
-
-	/* disable caching */
-	mtk_m32(eth, 0, MTK_PPE_CAH_CTRL_X_MODE, MTK_REG_PPE_CAH_CTRL);
-	mtk_m32(eth, MTK_PPE_CAH_CTRL_X_MODE | MTK_PPE_CAH_CTRL_EN, 0,
-		MTK_REG_PPE_CAH_CTRL);
-
-	/* flush cache has to be ahead of hnat diable --*/
-	mtk_m32(eth, MTK_PPE_GLO_CFG_EN, 0, MTK_REG_PPE_GLO_CFG);
-
-	/* disable FOE */
-	mtk_m32(eth,
-		MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN |
-		MTK_PPE_FLOW_CFG_IPV4_NAPT_EN | MTK_PPE_FLOW_CFG_IPV4_NAT_EN |
-		MTK_PPE_FLOW_CFG_FUC_FOE | MTK_PPE_FLOW_CFG_FMC_FOE,
-		0, MTK_REG_PPE_FLOW_CFG);
-
-	/* disable FOE aging */
-	mtk_m32(eth, 0,
-		MTK_PPE_TB_CFG_FIN_AGE | MTK_PPE_TB_CFG_UDP_AGE |
-		MTK_PPE_TB_CFG_TCP_AGE | MTK_PPE_TB_CFG_UNBD_AGE |
-		MTK_PPE_TB_CFG_NTU_AGE, MTK_REG_PPE_TB_CFG);
-
-	r1 = mtk_r32(eth, 0x100);
-	r2 = mtk_r32(eth, 0x10c);
-
-	dev_info(eth->dev, "0x100 = 0x%x, 0x10c = 0x%x\n", r1, r2);
-
-	if (((r1 & 0xff00) >> 0x8) >= (r1 & 0xff) ||
-	    ((r1 & 0xff00) >> 0x8) >= (r2 & 0xff)) {
-		dev_info(eth->dev, "reset pse\n");
-		mtk_w32(eth, 0x1, 0x4);
-	}
-
-	/* set the foe entry base address to 0 */
-	mtk_w32(eth, 0, MTK_REG_PPE_TB_BASE);
-
-	if (mtk_ppe_busy_wait(eth))
-		return -ETIMEDOUT;
-
-	/* send all traffic back to the DMA engine */
-#ifdef CONFIG_RALINK
-	mtk_m32(eth, 0xffff, 0x0, MTK_GDMA_FWD_CFG(0));
-	mtk_m32(eth, 0xffff, 0x0, MTK_GDMA_FWD_CFG(1));
-#else
-	mtk_m32(eth, 0xffff, 0x5555, MTK_GDMA_FWD_CFG(0));
-	mtk_m32(eth, 0xffff, 0x5555, MTK_GDMA_FWD_CFG(1));
-#endif
-	return 0;
-}
-
-static void mtk_offload_keepalive(struct fe_priv *eth, unsigned int hash)
-{
-	struct flow_offload *flow;
-
-	rcu_read_lock();
-	flow = rcu_dereference(eth->foe_flow_table[hash]);
-	if (flow)
-		flow->timeout = jiffies + 30 * HZ;
-	rcu_read_unlock();
-}
-
-int mtk_offload_check_rx(struct fe_priv *eth, struct sk_buff *skb, u32 rxd4)
-{
-	unsigned int hash;
-
-	switch (FIELD_GET(MTK_RXD4_CPU_REASON, rxd4)) {
-	case MTK_CPU_REASON_KEEPALIVE_UC_OLD_HDR:
-	case MTK_CPU_REASON_KEEPALIVE_MC_NEW_HDR:
-	case MTK_CPU_REASON_KEEPALIVE_DUP_OLD_HDR:
-		hash = FIELD_GET(MTK_RXD4_FOE_ENTRY, rxd4);
-		mtk_offload_keepalive(eth, hash);
-		return -1;
-	case MTK_CPU_REASON_PACKET_SAMPLING:
-		return -1;
-	default:
-		return 0;
-	}
-}
-
-int mtk_ppe_probe(struct mtk_eth *eth)
-{
-	int err;
-
-	err = mtk_ppe_start(eth);
-	if (err)
-		return err;
-
-	err = mtk_ppe_debugfs_init(eth);
-	if (err)
-		return err;
-
-	return 0;
-}
-
-void mtk_ppe_remove(struct mtk_eth *eth)
-{
-	mtk_ppe_stop(eth);
-}
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.h b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.h
deleted file mode 100644
index f714c90f92257d2a52ad9bc47df1d3432e7d5462..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_offload.h
+++ /dev/null
@@ -1,260 +0,0 @@
-/*   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; version 2 of the License
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   Copyright (C) 2014-2016 Sean Wang <sean.wang@mediatek.com>
- *   Copyright (C) 2016-2017 John Crispin <blogic@openwrt.org>
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/delay.h>
-#include <linux/if.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/reset.h>
-#include <linux/netfilter.h>
-#include <linux/netdevice.h>
-#include <net/netfilter/nf_flow_table.h>
-#include <linux/debugfs.h>
-#include <linux/etherdevice.h>
-#include <linux/bitfield.h>
-
-#include "mtk_eth_soc.h"
-
-#ifdef CONFIG_RALINK
-/* ramips compat */
-#define mtk_eth					fe_priv
-#define MTK_GDMA_FWD_CFG(x)			(0x500 + (x * 0x1000))
-#define mtk_m32					fe_m32
-
-static inline u32
-mtk_r32(struct mtk_eth *eth, u32 reg)
-{
-	return fe_r32(reg);
-}
-
-static inline void
-mtk_w32(struct mtk_eth *eth, u32 val, u32 reg)
-{
-	fe_w32(val, reg);
-}
-#endif
-
-#define MTK_REG_PPE_GLO_CFG			0xe00
-#define   MTK_PPE_GLO_CFG_BUSY			BIT(31)
-#define   MTK_PPE_GLO_CFG_TTL0_DROP		BIT(4)
-#define   MTK_PPE_GLO_CFG_EN			BIT(0)
-
-#define MTK_REG_PPE_FLOW_CFG			0xe04
-#define   MTK_PPE_FLOW_CFG_IPV4_GREK_EN		BIT(19)
-#define   MTK_PPE_FLOW_CFG_IPV4_NAT_FRAG_EN	BIT(17)
-#define   MTK_PPE_FLOW_CFG_IPV4_NAPT_EN		BIT(13)
-#define   MTK_PPE_FLOW_CFG_IPV4_NAT_EN		BIT(12)
-#define   MTK_PPE_FLOW_CFG_FUC_FOE		BIT(2)
-#define   MTK_PPE_FLOW_CFG_FMC_FOE		BIT(1)
-
-#define MTK_REG_PPE_IP_PROT_CHK			0xe08
-
-#define MTK_REG_PPE_TB_BASE			0xe20
-
-#define MTK_REG_PPE_BNDR			0xe28
-#define   MTK_PPE_BNDR_RATE_MASK		0xffff
-
-#define MTK_REG_PPE_BIND_LMT_0			0xe2C
-
-#define MTK_REG_PPE_BIND_LMT_1			0xe30
-#define   MTK_PPE_NTU_KA			BIT(16)
-
-#define MTK_REG_PPE_KA				0xe34
-#define   MTK_PPE_KA_T				BIT(0)
-#define   MTK_PPE_KA_TCP			BIT(16)
-#define   MTK_PPE_KA_UDP			BIT(24)
-
-#define MTK_REG_PPE_UNB_AGE			0xe38
-#define   MTK_PPE_UNB_AGE_MNP_MASK		(0xffff << 16)
-#define   MTK_PPE_UNB_AGE_MNP			(1000 << 16)
-#define   MTK_PPE_UNB_AGE_DLTA_MASK		0xff
-#define   MTK_PPE_UNB_AGE_DLTA			3
-
-#define MTK_REG_PPE_BND_AGE0			0xe3c
-#define   MTK_PPE_BND_AGE0_NTU_DLTA_MASK	(0xffff << 16)
-#define   MTK_PPE_BND_AGE0_NTU_DLTA		(5 << 16)
-#define   MTK_PPE_BND_AGE0_UDP_DLTA_MASK	0xffff
-#define   MTK_PPE_BND_AGE0_UDP_DLTA		5
-
-#define MTK_REG_PPE_BND_AGE1			0xe40
-#define   MTK_PPE_BND_AGE1_FIN_DLTA_MASK	(0xffff << 16)
-#define   MTK_PPE_BND_AGE1_FIN_DLTA		(5 << 16)
-#define   MTK_PPE_BND_AGE1_TCP_DLTA_MASK	0xffff
-#define   MTK_PPE_BND_AGE1_TCP_DLTA		5
-
-#define MTK_REG_PPE_DFT_CPORT			0xe48
-
-#define MTK_REG_PPE_TB_CFG			0xe1c
-#define   MTK_PPE_TB_CFG_X_MODE_MASK		(3 << 18)
-#define   MTK_PPE_TB_CFG_HASH_MODE1		BIT(14)
-#define   MTK_PPE_TB_CFG_HASH_MODE_MASK		(0x3 << 14)
-#define   MTK_PPE_TB_CFG_KA			(3 << 12)
-#define   MTK_PPE_TB_CFG_KA_MASK		(0x3 << 12)
-#define   MTK_PPE_TB_CFG_FIN_AGE		BIT(11)
-#define   MTK_PPE_TB_CFG_UDP_AGE		BIT(10)
-#define   MTK_PPE_TB_CFG_TCP_AGE		BIT(9)
-#define   MTK_PPE_TB_CFG_UNBD_AGE		BIT(8)
-#define   MTK_PPE_TB_CFG_NTU_AGE		BIT(7)
-#define   MTK_PPE_TB_CFG_SMA_FWD_CPU		(0x3 << 4)
-#define   MTK_PPE_TB_CFG_SMA_MASK		(0x3 << 4)
-#define   MTK_PPE_TB_CFG_ENTRY_SZ_64B		0
-#define   MTK_PPE_TB_CFG_ENTRY_SZ_MASK		BIT(3)
-#define   MTK_PPE_TB_CFG_TBL_SZ_4K		2
-#define   MTK_PPE_TB_CFG_TBL_SZ_MASK		0x7
-
-#define MTK_REG_PPE_HASH_SEED			0xe44
-#define   MTK_PPE_HASH_SEED			0x12345678
-
-
-#define MTK_REG_PPE_CAH_CTRL			0xf20
-#define   MTK_PPE_CAH_CTRL_X_MODE		BIT(9)
-#define   MTK_PPE_CAH_CTRL_EN			BIT(0)
-
-struct mtk_foe_unbind_info_blk {
-	u32 time_stamp:8;
-	u32 pcnt:16;		/* packet count */
-	u32 preb:1;
-	u32 pkt_type:3;
-	u32 state:2;
-	u32 udp:1;
-	u32 sta:1;		/* static entry */
-} __attribute__ ((packed));
-
-struct mtk_foe_bind_info_blk {
-	u32 time_stamp:15;
-	u32 ka:1;		/* keep alive */
-	u32 vlan_layer:3;
-	u32 psn:1;		/* egress packet has PPPoE session */
-#ifdef CONFIG_RALINK
-	u32 vpm:2;		/* 0:ethertype remark, 1:0x8100(CR default) */
-#else
-	u32 vpm:1;		/* 0:ethertype remark, 1:0x8100(CR default) */
-	u32 ps:1;		/* packet sampling */
-#endif
-	u32 cah:1;		/* cacheable flag */
-	u32 rmt:1;		/* remove tunnel ip header (6rd/dslite only) */
-	u32 ttl:1;
-	u32 pkt_type:3;
-	u32 state:2;
-	u32 udp:1;
-	u32 sta:1;		/* static entry */
-} __attribute__ ((packed));
-
-struct mtk_foe_info_blk2 {
-	u32 qid:4;		/* QID in Qos Port */
-	u32 fqos:1;		/* force to PSE QoS port */
-	u32 dp:3;		/* force to PSE port x 
-				 0:PSE,1:GSW, 2:GMAC,4:PPE,5:QDMA,7=DROP */
-	u32 mcast:1;		/* multicast this packet to CPU */
-	u32 pcpl:1;		/* OSBN */
-	u32 mlen:1;		/* 0:post 1:pre packet length in meter */
-	u32 alen:1;		/* 0:post 1:pre packet length in accounting */
-	u32 port_mg:6;		/* port meter group */
-	u32 port_ag:6;		/* port account group */
-	u32 dscp:8;		/* DSCP value */
-} __attribute__ ((packed));
-
-struct mtk_foe_ipv4_hnapt {
-	union {
-		struct mtk_foe_bind_info_blk bfib1;
-		struct mtk_foe_unbind_info_blk udib1;
-		u32 info_blk1;
-	};
-	u32 sip;
-	u32 dip;
-	u16 dport;
-	u16 sport;
-	union {
-		struct mtk_foe_info_blk2 iblk2;
-		u32 info_blk2;
-	};
-	u32 new_sip;
-	u32 new_dip;
-	u16 new_dport;
-	u16 new_sport;
-	u32 resv1;
-	u32 resv2;
-	u32 resv3:26;
-	u32 act_dp:6;		/* UDF */
-	u16 vlan1;
-	u16 etype;
-	u32 dmac_hi;
-	u16 vlan2;
-	u16 dmac_lo;
-	u32 smac_hi;
-	u16 pppoe_id;
-	u16 smac_lo;
-} __attribute__ ((packed));
-
-struct mtk_foe_entry {
-	union {
-		struct mtk_foe_unbind_info_blk udib1;
-		struct mtk_foe_bind_info_blk bfib1;
-		struct mtk_foe_ipv4_hnapt ipv4_hnapt;
-	};
-};
-
-enum mtk_foe_entry_state {
-	FOE_STATE_INVALID = 0,
-	FOE_STATE_UNBIND = 1,
-	FOE_STATE_BIND = 2,
-	FOE_STATE_FIN = 3
-};
-
-
-#define MTK_RXD4_FOE_ENTRY		GENMASK(13, 0)
-#define MTK_RXD4_CPU_REASON		GENMASK(18, 14)
-#define MTK_RXD4_SRC_PORT		GENMASK(21, 19)
-#define MTK_RXD4_ALG			GENMASK(31, 22)
-
-enum mtk_foe_cpu_reason {
-	MTK_CPU_REASON_TTL_EXCEEDED		= 0x02,
-	MTK_CPU_REASON_OPTION_HEADER		= 0x03,
-	MTK_CPU_REASON_NO_FLOW			= 0x07,
-	MTK_CPU_REASON_IPV4_FRAG		= 0x08,
-	MTK_CPU_REASON_IPV4_DSLITE_FRAG		= 0x09,
-	MTK_CPU_REASON_IPV4_DSLITE_NO_TCP_UDP	= 0x0a,
-	MTK_CPU_REASON_IPV6_6RD_NO_TCP_UDP	= 0x0b,
-	MTK_CPU_REASON_TCP_FIN_SYN_RST		= 0x0c,
-	MTK_CPU_REASON_UN_HIT			= 0x0d,
-	MTK_CPU_REASON_HIT_UNBIND		= 0x0e,
-	MTK_CPU_REASON_HIT_UNBIND_RATE_REACHED	= 0x0f,
-	MTK_CPU_REASON_HIT_BIND_TCP_FIN		= 0x10,
-	MTK_CPU_REASON_HIT_TTL_1		= 0x11,
-	MTK_CPU_REASON_HIT_BIND_VLAN_VIOLATION	= 0x12,
-	MTK_CPU_REASON_KEEPALIVE_UC_OLD_HDR	= 0x13,
-	MTK_CPU_REASON_KEEPALIVE_MC_NEW_HDR	= 0x14,
-	MTK_CPU_REASON_KEEPALIVE_DUP_OLD_HDR	= 0x15,
-	MTK_CPU_REASON_HIT_BIND_FORCE_CPU	= 0x16,
-	MTK_CPU_REASON_TUNNEL_OPTION_HEADER	= 0x17,
-	MTK_CPU_REASON_MULTICAST_TO_CPU		= 0x18,
-	MTK_CPU_REASON_MULTICAST_TO_GMAC1_CPU	= 0x19,
-	MTK_CPU_REASON_HIT_PRE_BIND		= 0x1a,
-	MTK_CPU_REASON_PACKET_SAMPLING		= 0x1b,
-	MTK_CPU_REASON_EXCEED_MTU		= 0x1c,
-	MTK_CPU_REASON_PPE_BYPASS		= 0x1e,
-	MTK_CPU_REASON_INVALID			= 0x1f,
-};
-
-
-/* our table size is 4K */
-#define MTK_PPE_ENTRY_CNT		0x1000
-#define MTK_PPE_TBL_SZ			\
-			(MTK_PPE_ENTRY_CNT * sizeof(struct mtk_foe_entry))
-
-int mtk_ppe_debugfs_init(struct mtk_eth *eth);
-
-
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7621.c b/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7621.c
deleted file mode 100644
index 26a198fa2b486d658ad1b4651f20dfcfbf6c3c28..0000000000000000000000000000000000000000
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7621.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; version 2 of the License
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   Copyright (C) 2009-2015 John Crispin <blogic@openwrt.org>
- *   Copyright (C) 2009-2015 Felix Fietkau <nbd@nbd.name>
- *   Copyright (C) 2013-2015 Michael Lee <igvtee@gmail.com>
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/if_vlan.h>
-#include <linux/of_net.h>
-
-#include <asm/mach-ralink/ralink_regs.h>
-
-#include "mtk_eth_soc.h"
-#include "gsw_mt7620.h"
-#include "mt7530.h"
-#include "mdio.h"
-
-#define MT7620A_CDMA_CSG_CFG	0x400
-#define MT7621_CDMP_IG_CTRL	(MT7620A_CDMA_CSG_CFG + 0x00)
-#define MT7621_CDMP_EG_CTRL	(MT7620A_CDMA_CSG_CFG + 0x04)
-#define MT7621_RESET_FE		BIT(6)
-#define MT7621_L4_VALID		BIT(24)
-
-#define MT7621_TX_DMA_UDF	BIT(19)
-#define MT7621_TX_DMA_FPORT	BIT(25)
-
-#define CDMA_ICS_EN		BIT(2)
-#define CDMA_UCS_EN		BIT(1)
-#define CDMA_TCS_EN		BIT(0)
-
-#define GDMA_ICS_EN		BIT(22)
-#define GDMA_TCS_EN		BIT(21)
-#define GDMA_UCS_EN		BIT(20)
-
-/* frame engine counters */
-#define MT7621_REG_MIB_OFFSET	0x2000
-#define MT7621_PPE_AC_BCNT0	(MT7621_REG_MIB_OFFSET + 0x00)
-#define MT7621_GDM1_TX_GBCNT	(MT7621_REG_MIB_OFFSET + 0x400)
-#define MT7621_GDM2_TX_GBCNT	(MT7621_GDM1_TX_GBCNT + 0x40)
-
-#define GSW_REG_GDMA1_MAC_ADRL	0x508
-#define GSW_REG_GDMA1_MAC_ADRH	0x50C
-
-#define MT7621_FE_RST_GL	(FE_FE_OFFSET + 0x04)
-#define MT7620_FE_INT_STATUS2	(FE_FE_OFFSET + 0x08)
-
-/* FE_INT_STATUS reg on mt7620 define CNT_GDM1_AF at BIT(29)
- * but after test it should be BIT(13).
- */
-#define MT7620_FE_GDM1_AF	BIT(13)
-#define MT7621_FE_GDM1_AF	BIT(28)
-#define MT7621_FE_GDM2_AF	BIT(29)
-
-static const u16 mt7621_reg_table[FE_REG_COUNT] = {
-	[FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
-	[FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG,
-	[FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG,
-	[FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
-	[FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
-	[FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
-	[FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0,
-	[FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
-	[FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
-	[FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
-	[FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0,
-	[FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
-	[FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
-	[FE_REG_FE_DMA_VID_BASE] = 0,
-	[FE_REG_FE_COUNTER_BASE] = MT7621_GDM1_TX_GBCNT,
-	[FE_REG_FE_RST_GL] = MT7621_FE_RST_GL,
-	[FE_REG_FE_INT_STATUS2] = MT7620_FE_INT_STATUS2,
-};
-
-static int mt7621_gsw_config(struct fe_priv *priv)
-{
-	if (priv->mii_bus &&  mdiobus_get_phy(priv->mii_bus, 0x1f))
-		mt7530_probe(priv->dev, NULL, priv->mii_bus, 1);
-
-	return 0;
-}
-
-static void mt7621_fe_reset(void)
-{
-	fe_reset(MT7621_RESET_FE);
-}
-
-static void mt7621_rxcsum_config(bool enable)
-{
-	if (enable)
-		fe_w32(fe_r32(MT7620A_GDMA1_FWD_CFG) | (GDMA_ICS_EN |
-					GDMA_TCS_EN | GDMA_UCS_EN),
-				MT7620A_GDMA1_FWD_CFG);
-	else
-		fe_w32(fe_r32(MT7620A_GDMA1_FWD_CFG) & ~(GDMA_ICS_EN |
-					GDMA_TCS_EN | GDMA_UCS_EN),
-				MT7620A_GDMA1_FWD_CFG);
-}
-
-static void mt7621_rxvlan_config(bool enable)
-{
-	if (enable)
-		fe_w32(1, MT7621_CDMP_EG_CTRL);
-	else
-		fe_w32(0, MT7621_CDMP_EG_CTRL);
-}
-
-static int mt7621_fwd_config(struct fe_priv *priv)
-{
-	struct net_device *dev = priv_netdev(priv);
-
-	fe_w32(fe_r32(MT7620A_GDMA1_FWD_CFG) & ~0xffff,
-	       MT7620A_GDMA1_FWD_CFG);
-
-	/* mt7621 doesn't have txcsum config */
-	mt7621_rxcsum_config((dev->features & NETIF_F_RXCSUM));
-	mt7621_rxvlan_config(dev->features & NETIF_F_HW_VLAN_CTAG_RX);
-
-	return 0;
-}
-
-static void mt7621_tx_dma(struct fe_tx_dma *txd)
-{
-	txd->txd4 = MT7621_TX_DMA_FPORT;
-}
-
-static void mt7621_init_data(struct fe_soc_data *data,
-			     struct net_device *netdev)
-{
-	struct fe_priv *priv = netdev_priv(netdev);
-
-	priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET |
-		FE_FLAG_RX_SG_DMA | FE_FLAG_NAPI_WEIGHT |
-		FE_FLAG_HAS_SWITCH | FE_FLAG_JUMBO_FRAME;
-
-	netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
-		NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
-		NETIF_F_SG | NETIF_F_TSO |
-		NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |
-		NETIF_F_TSO_MANGLEID;
-}
-
-static void mt7621_set_mac(struct fe_priv *priv, unsigned char *mac)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&priv->page_lock, flags);
-	fe_w32((mac[0] << 8) | mac[1], GSW_REG_GDMA1_MAC_ADRH);
-	fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
-	       GSW_REG_GDMA1_MAC_ADRL);
-	spin_unlock_irqrestore(&priv->page_lock, flags);
-}
-
-static struct fe_soc_data mt7621_data = {
-	.init_data = mt7621_init_data,
-	.reset_fe = mt7621_fe_reset,
-	.set_mac = mt7621_set_mac,
-	.fwd_config = mt7621_fwd_config,
-	.tx_dma = mt7621_tx_dma,
-	.switch_init = mtk_gsw_init,
-	.switch_config = mt7621_gsw_config,
-	.reg_table = mt7621_reg_table,
-	.pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS,
-	.rx_int = RT5350_RX_DONE_INT,
-	.tx_int = RT5350_TX_DONE_INT,
-	.status_int = (MT7621_FE_GDM1_AF | MT7621_FE_GDM2_AF),
-	.checksum_bit = MT7621_L4_VALID,
-	.has_carrier = mt7620_has_carrier,
-	.mdio_read = mt7620_mdio_read,
-	.mdio_write = mt7620_mdio_write,
-	.mdio_adjust_link = mt7620_mdio_link_adjust,
-};
-
-const struct of_device_id of_fe_match[] = {
-	{ .compatible = "mediatek,mt7621-eth", .data = &mt7621_data },
-	{},
-};
-
-MODULE_DEVICE_TABLE(of, of_fe_match);
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/Kconfig b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/Kconfig
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/Kconfig
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/Kconfig
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/Makefile b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/Makefile
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/Makefile
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/Makefile
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/board.h b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/board.h
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/board.h
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/board.h
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/dbg.c b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/dbg.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/dbg.c
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/dbg.c
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/dbg.h b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/dbg.h
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/dbg.h
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/dbg.h
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/mt6575_sd.h b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/mt6575_sd.h
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/mt6575_sd.h
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/mt6575_sd.h
diff --git a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/sd.c
similarity index 99%
rename from iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
rename to iopsys-ramips/files/drivers/mmc/host/mtk-mmc/sd.c
index 4ced4b6605e196c3b1f5769e6472631fc52cfa52..188e0155722e1b016937c2b994bf186d818964ab 100644
--- a/iopsys-ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
+++ b/iopsys-ramips/files/drivers/mmc/host/mtk-mmc/sd.c
@@ -439,6 +439,8 @@ static void msdc_tasklet_card(struct work_struct *work)
 		inserted = (status & MSDC_PS_CDSTS) ? 0 : 1;
 	else
 		inserted = (status & MSDC_PS_CDSTS) ? 1 : 0;
+	if (host->mmc->caps & MMC_CAP_NEEDS_POLL)
+		inserted = 1;
 
 #if 0
 	change = host->card_inserted ^ inserted;
@@ -1857,6 +1859,8 @@ static int msdc_ops_get_cd(struct mmc_host *mmc)
 			present = (sdr_read32(MSDC_PS) & MSDC_PS_CDSTS) ? 0 : 1;
 		else
 			present = (sdr_read32(MSDC_PS) & MSDC_PS_CDSTS) ? 1 : 0;
+		if (host->mmc->caps & MMC_CAP_NEEDS_POLL)
+			present = 1;
 		host->card_inserted = present;
 #endif
 		spin_unlock_irqrestore(&host->lock, flags);
@@ -2205,16 +2209,12 @@ static int msdc_drv_probe(struct platform_device *pdev)
 	struct msdc_host *host;
 	struct msdc_hw *hw;
 	int ret;
-	u32 reg;
 
 	//FIXME: this should be done by pinconf and not by the sd driver
-	if (ralink_soc == MT762X_SOC_MT7688 ||
-	    ralink_soc == MT762X_SOC_MT7628AN) {
-		/* set EPHY pads to digital mode */
-		reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c));
-		reg |= 0x1e << 16;
-		sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg);
-	}
+	if ((ralink_soc == MT762X_SOC_MT7688 ||
+	     ralink_soc == MT762X_SOC_MT7628AN) &&
+	    (!(rt_sysc_r32(0x60) & BIT(15))))
+		rt_sysc_m32(0xf << 17, 0xf << 17, 0x3c);
 
 	hw = &msdc0_hw;
 
@@ -2288,7 +2288,7 @@ static int msdc_drv_probe(struct platform_device *pdev)
 	host->mrq = NULL;
 	//init_MUTEX(&host->sem); /* we don't need to support multiple threads access */
 
-	mmc_dev(mmc)->dma_mask = NULL;
+	dma_coerce_mask_and_coherent(mmc_dev(mmc), DMA_BIT_MASK(32));
 
 	/* using dma_alloc_coherent*/  /* todo: using 1, for all 4 slots */
 	host->dma.gpd = dma_alloc_coherent(&pdev->dev,
diff --git a/iopsys-ramips/files/drivers/net/ethernet/ralink/Kconfig b/iopsys-ramips/files/drivers/net/ethernet/ralink/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..26e5e6d73ed98fc9c295e19f60656c2cd11f8ed8
--- /dev/null
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/Kconfig
@@ -0,0 +1,58 @@
+config NET_VENDOR_RALINK
+	tristate "Ralink ethernet driver"
+	depends on RALINK
+	help
+	  This driver supports the ethernet mac inside Ralink WiSoCs
+
+config NET_RALINK_SOC
+	def_tristate NET_VENDOR_RALINK
+
+if NET_RALINK_SOC
+choice
+	prompt "MAC type"
+
+config NET_RALINK_RT2880
+	bool "RT2882"
+	depends on MIPS && SOC_RT288X
+
+config NET_RALINK_RT3050
+	bool "RT3050/MT7628"
+	depends on MIPS && (SOC_RT305X || SOC_MT7620)
+
+config NET_RALINK_RT3883
+	bool "RT3883"
+	depends on MIPS && SOC_RT3883
+
+config NET_RALINK_MT7620
+	bool "MT7620"
+	depends on MIPS && SOC_MT7620
+
+endchoice
+
+config NET_RALINK_HW_QOS
+	def_bool NET_RALINK_SOC
+	depends on NET_RALINK_MT7623
+
+config NET_RALINK_MDIO
+	def_bool NET_RALINK_SOC
+	depends on (NET_RALINK_RT2880 || NET_RALINK_RT3883 || NET_RALINK_MT7620)
+	select PHYLIB
+
+config NET_RALINK_MDIO_RT2880
+	def_bool NET_RALINK_SOC
+	depends on (NET_RALINK_RT2880 || NET_RALINK_RT3883)
+	select NET_RALINK_MDIO
+
+config NET_RALINK_MDIO_MT7620
+	def_bool NET_RALINK_SOC
+	depends on NET_RALINK_MT7620
+	select NET_RALINK_MDIO
+
+config NET_RALINK_ESW_RT3050
+	def_tristate NET_RALINK_SOC
+	depends on NET_RALINK_RT3050
+
+config NET_RALINK_GSW_MT7620
+	def_tristate NET_RALINK_SOC
+	depends on NET_RALINK_MT7620
+endif
diff --git a/iopsys-ramips/files/drivers/net/ethernet/ralink/Makefile b/iopsys-ramips/files/drivers/net/ethernet/ralink/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..79d2dbfef95dcc0405898e82093a6628e61beba4
--- /dev/null
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the Ralink SoCs built-in ethernet macs
+#
+
+ralink-eth-y					+= mtk_eth_soc.o ethtool.o
+
+ralink-eth-$(CONFIG_NET_RALINK_MDIO)		+= mdio.o
+ralink-eth-$(CONFIG_NET_RALINK_MDIO_RT2880)	+= mdio_rt2880.o
+ralink-eth-$(CONFIG_NET_RALINK_MDIO_MT7620)	+= mdio_mt7620.o
+
+ralink-eth-$(CONFIG_NET_RALINK_RT2880)	+= soc_rt2880.o
+ralink-eth-$(CONFIG_NET_RALINK_RT3050)	+= soc_rt3050.o
+ralink-eth-$(CONFIG_NET_RALINK_RT3883)	+= soc_rt3883.o
+ralink-eth-$(CONFIG_NET_RALINK_MT7620)	+= soc_mt7620.o
+
+obj-$(CONFIG_NET_RALINK_ESW_RT3050)		+= esw_rt3050.o
+obj-$(CONFIG_NET_RALINK_GSW_MT7620)		+= gsw_mt7620.o mt7530.o
+obj-$(CONFIG_NET_RALINK_SOC)			+= ralink-eth.o
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
similarity index 99%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
index 816c588dd7f2db40c8e10c4d7f76b4c9cf90fab8..292f11a1700e03862e35a772a64e4f56da818b59 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
@@ -617,6 +617,10 @@ static void esw_hw_init(struct rt305x_esw *esw)
 		/* reset EPHY */
 		fe_reset(RT5350_RESET_EPHY);
 
+		/* set the led polarity */
+		esw_w32(esw, esw->reg_led_polarity & 0x1F,
+			RT5350_EWS_REG_LED_POLARITY);
+
 		rt305x_mii_write(esw, 0, 31, 0x2000); /* change G2 page */
 		rt305x_mii_write(esw, 0, 26, 0x0020);
 
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.h
similarity index 95%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.h
index b757e5d63946437bcbc048193fa61f9ecbd2fc58..bbc8fbd52a40fb3532939730166d06ecf9598a14 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.h
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/esw_rt3050.h
@@ -15,7 +15,7 @@
 #ifndef _RALINK_ESW_RT3052_H__
 #define _RALINK_ESW_RT3052_H__
 
-#ifdef CONFIG_NET_MEDIATEK_ESW_RT3052
+#ifdef CONFIG_NET_RALINK_ESW_RT3052
 
 int __init mtk_switch_init(void);
 void mtk_switch_exit(void);
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/ethtool.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/ethtool.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/ethtool.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/ethtool.c
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/ethtool.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/ethtool.h
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/ethtool.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/ethtool.h
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
similarity index 66%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
index 5fc5080aaf76514d76e73ed5e611dc74fb1038a9..bd379e6c7d0e8e1b7c2b950441176a7b2a30293e 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
@@ -116,73 +116,82 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
 
 		mt7530_mdio_w32(gsw, 0x7a78, 0x855);
 	} else {
+
+		if (gsw->ephy_base) {
+			/* set phy base addr to ephy_base */
+			mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_GPC1) |
+				(gsw->ephy_base << 16),
+				GSW_REG_GPC1);
+			fe_reset(BIT(24)); /* Resets the Ethernet PHY block. */
+		}
+
 		/* global page 4 */
-		_mt7620_mii_write(gsw, 1, 31, 0x4000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0x4000);
 
-		_mt7620_mii_write(gsw, 1, 17, 0x7444);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 17, 0x7444);
 		if (is_BGA)
-			_mt7620_mii_write(gsw, 1, 19, 0x0114);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 19, 0x0114);
 		else
-			_mt7620_mii_write(gsw, 1, 19, 0x0117);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 19, 0x0117);
 
-		_mt7620_mii_write(gsw, 1, 22, 0x10cf);
-		_mt7620_mii_write(gsw, 1, 25, 0x6212);
-		_mt7620_mii_write(gsw, 1, 26, 0x0777);
-		_mt7620_mii_write(gsw, 1, 29, 0x4000);
-		_mt7620_mii_write(gsw, 1, 28, 0xc077);
-		_mt7620_mii_write(gsw, 1, 24, 0x0000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 22, 0x10cf);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 25, 0x6212);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 26, 0x0777);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 29, 0x4000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 28, 0xc077);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 24, 0x0000);
 
 		/* global page 3 */
-		_mt7620_mii_write(gsw, 1, 31, 0x3000);
-		_mt7620_mii_write(gsw, 1, 17, 0x4838);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0x3000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 17, 0x4838);
 
 		/* global page 2 */
-		_mt7620_mii_write(gsw, 1, 31, 0x2000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0x2000);
 		if (is_BGA) {
-			_mt7620_mii_write(gsw, 1, 21, 0x0515);
-			_mt7620_mii_write(gsw, 1, 22, 0x0053);
-			_mt7620_mii_write(gsw, 1, 23, 0x00bf);
-			_mt7620_mii_write(gsw, 1, 24, 0x0aaf);
-			_mt7620_mii_write(gsw, 1, 25, 0x0fad);
-			_mt7620_mii_write(gsw, 1, 26, 0x0fc1);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 21, 0x0515);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 22, 0x0053);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 23, 0x00bf);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 24, 0x0aaf);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 25, 0x0fad);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 26, 0x0fc1);
 		} else {
-			_mt7620_mii_write(gsw, 1, 21, 0x0517);
-			_mt7620_mii_write(gsw, 1, 22, 0x0fd2);
-			_mt7620_mii_write(gsw, 1, 23, 0x00bf);
-			_mt7620_mii_write(gsw, 1, 24, 0x0aab);
-			_mt7620_mii_write(gsw, 1, 25, 0x00ae);
-			_mt7620_mii_write(gsw, 1, 26, 0x0fff);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 21, 0x0517);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 22, 0x0fd2);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 23, 0x00bf);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 24, 0x0aab);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 25, 0x00ae);
+			_mt7620_mii_write(gsw, gsw->ephy_base + 1, 26, 0x0fff);
 		}
 		/* global page 1 */
-		_mt7620_mii_write(gsw, 1, 31, 0x1000);
-		_mt7620_mii_write(gsw, 1, 17, 0xe7f8);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0x1000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 1, 17, 0xe7f8);
 
 		/* turn on all PHYs */
 		for (i = 0; i <= 4; i++) {
-			val = _mt7620_mii_read(gsw, i, 0);
+			val = _mt7620_mii_read(gsw, gsw->ephy_base + i, 0);
 			val &= ~BIT(11);
-			_mt7620_mii_write(gsw, i, 0, val);
+			_mt7620_mii_write(gsw, gsw->ephy_base + i, 0, val);
 		}
 	}
 
 	/* global page 0 */
-	_mt7620_mii_write(gsw, 1, 31, 0x8000);
-	_mt7620_mii_write(gsw, 0, 30, 0xa000);
-	_mt7620_mii_write(gsw, 1, 30, 0xa000);
-	_mt7620_mii_write(gsw, 2, 30, 0xa000);
-	_mt7620_mii_write(gsw, 3, 30, 0xa000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0x8000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 0, 30, 0xa000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 1, 30, 0xa000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 2, 30, 0xa000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 3, 30, 0xa000);
 
-	_mt7620_mii_write(gsw, 0, 4, 0x05e1);
-	_mt7620_mii_write(gsw, 1, 4, 0x05e1);
-	_mt7620_mii_write(gsw, 2, 4, 0x05e1);
-	_mt7620_mii_write(gsw, 3, 4, 0x05e1);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 0, 4, 0x05e1);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 1, 4, 0x05e1);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 2, 4, 0x05e1);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 3, 4, 0x05e1);
 
 	/* global page 2 */
-	_mt7620_mii_write(gsw, 1, 31, 0xa000);
-	_mt7620_mii_write(gsw, 0, 16, 0x1111);
-	_mt7620_mii_write(gsw, 1, 16, 0x1010);
-	_mt7620_mii_write(gsw, 2, 16, 0x1515);
-	_mt7620_mii_write(gsw, 3, 16, 0x0f0f);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 1, 31, 0xa000);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 0, 16, 0x1111);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 1, 16, 0x1010);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 2, 16, 0x1515);
+	_mt7620_mii_write(gsw, gsw->ephy_base + 3, 16, 0x0f0f);
 
 	/* CPU Port6 Force Link 1G, FC ON */
 	mtk_switch_w32(gsw, 0x5e33b, GSW_REG_PORT_PMCR(6));
@@ -196,9 +205,9 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
 
 		val |= 3 << 14;
 		rt_sysc_w32(val, SYSC_REG_CFG1);
-		_mt7620_mii_write(gsw, 4, 30, 0xa000);
-		_mt7620_mii_write(gsw, 4, 4, 0x05e1);
-		_mt7620_mii_write(gsw, 4, 16, 0x1313);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 4, 30, 0xa000);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 4, 4, 0x05e1);
+		_mt7620_mii_write(gsw, gsw->ephy_base + 4, 16, 0x1313);
 		pr_info("gsw: setting port4 to ephy mode\n");
 	} else if (!mdio_mode) {
 		u32 val = rt_sysc_r32(SYSC_REG_CFG1);
@@ -247,6 +256,7 @@ static int mt7620_gsw_probe(struct platform_device *pdev)
 	const char *port4 = NULL;
 	struct mt7620_gsw *gsw;
 	struct device_node *np = pdev->dev.of_node;
+	u16 val;
 
 	gsw = devm_kzalloc(&pdev->dev, sizeof(struct mt7620_gsw), GFP_KERNEL);
 	if (!gsw)
@@ -266,6 +276,11 @@ static int mt7620_gsw_probe(struct platform_device *pdev)
 	else
 		gsw->port4 = PORT4_EPHY;
 
+	if (of_property_read_u16(np, "mediatek,ephy-base-address", &val) == 0)
+		gsw->ephy_base = val;
+	else
+		gsw->ephy_base = 0;
+
 	gsw->irq = platform_get_irq(pdev, 0);
 
 	platform_set_drvdata(pdev, gsw);
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.h
similarity index 95%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.h
index ae0b6de02416bbf9604c32c3a74b93173d6399a6..f10946a1738811f24eb34b86077f4684cf67b051 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.h
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.h
@@ -17,11 +17,7 @@
 
 #define GSW_REG_PHY_TIMEOUT	(5 * HZ)
 
-#ifdef CONFIG_SOC_MT7621
-#define MT7620A_GSW_REG_PIAC	0x0004
-#else
 #define MT7620A_GSW_REG_PIAC	0x7004
-#endif
 
 #define GSW_NUM_VLANS		16
 #define GSW_NUM_VIDS		4096
@@ -46,6 +42,10 @@
 #define GSW_REG_IMR		0x7008
 #define GSW_REG_ISR		0x700c
 #define GSW_REG_GPC1		0x7014
+#define GSW_REG_GPC2		0x701c
+
+#define GSW_REG_GPCx_TXDELAY	BIT(3)
+#define GSW_REG_GPCx_RXDELAY	BIT(2)
 
 #define GSW_REG_MAC_P0_MCR	0x100
 #define GSW_REG_MAC_P1_MCR	0x200
@@ -61,11 +61,7 @@
 
 #define PORT_IRQ_ST_CHG		0x7f
 
-#ifdef CONFIG_SOC_MT7621
-#define ESW_PHY_POLLING		0x0000
-#else
 #define ESW_PHY_POLLING		0x7000
-#endif
 
 #define	PMCR_IPG		BIT(18)
 #define	PMCR_MAC_MODE		BIT(16)
@@ -103,6 +99,7 @@ struct mt7620_gsw {
 	int			irq;
 	int			port4;
 	unsigned long int	autopoll;
+	u16			ephy_base;
 };
 
 void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned reg);
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.c
similarity index 88%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.c
index a1c115687ec56fb9c4c71347db842f440c824d7a..33f973bed38b1e99cf8da5defa48d85999ff747e 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.c
@@ -60,19 +60,19 @@ static void fe_phy_link_adjust(struct net_device *dev)
 	spin_unlock_irqrestore(&priv->phy->lock, flags);
 }
 
-int fe_connect_phy_node(struct fe_priv *priv, struct device_node *phy_node)
+int fe_connect_phy_node(struct fe_priv *priv, struct device_node *phy_node, int port)
 {
-	const __be32 *_port = NULL;
+	const __be32 *_phy_addr = NULL;
 	struct phy_device *phydev;
-	int phy_mode, port;
+	int phy_mode;
 
-	_port = of_get_property(phy_node, "reg", NULL);
+	_phy_addr = of_get_property(phy_node, "reg", NULL);
 
-	if (!_port || (be32_to_cpu(*_port) >= 0x20)) {
-		pr_err("%s: invalid port id\n", phy_node->name);
+	if (!_phy_addr || (be32_to_cpu(*_phy_addr) >= 0x20)) {
+		pr_err("%s: invalid phy id\n", phy_node->name);
 		return -EINVAL;
 	}
-	port = be32_to_cpu(*_port);
+
 	phy_mode = of_get_phy_mode(phy_node);
 	if (phy_mode < 0) {
 		dev_err(priv->dev, "incorrect phy-mode %d\n", phy_mode);
@@ -88,8 +88,8 @@ int fe_connect_phy_node(struct fe_priv *priv, struct device_node *phy_node)
 		return -ENODEV;
 	}
 
-	phydev->supported &= PHY_GBIT_FEATURES;
-	phydev->advertising = phydev->supported;
+	phy_set_max_speed(phydev, SPEED_1000);
+	linkmode_copy(phydev->advertising, phydev->supported);
 	phydev->no_auto_carrier_off = 1;
 
 	dev_info(priv->dev,
@@ -110,9 +110,12 @@ static void phy_init(struct fe_priv *priv, struct phy_device *phy)
 	phy->autoneg = AUTONEG_ENABLE;
 	phy->speed = 0;
 	phy->duplex = 0;
-	phy->supported &= IS_ENABLED(CONFIG_NET_MEDIATEK_MDIO_MT7620) ?
-			PHY_GBIT_FEATURES : PHY_BASIC_FEATURES;
-	phy->advertising = phy->supported | ADVERTISED_Autoneg;
+
+	phy_set_max_speed(phy, IS_ENABLED(CONFIG_NET_RALINK_MDIO_MT7620) ?
+				       SPEED_1000 :
+				       SPEED_100);
+	linkmode_copy(phy->advertising, phy->supported);
+	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phy->advertising);
 
 	phy_start_aneg(phy);
 }
@@ -127,8 +130,14 @@ static int fe_phy_connect(struct fe_priv *priv)
 				priv->phy_dev = priv->phy->phy[i];
 				priv->phy_flags = FE_PHY_FLAG_PORT;
 			}
-		} else if (priv->mii_bus && mdiobus_get_phy(priv->mii_bus, i)) {
-			phy_init(priv, mdiobus_get_phy(priv->mii_bus, i));
+		} else if (priv->mii_bus) {
+			struct phy_device *phydev;
+
+			phydev = mdiobus_get_phy(priv->mii_bus, i);
+			if (!phydev || phydev->attached_dev)
+				continue;
+
+			phy_init(priv, phydev);
 			if (!priv->phy_dev) {
 				priv->phy_dev = mdiobus_get_phy(priv->mii_bus, i);
 				priv->phy_flags = FE_PHY_FLAG_ATTACH;
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.h
similarity index 92%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.h
index 498cf144e6314d7a38a65cfa52f334bbf0776cc7..d4a2a40473e0ef620e4155034ae8f8186c902967 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio.h
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio.h
@@ -15,11 +15,12 @@
 #ifndef _RALINK_MDIO_H__
 #define _RALINK_MDIO_H__
 
-#ifdef CONFIG_NET_MEDIATEK_MDIO
+#ifdef CONFIG_NET_RALINK_MDIO
 int fe_mdio_init(struct fe_priv *priv);
 void fe_mdio_cleanup(struct fe_priv *priv);
 int fe_connect_phy_node(struct fe_priv *priv,
-			struct device_node *phy_node);
+			struct device_node *phy_node,
+			int port);
 #else
 static inline int fe_mdio_init(struct fe_priv *priv) { return 0; }
 static inline void fe_mdio_cleanup(struct fe_priv *priv) {}
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_mt7620.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_mt7620.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_mt7620.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_mt7620.c
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_rt2880.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_rt2880.c
similarity index 98%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_rt2880.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_rt2880.c
index e53fd7f6288902dea29a61f2bda733fa5fe2e97e..8d82c8f7adcc4ed207bb8010fcbe9a61cd6be423 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_rt2880.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_rt2880.c
@@ -218,5 +218,5 @@ void rt2880_port_init(struct fe_priv *priv, struct device_node *np)
 	}
 
 	if (priv->phy->phy_node[0] && mdiobus_get_phy(priv->mii_bus, 0))
-		fe_connect_phy_node(priv, priv->phy->phy_node[0]);
+		fe_connect_phy_node(priv, priv->phy->phy_node[0], 0);
 }
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_rt2880.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_rt2880.h
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mdio_rt2880.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mdio_rt2880.h
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.c
similarity index 75%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.c
index 5216cb5c6618d018c4075791037cf91bb0398795..b4632d39904fcb682eac2e4429ec574171658ac7 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.c
@@ -31,31 +31,46 @@
 #include <linux/lockdep.h>
 #include <linux/workqueue.h>
 #include <linux/of_device.h>
+#include <asm/byteorder.h>
 
 #include "mt7530.h"
 
 #define MT7530_CPU_PORT		6
 #define MT7530_NUM_PORTS	8
-#ifdef CONFIG_SOC_MT7621
-#define MT7530_NUM_VLANS	4095
-#else
 #define MT7530_NUM_VLANS	16
-#endif
 #define MT7530_MAX_VID		4095
 #define MT7530_MIN_VID		0
+#define MT7530_NUM_ARL_RECORDS 2048
+#define ARL_LINE_LENGTH		30
 
 #define MT7530_PORT_MIB_TXB_ID	2	/* TxGOC */
 #define MT7530_PORT_MIB_RXB_ID	6	/* RxGOC */
 
-#define MT7621_PORT_MIB_TXB_ID	18	/* TxByte */
-#define MT7621_PORT_MIB_RXB_ID	37	/* RxByte */
-
 /* registers */
+#define REG_ESW_WT_MAC_MFC		0x10
+
+#define REG_ESW_WT_MAC_MFC_MIRROR_ENABLE	BIT(3)
+#define REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK	0x07
+
 #define REG_ESW_VLAN_VTCR		0x90
 #define REG_ESW_VLAN_VAWD1		0x94
 #define REG_ESW_VLAN_VAWD2		0x98
 #define REG_ESW_VLAN_VTIM(x)	(0x100 + 4 * ((x) / 2))
 
+#define REG_ESW_WT_MAC_ATC  0x80
+#define REG_ESW_TABLE_ATRD  0x8C
+#define REG_ESW_TABLE_TSRA1 0x84
+#define REG_ESW_TABLE_TSRA2 0x88
+
+#define REG_MAC_ATC_START  0x8004
+#define REG_MAC_ATC_NEXT   0x8005
+
+#define REG_MAC_ATC_BUSY      0x8000U
+#define REG_MAC_ATC_SRCH_HIT  0x2000U
+#define REG_MAC_ATC_SRCH_END  0x4000U
+#define REG_ATRD_VALID        0xff000000U
+#define REG_ATRD_PORT_MASK    0xff0U
+
 #define REG_ESW_VLAN_VAWD1_IVL_MAC	BIT(30)
 #define REG_ESW_VLAN_VAWD1_VTAG_EN	BIT(28)
 #define REG_ESW_VLAN_VAWD1_VALID	BIT(0)
@@ -72,6 +87,11 @@ enum {
 #define REG_ESW_PORT_PVC(x)	(0x2010 | ((x) << 8))
 #define REG_ESW_PORT_PPBV1(x)	(0x2014 | ((x) << 8))
 
+#define REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT	BIT(8)
+#define REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT	BIT(9)
+#define REG_ESW_PORT_PCR_MIRROR_SRC_RX_MASK	0x0100
+#define REG_ESW_PORT_PCR_MIRROR_SRC_TX_MASK	0x0200
+
 #define REG_HWTRAP		0x7804
 
 #define MIB_DESC(_s , _o, _n)   \
@@ -132,50 +152,6 @@ static const struct mt7xxx_mib_desc mt7620_port_mibs[] = {
 	MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2")
 };
 
-static const struct mt7xxx_mib_desc mt7621_mibs[] = {
-	MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
-	MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
-	MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
-	MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
-	MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
-	MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
-	MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
-	MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
-	MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
-	MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
-	MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
-	MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
-	MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
-	MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
-	MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
-	MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
-	MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
-	MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
-	MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
-	MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
-	MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
-	MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
-	MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
-	MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
-	MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
-	MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
-	MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
-	MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
-	MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
-	MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
-	MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
-	MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
-	MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
-	MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
-	MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
-	MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
-	MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
-	MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
-	MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
-	MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
-	MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
-};
-
 enum {
 	/* Global attributes. */
 	MT7530_ATTR_ENABLE_VLAN,
@@ -183,6 +159,8 @@ enum {
 
 struct mt7530_port_entry {
 	u16	pvid;
+	bool	mirror_rx;
+	bool	mirror_tx;
 };
 
 struct mt7530_vlan_entry {
@@ -196,9 +174,11 @@ struct mt7530_priv {
 	struct mii_bus		*bus;
 	struct switch_dev	swdev;
 
+	u8			mirror_dest_port;
 	bool			global_vlan_enable;
 	struct mt7530_vlan_entry	vlan_entries[MT7530_NUM_VLANS];
 	struct mt7530_port_entry	port_entries[MT7530_NUM_PORTS];
+	char arl_buf[MT7530_NUM_ARL_RECORDS * ARL_LINE_LENGTH + 1];
 };
 
 struct mt7530_mapping {
@@ -310,9 +290,11 @@ mt7530_r32(struct mt7530_priv *priv, u32 reg)
 	if (priv->bus) {
 		u16 high, low;
 
-		mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
-		low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
-		high = mdiobus_read(priv->bus, 0x1f, 0x10);
+		mutex_lock(&priv->bus->mdio_lock);
+		__mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
+		low = __mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
+		high = __mdiobus_read(priv->bus, 0x1f, 0x10);
+		mutex_unlock(&priv->bus->mdio_lock);
 
 		return (high << 16) | (low & 0xffff);
 	}
@@ -327,9 +309,11 @@ static void
 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
 {
 	if (priv->bus) {
-		mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
-		mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf,  val & 0xffff);
-		mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
+		mutex_lock(&priv->bus->mdio_lock);
+		__mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
+		__mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf,  val & 0xffff);
+		__mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
+		mutex_unlock(&priv->bus->mdio_lock);
 		return;
 	}
 
@@ -422,7 +406,8 @@ mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
 		if (etag == ETAG_CTRL_TAG)
 			p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
 		else if (etag != ETAG_CTRL_UNTAG)
-			printk("vlan egress tag control neither untag nor tag.\n");
+			printk("vlan %d port %d egress tag control neither untag nor tag: %d.\n",
+					val->port_vlan, i, etag);
 	}
 
 	return 0;
@@ -478,14 +463,6 @@ mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 	return 0;
 }
 
-static int
-mt7621_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
-		struct switch_val *val)
-{
-	val->value.i = val->port_vlan;
-	return 0;
-}
-
 static int
 mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 		struct switch_val *val)
@@ -505,6 +482,72 @@ mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 	return 0;
 }
 
+static int
+mt7530_get_mirror_monitor_port(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	val->value.i = priv->mirror_dest_port;
+
+	return 0;
+}
+
+static int
+mt7530_set_mirror_monitor_port(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	priv->mirror_dest_port = val->value.i;
+
+	return 0;
+}
+
+static int
+mt7530_get_port_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	val->value.i =  priv->port_entries[val->port_vlan].mirror_rx;
+
+	return 0;
+}
+
+static int
+mt7530_set_port_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	priv->port_entries[val->port_vlan].mirror_rx = val->value.i;
+
+	return 0;
+}
+
+static int
+mt7530_get_port_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	val->value.i =  priv->port_entries[val->port_vlan].mirror_tx;
+
+	return 0;
+}
+
+static int
+mt7530_set_port_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr,
+		struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+
+	priv->port_entries[val->port_vlan].mirror_tx = val->value.i;
+
+	return 0;
+}
+
 static void
 mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
 	                    u8 ports, u8 etags)
@@ -512,7 +555,6 @@ mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
 	int port;
 	u32 val;
 
-#ifndef CONFIG_SOC_MT7621
 	/* vid of vlan */
 	val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
 	if (vlan % 2 == 0) {
@@ -523,7 +565,6 @@ mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
 		val |= (vid << 12);
 	}
 	mt7530_w32(priv, REG_ESW_VLAN_VTIM(vlan), val);
-#endif
 
 	/* vlan port membership */
 	if (ports)
@@ -544,11 +585,7 @@ mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
 	mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
 
 	/* write to vlan table */
-#ifdef CONFIG_SOC_MT7621
-	mt7530_vtcr(priv, 1, vid);
-#else
 	mt7530_vtcr(priv, 1, vlan);
-#endif
 }
 
 static int
@@ -558,6 +595,7 @@ mt7530_apply_config(struct switch_dev *dev)
 	int i, j;
 	u8 tag_ports;
 	u8 untag_ports;
+	bool is_mirror = false;
 
 	if (!priv->global_vlan_enable) {
 		for (i = 0; i < MT7530_NUM_PORTS; i++)
@@ -637,6 +675,31 @@ mt7530_apply_config(struct switch_dev *dev)
 		mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
 	}
 
+	/* set mirroring source port */
+	for (i = 0; i < MT7530_NUM_PORTS; i++)	{
+		u32 val = mt7530_r32(priv, REG_ESW_PORT_PCR(i));
+		if (priv->port_entries[i].mirror_rx) {
+			val |= REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT;
+			is_mirror = true;
+		}
+
+		if (priv->port_entries[i].mirror_tx) {
+			val |= REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT;
+			is_mirror = true;
+		}
+
+		mt7530_w32(priv, REG_ESW_PORT_PCR(i), val);
+	}
+
+	/* set mirroring monitor port */
+	if (is_mirror) {
+		u32 val = mt7530_r32(priv, REG_ESW_WT_MAC_MFC);
+		val |= REG_ESW_WT_MAC_MFC_MIRROR_ENABLE;
+		val &= ~REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK;
+		val |= priv->mirror_dest_port;
+		mt7530_w32(priv, REG_ESW_WT_MAC_MFC, val);
+	}
+
 	return 0;
 }
 
@@ -675,53 +738,6 @@ mt7530_get_port_link(struct switch_dev *dev,  int port,
 	return 0;
 }
 
-static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
-{
-	unsigned int port_base;
-	u64 lo;
-
-	port_base = MT7621_MIB_COUNTER_BASE +
-		    MT7621_MIB_COUNTER_PORT_OFFSET * port;
-
-	lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
-	if (mt7621_mibs[i].size == 2) {
-		u64 hi;
-
-		hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
-		lo |= hi << 32;
-	}
-
-	return lo;
-}
-
-static int mt7621_sw_get_port_mib(struct switch_dev *dev,
-				  const struct switch_attr *attr,
-				  struct switch_val *val)
-{
-	static char buf[4096];
-	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
-	int i, len = 0;
-
-	if (val->port_vlan >= MT7530_NUM_PORTS)
-		return -EINVAL;
-
-	len += snprintf(buf + len, sizeof(buf) - len,
-			"Port %d MIB counters\n", val->port_vlan);
-
-	for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) {
-		u64 counter;
-		len += snprintf(buf + len, sizeof(buf) - len,
-				"%-11s: ", mt7621_mibs[i].name);
-		counter = get_mib_counter(priv, i, val->port_vlan);
-		len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
-				counter);
-	}
-
-	val->value.s = buf;
-	val->len = len;
-	return 0;
-}
-
 static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i)
 {
 	return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset);
@@ -759,6 +775,100 @@ static int mt7530_sw_get_mib(struct switch_dev *dev,
 	return 0;
 }
 
+static char *mt7530_print_arl_table_row(u32 atrd,
+					u32 mac1,
+					u32 mac2,
+					char *buf,
+					size_t *size)
+{
+	int ret;
+	size_t port;
+	size_t i;
+	u8 port_map;
+	u8 mac[ETH_ALEN];
+
+	mac1 = ntohl(mac1);
+	mac2 = ntohl(mac2);
+	port_map = (u8)((atrd & REG_ATRD_PORT_MASK) >> 4);
+	memcpy(mac, &mac1, sizeof(mac1));
+	memcpy(mac + sizeof(mac1), &mac2, sizeof(mac) - sizeof(mac1));
+	for (port = 0, i = 1; port < MT7530_NUM_PORTS; ++port, i <<= 1) {
+		if (port_map & i) {
+			ret = snprintf(buf, *size, "Port %d: MAC %pM\n", port, mac);
+			if (ret >= *size || ret <= 0) {
+				*buf = 0;
+				buf = NULL;
+				goto out;
+			}
+			buf += ret;
+			*size = *size - ret;
+		}
+	}
+out:
+	return buf;
+}
+
+static int mt7530_get_arl_table(struct switch_dev *dev,
+				const struct switch_attr *attr,
+				struct switch_val *val)
+{
+	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
+	char *buf = priv->arl_buf;
+	size_t size = sizeof(priv->arl_buf);
+	size_t count = 0;
+	size_t retry_times = 100;
+	int ret;
+	u32 atc;
+
+	ret = snprintf(buf, size, "address resolution table\n");
+	if (ret >= size || ret <= 0) {
+		priv->arl_buf[0] = 0;
+		goto out;
+	}
+	buf += ret;
+	size = size - ret;
+
+	mt7530_w32(priv, REG_ESW_WT_MAC_ATC, REG_MAC_ATC_START);
+
+	do {
+		atc = mt7530_r32(priv, REG_ESW_WT_MAC_ATC);
+		if (atc & REG_MAC_ATC_SRCH_HIT && !(atc & REG_MAC_ATC_BUSY)) {
+			u32 atrd;
+
+			++count;
+			atrd = mt7530_r32(priv, REG_ESW_TABLE_ATRD);
+			if (atrd & REG_ATRD_VALID) {
+				u32 mac1;
+				u32 mac2;
+
+				mac1 = mt7530_r32(priv, REG_ESW_TABLE_TSRA1);
+				mac2 = mt7530_r32(priv, REG_ESW_TABLE_TSRA2);
+
+				if (!(atc & REG_MAC_ATC_SRCH_END))
+					mt7530_w32(priv, REG_ESW_WT_MAC_ATC, REG_MAC_ATC_NEXT);
+
+				buf = mt7530_print_arl_table_row(atrd, mac1, mac2, buf, &size);
+				if (!buf) {
+					pr_warn("%s: too many addresses\n", __func__);
+					goto out;
+				}
+			} else if (!(atc & REG_MAC_ATC_SRCH_END)) {
+				mt7530_w32(priv, REG_ESW_WT_MAC_ATC, REG_MAC_ATC_NEXT);
+			}
+		} else {
+			--retry_times;
+			usleep_range(1000, 5000);
+		}
+	} while (!(atc & REG_MAC_ATC_SRCH_END) &&
+		 count < MT7530_NUM_ARL_RECORDS &&
+		 retry_times > 0);
+out:
+	val->value.s = priv->arl_buf;
+	val->len = strlen(priv->arl_buf);
+
+	return 0;
+}
+
 static int mt7530_sw_get_port_mib(struct switch_dev *dev,
 				  const struct switch_attr *attr,
 				  struct switch_val *val)
@@ -801,20 +911,6 @@ static int mt7530_get_port_stats(struct switch_dev *dev, int port,
 	return 0;
 }
 
-static int mt7621_get_port_stats(struct switch_dev *dev, int port,
-					struct switch_port_stats *stats)
-{
-	struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
-
-	if (port < 0 || port >= MT7530_NUM_PORTS)
-		return -EINVAL;
-
-	stats->tx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_TXB_ID, port);
-	stats->rx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_RXB_ID, port);
-
-	return 0;
-}
-
 static const struct switch_attr mt7530_global[] = {
 	{
 		.type = SWITCH_TYPE_INT,
@@ -830,27 +926,20 @@ static const struct switch_attr mt7530_global[] = {
 		.description = "Get MIB counters for switch",
 		.get = mt7530_sw_get_mib,
 		.set = NULL,
+	}, {
+		.type = SWITCH_TYPE_INT,
+		.name = "mirror_monitor_port",
+		.description = "Mirror monitor port",
+		.set = mt7530_set_mirror_monitor_port,
+		.get = mt7530_get_mirror_monitor_port,
+		.max = MT7530_NUM_PORTS - 1
 	},
-};
-
-static const struct switch_attr mt7621_port[] = {
 	{
 		.type = SWITCH_TYPE_STRING,
-		.name = "mib",
-		.description = "Get MIB counters for port",
-		.get = mt7621_sw_get_port_mib,
+		.name = "arl_table",
+		.description = "Get ARL table",
 		.set = NULL,
-	},
-};
-
-static const struct switch_attr mt7621_vlan[] = {
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "vid",
-		.description = "VLAN ID (0-4094)",
-		.set = mt7530_set_vid,
-		.get = mt7621_get_vid,
-		.max = 4094,
+		.get = mt7530_get_arl_table,
 	},
 };
 
@@ -861,6 +950,20 @@ static const struct switch_attr mt7530_port[] = {
 		.description = "Get MIB counters for port",
 		.get = mt7530_sw_get_port_mib,
 		.set = NULL,
+	}, {
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_rx",
+		.description = "Enable mirroring of RX packets",
+		.set = mt7530_set_port_mirror_rx,
+		.get = mt7530_get_port_mirror_rx,
+		.max = 1,
+	}, {
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_tx",
+		.description = "Enable mirroring of TX packets",
+		.set = mt7530_set_port_mirror_tx,
+		.get = mt7530_get_port_mirror_tx,
+		.max = 1,
 	},
 };
 
@@ -875,29 +978,6 @@ static const struct switch_attr mt7530_vlan[] = {
 	},
 };
 
-static const struct switch_dev_ops mt7621_ops = {
-	.attr_global = {
-		.attr = mt7530_global,
-		.n_attr = ARRAY_SIZE(mt7530_global),
-	},
-	.attr_port = {
-		.attr = mt7621_port,
-		.n_attr = ARRAY_SIZE(mt7621_port),
-	},
-	.attr_vlan = {
-		.attr = mt7621_vlan,
-		.n_attr = ARRAY_SIZE(mt7621_vlan),
-	},
-	.get_vlan_ports = mt7530_get_vlan_ports,
-	.set_vlan_ports = mt7530_set_vlan_ports,
-	.get_port_pvid = mt7530_get_port_pvid,
-	.set_port_pvid = mt7530_set_port_pvid,
-	.get_port_link = mt7530_get_port_link,
-	.get_port_stats = mt7621_get_port_stats,
-	.apply_config = mt7530_apply_config,
-	.reset_switch = mt7530_reset_switch,
-};
-
 static const struct switch_dev_ops mt7530_ops = {
 	.attr_global = {
 		.attr = mt7530_global,
@@ -941,9 +1021,6 @@ mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vl
 	if (bus) {
 		swdev->alias = "mt7530";
 		swdev->name = "mt7530";
-	} else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
-		swdev->alias = "mt7621";
-		swdev->name = "mt7621";
 	} else {
 		swdev->alias = "mt7620";
 		swdev->name = "mt7620";
@@ -951,10 +1028,7 @@ mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vl
 	swdev->cpu_port = MT7530_CPU_PORT;
 	swdev->ports = MT7530_NUM_PORTS;
 	swdev->vlans = MT7530_NUM_VLANS;
-	if (IS_ENABLED(CONFIG_SOC_MT7621))
-		swdev->ops = &mt7621_ops;
-	else
-		swdev->ops = &mt7530_ops;
+	swdev->ops = &mt7530_ops;
 
 	ret = register_switch(swdev, NULL);
 	if (ret) {
@@ -969,7 +1043,7 @@ mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vl
 	mt7530_apply_config(swdev);
 
 	/* magic vodoo */
-	if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) !=  0x1117edf) {
+	if (bus && mt7530_r32(mt7530, REG_HWTRAP) !=  0x1117edf) {
 		dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
 		mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
 	}
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.h
similarity index 76%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.h
index cf725c2f2ba91db3263786123b6b2d80e1fbc12e..53e1d2ce55a07e81565c9bfc92a8c5a4b420562c 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.h
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mt7530.h
@@ -137,50 +137,6 @@
 /* Rx Event Packet Counter of Port n */
 #define MT7620_MIB_STATS_PORT_REPC2N	0x30
 
-#define MT7621_MIB_COUNTER_BASE	0x4000
-#define MT7621_MIB_COUNTER_PORT_OFFSET	0x100
-#define MT7621_STATS_TDPC	0x00
-#define MT7621_STATS_TCRC	0x04
-#define MT7621_STATS_TUPC	0x08
-#define MT7621_STATS_TMPC	0x0C
-#define MT7621_STATS_TBPC	0x10
-#define MT7621_STATS_TCEC	0x14
-#define MT7621_STATS_TSCEC	0x18
-#define MT7621_STATS_TMCEC	0x1C
-#define MT7621_STATS_TDEC	0x20
-#define MT7621_STATS_TLCEC	0x24
-#define MT7621_STATS_TXCEC	0x28
-#define MT7621_STATS_TPPC	0x2C
-#define MT7621_STATS_TL64PC	0x30
-#define MT7621_STATS_TL65PC	0x34
-#define MT7621_STATS_TL128PC	0x38
-#define MT7621_STATS_TL256PC	0x3C
-#define MT7621_STATS_TL512PC	0x40
-#define MT7621_STATS_TL1024PC	0x44
-#define MT7621_STATS_TOC	0x48
-#define MT7621_STATS_RDPC	0x60
-#define MT7621_STATS_RFPC	0x64
-#define MT7621_STATS_RUPC	0x68
-#define MT7621_STATS_RMPC	0x6C
-#define MT7621_STATS_RBPC	0x70
-#define MT7621_STATS_RAEPC	0x74
-#define MT7621_STATS_RCEPC	0x78
-#define MT7621_STATS_RUSPC	0x7C
-#define MT7621_STATS_RFEPC	0x80
-#define MT7621_STATS_ROSPC	0x84
-#define MT7621_STATS_RJEPC	0x88
-#define MT7621_STATS_RPPC	0x8C
-#define MT7621_STATS_RL64PC	0x90
-#define MT7621_STATS_RL65PC	0x94
-#define MT7621_STATS_RL128PC	0x98
-#define MT7621_STATS_RL256PC	0x9C
-#define MT7621_STATS_RL512PC	0xA0
-#define MT7621_STATS_RL1024PC	0xA4
-#define MT7621_STATS_ROC	0xA8
-#define MT7621_STATS_RDPC_CTRL	0xB0
-#define MT7621_STATS_RDPC_ING	0xB4
-#define MT7621_STATS_RDPC_ARL	0xB8
-
 int mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan);
 
 #endif
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
similarity index 95%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
index b2c3d32c5549b6fd8ea4c76dc224b9b4b41130d8..f8301ad3ca7b2c7acada544831315cd9e6c90830 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
@@ -32,6 +32,9 @@
 #include <linux/bug.h>
 #include <linux/netfilter.h>
 #include <net/netfilter/nf_flow_table.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 
 #include <asm/mach-ralink/ralink_regs.h>
 
@@ -227,7 +230,7 @@ static void fe_clean_rx(struct fe_priv *priv)
 		for (i = 0; i < ring->rx_ring_size; i++)
 			if (ring->rx_data[i]) {
 				if (ring->rx_dma && ring->rx_dma[i].rxd1)
-					dma_unmap_single(&priv->netdev->dev,
+					dma_unmap_single(priv->dev,
 							 ring->rx_dma[i].rxd1,
 							 ring->rx_buf_size,
 							 DMA_FROM_DEVICE);
@@ -239,7 +242,7 @@ static void fe_clean_rx(struct fe_priv *priv)
 	}
 
 	if (ring->rx_dma) {
-		dma_free_coherent(&priv->netdev->dev,
+		dma_free_coherent(priv->dev,
 				  ring->rx_ring_size * sizeof(*ring->rx_dma),
 				  ring->rx_dma,
 				  ring->rx_phys);
@@ -256,7 +259,6 @@ static void fe_clean_rx(struct fe_priv *priv)
 
 static int fe_alloc_rx(struct fe_priv *priv)
 {
-	struct net_device *netdev = priv->netdev;
 	struct fe_rx_ring *ring = &priv->rx_ring;
 	int i, pad;
 
@@ -273,7 +275,7 @@ static int fe_alloc_rx(struct fe_priv *priv)
 			goto no_rx_mem;
 	}
 
-	ring->rx_dma = dma_alloc_coherent(&netdev->dev,
+	ring->rx_dma = dma_alloc_coherent(priv->dev,
 			ring->rx_ring_size * sizeof(*ring->rx_dma),
 			&ring->rx_phys,
 			GFP_ATOMIC | __GFP_ZERO);
@@ -285,11 +287,11 @@ static int fe_alloc_rx(struct fe_priv *priv)
 	else
 		pad = NET_IP_ALIGN;
 	for (i = 0; i < ring->rx_ring_size; i++) {
-		dma_addr_t dma_addr = dma_map_single(&netdev->dev,
+		dma_addr_t dma_addr = dma_map_single(priv->dev,
 				ring->rx_data[i] + NET_SKB_PAD + pad,
 				ring->rx_buf_size,
 				DMA_FROM_DEVICE);
-		if (unlikely(dma_mapping_error(&netdev->dev, dma_addr)))
+		if (unlikely(dma_mapping_error(priv->dev, dma_addr)))
 			goto no_rx_mem;
 		ring->rx_dma[i].rxd1 = (unsigned int)dma_addr;
 
@@ -339,7 +341,7 @@ static void fe_txd_unmap(struct device *dev, struct fe_tx_buf *tx_buf)
 static void fe_clean_tx(struct fe_priv *priv)
 {
 	int i;
-	struct device *dev = &priv->netdev->dev;
+	struct device *dev = priv->dev;
 	struct fe_tx_ring *ring = &priv->tx_ring;
 
 	if (ring->tx_buf) {
@@ -375,7 +377,7 @@ static int fe_alloc_tx(struct fe_priv *priv)
 	if (!ring->tx_buf)
 		goto no_tx_mem;
 
-	ring->tx_dma = dma_alloc_coherent(&priv->netdev->dev,
+	ring->tx_dma = dma_alloc_coherent(priv->dev,
 			ring->tx_ring_size * sizeof(*ring->tx_dma),
 			&ring->tx_phys,
 			GFP_ATOMIC | __GFP_ZERO);
@@ -661,7 +663,7 @@ static int fe_tx_map_dma(struct sk_buff *skb, struct net_device *dev,
 {
 	struct fe_priv *priv = netdev_priv(dev);
 	struct fe_map_state st = {
-		.dev = &dev->dev,
+		.dev = priv->dev,
 		.ring_idx = ring->tx_next_idx,
 	};
 	struct sk_buff *head = skb;
@@ -713,11 +715,11 @@ next_frag:
 	/* TX SG offload */
 	nr_frags = skb_shinfo(skb)->nr_frags;
 	for (i = 0; i < nr_frags; i++) {
-		struct skb_frag_struct *frag;
+		skb_frag_t *frag;
 
 		frag = &skb_shinfo(skb)->frags[i];
 		if (fe_tx_dma_map_page(ring, &st, skb_frag_page(frag),
-				       frag->page_offset, skb_frag_size(frag)))
+				       skb_frag_off(frag), skb_frag_size(frag)))
 			goto err_dma;
 	}
 
@@ -752,7 +754,7 @@ next_frag:
 			netif_wake_queue(dev);
 	}
 
-	if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !head->xmit_more)
+	if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !netdev_xmit_more())
 		fe_reg_w32(ring->tx_next_idx, FE_REG_TX_CTX_IDX0);
 
 	return 0;
@@ -761,7 +763,7 @@ err_dma:
 	j = ring->tx_next_idx;
 	for (i = 0; i < tx_num; i++) {
 		/* unmap dma */
-		fe_txd_unmap(&dev->dev, &ring->tx_buf[j]);
+		fe_txd_unmap(priv->dev, &ring->tx_buf[j]);
 		ring->tx_dma[j].txd2 = TX_DMA_DESP2_DEF;
 
 		j = NEXT_TX_DESP_IDX(j);
@@ -811,14 +813,14 @@ static inline int fe_cal_txd_req(struct sk_buff *skb)
 {
 	struct sk_buff *head = skb;
 	int i, nfrags = 0;
-	struct skb_frag_struct *frag;
+	skb_frag_t *frag;
 
 next_frag:
 	nfrags++;
 	if (skb_is_gso(skb)) {
 		for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 			frag = &skb_shinfo(skb)->frags[i];
-			nfrags += DIV_ROUND_UP(frag->size, TX_DMA_BUF_LEN);
+			nfrags += DIV_ROUND_UP(skb_frag_size(frag), TX_DMA_BUF_LEN);
 		}
 	} else {
 		nfrags += skb_shinfo(skb)->nr_frags;
@@ -905,11 +907,11 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 			stats->rx_dropped++;
 			goto release_desc;
 		}
-		dma_addr = dma_map_single(&netdev->dev,
+		dma_addr = dma_map_single(priv->dev,
 					  new_data + NET_SKB_PAD + pad,
 					  ring->rx_buf_size,
 					  DMA_FROM_DEVICE);
-		if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) {
+		if (unlikely(dma_mapping_error(priv->dev, dma_addr))) {
 			skb_free_frag(new_data);
 			goto release_desc;
 		}
@@ -922,7 +924,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 		}
 		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
 
-		dma_unmap_single(&netdev->dev, trxd.rxd1,
+		dma_unmap_single(priv->dev, trxd.rxd1,
 				 ring->rx_buf_size, DMA_FROM_DEVICE);
 		pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
 		skb->dev = netdev;
@@ -938,18 +940,11 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
 					       RX_DMA_VID(trxd.rxd3));
 
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-		if (mtk_offload_check_rx(priv, skb, trxd.rxd4) == 0) {
-#endif
-			stats->rx_packets++;
-			stats->rx_bytes += pktlen;
+		stats->rx_packets++;
+		stats->rx_bytes += pktlen;
+
+		napi_gro_receive(napi, skb);
 
-			napi_gro_receive(napi, skb);
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-		} else {
-			dev_kfree_skb(skb);
-		}
-#endif
 		ring->rx_data[idx] = new_data;
 		rxd->rxd1 = (unsigned int)dma_addr;
 
@@ -978,7 +973,6 @@ static int fe_poll_tx(struct fe_priv *priv, int budget, u32 tx_intr,
 		      int *tx_again)
 {
 	struct net_device *netdev = priv->netdev;
-	struct device *dev = &netdev->dev;
 	unsigned int bytes_compl = 0;
 	struct sk_buff *skb;
 	struct fe_tx_buf *tx_buf;
@@ -1001,7 +995,7 @@ static int fe_poll_tx(struct fe_priv *priv, int budget, u32 tx_intr,
 			done++;
 			budget--;
 		}
-		fe_txd_unmap(dev, tx_buf);
+		fe_txd_unmap(priv->dev, tx_buf);
 		idx = NEXT_TX_DESP_IDX(idx);
 	}
 	ring->tx_free_idx = idx;
@@ -1287,9 +1281,6 @@ static int fe_open(struct net_device *dev)
 	napi_enable(&priv->rx_napi);
 	fe_int_enable(priv->soc->tx_int | priv->soc->rx_int);
 	netif_start_queue(dev);
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-	mtk_ppe_probe(priv);
-#endif
 
 	return 0;
 }
@@ -1326,13 +1317,38 @@ static int fe_stop(struct net_device *dev)
 
 	fe_free_dma(priv);
 
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-	mtk_ppe_remove(priv);
-#endif
-
 	return 0;
 }
 
+static void fe_reset_phy(struct fe_priv *priv)
+{
+	int err, msec = 30;
+	struct gpio_desc *phy_reset;
+
+	phy_reset = devm_gpiod_get_optional(priv->dev, "phy-reset",
+					    GPIOD_OUT_HIGH);
+	if (!phy_reset)
+		return;
+
+	if (IS_ERR(phy_reset)) {
+		dev_err(priv->dev, "Error acquiring reset gpio pins: %ld\n",
+			PTR_ERR(phy_reset));
+		return;
+	}
+
+	err = of_property_read_u32(priv->dev->of_node, "phy-reset-duration",
+				   &msec);
+	if (!err && msec > 1000)
+		msec = 30;
+
+	if (msec > 20)
+		msleep(msec);
+	else
+		usleep_range(msec * 1000, msec * 1000 + 1000);
+
+	gpiod_set_value(phy_reset, 0);
+}
+
 static int __init fe_init(struct net_device *dev)
 {
 	struct fe_priv *priv = netdev_priv(dev);
@@ -1348,13 +1364,15 @@ static int __init fe_init(struct net_device *dev)
 			return -ENODEV;
 		}
 
+	fe_reset_phy(priv);
+
 	mac_addr = of_get_mac_address(priv->dev->of_node);
-	if (mac_addr)
+	if (!IS_ERR_OR_NULL(mac_addr))
 		ether_addr_copy(dev->dev_addr, mac_addr);
 
 	/* If the mac address is invalid, use random mac address  */
 	if (!is_valid_ether_addr(dev->dev_addr)) {
-		random_ether_addr(dev->dev_addr);
+		eth_hw_addr_random(dev);
 		dev_err(priv->dev, "generated random MAC address %pM\n",
 			dev->dev_addr);
 	}
@@ -1459,23 +1477,6 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
 	return fe_open(dev);
 }
 
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-static int
-fe_flow_offload(enum flow_offload_type type, struct flow_offload *flow,
-		struct flow_offload_hw_path *src,
-		struct flow_offload_hw_path *dest)
-{
-	struct fe_priv *priv;
-
-	if (src->dev != dest->dev)
-		return -EINVAL;
-
-	priv = netdev_priv(src->dev);
-
-	return mtk_flow_offload(priv, type, flow, src, dest);
-}
-#endif
-
 static const struct net_device_ops fe_netdev_ops = {
 	.ndo_init		= fe_init,
 	.ndo_uninit		= fe_uninit,
@@ -1493,9 +1494,6 @@ static const struct net_device_ops fe_netdev_ops = {
 #ifdef CONFIG_NET_POLL_CONTROLLER
 	.ndo_poll_controller	= fe_poll_controller,
 #endif
-#ifdef CONFIG_NET_MEDIATEK_OFFLOAD
-	.ndo_flow_offload	= fe_flow_offload,
-#endif
 };
 
 static void fe_reset_pending(struct fe_priv *priv)
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
similarity index 97%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.h
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
index 2f6fe1724c8c784d9f6b30ab09918da1f210398d..00f1a0e7e6a4ddda1165f25289acb5e6fd97e91f 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
@@ -519,14 +519,5 @@ static inline void *priv_netdev(struct fe_priv *priv)
 	return (char *)priv - ALIGN(sizeof(struct net_device), NETDEV_ALIGN);
 }
 
-int mtk_ppe_probe(struct fe_priv *eth);
-void mtk_ppe_remove(struct fe_priv *eth);
-int mtk_flow_offload(struct fe_priv *eth,
-		     enum flow_offload_type type,
-		     struct flow_offload *flow,
-		     struct flow_offload_hw_path *src,
-		     struct flow_offload_hw_path *dest);
-int mtk_offload_check_rx(struct fe_priv *eth, struct sk_buff *skb, u32 rxd4);
-
 
 #endif /* FE_ETH_H */
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7620.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
similarity index 86%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7620.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
index 7f728d142de44b6c86296a6d015858f861da4c23..f442d558e1cb0952656e0487fb72f6cd8951fc0d 100644
--- a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7620.c
+++ b/iopsys-ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
@@ -27,16 +27,11 @@
 
 #define MT7620A_CDMA_CSG_CFG	0x400
 #define MT7620_DMA_VID		(MT7620A_CDMA_CSG_CFG | 0x30)
-#define MT7621_CDMP_IG_CTRL	(MT7620A_CDMA_CSG_CFG + 0x00)
-#define MT7621_CDMP_EG_CTRL	(MT7620A_CDMA_CSG_CFG + 0x04)
 #define MT7620A_RESET_FE	BIT(21)
-#define MT7621_RESET_FE		BIT(6)
 #define MT7620A_RESET_ESW	BIT(23)
 #define MT7620_L4_VALID		BIT(23)
-#define MT7621_L4_VALID		BIT(24)
 
 #define MT7620_TX_DMA_UDF	BIT(15)
-#define MT7621_TX_DMA_UDF	BIT(19)
 #define TX_DMA_FP_BMAP		((0xff) << 19)
 
 #define CDMA_ICS_EN		BIT(2)
@@ -53,11 +48,6 @@
 #define MT7620_GDM1_TX_GBCNT	(MT7620_REG_MIB_OFFSET + 0x300)
 #define MT7620_GDM2_TX_GBCNT	(MT7620_GDM1_TX_GBCNT + 0x40)
 
-#define MT7621_REG_MIB_OFFSET	0x2000
-#define MT7621_PPE_AC_BCNT0	(MT7621_REG_MIB_OFFSET + 0x00)
-#define MT7621_GDM1_TX_GBCNT	(MT7621_REG_MIB_OFFSET + 0x400)
-#define MT7621_GDM2_TX_GBCNT	(MT7621_GDM1_TX_GBCNT + 0x40)
-
 #define GSW_REG_GDMA1_MAC_ADRL	0x508
 #define GSW_REG_GDMA1_MAC_ADRH	0x50C
 
@@ -68,8 +58,6 @@
  * but after test it should be BIT(13).
  */
 #define MT7620_FE_GDM1_AF	BIT(13)
-#define MT7621_FE_GDM1_AF	BIT(28)
-#define MT7621_FE_GDM2_AF	BIT(29)
 
 static const u16 mt7620_reg_table[FE_REG_COUNT] = {
 	[FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
@@ -118,7 +106,7 @@ static void mt7620_set_mac(struct fe_priv *priv, unsigned char *mac)
 	spin_unlock_irqrestore(&priv->page_lock, flags);
 }
 
-static void mt7620_auto_poll(struct mt7620_gsw *gsw)
+static void mt7620_auto_poll(struct mt7620_gsw *gsw, int port)
 {
 	int phy;
 	int lsb = -1, msb = 0;
@@ -129,7 +117,9 @@ static void mt7620_auto_poll(struct mt7620_gsw *gsw)
 		msb = phy;
 	}
 
-	if (lsb == msb)
+	if (lsb == msb && port ==  4)
+		msb++;
+	else if (lsb == msb && port ==  5)
 		lsb--;
 
 	mtk_switch_w32(gsw, PHY_AN_EN | PHY_PRE_EN | PMY_MDC_CONF(5) |
@@ -140,9 +130,12 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
 {
 	struct mt7620_gsw *gsw = (struct mt7620_gsw *)priv->soc->swpriv;
 	const __be32 *_id = of_get_property(np, "reg", NULL);
+	const __be32 *phy_addr;
 	int phy_mode, size, id;
 	int shift = 12;
 	u32 val, mask = 0;
+	u32 val_delay = 0;
+	u32 mask_delay = GSW_REG_GPCx_TXDELAY | GSW_REG_GPCx_RXDELAY;
 	int min = (gsw->port4 == PORT4_EPHY) ? (5) : (4);
 
 	if (!_id || (be32_to_cpu(*_id) < min) || (be32_to_cpu(*_id) > 5)) {
@@ -172,6 +165,25 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
 	switch (phy_mode) {
 	case PHY_INTERFACE_MODE_RGMII:
 		mask = 0;
+		/* Do not touch rx/tx delay in this state to avoid problems with
+		 * backward compability.
+		 */
+		mask_delay = 0;
+		break;
+	case PHY_INTERFACE_MODE_RGMII_ID:
+		mask = 0;
+		val_delay |= GSW_REG_GPCx_TXDELAY;
+		val_delay &= ~GSW_REG_GPCx_RXDELAY;
+		break;
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+		mask = 0;
+		val_delay &= ~GSW_REG_GPCx_TXDELAY;
+		val_delay &= ~GSW_REG_GPCx_RXDELAY;
+		break;
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+		mask = 0;
+		val_delay &= ~GSW_REG_GPCx_TXDELAY;
+		val_delay |= GSW_REG_GPCx_RXDELAY;
 		break;
 	case PHY_INTERFACE_MODE_MII:
 		mask = 1;
@@ -193,6 +205,19 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
 	val |= mask << shift;
 	rt_sysc_w32(val, SYSC_REG_CFG1);
 
+	if (id == 4) {
+		val = mtk_switch_r32(gsw, GSW_REG_GPC2);
+		val &= ~(mask_delay);
+		val |= val_delay & mask_delay;
+		mtk_switch_w32(gsw, val, GSW_REG_GPC2);
+	}
+	else if (id == 5) {
+		val = mtk_switch_r32(gsw, GSW_REG_GPC1);
+		val &= ~(mask_delay);
+		val |= val_delay & mask_delay;
+		mtk_switch_w32(gsw, val, GSW_REG_GPC1);
+	}
+
 	if (priv->phy->phy_fixed[id]) {
 		const __be32 *link = priv->phy->phy_fixed[id];
 		int tx_fc, rx_fc;
@@ -234,14 +259,15 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
 		return;
 	}
 
-	if (priv->phy->phy_node[id] && mdiobus_get_phy(priv->mii_bus, id)) {
+	phy_addr = of_get_property(priv->phy->phy_node[id], "reg", NULL);
+	if (phy_addr && mdiobus_get_phy(priv->mii_bus, be32_to_cpup(phy_addr))) {
 		u32 val = PMCR_BACKPRES | PMCR_BACKOFF | PMCR_RX_EN |
 			PMCR_TX_EN |  PMCR_MAC_MODE | PMCR_IPG;
 
 		mtk_switch_w32(gsw, val, GSW_REG_PORT_PMCR(id));
-		fe_connect_phy_node(priv, priv->phy->phy_node[id]);
-		gsw->autopoll |= BIT(id);
-		mt7620_auto_poll(gsw);
+		fe_connect_phy_node(priv, priv->phy->phy_node[id], id);
+		gsw->autopoll |= BIT(be32_to_cpup(phy_addr));
+		mt7620_auto_poll(gsw,id);
 		return;
 	}
 }
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt2880.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt2880.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt2880.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt2880.c
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt3050.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt3050.c
diff --git a/iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3883.c b/iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt3883.c
similarity index 100%
rename from iopsys-ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3883.c
rename to iopsys-ramips/files/drivers/net/ethernet/ralink/soc_rt3883.c
diff --git a/iopsys-ramips/image/Makefile b/iopsys-ramips/image/Makefile
index e75ec0a96c294b78a6cfa89090820e04b08ffb57..a078c7c1f7435e56d409f4aa132ebc4e2acbda76 100644
--- a/iopsys-ramips/image/Makefile
+++ b/iopsys-ramips/image/Makefile
@@ -1,51 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-only
 #
 # Copyright (C) 2008-2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
+
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/image.mk
 
-DEVICE_VARS += DTS IMAGE_SIZE NETGEAR_BOARD_ID NETGEAR_HW_ID
+DEVICE_VARS += LOADER_TYPE LOADER_FLASH_OFFS
+DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
 DEVICE_VARS += BUFFALO_TAG_PLATFORM BUFFALO_TAG_VERSION BUFFALO_TAG_MINOR
 DEVICE_VARS += SEAMA_SIGNATURE SEAMA_MTDBLOCK
-DEVICE_VARS += SERCOMM_HWID SERCOMM_HWVER SERCOMM_SWVER
-DEVICE_VARS += JCG_MAXSIZE
+DEVICE_VARS += SERCOMM_HWNAME SERCOMM_HWID SERCOMM_HWVER SERCOMM_SWVER
+DEVICE_VARS += SERCOMM_PAD JCG_MAXSIZE
 
 loadaddr-y := 0x80000000
 loadaddr-$(CONFIG_TARGET_ramips_rt288x) := 0x88000000
 loadaddr-$(CONFIG_TARGET_ramips_mt7621) := 0x80001000
 loadaddr-$(CONFIG_TARGET_iopsys_ramips_mt7621) := 0x80001000
 
+ldrplatform-y := ralink
+ldrplatform-$(CONFIG_TARGET_ramips_mt7621) := mt7621
+
+ldrflashstart-y := 0x1c000000
+ldrflashstart-$(CONFIG_TARGET_ramips_mt7621) := 0x1fc00000
+
 KERNEL_LOADADDR := $(loadaddr-y)
+LOADER_PLATFORM := $(ldrplatform-y)
+LOADER_FLASH_START := $(ldrflashstart-y)
 
 KERNEL_DTB = kernel-bin | append-dtb | lzma
-define Device/Default
-  PROFILES = Default
-  KERNEL := $(KERNEL_DTB) | uImage lzma
-  DEVICE_DTS_DIR := ../dts
-  DEVICE_DTS = $$(DTS)
-  IMAGES := sysupgrade.bin
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  SUPPORTED_DEVICES := $(subst _,$(comma),$(1))
-  sysupgrade_bin := append-kernel | append-rootfs | pad-rootfs
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
-endef
-
-define Device/seama
-  SEAMA_MTDBLOCK := 2
-  IMAGES += factory.bin
 
-  # 64 bytes offset:
-  # - 28 bytes seama_header
-  # - 36 bytes of META data (4-bytes aligned)
-  IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-rootfs
-  IMAGE/sysupgrade.bin := \
-	$$(IMAGE/default) | seama | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
-  IMAGE/factory.bin := \
-	$$(IMAGE/default) | pad-rootfs -x 64 | seama | seama-seal | check-size $$$$(IMAGE_SIZE)
-  SEAMA_SIGNATURE :=
+define Build/edimax-header
+	$(STAGING_DIR_HOST)/bin/mkedimaximg -i $@ -o $@.new $(1)
+	@mv $@.new $@
 endef
 
 define Build/jcg-header
@@ -55,21 +41,13 @@ define Build/jcg-header
 	mv $@.new $@
 endef
 
-define Build/trx
-	$(STAGING_DIR_HOST)/bin/trx $(1) \
-		-o $@ \
-		-m $(IMAGE_SIZE) \
-		-f $(IMAGE_KERNEL) \
-		-a 4 -f $(IMAGE_ROOTFS)
-endef
-
 define Build/loader-common
 	rm -rf $@.src
 	$(MAKE) -C lzma-loader \
 		PKG_BUILD_DIR="$@.src" \
 		TARGET_DIR="$(dir $@)" LOADER_NAME="$(notdir $@)" \
-		BOARD="$(BOARDNAME)" PLATFORM="$(PLATFORM)" \
-		LZMA_TEXT_START=0x82000000 LOADADDR=$(KERNEL_LOADADDR) \
+		BOARD="$(BOARDNAME)" PLATFORM="$(LOADER_PLATFORM)" \
+		LZMA_TEXT_START=0x81800000 LOADADDR=$(KERNEL_LOADADDR) \
 		$(1) compile loader.$(LOADER_TYPE)
 	mv "$@.$(LOADER_TYPE)" "$@"
 	rm -rf $@.src
@@ -79,41 +57,20 @@ define Build/loader-kernel
 	$(call Build/loader-common,LOADER_DATA="$@")
 endef
 
-define Build/relocate-kernel
-	rm -rf $@.relocate
-	$(CP) ../../generic/image/relocate $@.relocate
-	$(MAKE) -C $@.relocate KERNEL_ADDR=$(KERNEL_LOADADDR) CROSS_COMPILE=$(TARGET_CROSS)
-	( \
-		dd if=$@.relocate/loader.bin bs=32 conv=sync && \
-		perl -e '@s = stat("$@"); print pack("V", @s[7])' && \
-		cat $@ \
-	) > $@.new
-	mv $@.new $@
-	rm -rf $@.relocate
+define Build/loader-okli-compile
+	$(call Build/loader-common, \
+		FLASH_START=$(LOADER_FLASH_START) \
+		FLASH_OFFS=$(LOADER_FLASH_OFFS) \
+		FLASH_MAX=0 \
+	)
 endef
 
-define Build/umedia-header
-	fix-u-media-header -T 0x46 -B $(1) -i $@ -o $@.new && mv $@.new $@
-endef
-
-define Build/edimax-header
-	$(STAGING_DIR_HOST)/bin/mkedimaximg -i $@ -o $@.new $(1)
-	@mv $@.new $@
-endef
-
-define Build/poray-header
-	$(STAGING_DIR_HOST)/bin/mkporayfw $(1) -f $@ -o $@.new
-	mv $@.new $@
-endef
-
-define Build/wrg-header
-	mkwrgimg -i $@ -d "/dev/mtdblock/2" -s $(1) -o $@.new
-	mv $@.new $@
+define Build/append-loader-okli
+	cat "$(KDIR)/loader-$(word 1,$(1)).$(LOADER_TYPE)" >> "$@"
 endef
 
 # combine kernel and rootfs into one image
 # mkdlinkfw <type> <optional extra arguments to mkdlinkfw binary>
-
 define Build/mkdlinkfw
 	-$(STAGING_DIR_HOST)/bin/mkdlinkfw \
 		-k $(IMAGE_KERNEL) \
@@ -133,8 +90,32 @@ define Build/mkdlinkfw-factory
 	mv $@.new $@
 endef
 
-define Build/zyimage
-	$(STAGING_DIR_HOST)/bin/zyimage $(1) $@
+define Build/netis-tail
+	echo -n $(1) >> $@
+	echo -n $(UIMAGE_NAME)-yun | $(STAGING_DIR_HOST)/bin/mkhash md5 | \
+		sed 's/../\\\\x&/g' | xargs echo -ne >> $@
+endef
+
+define Build/poray-header
+	$(STAGING_DIR_HOST)/bin/mkporayfw $(1) -f $@ -o $@.new
+	mv $@.new $@
+endef
+
+define Build/relocate-kernel
+	rm -rf $@.relocate
+	$(CP) ../../generic/image/relocate $@.relocate
+	$(MAKE) -C $@.relocate KERNEL_ADDR=$(KERNEL_LOADADDR) CROSS_COMPILE=$(TARGET_CROSS)
+	( \
+		dd if=$@.relocate/loader.bin bs=32 conv=sync && \
+		perl -e '@s = stat("$@"); print pack("V", @s[7])' && \
+		cat $@ \
+	) > $@.new
+	mv $@.new $@
+	rm -rf $@.relocate
+endef
+
+define Build/sercom-footer
+	$(call Build/sercom-seal,-f)
 endef
 
 define Build/sercom-seal
@@ -146,37 +127,81 @@ define Build/sercom-seal
 		$(1)
 endef
 
-define Build/sercom-footer
-	$(call Build/sercom-seal,-f)
+define Build/sign-dlink-ru
+	sign_dlink_ru $@ $1 $2
+	mv $@.new $@
 endef
 
-ralink_default_fw_size_4M=3866624
-ralink_default_fw_size_8M=8060928
-ralink_default_fw_size_16M=16121856
-ralink_default_fw_size_32M=33226752
+define Build/trx
+	$(STAGING_DIR_HOST)/bin/trx $(1) \
+		-o $@ \
+		-m $$(($(subst k, * 1024,$(IMAGE_SIZE)))) \
+		-f $(IMAGE_KERNEL) \
+		-a 4 -f $(IMAGE_ROOTFS)
+endef
 
-ifeq ($(SUBTARGET),rt288x)
-include rt288x.mk
-endif
+define Build/uimage-padhdr
+	uimage_padhdr $(if $(1),-l $(1)) -i $@ -o $@.new
+	mv $@.new $@
+endef
 
-ifeq ($(SUBTARGET),rt305x)
-include rt305x.mk
-endif
+define Build/umedia-header
+	fix-u-media-header -T 0x46 -B $(1) -i $@ -o $@.new && mv $@.new $@
+endef
+
+define Build/wrg-header
+	mkwrgimg -i $@ -d "/dev/mtdblock/2" -s $(1) -o $@.new
+	mv $@.new $@
+endef
+
+define Build/zyimage
+	$(STAGING_DIR_HOST)/bin/zyimage $(1) $@
+endef
+
+define Device/Default
+  PROFILES = Default
+  KERNEL := $(KERNEL_DTB) | uImage lzma
+  SOC := $(DEFAULT_SOC)
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS = $$(SOC)_$(1)
+  IMAGES := sysupgrade.bin
+  COMPILE :=
+  sysupgrade_bin := append-kernel | append-rootfs | pad-rootfs
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size
+endef
+
+define Device/netgear_sercomm_nor
+  BLOCKSIZE := 64k
+  DEVICE_VENDOR := NETGEAR
+  IMAGES += factory.img
+  IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | \
+	pad-rootfs
+  IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size
+  IMAGE/factory.img := pad-extra $$$$(SERCOMM_PAD) | $$(IMAGE/default) | \
+	pad-to $$$$(BLOCKSIZE) | sercom-footer | pad-to 128 | \
+	zip $$$$(SERCOMM_HWNAME).bin | sercom-seal
+endef
 
-ifeq ($(SUBTARGET),rt3883)
-include rt3883.mk
-endif
+define Device/seama
+  SEAMA_MTDBLOCK := 2
+  IMAGES += factory.bin
 
-ifeq ($(SUBTARGET),mt7620)
-include mt7620.mk
-endif
+  # 64 bytes offset:
+  # - 28 bytes seama_header
+  # - 36 bytes of META data (4-bytes aligned)
+  IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-rootfs
+  IMAGE/sysupgrade.bin := \
+	$$(IMAGE/default) | seama | pad-rootfs | append-metadata | check-size
+  IMAGE/factory.bin := \
+	$$(IMAGE/default) | pad-rootfs -x 64 | seama | seama-seal | check-size
+  SEAMA_SIGNATURE :=
+endef
 
-ifeq ($(SUBTARGET),mt7621)
-include mt7621.mk
-endif
+define Device/uimage-lzma-loader
+  LOADER_TYPE := bin
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+endef
 
-ifeq ($(SUBTARGET),mt76x8)
-include mt76x8.mk
-endif
+include $(SUBTARGET).mk
 
 $(eval $(call BuildImage))
diff --git a/iopsys-ramips/image/common-tp-link.mk b/iopsys-ramips/image/common-tp-link.mk
new file mode 100644
index 0000000000000000000000000000000000000000..07ad1ea25025280b7f2e196042594b6aba1ed40f
--- /dev/null
+++ b/iopsys-ramips/image/common-tp-link.mk
@@ -0,0 +1,44 @@
+DEVICE_VARS += TPLINK_FLASHLAYOUT TPLINK_HWID TPLINK_HWREV TPLINK_HWREVADD
+DEVICE_VARS += TPLINK_HVERSION TPLINK_BOARD_ID TPLINK_HEADER_VERSION
+
+define Device/tplink-v1
+  DEVICE_VENDOR := TP-Link
+  TPLINK_FLASHLAYOUT :=
+  TPLINK_HWID :=
+  TPLINK_HWREV := 0x1
+  TPLINK_HEADER_VERSION := 1
+  KERNEL := $(KERNEL_DTB)
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | tplink-v1-header -e -O
+  IMAGES += factory.bin
+  IMAGE/factory.bin := tplink-v1-image factory -e -O
+  IMAGE/sysupgrade.bin := tplink-v1-image sysupgrade -e -O | append-metadata | \
+	check-size
+endef
+
+define Device/tplink-v2
+  DEVICE_VENDOR := TP-Link
+  TPLINK_FLASHLAYOUT :=
+  TPLINK_HWID :=
+  TPLINK_HWREV := 0x1
+  TPLINK_HWREVADD := 0x0
+  TPLINK_HVERSION := 3
+  KERNEL := $(KERNEL_DTB)
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | tplink-v2-header -e
+  IMAGES += factory.bin
+  IMAGE/factory.bin := tplink-v2-image -e
+  IMAGE/sysupgrade.bin := tplink-v2-image -s -e | append-metadata | \
+	check-size
+endef
+
+define Device/tplink-safeloader
+  DEVICE_VENDOR := TP-Link
+  TPLINK_BOARD_ID :=
+  TPLINK_HWID := 0x0
+  TPLINK_HWREV := 0x0
+  TPLINK_HEADER_VERSION := 1
+  KERNEL := $(KERNEL_DTB) | tplink-v1-header -e -O
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \
+	append-metadata | check-size
+  IMAGE/factory.bin := append-rootfs | tplink-safeloader factory
+endef
diff --git a/iopsys-ramips/image/lzma-loader/Makefile b/iopsys-ramips/image/lzma-loader/Makefile
index f22151c9d7059b3a36e63e136d438e0b8f33b8fa..4cf700d8c6463b4f2e7094409b793f8a8f5a0b03 100644
--- a/iopsys-ramips/image/lzma-loader/Makefile
+++ b/iopsys-ramips/image/lzma-loader/Makefile
@@ -13,6 +13,7 @@ LOADER		:= loader.bin
 LOADER_NAME	:= $(basename $(notdir $(LOADER)))
 LOADER_DATA 	:=
 TARGET_DIR	:=
+FLASH_START	:=
 FLASH_OFFS	:=
 FLASH_MAX	:=
 BOARD		:=
@@ -40,6 +41,7 @@ loader-compile: $(PKG_BUILD_DIR)/.prepared
 	$(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
 		LZMA_TEXT_START=$(LZMA_TEXT_START) \
 		LOADER_DATA=$(LOADER_DATA) \
+		FLASH_START=$(FLASH_START) \
 		FLASH_OFFS=$(FLASH_OFFS) \
 		FLASH_MAX=$(FLASH_MAX) \
 		BOARD="$(BOARD)" \
diff --git a/iopsys-ramips/image/lzma-loader/src/Makefile b/iopsys-ramips/image/lzma-loader/src/Makefile
index d20cd77346abcaf61777897d3f42111c42f88d33..97fd6dad47b27180499a71ea3a84a5037c84a729 100644
--- a/iopsys-ramips/image/lzma-loader/src/Makefile
+++ b/iopsys-ramips/image/lzma-loader/src/Makefile
@@ -19,6 +19,7 @@ LOADADDR	:=
 LZMA_TEXT_START	:= 0x80a00000
 LOADER_DATA	:=
 BOARD		:=
+FLASH_START	:=
 FLASH_OFFS	:=
 FLASH_MAX	:=
 PLATFORM	:=
@@ -64,6 +65,10 @@ ifneq ($(strip $(KERNEL_CMDLINE)),)
 CFLAGS		+= -DCONFIG_KERNEL_CMDLINE='"$(KERNEL_CMDLINE)"'
 endif
 
+ifneq ($(strip $(FLASH_START)),)
+CFLAGS		+= -DCONFIG_FLASH_START=$(FLASH_START)
+endif
+
 ifneq ($(strip $(FLASH_OFFS)),)
 CFLAGS		+= -DCONFIG_FLASH_OFFS=$(FLASH_OFFS)
 endif
diff --git a/iopsys-ramips/image/lzma-loader/src/loader.c b/iopsys-ramips/image/lzma-loader/src/loader.c
index c73b60b3514aafa7f877e63b03a257319519309b..a3513eccf16f972727eeaf7c25d195ec2fb5fe47 100644
--- a/iopsys-ramips/image/lzma-loader/src/loader.c
+++ b/iopsys-ramips/image/lzma-loader/src/loader.c
@@ -28,9 +28,6 @@
 #include "printf.h"
 #include "LzmaDecode.h"
 
-#define AR71XX_FLASH_START	0x1f000000
-#define AR71XX_FLASH_END	0x1fe00000
-
 #define KSEG0			0x80000000
 #define KSEG1			0xa0000000
 
@@ -178,7 +175,7 @@ static void lzma_init_data(void)
 	unsigned long kernel_ofs;
 	unsigned long kernel_size;
 
-	flash_base = (unsigned char *) KSEG1ADDR(AR71XX_FLASH_START);
+	flash_base = (unsigned char *) KSEG1ADDR(CONFIG_FLASH_START);
 
 	printf("Looking for OpenWrt image... ");
 
diff --git a/iopsys-ramips/image/mt7620.mk b/iopsys-ramips/image/mt7620.mk
index 89723fbb52bb245014239c0eb120a1a9e6ff347f..f8905ad2b725e3aebb2f78bad0962dbcfca98f0c 100644
--- a/iopsys-ramips/image/mt7620.mk
+++ b/iopsys-ramips/image/mt7620.mk
@@ -2,8 +2,9 @@
 # MT7620A Profiles
 #
 
-DEVICE_VARS += TPLINK_FLASHLAYOUT TPLINK_HWID TPLINK_HWREV TPLINK_HWREVADD TPLINK_HVERSION \
-	DLINK_ROM_ID DLINK_FAMILY_MEMBER DLINK_FIRMWARE_SIZE DLINK_IMAGE_OFFSET
+include ./common-tp-link.mk
+
+DEVICE_VARS += DLINK_ROM_ID DLINK_FAMILY_MEMBER DLINK_FIRMWARE_SIZE DLINK_IMAGE_OFFSET
 
 define Build/elecom-header
 	cp $@ $(KDIR)/v_0.0.0.bin
@@ -13,58 +14,45 @@ define Build/elecom-header
 	) | mkhash md5 > $(KDIR)/v_0.0.0.md5
 	$(STAGING_DIR_HOST)/bin/tar -c \
 		$(if $(SOURCE_DATE_EPOCH),--mtime=@$(SOURCE_DATE_EPOCH)) \
-		-f $@ -C $(KDIR) v_0.0.0.bin v_0.0.0.md5
-endef
-
-define Build/elx-header
-  $(eval hw_id=$(word 1,$(1)))
-  $(eval xor_pattern=$(word 2,$(1)))
-  ( \
-    echo -ne "\x00\x00\x00\x00\x00\x00\x00\x03" | \
-      dd bs=42 count=1 conv=sync; \
-    hw_id="$(hw_id)"; \
-    echo -ne "\x$${hw_id:0:2}\x$${hw_id:2:2}\x$${hw_id:4:2}\x$${hw_id:6:2}" | \
-      dd bs=20 count=1 conv=sync; \
-    echo -ne "$$(printf '%08x' $$(stat -c%s $@) | fold -s2 | xargs -I {} echo \\x{} | tr -d '\n')" | \
-      dd bs=8 count=1 conv=sync; \
-    echo -ne "$$($(STAGING_DIR_HOST)/bin/mkhash md5 $@ | fold -s2 | xargs -I {} echo \\x{} | tr -d '\n')" | \
-      dd bs=58 count=1 conv=sync; \
-  ) > $(KDIR)/tmp/$(DEVICE_NAME).header
-  $(call Build/xor-image,-p $(xor_pattern) -x)
-  cat $(KDIR)/tmp/$(DEVICE_NAME).header $@ > $@.new
-  mv $@.new $@
-endef
-
-define Device/ai-br100
-  DTS := AI-BR100
+		--owner=0 --group=0 -f $@ -C $(KDIR) v_0.0.0.bin v_0.0.0.md5
+endef
+
+define Device/aigale_ai-br100
+  SOC := mt7620a
   IMAGE_SIZE := 7936k
-  DEVICE_TITLE := Aigale Ai-BR100
+  DEVICE_VENDOR := Aigale
+  DEVICE_MODEL := Ai-BR100
   DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += ai-br100
 endef
-TARGET_DEVICES += ai-br100
+TARGET_DEVICES += aigale_ai-br100
 
 define Device/alfa-network_ac1200rm
-  DTS := AC1200RM
+  SOC := mt7620a
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := ALFA Network AC1200RM
+  DEVICE_VENDOR := ALFA Network
+  DEVICE_MODEL := AC1200RM
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci uboot-envtools
 endef
 TARGET_DEVICES += alfa-network_ac1200rm
 
 define Device/alfa-network_r36m-e4g
-  DTS := R36M-E4G
+  SOC := mt7620a
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := ALFA Network R36M-E4G
-  DEVICE_PACKAGES := kmod-i2c-ralink kmod-usb2 kmod-usb-ohci uboot-envtools uqmi
+  DEVICE_VENDOR := ALFA Network
+  DEVICE_MODEL := R36M-E4G
+  DEVICE_PACKAGES := kmod-i2c-ralink kmod-usb2 kmod-usb-ohci uboot-envtools \
+	uqmi
 endef
 TARGET_DEVICES += alfa-network_r36m-e4g
 
 define Device/alfa-network_tube-e4g
-  DTS := TUBE-E4G
+  SOC := mt7620a
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := ALFA Network Tube-E4G
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci uboot-envtools uqmi \
-	-iwinfo -kmod-rt2800-soc -wpad-basic
+  DEVICE_VENDOR := ALFA Network
+  DEVICE_MODEL := Tube-E4G
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci uboot-envtools uqmi -iwinfo \
+	-kmod-rt2800-soc -wpad-basic-wolfssl
 endef
 TARGET_DEVICES += alfa-network_tube-e4g
 
@@ -77,130 +65,132 @@ define Device/amit_jboot
   DEVICE_PACKAGES := jboot-tools kmod-usb2 kmod-usb-ohci
 endef
 
-define Device/Archer
-  TPLINK_HWREVADD := 0
-  TPLINK_HVERSION := 3
-  KERNEL := $(KERNEL_DTB)
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | tplink-v2-header -e
-  IMAGE/factory.bin := tplink-v2-image -e
-  IMAGE/sysupgrade.bin := tplink-v2-image -s -e | append-metadata
+define Device/asus_rp-n53
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RP-N53
+  DEVICE_PACKAGES := kmod-rt2800-pci
+  SUPPORTED_DEVICES += rp-n53
 endef
+TARGET_DEVICES += asus_rp-n53
 
-define Device/ArcherC20i
-  $(Device/Archer)
-  DTS := ArcherC20i
-  SUPPORTED_DEVICES := c20i
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0xc2000001
-  TPLINK_HWREV := 58
-  IMAGES += factory.bin
-  DEVICE_TITLE := TP-Link ArcherC20i
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+define Device/asus_rt-ac51u
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-AC51U
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += rt-ac51u
 endef
-TARGET_DEVICES += ArcherC20i
+TARGET_DEVICES += asus_rt-ac51u
 
-define Device/ArcherC50v1
-  $(Device/Archer)
-  DTS := ArcherC50
-  SUPPORTED_DEVICES := c50
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0xc7500001
-  TPLINK_HWREV := 69
-  IMAGES += factory-us.bin factory-eu.bin
-  IMAGE/factory-us.bin := tplink-v2-image -e -w 0
-  IMAGE/factory-eu.bin := tplink-v2-image -e -w 2
-  DEVICE_TITLE := TP-Link ArcherC50v1
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+define Device/asus_rt-ac54u
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-AC54U
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
 endef
-TARGET_DEVICES += ArcherC50v1
+TARGET_DEVICES += asus_rt-ac54u
 
-define Device/ArcherMR200
-  $(Device/Archer)
-  DTS := ArcherMR200
-  SUPPORTED_DEVICES := mr200
-  TPLINK_FLASHLAYOUT := 8MLmtk
-  TPLINK_HWID := 0xd7500001
-  TPLINK_HWREV := 0x4a
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-net kmod-usb-net-rndis kmod-usb-serial kmod-usb-serial-option adb-enablemodem
-  DEVICE_TITLE := TP-Link ArcherMR200
+define Device/asus_rt-n12p
+  SOC := mt7620n
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N11P/RT-N12+/RT-N12Eb1
+  SUPPORTED_DEVICES += rt-n12p
 endef
-TARGET_DEVICES += ArcherMR200
+TARGET_DEVICES += asus_rt-n12p
+
+define Device/asus_rt-n14u
+  SOC := mt7620n
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N14u
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += rt-n14u
+endef
+TARGET_DEVICES += asus_rt-n14u
 
 define Device/bdcom_wap2100-sk
-  DTS := BDCOM-WAP2100-SK
+  SOC := mt7620a
   IMAGE_SIZE := 15808k
-  DEVICE_TITLE := BDCOM WAP2100-SK (ZTE ZXECS EBG3130)
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mt76x2 kmod-mt76x0e kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+  DEVICE_VENDOR := BDCOM
+  DEVICE_MODEL := WAP2100-SK (ZTE ZXECS EBG3130)
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mt76x2 kmod-mt76x0e \
+	kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += bdcom_wap2100-sk
 
-define Device/bocco
-  DTS := BOCCO
-  DEVICE_TITLE := YUKAI Engineering BOCCO
-  DEVICE_PACKAGES := kmod-sound-core kmod-sound-mt7620 kmod-i2c-ralink
-endef
-TARGET_DEVICES += bocco
-
-define Device/c108
-  DTS := C108
-  IMAGE_SIZE := 16777216
-  DEVICE_TITLE := HNET C108
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+define Device/buffalo_whr-1166d
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WHR-1166D
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += whr-1166d
 endef
-TARGET_DEVICES += c108
+TARGET_DEVICES += buffalo_whr-1166d
 
-define Device/cf-wr800n
-  DTS := CF-WR800N
-  DEVICE_TITLE := Comfast CF-WR800N
+define Device/buffalo_whr-300hp2
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WHR-300HP2
+  SUPPORTED_DEVICES += whr-300hp2
 endef
-TARGET_DEVICES += cf-wr800n
+TARGET_DEVICES += buffalo_whr-300hp2
 
-define Device/cs-qr10
-  DTS := CS-QR10
-  DEVICE_TITLE := Planex CS-QR10
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci \
-	kmod-sound-core kmod-sound-mt7620 \
-	kmod-i2c-ralink kmod-sdhci-mt7620
+define Device/buffalo_whr-600d
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WHR-600D
+  DEVICE_PACKAGES := kmod-rt2800-pci
+  SUPPORTED_DEVICES += whr-600d
 endef
-TARGET_DEVICES += cs-qr10
+TARGET_DEVICES += buffalo_whr-600d
 
-define Device/d240
-  DTS := D240
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Sanlinking Technologies D240
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+define Device/buffalo_wmr-300
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WMR-300
+  SUPPORTED_DEVICES += wmr-300
 endef
-TARGET_DEVICES += d240
+TARGET_DEVICES += buffalo_wmr-300
 
-define Device/db-wrt01
-  DTS := DB-WRT01
-  DEVICE_TITLE := Planex DB-WRT01
+define Device/comfast_cf-wr800n
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Comfast
+  DEVICE_MODEL := CF-WR800N
+  SUPPORTED_DEVICES += cf-wr800n
 endef
-TARGET_DEVICES += db-wrt01
+TARGET_DEVICES += comfast_cf-wr800n
 
-define Device/dch-m225
+define Device/dlink_dch-m225
   $(Device/seama)
-  DTS := DCH-M225
+  SOC := mt7620a
   BLOCKSIZE := 4k
   SEAMA_SIGNATURE := wapn22_dlink.2013gui_dap1320b
   IMAGE_SIZE := 6848k
-  DEVICE_TITLE := D-Link DCH-M225
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DCH-M225
   DEVICE_PACKAGES := kmod-sound-core kmod-sound-mt7620 kmod-i2c-ralink
+  SUPPORTED_DEVICES += dch-m225
 endef
-TARGET_DEVICES += dch-m225
-
-define Device/dir-810l
-  DTS := DIR-810L
-  DEVICE_PACKAGES := kmod-mt76x0e
-  DEVICE_TITLE := D-Link DIR-810L
-  IMAGE_SIZE := 6720k
-endef
-TARGET_DEVICES += dir-810l
+TARGET_DEVICES += dlink_dch-m225
 
 define Device/dlink_dir-510l
   $(Device/amit_jboot)
-  DTS := DIR-510L
-  DEVICE_TITLE := D-Link DIR-510L
+  SOC := mt7620a
+  IMAGE_SIZE := 14208k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-510L
   DEVICE_PACKAGES += kmod-mt76x0e
   DLINK_ROM_ID := DLK6E3805001
   DLINK_FAMILY_MEMBER := 0x6E38
@@ -209,10 +199,23 @@ define Device/dlink_dir-510l
 endef
 TARGET_DEVICES += dlink_dir-510l
 
+define Device/dlink_dir-810l
+  SOC := mt7620a
+  DEVICE_PACKAGES := kmod-mt76x0e
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-810L
+  IMAGE_SIZE := 6720k
+  SUPPORTED_DEVICES += dir-810l
+endef
+TARGET_DEVICES += dlink_dir-810l
+
 define Device/dlink_dwr-116-a1
   $(Device/amit_jboot)
-  DTS := DWR-116-A1
-  DEVICE_TITLE := D-Link DWR-116 A1/A2
+  SOC := mt7620n
+  IMAGE_SIZE := 8064k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-116
+  DEVICE_VARIANT := A1/A2
   DLINK_ROM_ID := DLK6E3803001
   DLINK_FAMILY_MEMBER := 0x6E38
   DLINK_FIRMWARE_SIZE := 0x7E0000
@@ -221,8 +224,11 @@ TARGET_DEVICES += dlink_dwr-116-a1
 
 define Device/dlink_dwr-118-a1
   $(Device/amit_jboot)
-  DTS := DWR-118-A1
-  DEVICE_TITLE := D-Link DWR-118 A1
+  SOC := mt7620a
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-118
+  DEVICE_VARIANT := A1
   DEVICE_PACKAGES += kmod-mt76x0e
   DLINK_ROM_ID := DLK6E3811001
   DLINK_FAMILY_MEMBER := 0x6E38
@@ -232,8 +238,11 @@ TARGET_DEVICES += dlink_dwr-118-a1
 
 define Device/dlink_dwr-118-a2
   $(Device/amit_jboot)
-  DTS := DWR-118-A2
-  DEVICE_TITLE := D-Link DWR-118 A2
+  SOC := mt7620a
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-118
+  DEVICE_VARIANT := A2
   DEVICE_PACKAGES += kmod-mt76x2
   DLINK_ROM_ID := DLK6E3814001
   DLINK_FAMILY_MEMBER := 0x6E38
@@ -243,9 +252,11 @@ TARGET_DEVICES += dlink_dwr-118-a2
 
 define Device/dlink_dwr-921-c1
   $(Device/amit_jboot)
-  DTS := DWR-921-C1
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := D-Link DWR-921 C1
+  SOC := mt7620n
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-921
+  DEVICE_VARIANT := C1
   DLINK_ROM_ID := DLK6E2414001
   DLINK_FAMILY_MEMBER := 0x6E24
   DLINK_FIRMWARE_SIZE := 0xFE0000
@@ -255,7 +266,10 @@ TARGET_DEVICES += dlink_dwr-921-c1
 
 define Device/dlink_dwr-921-c3
   $(Device/dlink_dwr-921-c1)
-  DEVICE_TITLE := D-Link DWR-921 C3
+  DEVICE_DTS := mt7620n_dlink_dwr-921-c1
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-921
+  DEVICE_VARIANT := C3
   DLINK_ROM_ID := DLK6E2414009
   SUPPORTED_DEVICES := dlink,dwr-921-c1
 endef
@@ -263,9 +277,11 @@ TARGET_DEVICES += dlink_dwr-921-c3
 
 define Device/dlink_dwr-922-e2
   $(Device/amit_jboot)
-  DTS := DWR-922-E2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := D-Link DWR-922 E2
+  SOC := mt7620n
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-922
+  DEVICE_VARIANT := E2
   DLINK_ROM_ID := DLK6E2414005
   DLINK_FAMILY_MEMBER := 0x6E24
   DLINK_FIRMWARE_SIZE := 0xFE0000
@@ -273,185 +289,322 @@ define Device/dlink_dwr-922-e2
 endef
 TARGET_DEVICES += dlink_dwr-922-e2
 
-define Device/e1700
-  DTS := E1700
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	umedia-header 0x013326
-  DEVICE_TITLE := Linksys E1700
+define Device/dlink_dwr-960
+  $(Device/amit_jboot)
+  SOC := mt7620a
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-960
+  DLINK_ROM_ID := DLK6E2429001
+  DLINK_FAMILY_MEMBER := 0x6E24
+  DLINK_FIRMWARE_SIZE := 0xFE0000
+  DEVICE_PACKAGES += kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi \
+	kmod-mt76x0e
 endef
-TARGET_DEVICES += e1700
+TARGET_DEVICES += dlink_dwr-960
 
-define Device/ex2700
-  NETGEAR_HW_ID := 29764623+4+0+32+2x2+0
-  NETGEAR_BOARD_ID := EX2700
-  DTS := EX2700
+define Device/dovado_tiny-ac
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Dovado
+  DEVICE_MODEL := Tiny AC
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += tiny-ac
+endef
+TARGET_DEVICES += dovado_tiny-ac
+
+define Device/edimax_br-6478ac-v2
+  SOC := mt7620a
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := BR-6478AC
+  DEVICE_VARIANT := V2
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 7744k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN68 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += edimax_br-6478ac-v2
+
+define Device/edimax_ew-7476rpc
+  SOC := mt7620a
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := EW-7476RPC
   BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakehdr filesystem
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	netgear-dni
-  DEVICE_TITLE := Netgear EX2700
+  IMAGE_SIZE := 7744k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN79 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek
 endef
-#TARGET_DEVICES += ex2700
+TARGET_DEVICES += edimax_ew-7476rpc
 
-define Device/ex3700-ex3800
-  NETGEAR_BOARD_ID := U12H319T00_NETGEAR
-  DTS := EX3700
+define Device/edimax_ew-7478ac
+  SOC := mt7620a
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := EW-7478AC
   BLOCKSIZE := 4k
   IMAGE_SIZE := 7744k
-  IMAGES += factory.chk
-  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | netgear-chk
-  DEVICE_PACKAGES := kmod-mt76x2
-  DEVICE_TITLE := Netgear EX3700/EX3800
-  SUPPORTED_DEVICES := ex3700
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN70 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek
 endef
-TARGET_DEVICES += ex3700-ex3800
+TARGET_DEVICES += edimax_ew-7478ac
 
-define Device/gl-mt300a
-  DTS := GL-MT300A
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := GL-Inet GL-MT300A
+define Device/edimax_ew-7478apc
+  SOC := mt7620a
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := EW-7478APC
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7744k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN75 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += edimax_ew-7478apc
+
+define Device/elecom_wrh-300cr
+  SOC := mt7620n
+  IMAGE_SIZE := 14272k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | elecom-header
+  DEVICE_VENDOR := Elecom
+  DEVICE_MODEL := WRH-300CR
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += wrh-300cr
 endef
-TARGET_DEVICES += gl-mt300a
+TARGET_DEVICES += elecom_wrh-300cr
 
-define Device/u25awf-h1
-  DTS := U25AWF-H1
-  IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Kimax U25AWF-H1
+define Device/engenius_esr600
+  SOC := mt7620a
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 15616k
+  IMAGES += factory.dlf
+  IMAGE/factory.dlf := $$(sysupgrade_bin) | check-size | \
+	senao-header -r 0x101 -p 0x57 -t 2
+  DEVICE_VENDOR := EnGenius
+  DEVICE_MODEL := ESR600
+  DEVICE_PACKAGES += kmod-rt2800-pci kmod-usb-storage kmod-usb-ohci \
+	kmod-usb-ehci
+endef
+TARGET_DEVICES += engenius_esr600
+
+define Device/fon_fon2601
+  SOC := mt7620a
+  IMAGE_SIZE := 15936k
+  DEVICE_VENDOR := Fon
+  DEVICE_MODEL := FON2601
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  KERNEL_INITRAMFS := $$(KERNEL) | uimage-padhdr
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | uimage-padhdr | \
+	pad-rootfs | append-metadata | check-size
+endef
+TARGET_DEVICES += fon_fon2601
+
+define Device/glinet_gl-mt300a
+  SOC := mt7620a
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := GL-MT300A
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += gl-mt300a
 endef
-TARGET_DEVICES += u25awf-h1
+TARGET_DEVICES += glinet_gl-mt300a
 
-define Device/gl-mt300n
-  DTS := GL-MT300N
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := GL-Inet GL-MT300N
+define Device/glinet_gl-mt300n
+  SOC := mt7620a
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := GL-MT300N
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += gl-mt300n
 endef
-TARGET_DEVICES += gl-mt300n
+TARGET_DEVICES += glinet_gl-mt300n
 
-define Device/gl-mt750
-  DTS := GL-MT750
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := GL-Inet GL-MT750
+define Device/glinet_gl-mt750
+  SOC := mt7620a
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := GL-MT750
   DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += gl-mt750
+endef
+TARGET_DEVICES += glinet_gl-mt750
+
+define Device/head-weblink_hdrm200
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Head Weblink
+  DEVICE_MODEL := HDRM2000
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+	uqmi kmod-usb-serial kmod-usb-serial-option
 endef
-TARGET_DEVICES += gl-mt750
+TARGET_DEVICES += head-weblink_hdrm200
 
-define Device/hc5661
-  DTS := HC5661
+define Device/hiwifi_hc5661
+  SOC := mt7620a
   IMAGE_SIZE := 15872k
-  DEVICE_TITLE := HiWiFi HC5661
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5661
   DEVICE_PACKAGES := kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += hc5661
 endef
-TARGET_DEVICES += hc5661
+TARGET_DEVICES += hiwifi_hc5661
 
-define Device/hc5761
-  DTS := HC5761
+define Device/hiwifi_hc5761
+  SOC := mt7620a
   IMAGE_SIZE := 15872k
-  DEVICE_TITLE := HiWiFi HC5761
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5761
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += hc5761
 endef
-TARGET_DEVICES += hc5761
+TARGET_DEVICES += hiwifi_hc5761
 
-define Device/hc5861
-  DTS := HC5861
+define Device/hiwifi_hc5861
+  SOC := mt7620a
   IMAGE_SIZE := 15872k
-  DEVICE_TITLE := HiWiFi HC5861
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5861
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += hc5861
 endef
-TARGET_DEVICES += hc5861
+TARGET_DEVICES += hiwifi_hc5861
 
-define Device/head-weblink_hdrm200
-  DTS := HDRM200
+define Device/hnet_c108
+  SOC := mt7620a
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Head Weblink HDRM2000
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
-		     uqmi kmod-usb-serial kmod-usb-serial-option
+  DEVICE_VENDOR := HNET
+  DEVICE_MODEL := C108
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += c108
 endef
-TARGET_DEVICES += head-weblink_hdrm200
+TARGET_DEVICES += hnet_c108
+
+define Device/sunvalley_filehub_common
+  SOC := mt7620n
+  IMAGE_SIZE := 6144k
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-i2c-ralink
+  LOADER_TYPE := bin
+  LOADER_FLASH_OFFS := 0x200000
+  COMPILE := loader-$(1).bin
+  COMPILE/loader-$(1).bin := loader-okli-compile | pad-to 64k | lzma | \
+	uImage lzma
+  KERNEL := $(KERNEL_DTB) | uImage lzma -M 0x4f4b4c49
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | uImage lzma
+  IMAGES += kernel.bin rootfs.bin
+  IMAGE/kernel.bin := append-loader-okli $(1) | check-size 64k
+  IMAGE/rootfs.bin := $$(sysupgrade_bin) | check-size
+endef
+
+define Device/hootoo_ht-tm05
+  $(Device/sunvalley_filehub_common)
+  DEVICE_VENDOR := HooToo
+  DEVICE_MODEL := HT-TM05
+endef
+TARGET_DEVICES += hootoo_ht-tm05
 
 define Device/iodata_wn-ac1167gr
-  DTS := WN-AC1167GR
-  DEVICE_TITLE := I-O DATA WN-AC1167GR
+  SOC := mt7620a
+  DEVICE_VENDOR := I-O DATA
+  DEVICE_MODEL := WN-AC1167GR
   IMAGE_SIZE := 6864k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-    $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-    elx-header 01040016 8844A2D168B45A2D
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 01040016 8844A2D168B45A2D
   DEVICE_PACKAGES := kmod-mt76x2
 endef
 TARGET_DEVICES += iodata_wn-ac1167gr
 
 define Device/iodata_wn-ac733gr3
-  DTS := WN-AC733GR3
-  DEVICE_TITLE := I-O DATA WN-AC733GR3
+  SOC := mt7620a
+  DEVICE_VENDOR := I-O DATA
+  DEVICE_MODEL := WN-AC733GR3
   IMAGE_SIZE := 6992k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-    $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-    elx-header 01040006 8844A2D168B45A2D
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 01040006 8844A2D168B45A2D
   DEVICE_PACKAGES := kmod-mt76x0e kmod-switch-rtl8367b
 endef
 TARGET_DEVICES += iodata_wn-ac733gr3
 
-define Device/kimax_u35wf
-  DTS := U35WF
+define Device/iptime_a1004ns
+  SOC := mt7620a
+  IMAGE_SIZE := 16192k
+  UIMAGE_NAME := a1004ns
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A1004ns
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += iptime_a1004ns
+
+define Device/iptime_a104ns
+  SOC := mt7620a
+  IMAGE_SIZE := 8000k
+  UIMAGE_NAME := a104ns
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A104ns
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += iptime_a104ns
+
+define Device/kimax_u25awf-h1
+  SOC := mt7620a
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Kimax U35WF
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
-endef
-TARGET_DEVICES += kimax_u35wf
-
-define Device/kng_rc
-  DTS := kng_rc
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := ZyXEL Keenetic Viva
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport kmod-switch-rtl8366-smi kmod-switch-rtl8367b
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size $$$$(IMAGE_SIZE) | \
-	zyimage -d 8997 -v "ZyXEL Keenetic Viva"
-  SUPPORTED_DEVICES := kng_rc
+  DEVICE_VENDOR := Kimax
+  DEVICE_MODEL := U25AWF
+  DEVICE_VARIANT := H1
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-storage kmod-scsi-core \
+	kmod-fs-ext4 kmod-fs-vfat block-mount
+  SUPPORTED_DEVICES += u25awf-h1
 endef
-TARGET_DEVICES += kng_rc
+TARGET_DEVICES += kimax_u25awf-h1
 
-define Device/kn_rc
-  DTS := kn_rc
-  DEVICE_TITLE := ZyXEL Keenetic Omni
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | pad-to 64k | check-size $$$$(IMAGE_SIZE) | \
-	zyimage -d 4882 -v "ZyXEL Keenetic Omni"
-  SUPPORTED_DEVICES := kn_rc
+define Device/kimax_u35wf
+  SOC := mt7620n
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Kimax
+  DEVICE_MODEL := U35WF
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-storage kmod-scsi-core \
+	kmod-fs-ext4 kmod-fs-vfat block-mount
 endef
-TARGET_DEVICES += kn_rc
+TARGET_DEVICES += kimax_u35wf
 
-define Device/kn_rf
-  DTS := kn_rf
-  DEVICE_TITLE := ZyXEL Keenetic Omni II
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | pad-to 64k | check-size $$$$(IMAGE_SIZE) | \
-	zyimage -d 2102034 -v "ZyXEL Keenetic Omni II"
-  SUPPORTED_DEVICES := kn_rf
+define Device/kingston_mlw221
+  SOC := mt7620n
+  IMAGE_SIZE := 15744k
+  DEVICE_VENDOR := Kingston
+  DEVICE_MODEL := MLW221
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += mlw221
 endef
-TARGET_DEVICES += kn_rf
+TARGET_DEVICES += kingston_mlw221
 
-define Device/microwrt
-  DTS := MicroWRT
-  IMAGE_SIZE := 16128k
-  DEVICE_TITLE := Microduino MicroWRT
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/kingston_mlwg2
+  SOC := mt7620n
+  IMAGE_SIZE := 15744k
+  DEVICE_VENDOR := Kingston
+  DEVICE_MODEL := MLWG2
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += mlwg2
 endef
-TARGET_DEVICES += microwrt
+TARGET_DEVICES += kingston_mlwg2
 
 define Device/lava_lr-25g001
   $(Device/amit_jboot)
-  DTS := LR-25G001
-  DEVICE_TITLE := LAVA LR-25G001
+  SOC := mt7620a
+  IMAGE_SIZE := 16256k
+  DEVICE_VENDOR := LAVA
+  DEVICE_MODEL := LR-25G001
   DLINK_ROM_ID := LVA6E3804001
   DLINK_FAMILY_MEMBER := 0x6E38
   DLINK_FIRMWARE_SIZE := 0xFE0000
@@ -459,393 +612,672 @@ define Device/lava_lr-25g001
 endef
 TARGET_DEVICES += lava_lr-25g001
 
-define Device/miwifi-mini
-  DTS := MIWIFI-MINI
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Xiaomi MiWiFi Mini
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+define Device/lb-link_bl-w1200
+  SOC := mt7620a
+  DEVICE_VENDOR := LB-Link
+  DEVICE_MODEL := BL-W1200
+  IMAGE_SIZE := 7872k
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mt76x2
 endef
-TARGET_DEVICES += miwifi-mini
+TARGET_DEVICES += lb-link_bl-w1200
 
-define Device/mlw221
-  DTS := MLW221
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Kingston MLW221
+define Device/lenovo_newifi-y1
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Lenovo
+  DEVICE_MODEL := Y1
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += y1
 endef
-TARGET_DEVICES += mlw221
+TARGET_DEVICES += lenovo_newifi-y1
 
-define Device/mlwg2
-  DTS := MLWG2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Kingston MLWG2
+define Device/lenovo_newifi-y1s
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Lenovo
+  DEVICE_MODEL := Y1S
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += y1s
 endef
-TARGET_DEVICES += mlwg2
+TARGET_DEVICES += lenovo_newifi-y1s
 
-define Device/mt7620a
-  DTS := MT7620a
-  DEVICE_TITLE := MediaTek MT7620a EVB
+define Device/linksys_e1700
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | umedia-header 0x013326
+  DEVICE_VENDOR := Linksys
+  DEVICE_MODEL := E1700
+  SUPPORTED_DEVICES += e1700
 endef
-TARGET_DEVICES += mt7620a
+TARGET_DEVICES += linksys_e1700
 
-define Device/mt7620a_mt7530
-  DTS := MT7620a_MT7530
-  DEVICE_TITLE := MediaTek MT7620a + MT7530 EVB
-  SUPPORTED_DEVICES := mt7620a_mt7530
+define Device/microduino_microwrt
+  SOC := mt7620a
+  IMAGE_SIZE := 16128k
+  DEVICE_VENDOR := Microduino
+  DEVICE_MODEL := MicroWRT
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += microwrt
 endef
-TARGET_DEVICES += mt7620a_mt7530
+TARGET_DEVICES += microduino_microwrt
 
-define Device/mt7620a_mt7610e
-  DTS := MT7620a_MT7610e
-  DEVICE_TITLE := MediaTek MT7620a + MT7610e EVB
-  DEVICE_PACKAGES := kmod-mt76x0e
-  SUPPORTED_DEVICES := mt7620a_mt7610e
+define Device/netgear_ex2700
+  SOC := mt7620a
+  NETGEAR_HW_ID := 29764623+4+0+32+2x2+0
+  NETGEAR_BOARD_ID := EX2700
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | \
+	append-uImage-fakehdr filesystem
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | netgear-dni
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := EX2700
+  SUPPORTED_DEVICES += ex2700
+  DEFAULT := n
+endef
+TARGET_DEVICES += netgear_ex2700
+
+define Device/netgear_ex3700
+  SOC := mt7620a
+  NETGEAR_BOARD_ID := U12H319T00_NETGEAR
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7744k
+  IMAGES += factory.chk
+  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size | netgear-chk
+  DEVICE_PACKAGES := kmod-mt76x2
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := EX3700/EX3800
+  SUPPORTED_DEVICES += ex3700
 endef
-TARGET_DEVICES += mt7620a_mt7610e
+TARGET_DEVICES += netgear_ex3700
 
-define Device/mt7620a_v22sg
-  DTS := MT7620a_V22SG
-  DEVICE_TITLE := MediaTek MT7620a V22SG
-  SUPPORTED_DEVICES := mt7620a_v22sg
+define Device/netgear_ex6120
+  SOC := mt7620a
+  NETGEAR_BOARD_ID := U12H319T30_NETGEAR
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7744k
+  IMAGES += factory.chk
+  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size | netgear-chk
+  DEVICE_PACKAGES := kmod-mt76x2
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := EX6120
 endef
-TARGET_DEVICES += mt7620a_v22sg
+TARGET_DEVICES += netgear_ex6120
 
-define Device/mzk-750dhp
-  DTS := MZK-750DHP
-  DEVICE_TITLE := Planex MZK-750DHP
-  DEVICE_PACKAGES := kmod-mt76x0e
+define Device/netgear_ex6130
+  SOC := mt7620a
+  NETGEAR_BOARD_ID := U12H319T50_NETGEAR
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7744k
+  IMAGES += factory.chk
+  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size | netgear-chk
+  DEVICE_PACKAGES := kmod-mt76x2
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := EX6130
 endef
-TARGET_DEVICES += mzk-750dhp
+TARGET_DEVICES += netgear_ex6130
 
-define Device/mzk-ex300np
-  DTS := MZK-EX300NP
-  DEVICE_TITLE := Planex MZK-EX300NP
+define Device/netgear_jwnr2010-v5
+  $(Device/netgear_sercomm_nor)
+  SOC := mt7620n
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3840k
+  DEVICE_MODEL := JWNR2010
+  DEVICE_VARIANT := v5
+  SERCOMM_HWNAME := N300
+  SERCOMM_HWID := ASW
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0040
+  SERCOMM_PAD := 128k
+  DEFAULT := n
+endef
+TARGET_DEVICES += netgear_jwnr2010-v5
+
+define Device/netgear_wn3000rp-v3
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  NETGEAR_HW_ID := 29764836+8+0+32+2x2+0
+  NETGEAR_BOARD_ID := WN3000RPv3
+  BLOCKSIZE := 4k
+  IMAGES += factory.bin
+  KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | \
+	append-uImage-fakehdr filesystem
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | netgear-dni
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := WN3000RP
+  DEVICE_VARIANT := v3
+  SUPPORTED_DEVICES += wn3000rpv3
+endef
+TARGET_DEVICES += netgear_wn3000rp-v3
+
+define Device/netis_wf2770
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  UIMAGE_NAME := WF2770_0.0.00
+  DEVICE_VENDOR := NETIS
+  DEVICE_MODEL := WF2770
+  DEVICE_PACKAGES := kmod-mt76x0e
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | netis-tail WF2770 | uImage lzma
 endef
-TARGET_DEVICES += mzk-ex300np
+TARGET_DEVICES += netis_wf2770
 
-define Device/mzk-ex750np
-  DTS := MZK-EX750NP
-  DEVICE_TITLE := Planex MZK-EX750NP
-  DEVICE_PACKAGES := kmod-mt76x2
+define Device/nexx_wt3020-4m
+  SOC := mt7620n
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B WT3020 -F 4M
+  DEVICE_VENDOR := Nexx
+  DEVICE_MODEL := WT3020
+  DEVICE_VARIANT := 4M
+  SUPPORTED_DEVICES += wt3020 wt3020-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += mzk-ex750np
+TARGET_DEVICES += nexx_wt3020-4m
 
-define Device/na930
-  DTS := NA930
-  IMAGE_SIZE := 20m
-  DEVICE_TITLE := Sercomm NA930
+define Device/nexx_wt3020-8m
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B WT3020 -F 8M
+  DEVICE_VENDOR := Nexx
+  DEVICE_MODEL := WT3020
+  DEVICE_VARIANT := 8M
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += wt3020 wt3020-8M
 endef
-TARGET_DEVICES += na930
+TARGET_DEVICES += nexx_wt3020-8m
 
-define Device/oy-0001
-  DTS := OY-0001
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Oh Yeah OY-0001
+define Device/ohyeah_oy-0001
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Oh Yeah
+  DEVICE_MODEL := OY-0001
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += oy-0001
 endef
-TARGET_DEVICES += oy-0001
+TARGET_DEVICES += ohyeah_oy-0001
 
-define Device/psg1208
-  DTS := PSG1208
-  DEVICE_TITLE := Phicomm PSG1208
+define Device/phicomm_k2g
+  SOC := mt7620a
+  IMAGE_SIZE := 7552k
+  DEVICE_VENDOR := Phicomm
+  DEVICE_MODEL := K2G
   DEVICE_PACKAGES := kmod-mt76x2
 endef
-TARGET_DEVICES += psg1208
+TARGET_DEVICES += phicomm_k2g
 
-define Device/psg1218a
-  DTS := PSG1218A
-  DEVICE_TITLE := Phicomm PSG1218 rev.Ax
+define Device/phicomm_psg1208
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Phicomm
+  DEVICE_MODEL := PSG1208
   DEVICE_PACKAGES := kmod-mt76x2
-  SUPPORTED_DEVICES += psg1218
+  SUPPORTED_DEVICES += psg1208
 endef
-TARGET_DEVICES += psg1218a
+TARGET_DEVICES += phicomm_psg1208
 
-define Device/psg1218b
-  DTS := PSG1218B
-  DEVICE_TITLE := Phicomm PSG1218 rev.Bx
+define Device/phicomm_psg1218a
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Phicomm
+  DEVICE_MODEL := PSG1218
+  DEVICE_VARIANT:= Ax
   DEVICE_PACKAGES := kmod-mt76x2
-  SUPPORTED_DEVICES += psg1218
+  SUPPORTED_DEVICES += psg1218 psg1218a
 endef
-TARGET_DEVICES += psg1218b
+TARGET_DEVICES += phicomm_psg1218a
 
-define Device/phicomm_k2g
-  DTS := K2G
-  IMAGE_SIZE := 7552k
-  DEVICE_TITLE := Phicomm K2G
+define Device/phicomm_psg1218b
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Phicomm
+  DEVICE_MODEL := PSG1218
+  DEVICE_VARIANT := Bx
   DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += psg1218 psg1218b
+endef
+TARGET_DEVICES += phicomm_psg1218b
+
+define Device/planex_cs-qr10
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := CS-QR10
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sound-core \
+	kmod-sound-mt7620 kmod-i2c-ralink kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += cs-qr10
+endef
+TARGET_DEVICES += planex_cs-qr10
+
+define Device/planex_db-wrt01
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := DB-WRT01
+  SUPPORTED_DEVICES += db-wrt01
+endef
+TARGET_DEVICES += planex_db-wrt01
+
+define Device/planex_mzk-750dhp
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-750DHP
+  DEVICE_PACKAGES := kmod-mt76x0e
+  SUPPORTED_DEVICES += mzk-750dhp
 endef
-TARGET_DEVICES += phicomm_k2g
+TARGET_DEVICES += planex_mzk-750dhp
 
-define Device/rp-n53
-  DTS := RP-N53
-  DEVICE_TITLE := Asus RP-N53
-  DEVICE_PACKAGES := kmod-rt2800-pci
+define Device/planex_mzk-ex300np
+  SOC := mt7620a
+  IMAGE_SIZE := 7360k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-EX300NP
+  SUPPORTED_DEVICES += mzk-ex300np
 endef
-TARGET_DEVICES += rp-n53
+TARGET_DEVICES += planex_mzk-ex300np
 
-define Device/rt-n12p
-  DTS := RT-N12-PLUS
-  DEVICE_TITLE := Asus RT-N11P/RT-N12+/RT-N12Eb1
+define Device/planex_mzk-ex750np
+  SOC := mt7620a
+  IMAGE_SIZE := 7360k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-EX750NP
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += mzk-ex750np
 endef
-TARGET_DEVICES += rt-n12p
+TARGET_DEVICES += planex_mzk-ex750np
 
-define Device/rt-n14u
-  DTS := RT-N14U
-  DEVICE_TITLE := Asus RT-N14u
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/ralink_mt7620a-evb
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7620a EVB
 endef
-TARGET_DEVICES += rt-n14u
+TARGET_DEVICES += ralink_mt7620a-evb
 
-define Device/rt-ac51u
-  DTS := RT-AC51U
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Asus RT-AC51U
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+define Device/ralink_mt7620a-mt7530-evb
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7620a + MT7530 EVB
+  SUPPORTED_DEVICES += mt7620a_mt7530
 endef
-TARGET_DEVICES += rt-ac51u
+TARGET_DEVICES += ralink_mt7620a-mt7530-evb
 
-define Device/tiny-ac
-  DTS := TINY-AC
-  DEVICE_TITLE := Dovado Tiny AC
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+define Device/ralink_mt7620a-mt7610e-evb
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7620a + MT7610e EVB
+  DEVICE_PACKAGES := kmod-mt76x0e
+  SUPPORTED_DEVICES += mt7620a_mt7610e
 endef
-TARGET_DEVICES += tiny-ac
+TARGET_DEVICES += ralink_mt7620a-mt7610e-evb
 
-define Device/edimax_br-6478ac-v2
-  DTS := BR-6478AC-V2
-  DEVICE_TITLE := Edimax BR-6478AC V2
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := 7616k
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
-	edimax-header -s CSYS -m RN68 -f 0x70000 -S 0x01100000 | pad-rootfs | \
-	append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+define Device/ralink_mt7620a-v22sg-evb
+  SOC := mt7620a
+  IMAGE_SIZE := 130560k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7620a V22SG
+  SUPPORTED_DEVICES += mt7620a_v22sg
 endef
-TARGET_DEVICES += edimax_br-6478ac-v2
+TARGET_DEVICES += ralink_mt7620a-v22sg-evb
 
-define Device/tplink_c2-v1
-  $(Device/Archer)
-  DTS := ArcherC2-v1
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0xc7500001
-  TPLINK_HWREV := 50
-  IMAGES += factory.bin
-  DEVICE_TITLE := TP-Link Archer C2 v1
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport kmod-switch-rtl8366-smi kmod-switch-rtl8367b
+define Device/ravpower_rp-wd03
+  $(Device/sunvalley_filehub_common)
+  DEVICE_VENDOR := RAVPower
+  DEVICE_MODEL := RP-WD03
+  SUPPORTED_DEVICES += ravpower,wd03
+  DEVICE_COMPAT_VERSION := 2.0
+  DEVICE_COMPAT_MESSAGE := Partition design has changed compared to older versions (up to 19.07) due to kernel size restrictions. \
+	Upgrade via sysupgrade mechanism is not possible, so new installation via TFTP is required.
 endef
-TARGET_DEVICES += tplink_c2-v1
+TARGET_DEVICES += ravpower_rp-wd03
 
-define Device/tplink_c20-v1
-  $(Device/Archer)
-  DTS := ArcherC20v1
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0xc2000001
-  TPLINK_HWREV := 0x44
-  TPLINK_HWREVADD := 0x1
-  IMAGES += factory.bin
-  DEVICE_TITLE := TP-Link ArcherC20 v1
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-endef
-TARGET_DEVICES += tplink_c20-v1
-
-define Device/vonets_var11n-300
-  DTS := VAR11N-300
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  BLOCKSIZE := 4k
-  DEVICE_TITLE := Vonets VAR11N-300
+define Device/sanlinking_d240
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Sanlinking Technologies
+  DEVICE_MODEL := D240
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += d240
 endef
-TARGET_DEVICES += vonets_var11n-300
+TARGET_DEVICES += sanlinking_d240
 
-define Device/ravpower_wd03
-  DTS := WD03
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := Ravpower WD03
+define Device/sercomm_na930
+  SOC := mt7620a
+  IMAGE_SIZE := 20480k
+  DEVICE_VENDOR := Sercomm
+  DEVICE_MODEL := NA930
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += na930
 endef
-TARGET_DEVICES += ravpower_wd03
-
-define Device/whr-1166d
-  DTS := WHR-1166D
-  IMAGE_SIZE := 15040k
-  DEVICE_TITLE := Buffalo WHR-1166D
-  DEVICE_PACKAGES := kmod-mt76x2
-endef
-TARGET_DEVICES += whr-1166d
+TARGET_DEVICES += sercomm_na930
 
-define Device/whr-300hp2
-  DTS := WHR-300HP2
-  IMAGE_SIZE := 6848k
-  DEVICE_TITLE := Buffalo WHR-300HP2
+define Device/tplink_archer-c20i
+  $(Device/tplink-v2)
+  SOC := mt7620a
+  IMAGE_SIZE := 7808k
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0xc2000001
+  TPLINK_HWREV := 58
+  DEVICE_MODEL := Archer C20i
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += c20i
 endef
-TARGET_DEVICES += whr-300hp2
+TARGET_DEVICES += tplink_archer-c20i
 
-define Device/whr-600d
-  DTS := WHR-600D
-  IMAGE_SIZE := 6848k
-  DEVICE_TITLE := Buffalo WHR-600D
-  DEVICE_PACKAGES := kmod-rt2800-pci
+define Device/tplink_archer-c20-v1
+  $(Device/tplink-v2)
+  SOC := mt7620a
+  IMAGE_SIZE := 7808k
+  SUPPORTED_DEVICES += tplink,c20-v1
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0xc2000001
+  TPLINK_HWREV := 0x44
+  TPLINK_HWREVADD := 0x1
+  IMAGES := sysupgrade.bin
+  DEVICE_MODEL := Archer C20
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += tplink_archer-c20-v1
+
+define Device/tplink_archer-c2-v1
+  $(Device/tplink-v2)
+  SOC := mt7620a
+  IMAGE_SIZE := 7808k
+  SUPPORTED_DEVICES += tplink,c2-v1
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0xc7500001
+  TPLINK_HWREV := 50
+  IMAGES := sysupgrade.bin
+  DEVICE_MODEL := Archer C2
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport kmod-switch-rtl8366-smi kmod-switch-rtl8367b
+endef
+TARGET_DEVICES += tplink_archer-c2-v1
+
+define Device/tplink_archer-c50-v1
+  $(Device/tplink-v2)
+  SOC := mt7620a
+  IMAGE_SIZE := 7808k
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0xc7500001
+  TPLINK_HWREV := 69
+  IMAGES := sysupgrade.bin factory-us.bin factory-eu.bin
+  IMAGE/factory-us.bin := tplink-v2-image -e -w 0
+  IMAGE/factory-eu.bin := tplink-v2-image -e -w 2
+  DEVICE_MODEL := Archer C50
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += c50
 endef
-TARGET_DEVICES += whr-600d
+TARGET_DEVICES += tplink_archer-c50-v1
 
-define Device/wmr-300
-  DTS := WMR-300
-  DEVICE_TITLE := Buffalo WMR-300
+define Device/tplink_archer-mr200
+  $(Device/tplink-v2)
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  TPLINK_FLASHLAYOUT := 8MLmtk
+  TPLINK_HWID := 0xd7500001
+  TPLINK_HWREV := 0x4a
+  IMAGES := sysupgrade.bin
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-net-rndis \
+	kmod-usb-serial kmod-usb-serial-option adb-enablemodem
+  DEVICE_MODEL := Archer MR200
+  SUPPORTED_DEVICES += mr200
+endef
+TARGET_DEVICES += tplink_archer-mr200
+
+define Device/tplink_re200-v1
+  $(Device/tplink-v1)
+  SOC := mt7620a
+  DEVICE_MODEL := RE200
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x0e
+  IMAGE_SIZE := 7936k
+  TPLINK_HWID := 0x02000001
+  TPLINK_FLASHLAYOUT := 8Mmtk
 endef
-TARGET_DEVICES += wmr-300
+TARGET_DEVICES += tplink_re200-v1
 
-define Device/wn3000rpv3
-  NETGEAR_HW_ID := 29764836+8+0+32+2x2+0
-  NETGEAR_BOARD_ID := WN3000RPv3
-  DTS := WN3000RPV3
-  BLOCKSIZE := 4k
-  IMAGES += factory.bin
-  KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakehdr filesystem
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	netgear-dni
-  DEVICE_TITLE := Netgear WN3000RPv3
+define Device/tplink_re210-v1
+  $(Device/tplink-v1)
+  SOC := mt7620a
+  DEVICE_MODEL := RE210
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x0e
+  IMAGE_SIZE := 7936k
+  TPLINK_HWID := 0x02100001
+  TPLINK_FLASHLAYOUT := 8Mmtk
 endef
-TARGET_DEVICES += wn3000rpv3
+TARGET_DEVICES += tplink_re210-v1
 
-define Device/wrh-300cr
-  DTS := WRH-300CR
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	elecom-header
-  DEVICE_TITLE := Elecom WRH-300CR
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/trendnet_tew-810dr
+  SOC := mt7620a
+  DEVICE_PACKAGES := kmod-mt76x0e
+  DEVICE_VENDOR := TRENDnet
+  DEVICE_MODEL := TEW-810DR
+  IMAGE_SIZE := 6720k
 endef
-TARGET_DEVICES += wrh-300cr
+TARGET_DEVICES += trendnet_tew-810dr
 
-define Device/wrtnode
-  DTS := WRTNODE
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := WRTNode
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/vonets_var11n-300
+  SOC := mt7620n
+  IMAGE_SIZE := 3776k
+  BLOCKSIZE := 4k
+  DEVICE_VENDOR := Vonets
+  DEVICE_MODEL := VAR11N-300
+  DEFAULT := n
 endef
-TARGET_DEVICES += wrtnode
+TARGET_DEVICES += vonets_var11n-300
 
-define Device/wt3020-4M
-  DTS := WT3020-4M
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  SUPPORTED_DEVICES += wt3020
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	poray-header -B WT3020 -F 4M
-  DEVICE_TITLE := Nexx WT3020 (4MB)
+define Device/wavlink_wl-wn530hg4
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN530HG4
+  DEVICE_PACKAGES := kmod-mt76x2
 endef
-#TARGET_DEVICES += wt3020-4M
+TARGET_DEVICES += wavlink_wl-wn530hg4
 
-define Device/wt3020-8M
-  DTS := WT3020-8M
-  IMAGES += factory.bin
-  SUPPORTED_DEVICES += wt3020
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	poray-header -B WT3020 -F 8M
-  DEVICE_TITLE := Nexx WT3020 (8MB)
+define Device/wrtnode_wrtnode
+  SOC := mt7620n
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := WRTNode
+  DEVICE_MODEL := WRTNode
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += wrtnode
 endef
-TARGET_DEVICES += wt3020-8M
+TARGET_DEVICES += wrtnode_wrtnode
 
-define Device/y1
-  DTS := Y1
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Lenovo Y1
+define Device/xiaomi_miwifi-mini
+  SOC := mt7620a
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := MiWiFi Mini
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += miwifi-mini
 endef
-TARGET_DEVICES += y1
+TARGET_DEVICES += xiaomi_miwifi-mini
 
-define Device/y1s
-  DTS := Y1S
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Lenovo Y1S
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+define Device/youku_yk1
+  SOC := mt7620a
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := YOUKU
+  DEVICE_MODEL := YK1
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += youku-yk1
+endef
+TARGET_DEVICES += youku_yk1
+
+define Device/yukai_bocco
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := YUKAI Engineering
+  DEVICE_MODEL := BOCCO
+  DEVICE_PACKAGES := kmod-sound-core kmod-sound-mt7620 kmod-i2c-ralink
+  SUPPORTED_DEVICES += bocco
 endef
-TARGET_DEVICES += y1s
+TARGET_DEVICES += yukai_bocco
 
-define Device/youku-yk1
-  DTS := YOUKU-YK1
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := YOUKU YK1
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+define Device/zbtlink_zbt-ape522ii
+  SOC := mt7620a
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-APE522II
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += zbt-ape522ii
 endef
-TARGET_DEVICES += youku-yk1
+TARGET_DEVICES += zbtlink_zbt-ape522ii
 
-define Device/we1026-5g-16m
-  DTS := WE1026-5G-16M
-  IMAGE_SIZE := 16777216
-  SUPPORTED_DEVICES += we1026-5g-16m
-  DEVICE_TITLE := Zbtlink ZBT-WE1026-5G (16M)
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+define Device/zbtlink_zbt-cpe102
+  SOC := mt7620n
+  IMAGE_SIZE := 7552k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-CPE102
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += zbt-cpe102
 endef
-TARGET_DEVICES += we1026-5g-16m
+TARGET_DEVICES += zbtlink_zbt-cpe102
 
-define Device/zbt-ape522ii
-  DTS := ZBT-APE522II
-  DEVICE_TITLE := Zbtlink ZBT-APE522II
-  DEVICE_PACKAGES := kmod-mt76x2
+define Device/zbtlink_zbt-wa05
+  SOC := mt7620n
+  IMAGE_SIZE := 7552k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WA05
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += zbt-wa05
 endef
-TARGET_DEVICES += zbt-ape522ii
+TARGET_DEVICES += zbtlink_zbt-wa05
 
-define Device/zbt-cpe102
-  DTS := ZBT-CPE102
-  DEVICE_TITLE := Zbtlink ZBT-CPE102
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/zbtlink_zbt-we1026-5g-16m
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE1026-5G
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += we1026-5g-16m zbtlink,we1026-5g-16m
 endef
-TARGET_DEVICES += zbt-cpe102
+TARGET_DEVICES += zbtlink_zbt-we1026-5g-16m
 
-define Device/zbt-wa05
-  DTS := ZBT-WA05
-  DEVICE_TITLE := Zbtlink ZBT-WA05
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+define Device/zbtlink_zbt-we1026-h-32m
+  SOC := mt7620a
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE1026-H
+  DEVICE_VARIANT := 32M
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
 endef
-TARGET_DEVICES += zbt-wa05
+TARGET_DEVICES += zbtlink_zbt-we1026-h-32m
 
-define Device/zbt-we2026
-  DTS := ZBT-WE2026
-  DEVICE_TITLE := Zbtlink ZBT-WE2026
+define Device/zbtlink_zbt-we2026
+  SOC := mt7620n
+  IMAGE_SIZE := 7552k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE2026
+  SUPPORTED_DEVICES += zbt-we2026
 endef
-TARGET_DEVICES += zbt-we2026
+TARGET_DEVICES += zbtlink_zbt-we2026
 
-define Device/zbt-we826-16M
-  DTS := ZBT-WE826-16M
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  SUPPORTED_DEVICES += zbt-we826
-  DEVICE_TITLE := Zbtlink ZBT-WE826 (16M)
+define Device/zbtlink_zbt-we826-16m
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE826
+  DEVICE_VARIANT := 16M
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += zbt-we826 zbt-we826-16M
 endef
-TARGET_DEVICES += zbt-we826-16M
+TARGET_DEVICES += zbtlink_zbt-we826-16m
 
-define Device/zbt-we826-32M
-  DTS := ZBT-WE826-32M
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Zbtlink ZBT-WE826 (32M)
+define Device/zbtlink_zbt-we826-32m
+  SOC := mt7620a
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE826
+  DEVICE_VARIANT := 32M
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += zbt-we826-32M
 endef
-TARGET_DEVICES += zbt-we826-32M
+TARGET_DEVICES += zbtlink_zbt-we826-32m
 
 define Device/zbtlink_zbt-we826-e
-  DTS := ZBT-WE826-E
+  SOC := mt7620a
   IMAGE_SIZE := 32448k
-  DEVICE_TITLE := Zbtlink ZBT-WE826-E
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE826-E
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 uqmi \
-		     kmod-usb-serial kmod-usb-serial-option
+	kmod-usb-serial kmod-usb-serial-option
 endef
 TARGET_DEVICES += zbtlink_zbt-we826-e
 
-define Device/zbt-wr8305rt
-  DTS := ZBT-WR8305RT
-  DEVICE_TITLE := Zbtlink ZBT-WR8305RT
+define Device/zbtlink_zbt-wr8305rt
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WR8305RT
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += zbt-wr8305rt
 endef
-TARGET_DEVICES += zbt-wr8305rt
+TARGET_DEVICES += zbtlink_zbt-wr8305rt
 
-define Device/zte-q7
-  DTS := ZTE-Q7
-  DEVICE_TITLE := ZTE Q7
+define Device/zte_q7
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZTE
+  DEVICE_MODEL := Q7
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += zte-q7
+endef
+TARGET_DEVICES += zte_q7
+
+define Device/zyxel_keenetic-omni
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Omni
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size | \
+	zyimage -d 4882 -v "ZyXEL Keenetic Omni"
+  SUPPORTED_DEVICES += kn_rc
+endef
+TARGET_DEVICES += zyxel_keenetic-omni
+
+define Device/zyxel_keenetic-omni-ii
+  SOC := mt7620n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Omni II
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size | \
+	zyimage -d 2102034 -v "ZyXEL Keenetic Omni II"
+  SUPPORTED_DEVICES += kn_rf
+endef
+TARGET_DEVICES += zyxel_keenetic-omni-ii
+
+define Device/zyxel_keenetic-viva
+  SOC := mt7620a
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Viva
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
+	kmod-switch-rtl8366-smi kmod-switch-rtl8367b
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size | \
+	zyimage -d 8997 -v "ZyXEL Keenetic Viva"
+  SUPPORTED_DEVICES += kng_rc
 endef
-TARGET_DEVICES += zte-q7
+TARGET_DEVICES += zyxel_keenetic-viva
diff --git a/iopsys-ramips/image/mt7621.mk b/iopsys-ramips/image/mt7621.mk
index cf104537ff3db5eca3acda3b05b7e9c29f9b603e..f9948cdf412478830783ea150cadd64d0c185e69 100644
--- a/iopsys-ramips/image/mt7621.mk
+++ b/iopsys-ramips/image/mt7621.mk
@@ -2,46 +2,78 @@
 # MT7621 Profiles
 #
 
+include ./common-tp-link.mk
+
+DEFAULT_SOC := mt7621
+
 KERNEL_DTB += -d21
-DEVICE_VARS += TPLINK_BOARD_ID TPLINK_HEADER_VERSION TPLINK_HWID TPLINK_HWREV
-
-define Build/elecom-gst-factory
-  $(eval product=$(word 1,$(1)))
-  $(eval version=$(word 2,$(1)))
-  ( $(STAGING_DIR_HOST)/bin/mkhash md5 $@ | tr -d '\n' ) >> $@
-  ( \
-    echo -n "ELECOM $(product) v$(version)" | \
-      dd bs=32 count=1 conv=sync; \
-    dd if=$@; \
-  ) > $@.new
-  mv $@.new $@
-  echo -n "MT7621_ELECOM_$(product)" >> $@
-endef
-
-define Build/elecom-wrc-factory
-  $(eval product=$(word 1,$(1)))
-  $(eval version=$(word 2,$(1)))
-  $(STAGING_DIR_HOST)/bin/mkhash md5 $@ >> $@
-  ( \
-    echo -n "ELECOM $(product) v$(version)" | \
-      dd bs=32 count=1 conv=sync; \
-    dd if=$@; \
-  ) > $@.new
-  mv $@.new $@
+DEVICE_VARS += ELECOM_HWNAME LINKSYS_HWNAME
+
+define Build/elecom-wrc-gs-factory
+	$(eval product=$(word 1,$(1)))
+	$(eval version=$(word 2,$(1)))
+	$(eval hash_opt=$(word 3,$(1)))
+	$(STAGING_DIR_HOST)/bin/mkhash md5 $(hash_opt) $@ >> $@
+	( \
+		echo -n "ELECOM $(product) v$(version)" | \
+			dd bs=32 count=1 conv=sync; \
+		dd if=$@; \
+	) > $@.new
+	mv $@.new $@
 endef
 
 define Build/iodata-factory
-  $(eval fw_size=$(word 1,$(1)))
-  $(eval fw_type=$(word 2,$(1)))
-  $(eval product=$(word 3,$(1)))
-  $(eval factory_bin=$(word 4,$(1)))
-  if [ -e $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) -a "$$(stat -c%s $@)" -lt "$(fw_size)" ]; then \
-    $(CP) $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) $(factory_bin); \
-    $(STAGING_DIR_HOST)/bin/mksenaofw \
-      -r 0x30a -p $(product) -t $(fw_type) \
-      -e $(factory_bin) -o $(factory_bin).new; \
-    mv $(factory_bin).new $(factory_bin); \
-    $(CP) $(factory_bin) $(BIN_DIR)/; \
+	$(eval fw_size=$(word 1,$(1)))
+	$(eval fw_type=$(word 2,$(1)))
+	$(eval product=$(word 3,$(1)))
+	$(eval factory_bin=$(word 4,$(1)))
+	if [ -e $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) -a "$$(stat -c%s $@)" -lt "$(fw_size)" ]; then \
+		$(CP) $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) $(factory_bin); \
+		$(STAGING_DIR_HOST)/bin/mksenaofw \
+			-r 0x30a -p $(product) -t $(fw_type) \
+			-e $(factory_bin) -o $(factory_bin).new; \
+		mv $(factory_bin).new $(factory_bin); \
+		$(CP) $(factory_bin) $(BIN_DIR)/; \
+	else \
+		echo "WARNING: initramfs kernel image too big, cannot generate factory image" >&2; \
+	fi
+endef
+
+define Build/iodata-mstc-header
+	( \
+		data_size_crc="$$(dd if=$@ ibs=64 skip=1 2>/dev/null | gzip -c | \
+			tail -c 8 | od -An -tx8 --endian little | tr -d ' \n')"; \
+		echo -ne "$$(echo $$data_size_crc | sed 's/../\\x&/g')" | \
+			dd of=$@ bs=8 count=1 seek=7 conv=notrunc 2>/dev/null; \
+	)
+	dd if=/dev/zero of=$@ bs=4 count=1 seek=1 conv=notrunc 2>/dev/null
+	( \
+		header_crc="$$(dd if=$@ bs=64 count=1 2>/dev/null | gzip -c | \
+			tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n')"; \
+		echo -ne "$$(echo $$header_crc | sed 's/../\\x&/g')" | \
+			dd of=$@ bs=4 count=1 seek=1 conv=notrunc 2>/dev/null; \
+	)
+endef
+
+define Build/ubnt-erx-factory-image
+	if [ -e $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) -a "$$(stat -c%s $@)" -lt "$(KERNEL_SIZE)" ]; then \
+		echo '21001:7' > $(1).compat; \
+		$(TAR) -cf $(1) --transform='s/^.*/compat/' $(1).compat; \
+		\
+		$(TAR) -rf $(1) --transform='s/^.*/vmlinux.tmp/' $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE); \
+		mkhash md5 $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) > $(1).md5; \
+		$(TAR) -rf $(1) --transform='s/^.*/vmlinux.tmp.md5/' $(1).md5; \
+		\
+		echo "dummy" > $(1).rootfs; \
+		$(TAR) -rf $(1) --transform='s/^.*/squashfs.tmp/' $(1).rootfs; \
+		\
+		mkhash md5 $(1).rootfs > $(1).md5; \
+		$(TAR) -rf $(1) --transform='s/^.*/squashfs.tmp.md5/' $(1).md5; \
+		\
+		echo '$(BOARD) $(VERSION_CODE) $(VERSION_NUMBER)' > $(1).version; \
+		$(TAR) -rf $(1) --transform='s/^.*/version.tmp/' $(1).version; \
+		\
+		$(CP) $(1) $(BIN_DIR)/; \
 	else \
 		echo "WARNING: initramfs kernel image too big, cannot generate factory image" >&2; \
 	fi
@@ -149,656 +181,1459 @@ define Build/iopsys-v3-fw
 		ln -sf $(BIN_DIR)/$(subst $\",,$(IHGSP_VERSION)).y3 $(BIN_DIR)/last.y3
 endef
 
-# The OEM webinterface expects an kernel with initramfs which has the uImage
-# header field ih_name.
-# We don't wan't to set the header name field for the kernel include in the
-# sysupgrade image as well, as this image shouldn't be accepted by the OEM
-# webinterface. It will soft-brick the board.
-define Build/wr1201-factory-header
-	mkimage -A $(LINUX_KARCH) \
-		-O linux -T kernel \
-		-C lzma -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
-		-n 'WR1201_8_128' -d $@ $@.new
-	mv $@.new $@
-endef
-
-define Build/netis-tail
-	echo -n $(1) >> $@
-	echo -n $(UIMAGE_NAME)-yun | $(STAGING_DIR_HOST)/bin/mkhash md5 | \
-		sed 's/../\\\\x&/g' | xargs echo -ne >> $@
+define Device/dsa-migration
+  DEVICE_COMPAT_VERSION := 1.1
+  DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
 endef
 
-define Build/ubnt-erx-factory-image
-	if [ -e $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) -a "$$(stat -c%s $@)" -lt "$(KERNEL_SIZE)" ]; then \
-		echo '21001:6' > $(1).compat; \
-		$(TAR) -cf $(1) --transform='s/^.*/compat/' $(1).compat; \
-		\
-		$(TAR) -rf $(1) --transform='s/^.*/vmlinux.tmp/' $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE); \
-		mkhash md5 $(KDIR)/tmp/$(KERNEL_INITRAMFS_IMAGE) > $(1).md5; \
-		$(TAR) -rf $(1) --transform='s/^.*/vmlinux.tmp.md5/' $(1).md5; \
-		\
-		echo "dummy" > $(1).rootfs; \
-		$(TAR) -rf $(1) --transform='s/^.*/squashfs.tmp/' $(1).rootfs; \
-		\
-		mkhash md5 $(1).rootfs > $(1).md5; \
-		$(TAR) -rf $(1) --transform='s/^.*/squashfs.tmp.md5/' $(1).md5; \
-		\
-		echo '$(BOARD) $(VERSION_CODE) $(VERSION_NUMBER)' > $(1).version; \
-		$(TAR) -rf $(1) --transform='s/^.*/version.tmp/' $(1).version; \
-		\
-		$(CP) $(1) $(BIN_DIR)/; \
-	else \
-		echo "WARNING: initramfs kernel image too big, cannot generate factory image" >&2; \
-	fi
+define Device/adslr_g7
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := ADSLR
+  DEVICE_MODEL := G7
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
+TARGET_DEVICES += adslr_g7
 
-define Device/11acnas
-  DTS := 11ACNAS
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  UIMAGE_NAME := 11AC-NAS-Router(0.0.0)
-  DEVICE_TITLE := WeVO 11AC NAS Router
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/afoundry_ew1200
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := AFOUNDRY
+  DEVICE_MODEL := EW1200
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt76x2 kmod-mt7603 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += ew1200
 endef
-TARGET_DEVICES += 11acnas
+TARGET_DEVICES += afoundry_ew1200
 
 define Device/alfa-network_quad-e4g
-  DTS := QUAD-E4G
+  $(Device/dsa-migration)
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := ALFA Network Quad-E4G
-  DEVICE_PACKAGES := kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
-	uboot-envtools
+  DEVICE_VENDOR := ALFA Network
+  DEVICE_MODEL := Quad-E4G
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 uboot-envtools \
+	-wpad-basic-wolfssl
 endef
 TARGET_DEVICES += alfa-network_quad-e4g
 
+define Device/asiarf_ap7621-001
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16000k
+  DEVICE_VENDOR := AsiaRF
+  DEVICE_MODEL := AP7621-001
+  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 -wpad-basic-wolfssl
+endef
+TARGET_DEVICES += asiarf_ap7621-001
+
+define Device/asiarf_ap7621-nv1
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16000k
+  DEVICE_VENDOR := AsiaRF
+  DEVICE_MODEL := AP7621-NV1
+  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 -wpad-basic-wolfssl
+endef
+TARGET_DEVICES += asiarf_ap7621-nv1
+
 define Device/asus_rt-ac57u
-  DTS := RT-AC57U
-  DEVICE_TITLE := ASUS RT-AC57U
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := ASUS
+  DEVICE_MODEL := RT-AC57U
   IMAGE_SIZE := 16064k
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += asus_rt-ac57u
 
-define Device/dir-860l-b1
+define Device/asus_rt-ac65p
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := ASUS
+  DEVICE_MODEL := RT-AC65P
+  IMAGE_SIZE := 51200k
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 4096k
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size
+  DEVICE_PACKAGES := kmod-usb3 kmod-mt7615e kmod-mt7615-firmware uboot-envtools
+endef
+TARGET_DEVICES += asus_rt-ac65p
+
+define Device/asus_rt-ac85p
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := ASUS
+  DEVICE_MODEL := RT-AC85P
+  IMAGE_SIZE := 51200k
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 4096k
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size
+  DEVICE_PACKAGES := kmod-usb3 kmod-mt7615e kmod-mt7615-firmware uboot-envtools
+endef
+TARGET_DEVICES += asus_rt-ac85p
+
+define Device/asus_rt-n56u-b1
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := ASUS
+  DEVICE_MODEL := RT-N56U
+  DEVICE_VARIANT := B1
+  IMAGE_SIZE := 16064k
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += asus_rt-n56u-b1
+
+define Device/buffalo_wsr-1166dhp
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata
+  IMAGE_SIZE := 15936k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WSR-1166DHP
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2
+  SUPPORTED_DEVICES += wsr-1166
+endef
+TARGET_DEVICES += buffalo_wsr-1166dhp
+
+define Device/buffalo_wsr-2533dhpl
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 7936k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WSR-2533DHPL
+  DEVICE_ALT0_VENDOR := Buffalo
+  DEVICE_ALT0_MODEL := WSR-2533DHP
+  IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += buffalo_wsr-2533dhpl
+
+define Device/buffalo_wsr-600dhp
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WSR-600DHP
+  DEVICE_PACKAGES := kmod-mt7603 kmod-rt2800-pci
+  SUPPORTED_DEVICES += wsr-600
+endef
+TARGET_DEVICES += buffalo_wsr-600dhp
+
+define Device/cudy_wr1300
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := WR1300
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += cudy_wr1300
+
+define Device/dlink_dir-8xx-a1
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16000k
+  DEVICE_VENDOR := D-Link
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+  KERNEL_INITRAMFS := $$(KERNEL) | uimage-padhdr 96
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | uimage-padhdr 96 |\
+	pad-rootfs | append-metadata | check-size
+  IMAGE/factory.bin := append-kernel | append-rootfs | uimage-padhdr 96 |\
+	check-size
+endef
+
+define Device/dlink_dir-8xx-r1
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := D-Link
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+  KERNEL_INITRAMFS := $$(KERNEL)
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs |\
+	pad-rootfs | append-metadata | check-size
+endef
+
+define Device/dlink_dir-xx60-a1
+  $(Device/dsa-migration)
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 4096k
+  IMAGE_SIZE := 40960k
+  UBINIZE_OPTS := -E 5
+  DEVICE_VENDOR := D-Link
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  KERNEL := $$(KERNEL) | uimage-padhdr 96
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size
+endef
+
+define Device/dlink_dir-1960-a1
+  $(Device/dlink_dir-xx60-a1)
+  DEVICE_MODEL := DIR-1960
+  DEVICE_VARIANT := A1
+endef
+TARGET_DEVICES += dlink_dir-1960-a1
+
+define Device/dlink_dir-2640-a1
+  $(Device/dlink_dir-xx60-a1)
+  DEVICE_MODEL := DIR-2640
+  DEVICE_VARIANT := A1
+endef
+TARGET_DEVICES += dlink_dir-2640-a1
+
+define Device/dlink_dir-2660-a1
+  $(Device/dlink_dir-xx60-a1)
+  DEVICE_MODEL := DIR-2660
+  DEVICE_VARIANT := A1
+endef
+TARGET_DEVICES += dlink_dir-2660-a1
+
+define Device/dlink_dir-860l-b1
+  $(Device/dsa-migration)
   $(Device/seama)
-  DTS := DIR-860L-B1
   BLOCKSIZE := 64k
   SEAMA_SIGNATURE := wrgac13_dlink.2013gui_dir860lb
-  KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | uImage lzma
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := D-Link DIR-860L B1
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  LOADER_TYPE := bin
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | relocate-kernel | \
+	lzma -a0 | uImage lzma
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-860L
+  DEVICE_VARIANT := B1
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += dir-860l-b1
 endef
-TARGET_DEVICES += dir-860l-b1
+TARGET_DEVICES += dlink_dir-860l-b1
 
-define Device/mediatek_ap-mt7621a-v60
-  DTS := AP-MT7621A-V60
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := Mediatek AP-MT7621A-V60 EVB
-  DEVICE_PACKAGES := kmod-usb3 kmod-sdhci-mt7620 kmod-sound-mt7620
+define Device/dlink_dir-867-a1
+  $(Device/dlink_dir-8xx-a1)
+  DEVICE_MODEL := DIR-867
+  DEVICE_VARIANT := A1
 endef
-TARGET_DEVICES += mediatek_ap-mt7621a-v60
+TARGET_DEVICES += dlink_dir-867-a1
 
-define Device/xzwifi_creativebox-v1
-  DTS := CreativeBox-v1
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := CreativeBox v1
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
-	kmod-usb3
+define Device/dlink_dir-878-a1
+  $(Device/dlink_dir-8xx-a1)
+  DEVICE_MODEL := DIR-878
+  DEVICE_VARIANT := A1
 endef
-TARGET_DEVICES += xzwifi_creativebox-v1
+TARGET_DEVICES += dlink_dir-878-a1
+
+define Device/dlink_dir-882-a1
+  $(Device/dlink_dir-8xx-a1)
+  DEVICE_MODEL := DIR-882
+  DEVICE_VARIANT := A1
+  DEVICE_PACKAGES += kmod-usb3 kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += dlink_dir-882-a1
+
+define Device/dlink_dir-882-r1
+  $(Device/dlink_dir-8xx-r1)
+  DEVICE_MODEL := DIR-882
+  DEVICE_VARIANT := R1
+  DEVICE_PACKAGES += kmod-usb3 kmod-usb-ledtrig-usbport
+  IMAGE/factory.bin := append-kernel | append-rootfs | check-size | \
+	  sign-dlink-ru 57c5375741c30ca9ebcb36713db4ba51 \
+	  ab0dff19af8842cdb70a86b4b68d23f7
+endef
+TARGET_DEVICES += dlink_dir-882-r1
+
+define Device/d-team_newifi-d2
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Newifi
+  DEVICE_MODEL := D2
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += d-team_newifi-d2
+
+define Device/d-team_pbr-m1
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := PandoraBox
+  DEVICE_MODEL := PBR-M1
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
+	kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += pbr-m1
+endef
+TARGET_DEVICES += d-team_pbr-m1
+
+define Device/edimax_ra21s
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := RA21S
+  DEVICE_ALT0_VENDOR := Edimax
+  DEVICE_ALT0_MODEL := Gemini RA21S
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 02020040 8844A2D168B45A2D
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += edimax_ra21s
+
+define Device/edimax_re23s
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 15680k
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := RE23S
+  DEVICE_ALT0_VENDOR := Edimax
+  DEVICE_ALT0_MODEL := Gemini RE23S
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN76 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN76 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	check-size
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += edimax_re23s
+
+define Device/edimax_rg21s
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := Gemini AC2600 RG21S
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 02020038 8844A2D168B45A2D
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += edimax_rg21s
 
 define Device/elecom_wrc-1167ghbk2-s
-  DTS := WRC-1167GHBK2-S
+  $(Device/dsa-migration)
   IMAGE_SIZE := 15488k
-  DEVICE_TITLE := ELECOM WRC-1167GHBK2-S
+  DEVICE_VENDOR := ELECOM
+  DEVICE_MODEL := WRC-1167GHBK2-S
   IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) |\
-    elecom-wrc-factory WRC-1167GHBK2-S 0.00
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elecom-wrc-gs-factory WRC-1167GHBK2-S 0.00
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
 TARGET_DEVICES += elecom_wrc-1167ghbk2-s
 
-define Device/elecom_wrc-2533gst
-  DTS := WRC-2533GST
-  IMAGE_SIZE := 11264k
-  DEVICE_TITLE := ELECOM WRC-2533GST
+define Device/elecom_wrc-gs
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := ELECOM
   IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) |\
-    elecom-gst-factory WRC-2533GST 0.00
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elecom-wrc-gs-factory $$$$(ELECOM_HWNAME) 0.00 -N | \
+	append-string MT7621_ELECOM_$$$$(ELECOM_HWNAME)
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += elecom_wrc-2533gst
+
+define Device/elecom_wrc-1167gs2-b
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 11264k
+  DEVICE_MODEL := WRC-1167GS2-B
+  ELECOM_HWNAME := WRC-1167GS2
+endef
+TARGET_DEVICES += elecom_wrc-1167gs2-b
+
+define Device/elecom_wrc-1167gst2
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 24576k
+  DEVICE_MODEL := WRC-1167GST2
+  ELECOM_HWNAME := WRC-1167GST2
+endef
+TARGET_DEVICES += elecom_wrc-1167gst2
+
+define Device/elecom_wrc-1750gs
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 11264k
+  DEVICE_MODEL := WRC-1750GS
+  ELECOM_HWNAME := WRC-1750GS
+endef
+TARGET_DEVICES += elecom_wrc-1750gs
+
+define Device/elecom_wrc-1750gst2
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 24576k
+  DEVICE_MODEL := WRC-1750GST2
+  ELECOM_HWNAME := WRC-1750GST2
+endef
+TARGET_DEVICES += elecom_wrc-1750gst2
+
+define Device/elecom_wrc-1750gsv
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 11264k
+  DEVICE_MODEL := WRC-1750GSV
+  ELECOM_HWNAME := WRC-1750GSV
+endef
+TARGET_DEVICES += elecom_wrc-1750gsv
 
 define Device/elecom_wrc-1900gst
-  DTS := WRC-1900GST
+  $(Device/elecom_wrc-gs)
   IMAGE_SIZE := 11264k
-  DEVICE_TITLE := ELECOM WRC-1900GST
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) |\
-    elecom-gst-factory WRC-1900GST 0.00
+  DEVICE_MODEL := WRC-1900GST
+  ELECOM_HWNAME := WRC-1900GST
 endef
 TARGET_DEVICES += elecom_wrc-1900gst
 
-define Device/ew1200
-  DTS := EW1200
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := AFOUNDRY EW1200
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt76x2 kmod-mt7603 kmod-usb3 \
-	kmod-usb-ledtrig-usbport wpad-basic
+define Device/elecom_wrc-2533ghbk-i
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := ELECOM
+  DEVICE_MODEL := WRC-2533GHBK-I
+  IMAGE_SIZE := 9856k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 0107002d 8844A2D168B45A2D | \
+	elecom-product-header WRC-2533GHBK-I
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += ew1200
+TARGET_DEVICES += elecom_wrc-2533ghbk-i
 
-define Device/firewrt
-  DTS := FIREWRT
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Firefly FireWRT
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/elecom_wrc-2533gst
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 11264k
+  DEVICE_MODEL := WRC-2533GST
+  ELECOM_HWNAME := WRC-2533GST
 endef
-TARGET_DEVICES += firewrt
+TARGET_DEVICES += elecom_wrc-2533gst
+
+define Device/elecom_wrc-2533gst2
+  $(Device/elecom_wrc-gs)
+  IMAGE_SIZE := 24576k
+  DEVICE_MODEL := WRC-2533GST2
+  ELECOM_HWNAME := WRC-2533GST2
+endef
+TARGET_DEVICES += elecom_wrc-2533gst2
+
+define Device/firefly_firewrt
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Firefly
+  DEVICE_MODEL := FireWRT
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += firewrt
+endef
+TARGET_DEVICES += firefly_firewrt
 
 define Device/gehua_ghl-r-001
-  DTS := GHL-R-001
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := GeHua GHL-R-001
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
-  DEFAULT := n
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := GeHua
+  DEVICE_MODEL := GHL-R-001
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += gehua_ghl-r-001
 
+define Device/glinet_gl-mt1300
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := GL-MT1300
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3
+endef
+TARGET_DEVICES += glinet_gl-mt1300
+
 define Device/gnubee_gb-pc1
-  DTS := GB-PC1
-  DEVICE_TITLE := GnuBee Personal Cloud One
-  DEVICE_PACKAGES := kmod-ata-core kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := GnuBee
+  DEVICE_MODEL := Personal Cloud One
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620 -wpad-basic-wolfssl
+  IMAGE_SIZE := 32448k
 endef
 TARGET_DEVICES += gnubee_gb-pc1
 
 define Device/gnubee_gb-pc2
-  DTS := GB-PC2
-  DEVICE_TITLE := GnuBee Personal Cloud Two
-  DEVICE_PACKAGES := kmod-ata-core kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := GnuBee
+  DEVICE_MODEL := Personal Cloud Two
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620 -wpad-basic-wolfssl
+  IMAGE_SIZE := 32448k
 endef
 TARGET_DEVICES += gnubee_gb-pc2
 
-define Device/hc5962
-  DTS := HC5962
+define Device/hiwifi_hc5962
+  $(Device/dsa-migration)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
-  KERNEL_SIZE := 2097152
+  KERNEL_SIZE := 4096k
   UBINIZE_OPTS := -E 5
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
+  IMAGE_SIZE := 32768k
   IMAGES += factory.bin
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := HiWiFi HC5962
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 wpad-basic
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5962
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3
 endef
-TARGET_DEVICES += hc5962
+TARGET_DEVICES += hiwifi_hc5962
 
 define Device/iodata_wn-ax1167gr
-  DTS := WN-AX1167GR
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 15552k
   KERNEL_INITRAMFS := $$(KERNEL) | \
-    iodata-factory 7864320 4 0x1055 $(KDIR)/tmp/$$(KERNEL_INITRAMFS_PREFIX)-factory.bin
-  DEVICE_TITLE := I-O DATA WN-AX1167GR
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-basic
+	iodata-factory 7864320 4 0x1055 $(KDIR)/tmp/$$(KERNEL_INITRAMFS_PREFIX)-factory.bin
+  DEVICE_VENDOR := I-O DATA
+  DEVICE_MODEL := WN-AX1167GR
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2
 endef
 TARGET_DEVICES += iodata_wn-ax1167gr
 
+define Device/iodata_nand
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := I-O DATA
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  UBINIZE_OPTS := -E 5
+  KERNEL_SIZE := 4096k
+  IMAGE_SIZE := 51200k
+  LOADER_TYPE := bin
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | lzma | uImage lzma
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+endef
+
+# The OEM webinterface expects an kernel with initramfs which has the uImage
+# header field ih_name.
+# We don't want to set the header name field for the kernel include in the
+# sysupgrade image as well, as this image shouldn't be accepted by the OEM
+# webinterface. It will soft-brick the board.
+
+define Device/iodata_wn-ax1167gr2
+  $(Device/iodata_nand)
+  DEVICE_MODEL := WN-AX1167GR2
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | loader-kernel | lzma | \
+	uImage lzma -M 0x434f4d42 -n '3.10(XBC.1)b10' | iodata-mstc-header
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += iodata_wn-ax1167gr2
+
+define Device/iodata_wn-ax2033gr
+  $(Device/iodata_nand)
+  DEVICE_MODEL := WN-AX2033GR
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | loader-kernel | lzma | \
+	uImage lzma -M 0x434f4d42 -n '3.10(VST.1)C10' | iodata-mstc-header
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += iodata_wn-ax2033gr
+
+define Device/iodata_wn-dx1167r
+  $(Device/iodata_nand)
+  DEVICE_MODEL := WN-DX1167R
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | loader-kernel | lzma | \
+	uImage lzma -M 0x434f4d43 -n '3.10(XIK.1)b10' | iodata-mstc-header
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += iodata_wn-dx1167r
+
+define Device/iodata_wn-dx1200gr
+  $(Device/iodata_nand)
+  DEVICE_MODEL := WN-DX1200GR
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | loader-kernel | lzma | \
+	uImage lzma -M 0x434f4d43 -n '3.10(XIQ.0)b20' | iodata-mstc-header
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
+endef
+TARGET_DEVICES += iodata_wn-dx1200gr
+
 define Device/iodata_wn-gx300gr
-  DTS := WN-GX300GR
-  IMAGE_SIZE := 7798784
-  DEVICE_TITLE := I-O DATA WN-GX300GR
-  DEVICE_PACKAGES := kmod-mt7603 wpad-basic
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 7616k
+  DEVICE_VENDOR := I-O DATA
+  DEVICE_MODEL := WN-GX300GR
+  DEVICE_PACKAGES := kmod-mt7603
 endef
 TARGET_DEVICES += iodata_wn-gx300gr
 
-define Device/k2p
-  DTS := K2P
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Phicomm K2P
+define Device/iodata_wnpr2600g
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := I-O DATA
+  DEVICE_MODEL := WNPR2600G
+  IMAGE_SIZE := 13952k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	elx-header 0104003a 8844A2D168B45A2D
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += k2p
+TARGET_DEVICES += iodata_wnpr2600g
 
-define Device/xiaomi_mir3p
-  DTS := MIR3P
-  BLOCKSIZE := 128k
-  PAGESIZE := 2048
-  KERNEL_SIZE:= 4096k
-  UBINIZE_OPTS := -E 5
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Xiaomi Mi Router 3 Pro
-  IMAGES += factory.bin
-  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size $$$$(IMAGE_SIZE)
-  DEVICE_PACKAGES := \
-	kmod-mt7615e kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic \
-	uboot-envtools
+define Device/iptime_a6ns-m
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16128k
+  UIMAGE_NAME := a6nm
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A6ns-M
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += iptime_a6ns-m
+
+define Device/iptime_a8004t
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16128k
+  UIMAGE_NAME := a8004t
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A8004T
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3
 endef
-TARGET_DEVICES += xiaomi_mir3p
+TARGET_DEVICES += iptime_a8004t
 
-define Device/xiaomi_mir3g
-  DTS := MIR3G
+define Device/jcg_jhr-ac876m
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 89.1
+  JCG_MAXSIZE := 16064k
+  DEVICE_VENDOR := JCG
+  DEVICE_MODEL := JHR-AC876M
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += jcg_jhr-ac876m
+
+define Device/jcg_y2
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 95.1
+  JCG_MAXSIZE := 16064k
+  DEVICE_VENDOR := JCG
+  DEVICE_MODEL := Y2
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3
+endef
+TARGET_DEVICES += jcg_y2
+
+define Device/lenovo_newifi-d1
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Newifi
+  DEVICE_MODEL := D1
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += newifi-d1
+endef
+TARGET_DEVICES += lenovo_newifi-d1
+
+define Device/linksys_ea7xxx
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
   KERNEL_SIZE := 4096k
-  IMAGE_SIZE := 32768k
-  UBINIZE_OPTS := -E 5
-  BOARD_NAME := mir3g
-  IMAGES += kernel1.bin rootfs0.bin
-  IMAGE/kernel1.bin := append-kernel
-  IMAGE/rootfs0.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
-  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-  DEVICE_TITLE := Xiaomi Mi Router 3G
-  SUPPORTED_DEVICES += R3G
-  SUPPORTED_DEVICES += mir3g
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic \
+  IMAGE_SIZE := 36864k
+  DEVICE_VENDOR := Linksys
+  DEVICE_PACKAGES := kmod-usb3 kmod-mt7615e kmod-mt7615-firmware \
 	uboot-envtools
+  UBINIZE_OPTS := -E 5
+  IMAGES := sysupgrade.bin factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata | check-size
+  IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | \
+	append-ubi | check-size | linksys-image type=$$$$(LINKSYS_HWNAME)
 endef
-TARGET_DEVICES += xiaomi_mir3g
 
-define Device/mt7621
-  DTS := MT7621
+define Device/linksys_ea7300-v1
+  $(Device/linksys_ea7xxx)
+  DEVICE_MODEL := EA7300
+  DEVICE_VARIANT := v1
+  LINKSYS_HWNAME := EA7300
+endef
+TARGET_DEVICES += linksys_ea7300-v1
+
+define Device/linksys_ea7300-v2
+  $(Device/linksys_ea7xxx)
+  DEVICE_MODEL := EA7300
+  DEVICE_VARIANT := v2
+  LINKSYS_HWNAME := EA7300v2
+  DEVICE_PACKAGES += kmod-mt7603
+endef
+TARGET_DEVICES += linksys_ea7300-v2
+
+define Device/linksys_ea7500-v2
+  $(Device/linksys_ea7xxx)
+  DEVICE_MODEL := EA7500
+  DEVICE_VARIANT := v2
+  LINKSYS_HWNAME := EA7500v2
+endef
+TARGET_DEVICES += linksys_ea7500-v2
+
+define Device/linksys_re6500
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Linksys
+  DEVICE_MODEL := RE6500
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += re6500
+endef
+TARGET_DEVICES += linksys_re6500
+
+define Device/mediatek_ap-mt7621a-v60
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Mediatek
+  DEVICE_MODEL := AP-MT7621A-V60 EVB
+  DEVICE_PACKAGES := kmod-usb3 kmod-sdhci-mt7620 kmod-sound-mt7620 -wpad-basic-wolfssl
+endef
+TARGET_DEVICES += mediatek_ap-mt7621a-v60
+
+define Device/mediatek_mt7621-eval-board
+  $(Device/dsa-migration)
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := MediaTek MT7621 EVB
+  IMAGE_SIZE := 15104k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7621 EVB
+  DEVICE_PACKAGES := -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += mt7621
 endef
-TARGET_DEVICES += mt7621
+TARGET_DEVICES += mediatek_mt7621-eval-board
 
-define Device/newifi-d1
-  DTS := Newifi-D1
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Newifi D1
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/MikroTik
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := MikroTik
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 16128k
+  DEVICE_PACKAGES := kmod-usb3
+  KERNEL_NAME := vmlinuz
+  KERNEL := kernel-bin | append-dtb-elf
+  IMAGE/sysupgrade.bin := append-kernel | kernel2minor -s 1024 | \
+	pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | append-metadata | \
+	check-size
 endef
-TARGET_DEVICES += newifi-d1
 
-define Device/d-team_newifi-d2
-  DTS := Newifi-D2
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Newifi D2
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/mikrotik_routerboard-750gr3
+  $(Device/MikroTik)
+  DEVICE_MODEL := RouterBOARD 750Gr3
+  DEVICE_PACKAGES += -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += mikrotik,rb750gr3
 endef
-TARGET_DEVICES += d-team_newifi-d2
+TARGET_DEVICES += mikrotik_routerboard-750gr3
 
-define Device/pbr-m1
-  DTS := PBR-M1
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := PBR-M1
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
-	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/mikrotik_routerboard-760igs
+  $(Device/MikroTik)
+  DEVICE_MODEL := RouterBOARD 760iGS
+  DEVICE_PACKAGES += kmod-sfp -wpad-basic-wolfssl
 endef
-TARGET_DEVICES += pbr-m1
+TARGET_DEVICES += mikrotik_routerboard-760igs
 
-define Device/ex400
-  DTS := EX400
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := EX400
-  IMAGES += y3.img
-  IMAGE/y3.img := iopsys-v3-pkginfo | iopsys-v3-ubifs | iopsys-v3-fw
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt7603 kmod-mt7615e \
-	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic uboot-ex400
-  UBIFS_OPTS:=-m 2048 -e 126976 -c 4096
-  CONFIG_MEDIATEK_CHIP_ID := 7621
-  CONFIG_TARGET_FAMILY := EX400
-  BUILD_DATE := $(shell date '+%y%m%d_%H%M')
-  $(eval IHGSP_VERSION=$$(CONFIG_TARGET_FAMILY)-X-$$(CONFIG_TARGET_CUSTOMER)-$$(CONFIG_TARGET_VERSION)-$$(BUILD_DATE))
-  GIT_SHORT := $(shell cd $(TOPDIR);git rev-parse --short HEAD)
+define Device/mikrotik_routerboard-m11g
+  $(Device/MikroTik)
+  DEVICE_MODEL := RouterBOARD M11G
+  DEVICE_PACKAGES := -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += mikrotik,rbm11g
 endef
-TARGET_DEVICES += ex400
+TARGET_DEVICES += mikrotik_routerboard-m11g
 
-define Device/r6220
-  DTS := R6220
-  BLOCKSIZE := 128k
-  PAGESIZE := 2048
-  KERNEL_SIZE := 4096k
-  IMAGE_SIZE := 28672k
-  UBINIZE_OPTS := -E 5
-  SERCOMM_HWID := AYA
-  SERCOMM_HWVER := A001
-  SERCOMM_SWVER := 0x0086
-  IMAGES += factory.img kernel.bin rootfs.bin
-  IMAGE/factory.img := pad-extra 2048k | append-kernel | pad-to 6144k | append-ubi | \
-	pad-to $$$$(BLOCKSIZE) | sercom-footer | pad-to 128 | zip R6220.bin | sercom-seal
-  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-  IMAGE/kernel.bin := append-kernel
-  IMAGE/rootfs.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := Netgear R6220
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/mikrotik_routerboard-m33g
+  $(Device/MikroTik)
+  DEVICE_MODEL := RouterBOARD M33G
+  DEVICE_PACKAGES := -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += mikrotik,rbm33g
 endef
-TARGET_DEVICES += r6220
+TARGET_DEVICES += mikrotik_routerboard-m33g
+
+define Device/mqmaker_witi
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := MQmaker
+  DEVICE_MODEL := WiTi
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt76x2 kmod-sdhci-mt7620 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += witi mqmaker,witi-256m mqmaker,witi-512m
+endef
+TARGET_DEVICES += mqmaker_witi
+
+define Device/mtc_wr1201
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16000k
+  DEVICE_VENDOR := MTC
+  DEVICE_MODEL := Wireless Router WR1201
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | uImage lzma -n 'WR1201_8_128'
+  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += mtc_wr1201
 
 define Device/netgear_ex6150
-  DTS := EX6150
-  DEVICE_TITLE := Netgear EX6150
-  DEVICE_PACKAGES := kmod-mt76x2 wpad-basic
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := EX6150
+  DEVICE_PACKAGES := kmod-mt76x2
   NETGEAR_BOARD_ID := U12H318T00_NETGEAR
   IMAGE_SIZE := 14848k
   IMAGES += factory.chk
-  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | netgear-chk
+  IMAGE/factory.chk := $$(sysupgrade_bin) | check-size | netgear-chk
 endef
 TARGET_DEVICES += netgear_ex6150
 
-define Device/netgear_r6350
-  DTS := R6350
+define Device/netgear_sercomm_nand
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
   KERNEL_SIZE := 4096k
-  IMAGE_SIZE := 40960k
   UBINIZE_OPTS := -E 5
-  SERCOMM_HWID := CHJ
-  SERCOMM_HWVER := A001
-  SERCOMM_SWVER := 0x0052
   IMAGES += factory.img kernel.bin rootfs.bin
-  IMAGE/factory.img := pad-extra 2048k | append-kernel | pad-to 6144k | append-ubi | \
-	pad-to $$$$(BLOCKSIZE) | sercom-footer | pad-to 128 | zip $$$$(DEVICE_MODEL).bin | sercom-seal
+  IMAGE/factory.img := pad-extra 2048k | append-kernel | pad-to 6144k | \
+	append-ubi | pad-to $$$$(BLOCKSIZE) | sercom-footer | pad-to 128 | \
+	zip $$$$(SERCOMM_HWNAME).bin | sercom-seal
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   IMAGE/kernel.bin := append-kernel
-  IMAGE/rootfs.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := Netgear R6350
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt7615e kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  IMAGE/rootfs.bin := append-ubi | check-size
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_PACKAGES := kmod-mt7603 kmod-usb3 kmod-usb-ledtrig-usbport
+endef
+
+define Device/netgear_r6220
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6220
+  SERCOMM_HWNAME := R6220
+  SERCOMM_HWID := AYA
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0086
+  IMAGE_SIZE := 28672k
+  DEVICE_PACKAGES += kmod-mt76x2
+  SUPPORTED_DEVICES += r6220
+endef
+TARGET_DEVICES += netgear_r6220
+
+
+define Device/netgear_r6260
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6260
+  SERCOMM_HWNAME := R6260
+  SERCOMM_HWID := CHJ
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0052
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += netgear_r6260
+
+define Device/netgear_r6350
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6350
+  SERCOMM_HWNAME := R6350
+  SERCOMM_HWID := CHJ
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0052
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
 endef
 TARGET_DEVICES += netgear_r6350
 
-define Device/MikroTik
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := 16128k
-  DEVICE_PACKAGES := kmod-usb3
-  LOADER_TYPE := elf
-  PLATFORM := mt7621
-  KERNEL := $(KERNEL_DTB) | loader-kernel
-  IMAGE/sysupgrade.bin := append-kernel | kernel2minor -s 1024 | pad-to $$$$(BLOCKSIZE) | \
-	append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
+define Device/netgear_r6700-v2
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6700
+  DEVICE_VARIANT := v2
+  DEVICE_ALT0_VENDOR := NETGEAR
+  DEVICE_ALT0_MODEL := Nighthawk AC2400
+  DEVICE_ALT0_VARIANT := v1
+  DEVICE_ALT1_VENDOR := NETGEAR
+  DEVICE_ALT1_MODEL := R7200
+  DEVICE_ALT1_VARIANT := v1
+  SERCOMM_HWNAME := R6950
+  SERCOMM_HWID := BZV
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x1032
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
 endef
+TARGET_DEVICES += netgear_r6700-v2
 
-define Device/mikrotik_rb750gr3
-  $(Device/MikroTik)
-  DTS := RB750Gr3
-  DEVICE_TITLE := MikroTik RouterBOARD RB750Gr3
-  DEVICE_PACKAGES += kmod-gpio-beeper
+define Device/netgear_r6800
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6800
+  SERCOMM_HWNAME := R6950
+  SERCOMM_HWID := BZV
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0062
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += mikrotik_rb750gr3
+TARGET_DEVICES += netgear_r6800
 
-define Device/mikrotik_rbm33g
-  $(Device/MikroTik)
-  DTS := RBM33G
-  DEVICE_TITLE := MikroTik RouterBOARD M33G
+define Device/netgear_r6850
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := R6850
+  SERCOMM_HWNAME := R6850
+  SERCOMM_HWID := CHJ
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0052
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += mikrotik_rbm33g
+TARGET_DEVICES += netgear_r6850
 
-define Device/mikrotik_rbm11g
-  $(Device/MikroTik)
-  DTS := RBM11G
-  DEVICE_TITLE := MikroTik RouterBOARD M11G
+define Device/netgear_wac104
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := WAC104
+  SERCOMM_HWNAME := WAC104
+  SERCOMM_HWID := CAY
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0006
+  IMAGE_SIZE := 28672k
+  DEVICE_PACKAGES += kmod-mt76x2
 endef
-TARGET_DEVICES += mikrotik_rbm11g
+TARGET_DEVICES += netgear_wac104
 
-define Device/mtc_wr1201
-	DTS := WR1201
-	IMAGE_SIZE := 16000k
-	DEVICE_TITLE := MTC Wireless Router WR1201
-	KERNEL_INITRAMFS := $(KERNEL_DTB) | wr1201-factory-header
-	DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
-		kmod-usb-ledtrig-usbport wpad-basic
+define Device/netgear_wac124
+  $(Device/netgear_sercomm_nand)
+  DEVICE_MODEL := WAC124
+  SERCOMM_HWNAME := WAC124
+  SERCOMM_HWID := CTL
+  SERCOMM_HWVER := A003
+  SERCOMM_SWVER := 0x0402
+  IMAGE_SIZE := 40960k
+  DEVICE_PACKAGES += kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += mtc_wr1201
+TARGET_DEVICES += netgear_wac124
 
-define Device/re350-v1
-  DTS := RE350
-  DEVICE_TITLE := TP-LINK RE350 v1
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-basic
-  TPLINK_BOARD_ID := RE350-V1
-  TPLINK_HWID := 0x0
-  TPLINK_HWREV := 0
-  TPLINK_HEADER_VERSION := 1
-  IMAGE_SIZE := 6016k
-  KERNEL := $(KERNEL_DTB) | tplink-v1-header -e -O
-  IMAGES += factory.bin
-  IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | append-metadata | check-size $$$$(IMAGE_SIZE)
-  IMAGE/factory.bin := append-rootfs | tplink-safeloader factory
+define Device/netgear_wndr3700-v5
+  $(Device/dsa-migration)
+  $(Device/netgear_sercomm_nor)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 15232k
+  DEVICE_MODEL := WNDR3700
+  DEVICE_VARIANT := v5
+  SERCOMM_HWNAME := WNDR3700v5
+  SERCOMM_HWID := AYB
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x1054
+  SERCOMM_PAD := 320k
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += wndr3700v5
 endef
-TARGET_DEVICES += re350-v1
+TARGET_DEVICES += netgear_wndr3700-v5
 
-define Device/re6500
-  DTS := RE6500
-  DEVICE_TITLE := Linksys RE6500
-  DEVICE_PACKAGES := kmod-mt76x2 wpad-basic
+define Device/netis_wf2881
+  $(Device/dsa-migration)
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  FILESYSTEMS := squashfs
+  KERNEL_SIZE := 4096k
+  IMAGE_SIZE := 129280k
+  UBINIZE_OPTS := -E 5
+  UIMAGE_NAME := WF2881_0.0.00
+  KERNEL_INITRAMFS := $(KERNEL_DTB) | netis-tail WF2881 | uImage lzma
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | \
+	check-size
+  DEVICE_VENDOR := NETIS
+  DEVICE_MODEL := WF2881
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += netis_wf2881
+
+define Device/phicomm_k2p
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 15744k
+  DEVICE_VENDOR := Phicomm
+  DEVICE_MODEL := K2P
+  DEVICE_ALT0_VENDOR := Phicomm
+  DEVICE_ALT0_MODEL := KE 2P
+  SUPPORTED_DEVICES += k2p
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += phicomm_k2p
+
+define Device/planex_vr500
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 65216k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := VR500
+  DEVICE_PACKAGES := kmod-usb3 -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += vr500
 endef
-TARGET_DEVICES += re6500
+TARGET_DEVICES += planex_vr500
 
-define Device/sap-g3200u3
-  DTS := SAP-G3200U3
-  DEVICE_TITLE := STORYLiNK SAP-G3200U3
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/samknows_whitebox-v8
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := SamKnows
+  DEVICE_MODEL := Whitebox 8
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport uboot-envtools
+  SUPPORTED_DEVICES += sk-wb8
 endef
-TARGET_DEVICES += sap-g3200u3
+TARGET_DEVICES += samknows_whitebox-v8
 
-define Device/sk-wb8
-  DTS := SK-WB8
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := SamKnows Whitebox 8
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport \
-	uboot-envtools wpad-basic
+define Device/storylink_sap-g3200u3
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := STORYLiNK
+  DEVICE_MODEL := SAP-G3200U3
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += sap-g3200u3
 endef
-TARGET_DEVICES += sk-wb8
+TARGET_DEVICES += storylink_sap-g3200u3
 
 define Device/telco-electronics_x1
-  DTS := Telco-Electronics-X1
+  $(Device/dsa-migration)
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Telco Electronics X1
-  DEVICE_PACKAGES := kmod-usb3 kmod-mt76 wpad-basic
+  DEVICE_VENDOR := Telco Electronics
+  DEVICE_MODEL := X1
+  DEVICE_PACKAGES := kmod-usb3 kmod-mt76
 endef
 TARGET_DEVICES += telco-electronics_x1
 
-define Device/timecloud
-  DTS := Timecloud
-  DEVICE_TITLE := Thunder Timecloud
-  DEVICE_PACKAGES := kmod-usb3
+define Device/thunder_timecloud
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Thunder
+  DEVICE_MODEL := Timecloud
+  DEVICE_PACKAGES := kmod-usb3 -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += timecloud
+endef
+TARGET_DEVICES += thunder_timecloud
+
+define Device/totolink_a7000r
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  UIMAGE_NAME := C8340R1C-9999
+  DEVICE_VENDOR := TOTOLINK
+  DEVICE_MODEL := A7000R
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += timecloud
+TARGET_DEVICES += totolink_a7000r
 
-define Device/ubnt-erx
-  DTS := UBNT-ERX
+define Device/totolink_x5000r
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  UIMAGE_NAME := C8343R-9999
+  DEVICE_VENDOR := TOTOLINK
+  DEVICE_MODEL := X5000R
+  DEVICE_PACKAGES := kmod-mt7915e
+endef
+TARGET_DEVICES += totolink_x5000r
+
+define Device/tplink_eap235-wall-v1
+  $(Device/dsa-migration)
+  $(Device/tplink-safeloader)
+  DEVICE_MODEL := EAP235-Wall
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
+  TPLINK_BOARD_ID := EAP235-WALL-V1
+  IMAGE_SIZE := 13440k
+  IMAGE/factory.bin := append-rootfs | tplink-safeloader factory | \
+	pad-extra 128
+endef
+TARGET_DEVICES += tplink_eap235-wall-v1
+
+define Device/tplink_re350-v1
+  $(Device/dsa-migration)
+  $(Device/tplink-safeloader)
+  DEVICE_MODEL := RE350
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2
+  TPLINK_BOARD_ID := RE350-V1
+  IMAGE_SIZE := 6016k
+  SUPPORTED_DEVICES += re350-v1
+endef
+TARGET_DEVICES += tplink_re350-v1
+
+define Device/tplink_re500-v1
+  $(Device/dsa-migration)
+  $(Device/tplink-safeloader)
+  DEVICE_MODEL := RE500
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+  TPLINK_BOARD_ID := RE500-V1
+  IMAGE_SIZE := 14208k
+endef
+TARGET_DEVICES += tplink_re500-v1
+
+define Device/tplink_re650-v1
+  $(Device/dsa-migration)
+  $(Device/tplink-safeloader)
+  DEVICE_MODEL := RE650
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
+  TPLINK_BOARD_ID := RE650-V1
+  IMAGE_SIZE := 14208k
+endef
+TARGET_DEVICES += tplink_re650-v1
+
+define Device/ubnt_edgerouter_common
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := Ubiquiti
+  IMAGE_SIZE := 256768k
   FILESYSTEMS := squashfs
   KERNEL_SIZE := 3145728
-  KERNEL_INITRAMFS := $$(KERNEL) | ubnt-erx-factory-image $(KDIR)/tmp/$$(KERNEL_INITRAMFS_PREFIX)-factory.tar
+  KERNEL_INITRAMFS := $$(KERNEL) | \
+	ubnt-erx-factory-image $(KDIR)/tmp/$$(KERNEL_INITRAMFS_PREFIX)-factory.tar
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-  DEVICE_TITLE := Ubiquiti EdgeRouter X
-  SUPPORTED_DEVICES += ubiquiti,edgerouterx
+  DEVICE_PACKAGES += -wpad-basic-wolfssl
 endef
-TARGET_DEVICES += ubnt-erx
 
-define Device/ubnt-erx-sfp
-  $(Device/ubnt-erx)
-  DTS := UBNT-ERX-SFP
-  DEVICE_TITLE := Ubiquiti EdgeRouter X-SFP
-  DEVICE_PACKAGES += kmod-i2c-algo-pca kmod-gpio-pca953x kmod-i2c-gpio-custom
-  SUPPORTED_DEVICES += ubiquiti,edgerouterx-sfp
+define Device/ubnt_edgerouter-x
+  $(Device/ubnt_edgerouter_common)
+  DEVICE_MODEL := EdgeRouter X
+  SUPPORTED_DEVICES += ubnt-erx ubiquiti,edgerouterx
 endef
-TARGET_DEVICES += ubnt-erx-sfp
+TARGET_DEVICES += ubnt_edgerouter-x
 
-define Device/unielec_u7621-06-256m-16m
-  DTS := U7621-06-256M-16M
+define Device/ubnt_edgerouter-x-sfp
+  $(Device/ubnt_edgerouter_common)
+  DEVICE_MODEL := EdgeRouter X SFP
+  DEVICE_PACKAGES += kmod-i2c-algo-pca kmod-gpio-pca953x kmod-sfp
+  SUPPORTED_DEVICES += ubnt-erx-sfp ubiquiti,edgerouterx-sfp
+endef
+TARGET_DEVICES += ubnt_edgerouter-x-sfp
+
+define Device/ubnt_unifi-6-lite
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := Ubiquiti
+  DEVICE_MODEL := UniFi 6 Lite
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7915e
+  KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+  IMAGE_SIZE := 15424k
+endef
+TARGET_DEVICES += ubnt_unifi-6-lite
+
+define Device/ubnt_unifi-nanohd
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := Ubiquiti
+  DEVICE_MODEL := UniFi nanoHD
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
+  IMAGE_SIZE := 15552k
+endef
+TARGET_DEVICES += ubnt_unifi-nanohd
+
+define Device/unielec_u7621-01-16m
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := UniElec U7621-06 (256M RAM/16M flash)
-  DEVICE_PACKAGES := kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3
-  SUPPORTED_DEVICES += u7621-06-256M-16M
+  DEVICE_VENDOR := UniElec
+  DEVICE_MODEL := U7621-01
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3
 endef
-TARGET_DEVICES += unielec_u7621-06-256m-16m
+TARGET_DEVICES += unielec_u7621-01-16m
 
-define Device/unielec_u7621-06-512m-64m
-  DTS := U7621-06-512M-64M
-  IMAGE_SIZE := 65216k
-  DEVICE_TITLE := UniElec U7621-06 (512M RAM/64M flash)
-  DEVICE_PACKAGES := kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3
+define Device/unielec_u7621-06-16m
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := UniElec
+  DEVICE_MODEL := U7621-06
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += u7621-06-256M-16M unielec,u7621-06-256m-16m
 endef
-TARGET_DEVICES += unielec_u7621-06-512m-64m
+TARGET_DEVICES += unielec_u7621-06-16m
 
-define Device/vr500
-  DTS := VR500
-  IMAGE_SIZE := 66453504
-  DEVICE_TITLE := Planex VR500
-  DEVICE_PACKAGES := kmod-usb3
+define Device/unielec_u7621-06-64m
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 65216k
+  DEVICE_VENDOR := UniElec
+  DEVICE_MODEL := U7621-06
+  DEVICE_VARIANT := 64M
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 -wpad-basic-wolfssl
+  SUPPORTED_DEVICES += unielec,u7621-06-512m-64m
+endef
+TARGET_DEVICES += unielec_u7621-06-64m
+
+define Device/wavlink_wl-wn531a6
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN531A6
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware kmod-usb3
+  IMAGE_SIZE := 15040k
+endef
+TARGET_DEVICES += wavlink_wl-wn531a6
+
+define Device/wevo_11acnas
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  UIMAGE_NAME := 11AC-NAS-Router(0.0.0)
+  DEVICE_VENDOR := WeVO
+  DEVICE_MODEL := 11AC NAS Router
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += 11acnas
 endef
-TARGET_DEVICES += vr500
+TARGET_DEVICES += wevo_11acnas
 
-define Device/w2914nsv2
-  DTS := W2914NSV2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
+define Device/wevo_w2914ns-v2
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
   UIMAGE_NAME := W2914NS-V2(0.0.0)
-  DEVICE_TITLE := WeVO W2914NS v2
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  DEVICE_VENDOR := WeVO
+  DEVICE_MODEL := W2914NS
+  DEVICE_VARIANT := v2
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += w2914nsv2
+endef
+TARGET_DEVICES += wevo_w2914ns-v2
+
+define Device/winstars_ws-wn583a6
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Winstars
+  DEVICE_MODEL := WS-WN583A6
+  DEVICE_ALT0_VENDOR := Gemeita
+  DEVICE_ALT0_MODEL := AC2100
+  KERNEL_INITRAMFS_SUFFIX := -WN583A6$$(KERNEL_SUFFIX)
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += winstars_ws-wn583a6
+
+define Device/xiaomi_nand_separate
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_PACKAGES := uboot-envtools
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 4096k
+  UBINIZE_OPTS := -E 5
+  IMAGES += kernel1.bin rootfs0.bin
+  IMAGE/kernel1.bin := append-kernel
+  IMAGE/rootfs0.bin := append-ubi | check-size
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef
-TARGET_DEVICES += w2914nsv2
 
-define Device/wf-2881
-  DTS := WF-2881
+define Device/xiaomi_mi-router-3g
+  $(Device/xiaomi_nand_separate)
+  DEVICE_MODEL := Mi Router 3G
+  IMAGE_SIZE := 124416k
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += R3G mir3g xiaomi,mir3g
+endef
+TARGET_DEVICES += xiaomi_mi-router-3g
+
+define Device/xiaomi_mi-router-3g-v2
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 14848k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 3G
+  DEVICE_VARIANT := v2
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2
+  SUPPORTED_DEVICES += xiaomi,mir3g-v2
+endef
+TARGET_DEVICES += xiaomi_mi-router-3g-v2
+
+define Device/xiaomi_mi-router-3-pro
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
-  FILESYSTEMS := squashfs
-  IMAGE_SIZE := 129280k
-  KERNEL := $(KERNEL_DTB) | pad-offset $$(BLOCKSIZE) 64 | uImage lzma
+  KERNEL_SIZE:= 4096k
   UBINIZE_OPTS := -E 5
-  UIMAGE_NAME := WF2881_0.0.00
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | netis-tail WF2881 | uImage lzma
-  IMAGE/sysupgrade.bin := append-kernel | append-ubi | append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := NETIS WF-2881
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  IMAGE_SIZE := 255488k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 3 Pro
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3 \
+	kmod-usb-ledtrig-usbport uboot-envtools
+  SUPPORTED_DEVICES += xiaomi,mir3p
 endef
-TARGET_DEVICES += wf-2881
+TARGET_DEVICES += xiaomi_mi-router-3-pro
 
-define Device/mqmaker_witi-256m
-  DTS := WITI-256M
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := MQmaker WiTi (256MB RAM)
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt76x2 kmod-sdhci-mt7620 kmod-usb3 \
-	kmod-usb-ledtrig-usbport wpad-basic
-  SUPPORTED_DEVICES += witi
+define Device/xiaomi_mi-router-4
+  $(Device/xiaomi_nand_separate)
+  DEVICE_MODEL := Mi Router 4
+  IMAGE_SIZE := 124416k
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt76x2
 endef
-TARGET_DEVICES += mqmaker_witi-256m
+TARGET_DEVICES += xiaomi_mi-router-4
 
-define Device/mqmaker_witi-512m
-  DTS := WITI-512M
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := MQmaker WiTi (512MB RAM)
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-mt76x2 kmod-sdhci-mt7620 kmod-usb3 \
-	kmod-usb-ledtrig-usbport wpad-basic
+define Device/xiaomi_mi-router-4a-gigabit
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 14848k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 4A
+  DEVICE_VARIANT := Gigabit Edition
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2
 endef
-TARGET_DEVICES += mqmaker_witi-512m
+TARGET_DEVICES += xiaomi_mi-router-4a-gigabit
 
-define Device/wndr3700v5
-  DTS := WNDR3700V5
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := 15232k
-  SERCOMM_HWID := AYB
-  SERCOMM_HWVER := A001
-  SERCOMM_SWVER := 0x1054
-  IMAGES += factory.img
-  IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs
-  IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
-  IMAGE/factory.img := pad-extra 320k | $$(IMAGE/default) | pad-to $$$$(BLOCKSIZE) | \
-	sercom-footer | pad-to 128 | zip WNDR3700v5.bin | sercom-seal
-  DEVICE_TITLE := Netgear WNDR3700v5
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/xiaomi_mi-router-ac2100
+  $(Device/xiaomi_nand_separate)
+  DEVICE_MODEL := Mi Router AC2100
+  IMAGE_SIZE := 120320k
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
 endef
-TARGET_DEVICES += wndr3700v5
+TARGET_DEVICES += xiaomi_mi-router-ac2100
+
+define Device/xiaomi_redmi-router-ac2100
+  $(Device/xiaomi_nand_separate)
+  DEVICE_MODEL := Redmi Router AC2100
+  IMAGE_SIZE := 120320k
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
+endef
+TARGET_DEVICES += xiaomi_redmi-router-ac2100
+
+define Device/xiaoyu_xy-c5
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := XiaoYu
+  DEVICE_MODEL := XY-C5
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 -wpad-basic-wolfssl
+endef
+TARGET_DEVICES += xiaoyu_xy-c5
+
+define Device/xzwifi_creativebox-v1
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := CreativeBox
+  DEVICE_MODEL := v1
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
+	kmod-usb3 -wpad-basic-wolfssl
+endef
+TARGET_DEVICES += xzwifi_creativebox-v1
 
 define Device/youhua_wr1200js
-  DTS := WR1200JS
+  $(Device/dsa-migration)
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := YouHua WR1200JS
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  DEVICE_VENDOR := YouHua
+  DEVICE_MODEL := WR1200JS
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += youhua_wr1200js
 
 define Device/youku_yk-l2
-  DTS := YOUKU-YK2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Youku YK-L2
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Youku
+  DEVICE_MODEL := YK-L2
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += youku_yk-l2
 
-define Device/wsr-1166
-  DTS := WSR-1166
-  IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Buffalo WSR-1166
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-basic
-endef
-TARGET_DEVICES += wsr-1166
-
-define Device/wsr-600
-  DTS := WSR-600
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Buffalo WSR-600
-  DEVICE_PACKAGES := kmod-mt7603 kmod-rt2800-pci wpad-basic
-endef
-TARGET_DEVICES += wsr-600
-
-define Device/zbt-we1326
-  DTS := ZBT-WE1326
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := ZBT WE1326
-  DEVICE_PACKAGES := \
-	kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 wpad-basic
+define Device/zbtlink_zbt-we1326
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE1326
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += zbt-we1326
 endef
-TARGET_DEVICES += zbt-we1326
+TARGET_DEVICES += zbtlink_zbt-we1326
 
 define Device/zbtlink_zbt-we3526
-  DTS := ZBT-WE3526
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := ZBT WE3526
-  DEVICE_PACKAGES := \
-	kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
-	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE3526
+  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += zbtlink_zbt-we3526
 
-define Device/zbt-wg2626
-  DTS := ZBT-WG2626
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := ZBT WG2626
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
-	kmod-usb-ledtrig-usbport wpad-basic
+define Device/zbtlink_zbt-wg2626
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WG2626
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += zbt-wg2626
 endef
-TARGET_DEVICES += zbt-wg2626
+TARGET_DEVICES += zbtlink_zbt-wg2626
 
-define Device/zbt-wg3526-16M
-  DTS := ZBT-WG3526-16M
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  SUPPORTED_DEVICES += zbt-wg3526
-  DEVICE_TITLE := ZBT WG3526 (16MB flash)
-  DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
-	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+define Device/zbtlink_zbt-wg3526-16m
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WG3526
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
+	kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += zbt-wg3526 zbt-wg3526-16M
+endef
+TARGET_DEVICES += zbtlink_zbt-wg3526-16m
+
+define Device/zbtlink_zbt-wg3526-32m
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WG3526
+  DEVICE_VARIANT := 32M
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
+	kmod-usb3 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += ac1200pro zbt-wg3526-32M
+endef
+TARGET_DEVICES += zbtlink_zbt-wg3526-32m
+
+define Device/zio_freezio
+  $(Device/dsa-migration)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := ZIO
+  DEVICE_MODEL := FREEZIO
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += zio_freezio
+
+define Device/zyxel_wap6805
+  $(Device/dsa-migration)
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 4096k
+  UBINIZE_OPTS := -E 5
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := WAP6805
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7621-qtn-rgmii
+  KERNEL := $(KERNEL_DTB) | uImage lzma | uimage-padhdr 160
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef
-TARGET_DEVICES += zbt-wg3526-16M
+TARGET_DEVICES += zyxel_wap6805
 
-define Device/zbt-wg3526-32M
-  DTS := ZBT-WG3526-32M
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  SUPPORTED_DEVICES += ac1200pro
-  DEVICE_TITLE := ZBT WG3526 (32MB flash)
+define Device/ex400
+  DTS := EX400
+  IMAGE_SIZE := 16128k
+  DEVICE_TITLE := EX400
+  IMAGES += y3.img
+  IMAGE/y3.img := iopsys-v3-pkginfo | iopsys-v3-ubifs | iopsys-v3-fw
   DEVICE_PACKAGES := \
-	kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
-	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic
+	kmod-ata-core kmod-ata-ahci kmod-mt7603 kmod-mt7615e \
+	kmod-usb3 kmod-usb-ledtrig-usbport wpad-basic uboot-ex400
+  UBIFS_OPTS:=-m 2048 -e 126976 -c 4096
+  CONFIG_MEDIATEK_CHIP_ID := 7621
+  CONFIG_TARGET_FAMILY := EX400
+  BUILD_DATE := $(shell date '+%y%m%d_%H%M')
+  $(eval IHGSP_VERSION=$$(CONFIG_TARGET_FAMILY)-X-$$(CONFIG_TARGET_CUSTOMER)-$$(CONFIG_TARGET_VERSION)-$$(BUILD_DATE))
+  GIT_SHORT := $(shell cd $(TOPDIR);git rev-parse --short HEAD)
 endef
-TARGET_DEVICES += zbt-wg3526-32M
+TARGET_DEVICES += ex400
diff --git a/iopsys-ramips/image/mt76x8.mk b/iopsys-ramips/image/mt76x8.mk
index 7df5c04297693263098549d445ece3fed5d9aba0..7ba2acacb881ae7352bb513ce94a5f95a0742b5f 100644
--- a/iopsys-ramips/image/mt76x8.mk
+++ b/iopsys-ramips/image/mt76x8.mk
@@ -2,486 +2,825 @@
 # MT76x8 Profiles
 #
 
-define Device/tplink
-  TPLINK_FLASHLAYOUT :=
-  TPLINK_HWID :=
-  TPLINK_HWREV :=
-  TPLINK_HWREVADD :=
-  TPLINK_HVERSION :=
-  KERNEL := $(KERNEL_DTB)
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | tplink-v2-header -e
-  IMAGES += tftp-recovery.bin
-  IMAGE/factory.bin := tplink-v2-image -e
-  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
-  IMAGE/sysupgrade.bin := tplink-v2-image -s -e | append-metadata | \
-	check-size $$$$(IMAGE_SIZE)
+include ./common-tp-link.mk
+
+DEFAULT_SOC := mt7628an
+
+define Build/elecom-header
+	$(eval model_id=$(1))
+	( \
+		fw_size="$$(printf '%08x' $$(stat -c%s $@))"; \
+		echo -ne "$$(echo "031d6129$${fw_size}06000000$(model_id)" | \
+			sed 's/../\\x&/g')"; \
+		dd if=/dev/zero bs=92 count=1; \
+		data_crc="$$(dd if=$@ | gzip -c | tail -c 8 | \
+			od -An -N4 -tx4 --endian little | tr -d ' \n')"; \
+		echo -ne "$$(echo "$${data_crc}00000000" | sed 's/../\\x&/g')"; \
+		dd if=$@; \
+	) > $@.new
+	mv $@.new $@
+endef
+
+define Build/ravpower-wd009-factory
+	mkimage -A mips -T standalone -C none -a 0x80010000 -e 0x80010000 \
+		-n "OpenWrt Bootloader" -d $(UBOOT_PATH) $@.new
+	cat $@ >> $@.new
+	@mv $@.new $@
 endef
-DEVICE_VARS += TPLINK_FLASHLAYOUT TPLINK_HWID TPLINK_HWREV TPLINK_HWREVADD TPLINK_HVERSION
 
 
 define Device/alfa-network_awusfree1
-  DTS := AWUSFREE1
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := ALFA Network AWUSFREE1
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ALFA Network
+  DEVICE_MODEL := AWUSFREE1
   DEVICE_PACKAGES := uboot-envtools
 endef
 TARGET_DEVICES += alfa-network_awusfree1
 
+define Device/asus_rt-n10p-v3
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N10P
+  DEVICE_VARIANT := V3
+endef
+TARGET_DEVICES += asus_rt-n10p-v3
+
+define Device/asus_rt-n11p-b1
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N11P
+  DEVICE_VARIANT := B1
+endef
+TARGET_DEVICES += asus_rt-n11p-b1
+
+define Device/asus_rt-n12-vp-b1
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N12 VP
+  DEVICE_VARIANT := B1
+endef
+TARGET_DEVICES += asus_rt-n12-vp-b1
+
+define Device/buffalo_wcr-1166ds
+  IMAGE_SIZE := 7936k
+  BUFFALO_TAG_PLATFORM := MTK
+  BUFFALO_TAG_VERSION := 9.99
+  BUFFALO_TAG_MINOR := 9.99
+  IMAGES += factory.bin
+  IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata
+  IMAGE/factory.bin := trx -M 0x746f435c | pad-rootfs | append-metadata | \
+	buffalo-enc WCR-1166DS $$(BUFFALO_TAG_VERSION) -l | \
+	buffalo-tag-dhp WCR-1166DS JP JP | buffalo-enc-tag -l | buffalo-dhp-image
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WCR-1166DS
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += wcr-1166ds
+endef
+TARGET_DEVICES += buffalo_wcr-1166ds
+
 define Device/cudy_wr1000
-  DTS := WR1000
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
+  IMAGE_SIZE := 7872k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-        $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | jcg-header 92.122
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 92.122
   JCG_MAXSIZE := 7872k
-  DEVICE_TITLE := Cudy WR1000
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := WR1000
   DEVICE_PACKAGES := kmod-mt76x2
   SUPPORTED_DEVICES += wr1000
 endef
 TARGET_DEVICES += cudy_wr1000
 
-define Device/tama_w06
-  DTS := W06
-  IMAGE_SIZE := 15040k
-  DEVICE_TITLE := Tama W06
+define Device/d-team_pbr-d1
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := PandoraBox
+  DEVICE_MODEL := PBR-D1
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += pbr-d1
 endef
-TARGET_DEVICES += tama_w06
+TARGET_DEVICES += d-team_pbr-d1
 
-define Device/duzun-dm06
-  DTS := DUZUN-DM06
-  DEVICE_TITLE := DuZun DM06
+define Device/duzun_dm06
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := DuZun
+  DEVICE_MODEL := DM06
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += duzun-dm06
 endef
-TARGET_DEVICES += duzun-dm06
+TARGET_DEVICES += duzun_dm06
 
-define Device/gl-mt300n-v2
-  DTS := GL-MT300N-V2
+define Device/elecom_wrc-1167fs
+  IMAGE_SIZE := 7360k
+  DEVICE_VENDOR := ELECOM
+  DEVICE_MODEL := WRC-1167FS
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size | \
+	xor-image -p 29944A25 -x | elecom-header 00228000 | \
+	elecom-product-header WRC-1167FS
+  DEVICE_PACKAGES := kmod-mt76x2
+endef
+TARGET_DEVICES += elecom_wrc-1167fs
+
+define Device/glinet_gl-mt300n-v2
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := GL-iNet GL-MT300N-V2
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := GL-MT300N
+  DEVICE_VARIANT := V2
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += gl-mt300n-v2
+endef
+TARGET_DEVICES += glinet_gl-mt300n-v2
+
+define Device/glinet_microuter-n300
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := microuter-N300
+  SUPPORTED_DEVICES += microuter-n300
 endef
-TARGET_DEVICES += gl-mt300n-v2
+TARGET_DEVICES += glinet_microuter-n300
 
 define Device/glinet_vixmini
-  DTS := VIXMINI
   IMAGE_SIZE := 7872k
-  DEVICE_TITLE := GL.iNet VIXMINI
+  DEVICE_VENDOR := GL.iNet
+  DEVICE_MODEL := VIXMINI
   SUPPORTED_DEVICES += vixmini
 endef
 TARGET_DEVICES += glinet_vixmini
 
-define Device/hc5661a
-  DTS := HC5661A
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := HiWiFi HC5661A
+define Device/hak5_wifi-pineapple-mk7
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Hak5
+  DEVICE_MODEL := WiFi Pineapple Mark 7
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += wifi-pineapple-mk7
 endef
-TARGET_DEVICES += hc5661a
+TARGET_DEVICES += hak5_wifi-pineapple-mk7
 
 define Device/hilink_hlk-7628n
-  DTS := HLK-7628N
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := HILINK HLK7628N
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := HILINK
+  DEVICE_MODEL := HLK-7628N
 endef
 TARGET_DEVICES += hilink_hlk-7628n
 
+define Device/hilink_hlk-7688a
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Hi-Link
+  DEVICE_MODEL := HLK-7688A
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+endef
+TARGET_DEVICES += hilink_hlk-7688a
+
+define Device/hiwifi_hc5661a
+  IMAGE_SIZE := 15808k
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5661A
+  SUPPORTED_DEVICES += hc5661a
+endef
+TARGET_DEVICES += hiwifi_hc5661a
+
+define Device/hiwifi_hc5761a
+  IMAGE_SIZE := 15808k
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5761A
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+endef
+TARGET_DEVICES += hiwifi_hc5761a
+
 define Device/hiwifi_hc5861b
-  DTS := HC5861B
   IMAGE_SIZE := 15808k
-  DEVICE_TITLE := HiWiFi HC5861B
+  DEVICE_VENDOR := HiWiFi
+  DEVICE_MODEL := HC5861B
   DEVICE_PACKAGES := kmod-mt76x2
 endef
 TARGET_DEVICES += hiwifi_hc5861b
 
-define Device/LinkIt7688
-  DTS := LINKIT7688
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  SUPPORTED_DEVICES := linkits7688 linkits7688d
-  DEVICE_TITLE := MediaTek LinkIt Smart 7688
-  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools
+define Device/iptime_a3
+  IMAGE_SIZE := 7936k
+  UIMAGE_NAME := a3
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A3
+  DEVICE_PACKAGES := kmod-mt76x2
 endef
-TARGET_DEVICES += LinkIt7688
+TARGET_DEVICES += iptime_a3
 
-define Device/mac1200r-v2
-  DTS := MAC1200RV2
-  DEVICE_TITLE := Mercury MAC1200R v2.0
-  SUPPORTED_DEVICES := mac1200rv2
+define Device/iptime_a604m
+  IMAGE_SIZE := 7936k
+  UIMAGE_NAME := a604m
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := A604M
   DEVICE_PACKAGES := kmod-mt76x2
 endef
-TARGET_DEVICES += mac1200r-v2
+TARGET_DEVICES += iptime_a604m
 
-define Device/miwifi-nano
-  DTS := MIWIFI-NANO
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Xiaomi MiWiFi Nano
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+define Device/jotale_js76x8
+  DEVICE_VENDOR := Jotale
+  DEVICE_MODEL := JS76x8
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+endef
+
+define Device/jotale_js76x8-8m
+  $(Device/jotale_js76x8)
+  IMAGE_SIZE := 7872k
+  DEVICE_VARIANT := 8M
+endef
+TARGET_DEVICES += jotale_js76x8-8m
+
+define Device/jotale_js76x8-16m
+  $(Device/jotale_js76x8)
+  IMAGE_SIZE := 16064k
+  DEVICE_VARIANT := 16M
+endef
+TARGET_DEVICES += jotale_js76x8-16m
+
+define Device/jotale_js76x8-32m
+  $(Device/jotale_js76x8)
+  IMAGE_SIZE := 32448k
+  DEVICE_VARIANT := 32M
+endef
+TARGET_DEVICES += jotale_js76x8-32m
+
+define Device/mediatek_linkit-smart-7688
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := LinkIt Smart 7688
+  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += linkits7688 linkits7688d
 endef
-TARGET_DEVICES += miwifi-nano
+TARGET_DEVICES += mediatek_linkit-smart-7688
 
-define Device/mt7628
-  DTS := MT7628
+define Device/mediatek_mt7628an-eval-board
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := MediaTek MT7628 EVB
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := MediaTek
+  DEVICE_MODEL := MT7628 EVB
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += mt7628
+endef
+TARGET_DEVICES += mediatek_mt7628an-eval-board
+
+define Device/mercury_mac1200r-v2
+  IMAGE_SIZE := 7936k
+  DEVICE_VENDOR := Mercury
+  DEVICE_MODEL := MAC1200R
+  DEVICE_VARIANT := v2.0
+  DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += mac1200rv2
+endef
+TARGET_DEVICES += mercury_mac1200r-v2
+
+define Device/netgear_r6020
+  $(Device/netgear_sercomm_nor)
+  IMAGE_SIZE := 7104k
+  DEVICE_MODEL := R6020
+  DEVICE_PACKAGES := kmod-mt76x2
+  SERCOMM_HWNAME := R6020
+  SERCOMM_HWID := CFR
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0040
+  SERCOMM_PAD := 576k
+endef
+TARGET_DEVICES += netgear_r6020
+
+define Device/netgear_r6080
+  $(Device/netgear_sercomm_nor)
+  IMAGE_SIZE := 7552k
+  DEVICE_MODEL := R6080
+  DEVICE_PACKAGES := kmod-mt76x2
+  SERCOMM_HWNAME := R6080
+  SERCOMM_HWID := CFR
+  SERCOMM_HWVER := A001
+  SERCOMM_SWVER := 0x0040
+  SERCOMM_PAD := 576k
 endef
-TARGET_DEVICES += mt7628
+TARGET_DEVICES += netgear_r6080
 
 define Device/netgear_r6120
-  DTS := R6120
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Netgear R6120
+  $(Device/netgear_sercomm_nor)
+  IMAGE_SIZE := 15744k
+  DEVICE_MODEL := R6120
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
+  SERCOMM_HWNAME := R6120
   SERCOMM_HWID := CGQ
   SERCOMM_HWVER := A001
   SERCOMM_SWVER := 0x0040
-  IMAGES += factory.img
-  IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE)| append-rootfs | pad-rootfs
-  IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
-  IMAGE/factory.img := pad-extra 576k | $$(IMAGE/default) | pad-to $$$$(BLOCKSIZE) | \
-	sercom-footer | pad-to 128 | zip R6120.bin | sercom-seal
+  SERCOMM_PAD := 576k
 endef
 TARGET_DEVICES += netgear_r6120
 
-define Device/omega2
-  DTS := OMEGA2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Onion Omega2
+define Device/onion_omega2
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Onion
+  DEVICE_MODEL := Omega2
   DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools
+  SUPPORTED_DEVICES += omega2
 endef
-TARGET_DEVICES += omega2
+TARGET_DEVICES += onion_omega2
 
-define Device/omega2p
-  DTS := OMEGA2P
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Onion Omega2+
+define Device/onion_omega2p
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Onion
+  DEVICE_MODEL := Omega2+
   DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += omega2p
 endef
-TARGET_DEVICES += omega2p
-
-define Device/pbr-d1
-  DTS := PBR-D1
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := PBR-D1
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
-endef
-TARGET_DEVICES += pbr-d1
+TARGET_DEVICES += onion_omega2p
 
 define Device/rakwireless_rak633
-  DTS := RAK633
-  DEVICE_TITLE := Rakwireless RAK633
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Rakwireless
+  DEVICE_MODEL := RAK633
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += rakwireless_rak633
 
+define Device/ravpower_rp-wd009
+  IMAGE_SIZE := 14272k
+  DEVICE_VENDOR := RAVPower
+  DEVICE_MODEL := RP-WD009
+  UBOOT_PATH := $(STAGING_DIR_IMAGE)/ravpower_rp-wd009-u-boot.bin
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-sdhci-mt7620 kmod-i2c-mt7628 ravpower-mcu
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | ravpower-wd009-factory
+endef
+TARGET_DEVICES += ravpower_rp-wd009
+
 define Device/skylab_skw92a
-  DTS := SKW92A
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Skylab SKW92A
+  DEVICE_VENDOR := Skylab
+  DEVICE_MODEL := SKW92A
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += skylab_skw92a
 
-define Device/totolink_lr1200
-  DTS := TOTOLINK-LR1200
-  IMAGE_SIZE := 7872k
-  DEVICE_TITLE := TOTOLINK LR1200
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 uqmi
+define Device/tama_w06
+  IMAGE_SIZE := 15040k
+  DEVICE_VENDOR := Tama
+  DEVICE_MODEL := W06
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
 endef
-TARGET_DEVICES += totolink_lr1200
+TARGET_DEVICES += tama_w06
 
-define Device/tplink_tl-wa801nd-v5
-  $(Device/tplink)
-  DTS := TL-WA801NDV5
-  IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WA801ND v5
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0x08010005
-  TPLINK_HWREV := 0x1
-  TPLINK_HWREVADD := 0x5
-  TPLINK_HVERSION := 3
+define Device/totolink_a3
+  IMAGE_SIZE := 7936k
+  UIMAGE_NAME := za3
+  DEVICE_VENDOR := TOTOLINK
+  DEVICE_MODEL := A3
+  DEVICE_PACKAGES := kmod-mt76x2
 endef
-TARGET_DEVICES += tplink_tl-wa801nd-v5
+TARGET_DEVICES += totolink_a3
 
-define Device/tplink_tl-wr802n-v4
-  $(Device/tplink)
-  DTS := TL-WR802NV4
-  IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WR802N v4
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0x08020004
-  TPLINK_HWREV := 0x1
-  TPLINK_HWREVADD := 0x4
-  TPLINK_HVERSION := 3
+define Device/totolink_lr1200
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := TOTOLINK
+  DEVICE_MODEL := LR1200
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 uqmi
 endef
-TARGET_DEVICES += tplink_tl-wr802n-v4
+TARGET_DEVICES += totolink_lr1200
 
-define Device/tl-wr840n-v4
-  $(Device/tplink)
-  DTS := TL-WR840NV4
+define Device/tplink_archer-c20-v4
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WR840N v4
+  DEVICE_MODEL := Archer C20
+  DEVICE_VARIANT := v4
   TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0x08400004
-  TPLINK_HWREV := 0x1
+  TPLINK_HWID := 0xc200004
   TPLINK_HWREVADD := 0x4
-  TPLINK_HVERSION := 3
+  DEVICE_PACKAGES := kmod-mt76x0e
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+  SUPPORTED_DEVICES += tplink,c20-v4
 endef
-TARGET_DEVICES += tl-wr840n-v4
+TARGET_DEVICES += tplink_archer-c20-v4
 
-define Device/tl-wr840n-v5
-  DTS := TL-WR840NV5
-  IMAGE_SIZE := 3904k
-  DEVICE_TITLE := TP-Link TL-WR840N v5
-  TPLINK_FLASHLAYOUT := 4Mmtk
-  TPLINK_HWID := 0x08400005
-  TPLINK_HWREV := 0x1
+define Device/tplink_archer-c20-v5
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7616k
+  DEVICE_MODEL := Archer C20
+  DEVICE_VARIANT := v5
+  TPLINK_FLASHLAYOUT := 8MSUmtk
+  TPLINK_HWID := 0xc200005
   TPLINK_HWREVADD := 0x5
-  TPLINK_HVERSION := 3
-  KERNEL := $(KERNEL_DTB)
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | tplink-v2-header -e
-  IMAGE/sysupgrade.bin := tplink-v2-image -s -e | append-metadata | \
-	check-size $$$$(IMAGE_SIZE)
-  DEFAULT := n
-endef
-TARGET_DEVICES += tl-wr840n-v5
-
-define Device/tl-wr841n-v13
-  $(Device/tplink)
-  DTS := TL-WR841NV13
-  IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WR841N v13
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0x08410013
-  TPLINK_HWREV := 0x268
-  TPLINK_HWREVADD := 0x13
-  TPLINK_HVERSION := 3
-endef
-TARGET_DEVICES += tl-wr841n-v13
-
-define Device/tplink_c20-v4
-  $(Device/tplink)
-  DTS := ArcherC20v4
-  IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link ArcherC20 v4
-  TPLINK_FLASHLAYOUT := 8Mmtk
-  TPLINK_HWID := 0xc200004
-  TPLINK_HWREV := 0x1
-  TPLINK_HWREVADD := 0x4
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-mt76x0e
+  IMAGES := sysupgrade.bin
 endef
-TARGET_DEVICES += tplink_c20-v4
+TARGET_DEVICES += tplink_archer-c20-v5
 
-define Device/tplink_c50-v3
-  $(Device/tplink)
-  DTS := ArcherC50V3
+define Device/tplink_archer-c50-v3
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link ArcherC50 v3
+  DEVICE_MODEL := Archer C50
+  DEVICE_VARIANT := v3
   TPLINK_FLASHLAYOUT := 8Mmtk
   TPLINK_HWID := 0x001D9BA4
   TPLINK_HWREV := 0x79
   TPLINK_HWREVADD := 0x1
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-mt76x2
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+  SUPPORTED_DEVICES += tplink,c50-v3
 endef
-TARGET_DEVICES += tplink_c50-v3
+TARGET_DEVICES += tplink_archer-c50-v3
 
-define Device/tplink_c50-v4
-  $(Device/tplink)
-  DTS := ArcherC50V4
+define Device/tplink_archer-c50-v4
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7616k
-  DEVICE_TITLE := TP-Link ArcherC50 v4
+  DEVICE_MODEL := Archer C50
+  DEVICE_VARIANT := v4
   TPLINK_FLASHLAYOUT := 8MSUmtk
   TPLINK_HWID := 0x001D589B
   TPLINK_HWREV := 0x93
   TPLINK_HWREVADD := 0x2
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-mt76x2
   IMAGES := sysupgrade.bin
+  SUPPORTED_DEVICES += tplink,c50-v4
 endef
-TARGET_DEVICES += tplink_c50-v4
+TARGET_DEVICES += tplink_archer-c50-v4
+
+define Device/tplink_re200-v2
+  $(Device/tplink-safeloader)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := RE200
+  DEVICE_VARIANT := v2
+  DEVICE_PACKAGES := kmod-mt76x0e
+  TPLINK_BOARD_ID := RE200-V2
+endef
+TARGET_DEVICES += tplink_re200-v2
+
+define Device/tplink_re200-v3
+  $(Device/tplink-safeloader)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := RE200
+  DEVICE_VARIANT := v3
+  DEVICE_PACKAGES := kmod-mt76x0e
+  TPLINK_BOARD_ID := RE200-V3
+endef
+TARGET_DEVICES += tplink_re200-v3
+
+define Device/tplink_re200-v4
+  $(Device/tplink-safeloader)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := RE200
+  DEVICE_VARIANT := v4
+  DEVICE_PACKAGES := kmod-mt76x0e
+  TPLINK_BOARD_ID := RE200-V4
+endef
+TARGET_DEVICES += tplink_re200-v4
+
+define Device/tplink_re220-v2
+  $(Device/tplink-safeloader)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := RE220
+  DEVICE_VARIANT := v2
+  DEVICE_PACKAGES := kmod-mt76x0e
+  TPLINK_BOARD_ID := RE220-V2
+endef
+TARGET_DEVICES += tplink_re220-v2
+
+define Device/tplink_re305-v1
+  $(Device/tplink-safeloader)
+  IMAGE_SIZE := 6016k
+  DEVICE_MODEL := RE305
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt76x2
+  TPLINK_BOARD_ID := RE305-V1
+endef
+TARGET_DEVICES += tplink_re305-v1
 
 define Device/tplink_tl-mr3020-v3
-  $(Device/tplink)
-  DTS := TL-MR3020V3
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-MR3020 v3
+  DEVICE_MODEL := TL-MR3020
+  DEVICE_VARIANT := v3
   TPLINK_FLASHLAYOUT := 8Mmtk
   TPLINK_HWID := 0x30200003
   TPLINK_HWREV := 0x3
   TPLINK_HWREVADD := 0x3
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
 endef
 TARGET_DEVICES += tplink_tl-mr3020-v3
 
 define Device/tplink_tl-mr3420-v5
-  $(Device/tplink)
-  DTS := TL-MR3420V5
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-MR3420 v5
+  DEVICE_MODEL := TL-MR3420
+  DEVICE_VARIANT := v5
   TPLINK_FLASHLAYOUT := 8Mmtk
   TPLINK_HWID := 0x34200005
   TPLINK_HWREV := 0x5
   TPLINK_HWREVADD := 0x5
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
 endef
 TARGET_DEVICES += tplink_tl-mr3420-v5
 
+define Device/tplink_tl-mr6400-v4
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-MR6400
+  DEVICE_VARIANT := v4
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x64000004
+  TPLINK_HWREV := 0x4
+  TPLINK_HWREVADD := 0x4
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
+	kmod-usb-serial kmod-usb-serial-option kmod-usb-net-qmi-wwan uqmi
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+endef
+TARGET_DEVICES += tplink_tl-mr6400-v4
+
+define Device/tplink_tl-mr6400-v5
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-MR6400
+  DEVICE_VARIANT := v5
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x64000005
+  TPLINK_HWREV := 0x5
+  TPLINK_HWREVADD := 0x5
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
+	kmod-usb-serial kmod-usb-serial-option kmod-usb-net-qmi-wwan uqmi
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+endef
+TARGET_DEVICES += tplink_tl-mr6400-v5
+
+define Device/tplink_tl-wa801nd-v5
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-WA801ND
+  DEVICE_VARIANT := v5
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x08010005
+  TPLINK_HWREVADD := 0x5
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+endef
+TARGET_DEVICES += tplink_tl-wa801nd-v5
+
+define Device/tplink_tl-wr802n-v4
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-WR802N
+  DEVICE_VARIANT := v4
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x08020004
+  TPLINK_HWREVADD := 0x4
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+endef
+TARGET_DEVICES += tplink_tl-wr802n-v4
+
+define Device/tplink_tl-wr840n-v4
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-WR840N
+  DEVICE_VARIANT := v4
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x08400004
+  TPLINK_HWREVADD := 0x4
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+  SUPPORTED_DEVICES += tl-wr840n-v4
+endef
+TARGET_DEVICES += tplink_tl-wr840n-v4
+
+define Device/tplink_tl-wr840n-v5
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 3904k
+  DEVICE_MODEL := TL-WR840N
+  DEVICE_VARIANT := v5
+  TPLINK_FLASHLAYOUT := 4Mmtk
+  TPLINK_HWID := 0x08400005
+  TPLINK_HWREVADD := 0x5
+  IMAGES := sysupgrade.bin
+  SUPPORTED_DEVICES += tl-wr840n-v5
+  DEFAULT := n
+endef
+TARGET_DEVICES += tplink_tl-wr840n-v5
+
+define Device/tplink_tl-wr841n-v13
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-WR841N
+  DEVICE_VARIANT := v13
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x08410013
+  TPLINK_HWREV := 0x268
+  TPLINK_HWREVADD := 0x13
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+  SUPPORTED_DEVICES += tl-wr841n-v13
+endef
+TARGET_DEVICES += tplink_tl-wr841n-v13
+
+define Device/tplink_tl-wr841n-v14
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 3968k
+  DEVICE_MODEL := TL-WR841N
+  DEVICE_VARIANT := v14
+  TPLINK_FLASHLAYOUT := 4MLmtk
+  TPLINK_HWID := 0x08410014
+  TPLINK_HWREVADD := 0x14
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 64k | $$(IMAGE/factory.bin)
+  DEFAULT := n
+endef
+TARGET_DEVICES += tplink_tl-wr841n-v14
+
 define Device/tplink_tl-wr842n-v5
-  $(Device/tplink)
-  DTS := TL-WR842NV5
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WR842N v5
+  DEVICE_MODEL := TL-WR842N
+  DEVICE_VARIANT := v5
   TPLINK_FLASHLAYOUT := 8Mmtk
   TPLINK_HWID := 0x08420005
   TPLINK_HWREV := 0x5
   TPLINK_HWREVADD := 0x5
-  TPLINK_HVERSION := 3
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
 endef
 TARGET_DEVICES += tplink_tl-wr842n-v5
 
+define Device/tplink_tl-wr850n-v2
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 7808k
+  DEVICE_MODEL := TL-WR850N
+  DEVICE_VARIANT := v2
+  TPLINK_FLASHLAYOUT := 8Mmtk
+  TPLINK_HWID := 0x08500002
+  TPLINK_HWREVADD := 0x2
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
+endef
+TARGET_DEVICES += tplink_tl-wr850n-v2
+
 define Device/tplink_tl-wr902ac-v3
-  $(Device/tplink)
-  DTS := TL-WR902ACV3
+  $(Device/tplink-v2)
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := TP-Link TL-WR902AC v3
+  DEVICE_MODEL := TL-WR902AC
+  DEVICE_VARIANT := v3
   TPLINK_FLASHLAYOUT := 8Mmtk
   TPLINK_HWID := 0x000dc88f
   TPLINK_HWREV := 0x89
   TPLINK_HWREVADD := 0x1
-  TPLINK_HVERSION := 3
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
+  IMAGES := sysupgrade.bin tftp-recovery.bin
+  IMAGE/tftp-recovery.bin := pad-extra 128k | $$(IMAGE/factory.bin)
 endef
 TARGET_DEVICES += tplink_tl-wr902ac-v3
 
-define Device/u7628-01-128M-16M
-  DTS := U7628-01-128M-16M
+define Device/unielec_u7628-01-16m
   IMAGE_SIZE := 16064k
-  DEVICE_TITLE := UniElec U7628-01 (128M RAM/16M flash)
+  DEVICE_VENDOR := UniElec
+  DEVICE_MODEL := U7628-01
+  DEVICE_VARIANT := 16M
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += u7628-01-128M-16M unielec,u7628-01-128m-16m
 endef
-TARGET_DEVICES += u7628-01-128M-16M
+TARGET_DEVICES += unielec_u7628-01-16m
 
-define Device/vocore2
-  DTS := VOCORE2
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := VoCore VoCore2
+define Device/vocore_vocore2
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := VoCore
+  DEVICE_MODEL := VoCore2
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
-    kmod-sdhci-mt7620
+	kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += vocore2
 endef
-TARGET_DEVICES += vocore2
+TARGET_DEVICES += vocore_vocore2
 
-define Device/vocore2lite
-  DTS := VOCORE2LITE
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := VoCore VoCore2-Lite
+define Device/vocore_vocore2-lite
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := VoCore
+  DEVICE_MODEL := VoCore2-Lite
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
-    kmod-sdhci-mt7620
+	kmod-sdhci-mt7620
+  SUPPORTED_DEVICES += vocore2lite
 endef
-TARGET_DEVICES += vocore2lite
+TARGET_DEVICES += vocore_vocore2-lite
 
 define Device/wavlink_wl-wn570ha1
-  DTS := WL-WN570HA1
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := Wavlink WL-WN570HA1
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN570HA1
   DEVICE_PACKAGES := kmod-mt76x0e
 endef
 TARGET_DEVICES += wavlink_wl-wn570ha1
 
 define Device/wavlink_wl-wn575a3
-  DTS := WL-WN575A3
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := Wavlink WL-WN575A3
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN575A3
   DEVICE_PACKAGES := kmod-mt76x2
   SUPPORTED_DEVICES += wl-wn575a3
 endef
 TARGET_DEVICES += wavlink_wl-wn575a3
 
-define Device/wcr-1166ds
-  DTS := WCR-1166DS
-  BUFFALO_TAG_PLATFORM := MTK
-  BUFFALO_TAG_VERSION := 9.99
-  BUFFALO_TAG_MINOR := 9.99
-  IMAGES += factory.bin
-  IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata
-  IMAGE/factory.bin := \
-	trx -M 0x746f435c | pad-rootfs | append-metadata | \
-	buffalo-enc WCR-1166DS $$(BUFFALO_TAG_VERSION) -l | \
-	buffalo-tag-dhp WCR-1166DS JP JP | buffalo-enc-tag -l | \
-	buffalo-dhp-image
-  DEVICE_TITLE := Buffalo WCR-1166DS
-  DEVICE_PACKAGES := kmod-mt76x2
+define Device/wavlink_wl-wn577a2
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN577A2
+  DEVICE_ALT0_VENDOR := Maginon
+  DEVICE_ALT0_MODEL := WLR-755
+  DEVICE_PACKAGES := kmod-mt76x0e
 endef
-TARGET_DEVICES += wcr-1166ds
+TARGET_DEVICES += wavlink_wl-wn577a2
 
 define Device/widora_neo-16m
-  DTS := WIDORA-NEO-16M
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := Widora-NEO (16M)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Widora
+  DEVICE_MODEL := Widora-NEO
+  DEVICE_VARIANT := 16M
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
   SUPPORTED_DEVICES += widora-neo
 endef
 TARGET_DEVICES += widora_neo-16m
 
 define Device/widora_neo-32m
-  DTS := WIDORA-NEO-32M
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := Widora-NEO (32M)
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := Widora
+  DEVICE_MODEL := Widora-NEO
+  DEVICE_VARIANT := 32M
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += widora_neo-32m
 
 define Device/wiznet_wizfi630s
-  DTS := WIZFI630S
-  IMAGE_SIZE := $(ralink_default_fw_size_32M)
-  DEVICE_TITLE := WIZnet WizFi630S
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := WIZnet
+  DEVICE_MODEL := WizFi630S
+  SUPPORTED_DEVICES += wizfi630s
 endef
 TARGET_DEVICES += wiznet_wizfi630s
 
-define Device/wrtnode2p
-  DTS := WRTNODE2P
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := WRTnode 2P
+define Device/wrtnode_wrtnode2p
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := WRTnode
+  DEVICE_MODEL := WRTnode 2P
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += wrtnode2p
 endef
-TARGET_DEVICES += wrtnode2p
+TARGET_DEVICES += wrtnode_wrtnode2p
 
-define Device/wrtnode2r
-  DTS := WRTNODE2R
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := WRTnode 2R
+define Device/wrtnode_wrtnode2r
+  IMAGE_SIZE := 32448k
+  DEVICE_VENDOR := WRTnode
+  DEVICE_MODEL := WRTnode 2R
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci
+  SUPPORTED_DEVICES += wrtnode2r
 endef
-TARGET_DEVICES += wrtnode2r
+TARGET_DEVICES += wrtnode_wrtnode2r
 
-define Device/xiaomi_mir4a-100m
-  DTS := XIAOMI-MIR4A-100M
+define Device/xiaomi_mi-router-4a-100m
   IMAGE_SIZE := 14976k
-  DEVICE_TITLE := Xiaomi Mi Router 4A (100M Edition)
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 4A
+  DEVICE_VARIANT := 100M Edition
   DEVICE_PACKAGES := kmod-mt76x2
+  SUPPORTED_DEVICES += xiaomi,mir4a-100m
 endef
-TARGET_DEVICES += xiaomi_mir4a-100m
+TARGET_DEVICES += xiaomi_mi-router-4a-100m
+
+define Device/xiaomi_mi-router-4c
+  IMAGE_SIZE := 14976k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 4C
+  DEVICE_PACKAGES := uboot-envtools
+endef
+TARGET_DEVICES += xiaomi_mi-router-4c
+
+define Device/xiaomi_miwifi-nano
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := MiWiFi Nano
+  DEVICE_PACKAGES := uboot-envtools
+  SUPPORTED_DEVICES += miwifi-nano
+endef
+TARGET_DEVICES += xiaomi_miwifi-nano
 
 define Device/zbtlink_zbt-we1226
-  DTS := ZBT-WE1226
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := ZBTlink ZBT-WE1226
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Zbtlink
+  DEVICE_MODEL := ZBT-WE1226
 endef
 TARGET_DEVICES += zbtlink_zbt-we1226
 
 define Device/zyxel_keenetic-extra-ii
-  DTS := ki_rb
   IMAGE_SIZE := 14912k
   BLOCKSIZE := 64k
-  DEVICE_TITLE := ZyXEL Keenetic Extra II
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Extra II
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport
   IMAGES += factory.bin
   IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to $$$$(BLOCKSIZE) | \
-	check-size $$$$(IMAGE_SIZE) | zyimage -d 6162 -v "ZyXEL Keenetic Extra II"
+	check-size | zyimage -d 6162 -v "ZyXEL Keenetic Extra II"
 endef
 TARGET_DEVICES += zyxel_keenetic-extra-ii
diff --git a/iopsys-ramips/image/rt288x.mk b/iopsys-ramips/image/rt288x.mk
index c7f7d064fff42c46fac8cf8de6e2ae53b1f02a58..eff5a22030c2ff84ad135eaad2adedec174c2f7d 100644
--- a/iopsys-ramips/image/rt288x.mk
+++ b/iopsys-ramips/image/rt288x.mk
@@ -2,6 +2,8 @@
 # RT288X Profiles
 #
 
+DEFAULT_SOC := rt2880
+
 define Build/gemtek-header
 	if [ -f $@ ]; then \
 		mkheader_gemtek $@ $@.new $(1) && \
@@ -9,83 +11,98 @@ define Build/gemtek-header
 	fi
 endef
 
-define Device/ar670w
-  DTS := AR670W
+define Device/airlink101_ar670w
   BLOCKSIZE := 64k
-  DEVICE_TITLE := Airlink AR670W
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
+  DEVICE_VENDOR := Airlink
+  DEVICE_MODEL := AR670W
+  IMAGE_SIZE := 3840k
   KERNEL := $(KERNEL_DTB) | pad-to $$(BLOCKSIZE)
   IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
 	wrg-header wrgn16a_airlink_ar670w
+  SUPPORTED_DEVICES += ar670w
+  DEFAULT := n
 endef
-TARGET_DEVICES += ar670w
+TARGET_DEVICES += airlink101_ar670w
 
-define Device/ar725w
-  DTS := AR725W
-  DEVICE_TITLE := Airlink AR725W
+define Device/airlink101_ar725w
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Airlink
+  DEVICE_MODEL := AR725W
   IMAGES += factory.bin
   IMAGE/factory.bin := $$(sysupgrade_bin) | check-size 3328k | \
 	gemtek-header ar725w
+  SUPPORTED_DEVICES += ar725w
+  DEFAULT := n
 endef
-TARGET_DEVICES += ar725w
+TARGET_DEVICES += airlink101_ar725w
 
-define Device/dlink_dap-1522-a1
-  DTS := DAP-1522-A1
+define Device/asus_rt-n15
   BLOCKSIZE := 64k
-  IMAGE_SIZE := 3801088
-  DEVICE_TITLE := D-Link DAP-1522 A1
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N15
   DEVICE_PACKAGES := kmod-switch-rtl8366s
-  KERNEL := $(KERNEL_DTB)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	append-kernel | pad-offset $$$$(BLOCKSIZE) 96 | \
-	append-rootfs | pad-rootfs -x 96 | \
-	wrg-header wapnd01_dlink_dap1522 | \
-	check-size $$$$(IMAGE_SIZE)
+  SUPPORTED_DEVICES += rt-n15
+  DEFAULT := n
 endef
-TARGET_DEVICES += dlink_dap-1522-a1
+TARGET_DEVICES += asus_rt-n15
 
-define Device/f5d8235-v1
-  DTS := F5D8235_V1
-  IMAGE_SIZE := 7744k
-  DEVICE_TITLE := Belkin F5D8235 V1
-  DEVICE_PACKAGES := kmod-switch-rtl8366s kmod-usb-core kmod-usb-ohci \
-    kmod-usb-ohci-pci kmod-usb2 kmod-usb2-pci kmod-usb-ledtrig-usbport
+define Device/belkin_f5d8235-v1
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Belkin
+  DEVICE_MODEL := F5D8235
+  DEVICE_VARIANT := V1
+  DEVICE_PACKAGES := kmod-switch-rtl8366s kmod-usb-ohci kmod-usb-ohci-pci \
+	kmod-usb2 kmod-usb2-pci kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += f5d8235-v1
 endef
-TARGET_DEVICES += f5d8235-v1
+TARGET_DEVICES += belkin_f5d8235-v1
 
-define Device/rt-n15
-  DTS := RT-N15
+define Device/buffalo_wli-tx4-ag300n
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Asus RT-N15
-  DEVICE_PACKAGES := kmod-switch-rtl8366s
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WLI-TX4-AG300N
+  DEVICE_PACKAGES := kmod-switch-ip17xx
+  SUPPORTED_DEVICES += wli-tx4-ag300n
+  DEFAULT := n
 endef
-TARGET_DEVICES += rt-n15
+TARGET_DEVICES += buffalo_wli-tx4-ag300n
 
-define Device/v11st-fe
-  DTS := V11STFE
+define Device/buffalo_wzr-agl300nh
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Ralink V11ST-FE
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WZR-AGL300NH
+  DEVICE_PACKAGES := kmod-switch-rtl8366s
+  SUPPORTED_DEVICES += wzr-agl300nh
+  DEFAULT := n
 endef
-TARGET_DEVICES += v11st-fe
+TARGET_DEVICES += buffalo_wzr-agl300nh
 
-define Device/wli-tx4-ag300n
-  DTS := WLI-TX4-AG300N
+define Device/dlink_dap-1522-a1
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Buffalo WLI-TX4-AG300N
-  DEVICE_PACKAGES := kmod-switch-ip17xx
+  IMAGE_SIZE := 3712k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DAP-1522
+  DEVICE_VARIANT := A1
+  DEVICE_PACKAGES := kmod-switch-rtl8366s
+  KERNEL := $(KERNEL_DTB)
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-kernel | pad-offset $$$$(BLOCKSIZE) 96 | \
+	append-rootfs | pad-rootfs -x 96 | wrg-header wapnd01_dlink_dap1522 | \
+	check-size
+  DEFAULT := n
 endef
-TARGET_DEVICES += wli-tx4-ag300n
+TARGET_DEVICES += dlink_dap-1522-a1
 
-define Device/wzr-agl300nh
-  DTS := WZR-AGL300NH
+define Device/ralink_v11st-fe
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Buffalo WZR-AGL300NH
-  DEVICE_PACKAGES := kmod-switch-rtl8366s
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Ralink
+  DEVICE_MODEL := V11ST-FE
+  SUPPORTED_DEVICES += v11st-fe
+  DEFAULT := n
 endef
-TARGET_DEVICES += wzr-agl300nh
+TARGET_DEVICES += ralink_v11st-fe
diff --git a/iopsys-ramips/image/rt305x.mk b/iopsys-ramips/image/rt305x.mk
index f59a74894932fd31d4f7bb283c69160f1e4ab6b0..210ae2f8b74e58b1746bdf0359ceb554e7218cac 100644
--- a/iopsys-ramips/image/rt305x.mk
+++ b/iopsys-ramips/image/rt305x.mk
@@ -2,13 +2,13 @@
 # RT305X Profiles
 #
 define Build/buffalo-tftp-header
-  ( \
-    echo -n -e "# Airstation FirmWare\nrun u_fw\nreset\n\n" | \
-      dd bs=512 count=1 conv=sync; \
-    dd if=$@; \
-  ) > $@.tmp && \
-  $(STAGING_DIR_HOST)/bin/buffalo-tftp -i $@.tmp -o $@.new
-  mv $@.new $@
+	( \
+		echo -n -e "# Airstation FirmWare\nrun u_fw\nreset\n\n" | \
+			dd bs=512 count=1 conv=sync; \
+		dd if=$@; \
+	) > $@.tmp && \
+	$(STAGING_DIR_HOST)/bin/buffalo-tftp -i $@.tmp -o $@.new
+	mv $@.new $@
 endef
 
 define Build/dap-header
@@ -21,297 +21,459 @@ define Build/hilink-header
 	mv $@.new $@
 endef
 
-
-define Device/3g150b
-  DTS := 3G150B
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  UIMAGE_NAME:= Linux Kernel Image
-  DEVICE_TITLE := Tenda 3G150B
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
-endef
-TARGET_DEVICES += 3g150b
-
-define Device/3g300m
-  DTS := 3G300M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  UIMAGE_NAME := 3G150M_SPI Kernel Image
-  DEVICE_TITLE := Tenda 3G300M
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+define Device/7links_px-4885-4m
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := 7Links
+  DEVICE_MODEL := PX-4885
+  DEVICE_VARIANT := 4M
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport kmod-leds-gpio
+  SUPPORTED_DEVICES += px-4885-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += 3g300m
+TARGET_DEVICES += 7links_px-4885-4m
 
-define Device/3g-6200n
-  DTS := 3G-6200N
-  IMAGE_SIZE := 3648k
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
-	edimax-header -s CSYS -m 3G62 -f 0x50000 -S 0x01100000 | pad-rootfs | \
-	append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := Edimax 3g-6200n
+define Device/7links_px-4885-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := 7Links
+  DEVICE_MODEL := PX-4885
+  DEVICE_VARIANT := 8M
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb2 kmod-usb-ohci \
+	kmod-usb-ledtrig-usbport kmod-leds-gpio
+  SUPPORTED_DEVICES += px-4885-8M
 endef
-TARGET_DEVICES += 3g-6200n
+TARGET_DEVICES += 7links_px-4885-8m
 
-define Device/3g-6200nl
-  DTS := 3G-6200NL
-  IMAGE_SIZE := 3648k
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
-	edimax-header -s CSYS -m 3G62 -f 0x50000 -S 0x01100000 | pad-rootfs | \
-	append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := Edimax 3g-6200nl
+define Device/8devices_carambola
+  SOC := rt3050
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := 8devices
+  DEVICE_MODEL := Carambola
+  DEVICE_PACKAGES :=
+  SUPPORTED_DEVICES += carambola
 endef
-TARGET_DEVICES += 3g-6200nl
+TARGET_DEVICES += 8devices_carambola
 
-define Device/a5-v11
-  DTS := A5-V11
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B A5-V11 -F 4M
-  DEVICE_TITLE := A5-V11
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2
-  DEFAULT := n
+define Device/accton_wr6202
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Accton
+  DEVICE_MODEL := WR6202
+  SUPPORTED_DEVICES += wr6202
 endef
-TARGET_DEVICES += a5-v11
+TARGET_DEVICES += accton_wr6202
 
-define Device/air3gii
-  DTS := AIR3GII
+define Device/airlive_air3gii
+  SOC := rt5350
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := AirLive Air3GII
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := AirLive
+  DEVICE_MODEL := Air3GII
+  SUPPORTED_DEVICES += air3gii
+  DEFAULT := n
 endef
-TARGET_DEVICES += air3gii
+TARGET_DEVICES += airlive_air3gii
 
-define Device/all0256n-4M
-  DTS := ALL0256N-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Allnet ALL0256N (4MB)
+define Device/alfa-network_w502u
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ALFA
+  DEVICE_MODEL := Networks W502U
+  SUPPORTED_DEVICES += w502u
+endef
+TARGET_DEVICES += alfa-network_w502u
+
+define Device/allnet_all0256n-4m
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Allnet
+  DEVICE_MODEL := ALL0256N
+  DEVICE_VARIANT := 4M
   DEVICE_PACKAGES := rssileds
+  SUPPORTED_DEVICES += all0256n-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += all0256n-4M
+TARGET_DEVICES += allnet_all0256n-4m
 
-define Device/all0256n-8M
-  DTS := ALL0256N-8M
-  DEVICE_TITLE := Allnet ALL0256N (8MB)
+define Device/allnet_all0256n-8m
+  SOC := rt3050
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Allnet
+  DEVICE_MODEL := ALL0256N
+  DEVICE_VARIANT := 8M
   DEVICE_PACKAGES := rssileds
+  SUPPORTED_DEVICES += all0256n-8M
 endef
-TARGET_DEVICES += all0256n-8M
+TARGET_DEVICES += allnet_all0256n-8m
 
-define Device/all5002
-  DTS := ALL5002
+define Device/allnet_all5002
+  SOC := rt3352
   IMAGE_SIZE := 32448k
-  DEVICE_TITLE := Allnet ALL5002
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
-          kmod-i2c-core kmod-i2c-gpio kmod-hwmon-lm92 kmod-gpio-pcf857x
+  DEVICE_VENDOR := Allnet
+  DEVICE_MODEL := ALL5002
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
+	kmod-i2c-gpio kmod-hwmon-lm92 kmod-gpio-pcf857x
+  SUPPORTED_DEVICES += all5002
 endef
-TARGET_DEVICES += all5002
+TARGET_DEVICES += allnet_all5002
 
-define Device/all5003
-  DTS := ALL5003
+define Device/allnet_all5003
+  SOC := rt5350
   IMAGE_SIZE := 32448k
-  DEVICE_TITLE := Allnet ALL5003
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
-          kmod-i2c-core kmod-i2c-gpio kmod-hwmon-lm92 kmod-gpio-pcf857x
+  DEVICE_VENDOR := Allnet
+  DEVICE_MODEL := ALL5003
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
+	kmod-i2c-gpio kmod-hwmon-lm92 kmod-gpio-pcf857x
+  SUPPORTED_DEVICES += all5003
+endef
+TARGET_DEVICES += allnet_all5003
+
+define Device/alphanetworks_asl26555-16m
+  SOC := rt3050
+  IMAGE_SIZE := 15872k
+  DEVICE_VENDOR := Alpha
+  DEVICE_MODEL := ASL26555
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += asl26555 asl26555-16M
 endef
-TARGET_DEVICES += all5003
+TARGET_DEVICES += alphanetworks_asl26555-16m
 
-define Device/asl26555-8M
-  DTS := ASL26555-8M
+define Device/alphanetworks_asl26555-8m
+  SOC := rt3050
   IMAGE_SIZE := 7744k
-  SUPPORTED_DEVICES += asl26555
-  DEVICE_TITLE := Alpha ASL26555 
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  DEVICE_VENDOR := Alpha
+  DEVICE_MODEL := ASL26555
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += asl26555 asl26555-8M
 endef
-TARGET_DEVICES += asl26555-8M
+TARGET_DEVICES += alphanetworks_asl26555-8m
 
-define Device/asl26555-16M
-  DTS := ASL26555-16M
-  IMAGE_SIZE := 15872k
-  SUPPORTED_DEVICES += asl26555
-  DEVICE_TITLE := Alpha ASL26555 16M
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+define Device/arcwireless_freestation5
+  SOC := rt3050
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ARC Wireless
+  DEVICE_MODEL := FreeStation
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-rt2500-usb kmod-rt2800-usb \
+	kmod-rt2x00-usb
+  SUPPORTED_DEVICES += freestation5
 endef
-TARGET_DEVICES += asl26555-16M
+TARGET_DEVICES += arcwireless_freestation5
 
-define Device/atp-52b
-  DTS := ATP-52B
+define Device/argus_atp-52b
+  SOC := rt3052
   IMAGE_SIZE := 7808k
-  DEVICE_TITLE := Argus ATP-52B
+  DEVICE_VENDOR := Argus
+  DEVICE_MODEL := ATP-52B
+  SUPPORTED_DEVICES += atp-52b
+endef
+TARGET_DEVICES += argus_atp-52b
+
+define Device/asiarf_awapn2403
+  SOC := rt3052
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := AsiaRF
+  DEVICE_MODEL := AWAPN2403
+  SUPPORTED_DEVICES += awapn2403
+  DEFAULT := n
 endef
-TARGET_DEVICES += atp-52b
+TARGET_DEVICES += asiarf_awapn2403
 
-define Device/awm002-evb-4M
-  DTS := AWM002-EVB-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := AsiaRF AWM002-EVB (4M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-gpio
+define Device/asiarf_awm002-evb-4m
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := AsiaRF
+  DEVICE_MODEL := AWM002-EVB
+  DEVICE_VARIANT := 4M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-gpio
+  SUPPORTED_DEVICES += awm002-evb-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += awm002-evb-4M
+TARGET_DEVICES += asiarf_awm002-evb-4m
 
-define Device/awm002-evb-8M
-  DTS := AWM002-EVB-8M
-  DEVICE_TITLE := AsiaRF AWM002-EVB (8M)/AsiaRF AWM003 EVB
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-gpio
+define Device/asiarf_awm002-evb-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := AsiaRF
+  DEVICE_MODEL := AWM002-EVB/AWM003-EVB
+  DEVICE_VARIANT := 8M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-gpio
+  SUPPORTED_DEVICES += awm002-evb-8M
 endef
-TARGET_DEVICES += awm002-evb-8M
+TARGET_DEVICES += asiarf_awm002-evb-8m
 
-define Device/awapn2403
-  DTS := AWAPN2403
+define Device/asus_rt-g32-b1
+  SOC := rt3050
   BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := AsiaRF AWAPN2403
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-G32
+  DEVICE_VARIANT := B1
+  SUPPORTED_DEVICES += rt-g32-b1
+  DEFAULT := n
 endef
-TARGET_DEVICES += awapn2403
+TARGET_DEVICES += asus_rt-g32-b1
 
-define Device/bc2
-  DTS := BC2
-  DEVICE_TITLE := NexAira BC2
+define Device/asus_rt-n10-plus
+  SOC := rt3050
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N10+
+  SUPPORTED_DEVICES += rt-n10-plus
+  DEFAULT := n
 endef
-TARGET_DEVICES += bc2
+TARGET_DEVICES += asus_rt-n10-plus
 
-define Device/broadway
-  DTS := BROADWAY
-  IMAGE_SIZE := 7744k
-  UIMAGE_NAME:= Broadway Kernel Image
-  DEVICE_TITLE := Hauppauge Broadway
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+define Device/asus_rt-n13u
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N13U
+  DEVICE_PACKAGES := kmod-leds-gpio kmod-rt2800-pci kmod-usb-dwc2
+  SUPPORTED_DEVICES += rt-n13u
+endef
+TARGET_DEVICES += asus_rt-n13u
+
+define Device/asus_wl-330n
+  SOC := rt3050
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := WL-330N
+  SUPPORTED_DEVICES += wl-330n
+  DEFAULT := n
 endef
-TARGET_DEVICES += broadway
+TARGET_DEVICES += asus_wl-330n
 
-define Device/carambola
-  DTS := CARAMBOLA
-  DEVICE_TITLE := 8devices Carambola
+define Device/asus_wl-330n3g
+  SOC := rt3050
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := WL-330N3G
   DEVICE_PACKAGES :=
+  SUPPORTED_DEVICES += wl-330n3g
+  DEFAULT := n
 endef
-TARGET_DEVICES += carambola
+TARGET_DEVICES += asus_wl-330n3g
 
-define Device/d105
-  DTS := D105
+define Device/aximcom_mr-102n
+  SOC := rt3052
+  IMAGE_SIZE := 7744k
+  DEVICE_VENDOR := AXIMCom
+  DEVICE_MODEL := MR-102N
+  SUPPORTED_DEVICES += mr-102n
+endef
+TARGET_DEVICES += aximcom_mr-102n
+
+define Device/aztech_hw550-3g
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Aztech
+  DEVICE_MODEL := HW550-3G
+  DEVICE_ALT0_VENDOR := Allnet
+  DEVICE_ALT0_MODEL := ALL0239-3G
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += hw550-3g
+endef
+TARGET_DEVICES += aztech_hw550-3g
+
+define Device/belkin_f5d8235-v2
+  SOC := rt3052
+  IMAGE_SIZE := 7744k
+  DEVICE_VENDOR := Belkin
+  DEVICE_MODEL := F5D8235
+  DEVICE_VARIANT := v2
+  DEVICE_PACKAGES := kmod-switch-rtl8366rb
+  SUPPORTED_DEVICES += f5d8235-v2
+endef
+TARGET_DEVICES += belkin_f5d8235-v2
+
+define Device/belkin_f7c027
+  SOC := rt5350
+  IMAGE_SIZE := 7616k
+  DEVICE_VENDOR := Belkin
+  DEVICE_MODEL := F7C027
+  SUPPORTED_DEVICES += f7c027
+endef
+TARGET_DEVICES += belkin_f7c027
+
+define Device/buffalo_whr-g300n
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Huawei D105
+  IMAGE_SIZE := 3712k
+  DEVICE_VENDOR := Buffalo
+  DEVICE_MODEL := WHR-G300N
+  IMAGES += tftp.bin
+  IMAGE/tftp.bin := $$(sysupgrade_bin) | check-size | buffalo-tftp-header
+  SUPPORTED_DEVICES += whr-g300n
+  DEFAULT := n
 endef
-TARGET_DEVICES += d105
+TARGET_DEVICES += buffalo_whr-g300n
 
-define Device/dap-1350
-  DTS := DAP-1350
+define Device/dlink_dap-1350
+  SOC := rt3052
   IMAGES += factory.bin factory-NA.bin
   IMAGE_SIZE := 7488k
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
 	dap-header -s RT3052-AP-DAP1350WW-3
-  IMAGE/factory-NA.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
+  IMAGE/factory-NA.bin := $$(sysupgrade_bin) | check-size | \
 	dap-header -s RT3052-AP-DAP1350-3
-  DEVICE_TITLE := D-Link DAP-1350
-endef
-TARGET_DEVICES += dap-1350
-
-define Device/dcs-930
-  DTS := DCS-930
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := D-Link DCS-930
-  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc kmod-sound-core kmod-usb-audio kmod-usb-core kmod-usb-dwc2
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DAP-1350
+  SUPPORTED_DEVICES += dap-1350
+endef
+TARGET_DEVICES += dlink_dap-1350
+
+define Device/dlink_dcs-930
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DCS-930
+  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc kmod-sound-core \
+	kmod-usb-audio kmod-usb-dwc2
+  SUPPORTED_DEVICES += dcs-930
+  DEFAULT := n
 endef
-TARGET_DEVICES += dcs-930
-
-define Device/dcs-930l-b1
-  DTS := DCS-930L-B1
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := D-Link DCS-930L B1
-  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc kmod-sound-core kmod-usb-audio kmod-usb-core kmod-usb-ohci kmod-usb2
+TARGET_DEVICES += dlink_dcs-930
+
+define Device/dlink_dcs-930l-b1
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DCS-930L
+  DEVICE_VARIANT := B1
+  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc kmod-sound-core \
+	kmod-usb-audio kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += dcs-930l-b1
+  DEFAULT := n
 endef
-TARGET_DEVICES += dcs-930l-b1
+TARGET_DEVICES += dlink_dcs-930l-b1
 
-define Device/dir-300-b1
-  DTS := DIR-300-B1
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
+define Device/dlink_dir-300-b1
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | wrg-header wrgn23_dlwbr_dir300b
-  DEVICE_TITLE := D-Link DIR-300 B1
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	wrg-header wrgn23_dlwbr_dir300b
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-300
+  DEVICE_VARIANT := B1
+  SUPPORTED_DEVICES += dir-300-b1
   DEFAULT := n
 endef
-TARGET_DEVICES += dir-300-b1
+TARGET_DEVICES += dlink_dir-300-b1
 
-define Device/dir-300-b7
-  DTS := DIR-300-B7
+define Device/dlink_dir-300-b7
+  SOC := rt5350
   BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := D-Link DIR-300 B7
-  DEFAULT := n
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-300
+  DEVICE_VARIANT := B7
+  SUPPORTED_DEVICES += dir-300-b7
 endef
-TARGET_DEVICES += dir-300-b7
+TARGET_DEVICES += dlink_dir-300-b7
 
-define Device/dir-320-b1
-  DTS := DIR-320-B1
-  DEVICE_TITLE := D-Link DIR-320 B1
+define Device/dlink_dir-320-b1
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-320
+  DEVICE_VARIANT := B1
+  SUPPORTED_DEVICES += dir-320-b1
 endef
-TARGET_DEVICES += dir-320-b1
+TARGET_DEVICES += dlink_dir-320-b1
 
-define Device/dir-600-b1
-  DTS := DIR-600-B1
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  SUPPORTED_DEVICES := dir-600-b1 dir-600-b2
+define Device/dlink_dir-600-b1
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | wrg-header wrgn23_dlwbr_dir600b
-  DEVICE_TITLE := D-Link DIR-600 B1/B2
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	wrg-header wrgn23_dlwbr_dir600b
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-600
+  DEVICE_VARIANT := B1/B2
+  SUPPORTED_DEVICES += dir-600-b1 dir-600-b2
+  DEFAULT := n
 endef
-TARGET_DEVICES += dir-600-b1
+TARGET_DEVICES += dlink_dir-600-b1
 
-define Device/dir-610-a1
+define Device/dlink_dir-610-a1
   $(Device/seama)
-  DTS := DIR-610-A1
+  SOC := rt5350
   BLOCKSIZE := 4k
   SEAMA_SIGNATURE := wrgn59_dlob.hans_dir610
   KERNEL := $(KERNEL_DTB)
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := D-Link DIR-610 A1 
-  DEVICE_PACKAGES := kmod-ledtrig-netdev kmod-ledtrig-timer
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-610
+  DEVICE_VARIANT := A1
+  SUPPORTED_DEVICES += dir-610-a1
+  DEFAULT := n
 endef
-TARGET_DEVICES += dir-610-a1
+TARGET_DEVICES += dlink_dir-610-a1
 
-define Device/dir-615-d
-  DTS := DIR-615-D
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
+define Device/dlink_dir-615-d
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | wrg-header wrgn23_dlwbr_dir615d
-  DEVICE_TITLE := D-Link DIR-615 D
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	wrg-header wrgn23_dlwbr_dir615d
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-615
+  DEVICE_VARIANT := D
+  SUPPORTED_DEVICES += dir-615-d
+  DEFAULT := n
 endef
-TARGET_DEVICES += dir-615-d
+TARGET_DEVICES += dlink_dir-615-d
 
-
-define Device/dir-615-h1
-  DTS := DIR-615-H1
+define Device/dlink_dir-615-h1
+  SOC := rt3352
   BLOCKSIZE := 4k
   IMAGES += factory.bin
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | senao-header -r 0x218 -p 0x30 -t 3
-  DEVICE_TITLE := D-Link DIR-615 H1
-endef
-TARGET_DEVICES += dir-615-h1
-
-define Device/dir-620-a1
-  DTS := DIR-620-A1
-  DEVICE_TITLE := D-Link DIR-620 A1
+  IMAGE_SIZE := 3776k
+  IMAGE/factory.bin := $$(sysupgrade_bin) | senao-header -r 0x218 -p 0x30 -t 3
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-615
+  DEVICE_VARIANT := H1
+  SUPPORTED_DEVICES += dir-615-h1
+  DEFAULT := n
 endef
-TARGET_DEVICES += dir-620-a1
+TARGET_DEVICES += dlink_dir-615-h1
 
-define Device/dir-620-d1
-  DTS := DIR-620-D1
-  DEVICE_TITLE := D-Link DIR-620 D1
+define Device/dlink_dir-620-a1
+  SOC := rt3050
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-620
+  DEVICE_VARIANT := A1
+  SUPPORTED_DEVICES += dir-620-a1
 endef
-TARGET_DEVICES += dir-620-d1
+TARGET_DEVICES += dlink_dir-620-a1
 
-define Device/dwr-512-b
-  DTS := DWR-512-B
-  IMAGE_SIZE := 7800k
-  DEVICE_TITLE := D-Link DWR-512 B
+define Device/dlink_dir-620-d1
+  SOC := rt3352
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-620
+  DEVICE_VARIANT := D1
+  SUPPORTED_DEVICES += dir-620-d1
+endef
+TARGET_DEVICES += dlink_dir-620-d1
+
+define Device/dlink_dwr-512-b
+  SOC := rt5350
+  IMAGE_SIZE := 8064k
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DWR-512
+  DEVICE_VARIANT := B
   DEVICE_PACKAGES := jboot-tools kmod-usb2 kmod-spi-dev kmod-usb-serial \
-			kmod-usb-serial-option kmod-usb-net kmod-usb-net-cdc-ether \
-			comgt-ncm
+	kmod-usb-serial-option kmod-usb-net-cdc-ether comgt-ncm
   DLINK_ROM_ID := DLK6E2412001
   DLINK_FAMILY_MEMBER := 0x6E24
   DLINK_FIRMWARE_SIZE := 0x7E0000
@@ -319,609 +481,756 @@ define Device/dwr-512-b
   IMAGES += factory.bin
   IMAGE/sysupgrade.bin := mkdlinkfw | pad-rootfs | append-metadata
   IMAGE/factory.bin := mkdlinkfw | pad-rootfs | mkdlinkfw-factory
+  SUPPORTED_DEVICES += dwr-512-b
 endef
-TARGET_DEVICES += dwr-512-b
+TARGET_DEVICES += dlink_dwr-512-b
 
-define Device/esr-9753
-  DTS := ESR-9753
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := EnGenius ESR-9753
+define Device/easyacc_wizard-8800
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  UIMAGE_NAME:= Linux Kernel Image
+  DEVICE_VENDOR := EasyAcc
+  DEVICE_MODEL := WIZARD 8800
+  SUPPORTED_DEVICES += wizard8800
 endef
-TARGET_DEVICES += esr-9753
+TARGET_DEVICES += easyacc_wizard-8800
 
-define Device/f5d8235-v2
-  DTS := F5D8235_V2
-  IMAGE_SIZE := 7744k
-  DEVICE_TITLE := Belkin F5D8235 v2
-  DEVICE_PACKAGES := kmod-switch-rtl8366rb
+define Device/edimax_3g-6200n
+  SOC := rt3050
+  IMAGE_SIZE := 3648k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m 3G62 -f 0x50000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := 3g-6200n
+  SUPPORTED_DEVICES += 3g-6200n
+  DEFAULT := n
 endef
-TARGET_DEVICES += f5d8235-v2
+TARGET_DEVICES += edimax_3g-6200n
 
-define Device/f7c027
-  DTS := F7C027
-  IMAGE_SIZE := 7616k
-  DEVICE_TITLE := Belkin F7C027
-  DEVICE_PACKAGES := -kmod-usb-core -kmod-usb-dwc2 -kmod-usb-ledtrig-usbport
+define Device/edimax_3g-6200nl
+  SOC := rt3050
+  IMAGE_SIZE := 3648k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m 3G62 -f 0x50000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := 3g-6200nl
+  SUPPORTED_DEVICES += 3g-6200nl
+  DEFAULT := n
 endef
-TARGET_DEVICES += f7c027
+TARGET_DEVICES += edimax_3g-6200nl
 
-define Device/fonera20n
-  DTS := FONERA20N
+define Device/engenius_esr-9753
+  SOC := rt3052
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := EnGenius
+  DEVICE_MODEL := ESR-9753
+  SUPPORTED_DEVICES += esr-9753
+  DEFAULT := n
+endef
+TARGET_DEVICES += engenius_esr-9753
+
+define Device/fon_fonera-20n
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
   IMAGES += factory.bin
   IMAGE/factory.bin := $$(sysupgrade_bin) | \
 	edimax-header -s RSDK -m NL1T -f 0x50000 -S 0xc0000
-  DEVICE_TITLE := Fonera 2.0N
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
-endef
-TARGET_DEVICES += fonera20n
-
-define Device/freestation5
-  DTS := FREESTATION5
-  DEVICE_TITLE := ARC Wireless FreeStation
-  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-rt2500-usb kmod-rt2800-usb kmod-rt2x00-usb
-endef
-TARGET_DEVICES += freestation5
-
-define Device/hg255d
-  DTS := HG255D
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := HuaWei HG255D
+  DEVICE_VENDOR := Fon
+  DEVICE_MODEL := Fonera 2.0N
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += fonera20n
 endef
-TARGET_DEVICES += hg255d
+TARGET_DEVICES += fon_fonera-20n
 
-define Device/hlk-rm04
-  DTS := HLKRM04
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | hilink-header
-  DEVICE_TITLE := Hi-Link HLK-RM04
+define Device/hame_mpr-a1
+  SOC := rt5350
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  UIMAGE_NAME:= Linux Kernel Image
+  DEVICE_VENDOR := HAME
+  DEVICE_MODEL := MPR
+  DEVICE_VARIANT := A1
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += mpr-a1
+  DEFAULT := n
 endef
-TARGET_DEVICES += hlk-rm04
+TARGET_DEVICES += hame_mpr-a1
 
-define Device/ht-tm02
-  DTS := HT-TM02
-  DEVICE_TITLE := HooToo HT-TM02
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport
+define Device/hame_mpr-a2
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  UIMAGE_NAME:= Linux Kernel Image
+  DEVICE_VENDOR := HAME
+  DEVICE_MODEL := MPR
+  DEVICE_VARIANT := A2
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += mpr-a2
 endef
-TARGET_DEVICES += ht-tm02
+TARGET_DEVICES += hame_mpr-a2
 
-define Device/hw550-3g
-  DTS := HW550-3G
-  DEVICE_TITLE := Aztech HW550-3G
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+define Device/hauppauge_broadway
+  SOC := rt3052
+  IMAGE_SIZE := 7744k
+  UIMAGE_NAME:= Broadway Kernel Image
+  DEVICE_VENDOR := Hauppauge
+  DEVICE_MODEL := Broadway
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += broadway
 endef
-TARGET_DEVICES += hw550-3g
+TARGET_DEVICES += hauppauge_broadway
 
-define Device/ip2202
-  DTS := IP2202
-  DEVICE_TITLE := Poray IP2202
+define Device/hilink_hlk-rm04
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | hilink-header
+  DEVICE_VENDOR := Hi-Link
+  DEVICE_MODEL := HLK-RM04
+  SUPPORTED_DEVICES += hlk-rm04
+  DEFAULT := n
 endef
-TARGET_DEVICES += ip2202
+TARGET_DEVICES += hilink_hlk-rm04
 
-define Device/jhr-n805r
-  DTS := JHR-N805R
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | jcg-header 29.24
-  DEVICE_TITLE := JCG JHR-N805R
+define Device/hootoo_ht-tm02
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := HooToo
+  DEVICE_MODEL := HT-TM02
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += ht-tm02
+  DEFAULT := n
 endef
-TARGET_DEVICES += jhr-n805r
+TARGET_DEVICES += hootoo_ht-tm02
 
-define Device/jhr-n825r
-  DTS := JHR-N825R
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | jcg-header 23.24
-  DEVICE_TITLE := JCG JHR-N825R
+define Device/huawei_d105
+  SOC := rt3050
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Huawei
+  DEVICE_MODEL := D105
+  SUPPORTED_DEVICES += d105
+  DEFAULT := n
 endef
-TARGET_DEVICES += jhr-n825r
+TARGET_DEVICES += huawei_d105
 
-define Device/jhr-n926r
-  DTS := JHR-N926R
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | jcg-header 25.24
-  DEVICE_TITLE := JCG JHR-N926R
+define Device/huawei_hg255d
+  SOC := rt3052
+  IMAGE_SIZE := 15744k
+  DEVICE_VENDOR := HuaWei
+  DEVICE_MODEL := HG255D
+  SUPPORTED_DEVICES += hg255d
 endef
-TARGET_DEVICES += jhr-n926r
+TARGET_DEVICES += huawei_hg255d
 
-define Device/m2m
-  DTS := M2M
+define Device/intenso_memory2move
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
   UIMAGE_NAME:= Linux Kernel Image
-  DEVICE_TITLE := Intenso Memory 2 Move
-  DEVICE_PACKAGES := kmod-ledtrig-netdev kmod-ledtrig-timer \
-		kmod-usb-core kmod-usb2 kmod-usb-storage kmod-scsi-core \
-		kmod-fs-ext4 kmod-fs-vfat block-mount
+  DEVICE_VENDOR := Intenso
+  DEVICE_MODEL := Memory 2 Move
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-storage kmod-scsi-core kmod-fs-ext4 \
+	kmod-fs-vfat block-mount
+  SUPPORTED_DEVICES += m2m
 endef
-TARGET_DEVICES += m2m
+TARGET_DEVICES += intenso_memory2move
 
-define Device/m3
-  DTS := M3
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
+define Device/jcg_jhr-n805r
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B M3 -F 4M
-  DEVICE_TITLE := Poray M3
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-netdev \
-	kmod-ledtrig-timer
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 29.24
+  DEVICE_VENDOR := JCG
+  DEVICE_MODEL := JHR-N805R
+  SUPPORTED_DEVICES += jhr-n805r
+  DEFAULT := n
 endef
-TARGET_DEVICES += m3
+TARGET_DEVICES += jcg_jhr-n805r
 
-define Device/m4-4M
-  DTS := M4-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
+define Device/jcg_jhr-n825r
+  SOC := rt3052
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B M4 -F 4M
-  DEVICE_TITLE := Poray M4 (4MB)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-netdev \
-	kmod-ledtrig-timer
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 23.24
+  DEVICE_VENDOR := JCG
+  DEVICE_MODEL := JHR-N825R
+  SUPPORTED_DEVICES += jhr-n825r
+  DEFAULT := n
 endef
-TARGET_DEVICES += m4-4M
+TARGET_DEVICES += jcg_jhr-n825r
 
-define Device/m4-8M
-  DTS := M4-8M
+define Device/jcg_jhr-n926r
+  SOC := rt3052
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B M4 -F 8M
-  DEVICE_TITLE := Poray M4 (8MB)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-netdev kmod-ledtrig-timer
-endef
-TARGET_DEVICES += m4-8M
-
-define Device/miniembplug
-  DTS := MINIEMBPLUG
-  DEVICE_TITLE := Omnima MiniEMBPlug
-endef
-TARGET_DEVICES += miniembplug
-
-define Device/miniembwifi
-  DTS := MINIEMBWIFI
-  DEVICE_TITLE := Omnima MiniEMBWiFi
-endef
-TARGET_DEVICES += miniembwifi
-
-define Device/mofi3500-3gn
-  DTS := MOFI3500-3GN
-  DEVICE_TITLE := MoFi Network MOFI3500-3GN
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | jcg-header 25.24
+  DEVICE_VENDOR := JCG
+  DEVICE_MODEL := JHR-N926R
+  SUPPORTED_DEVICES += jhr-n926r
+  DEFAULT := n
 endef
-TARGET_DEVICES += mofi3500-3gn
+TARGET_DEVICES += jcg_jhr-n926r
 
-define Device/mpr-a1
-  DTS := MPRA1
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  UIMAGE_NAME:= Linux Kernel Image
-  DEVICE_TITLE := HAME MPR-A1
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-ledtrig-netdev
+define Device/mofinetwork_mofi3500-3gn
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := MoFi Network
+  DEVICE_MODEL := MOFI3500-3GN
+  SUPPORTED_DEVICES += mofi3500-3gn
 endef
-TARGET_DEVICES += mpr-a1
+TARGET_DEVICES += mofinetwork_mofi3500-3gn
 
-define Device/mpr-a2
-  DTS := MPRA2
-  UIMAGE_NAME:= Linux Kernel Image
-  DEVICE_TITLE := HAME MPR-A2
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-ledtrig-netdev
+define Device/netcore_nw718
+  SOC := rt3050
+  IMAGE_SIZE := 3712k
+  UIMAGE_NAME:= ARA1B4NCRNW718;1
+  DEVICE_VENDOR := Netcore
+  DEVICE_MODEL := NW718
+  SUPPORTED_DEVICES += nw718
+  DEFAULT := n
 endef
-TARGET_DEVICES += mpr-a2
+TARGET_DEVICES += netcore_nw718
 
-define Device/mr-102n
-  DTS := MR-102N
-  DEVICE_TITLE := AXIMCom MR-102N
+define Device/netgear_wnce2001
+  SOC := rt3052
+  IMAGE_SIZE := 3392k
+  IMAGES += factory.bin factory-NA.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	dap-header -s RT3052-AP-WNCE2001-3 -r WW -v 1.0.0.99
+  IMAGE/factory-NA.bin := $$(sysupgrade_bin) | check-size | \
+	dap-header -s RT3052-AP-WNCE2001-3 -r NA -v 1.0.0.99
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := WNCE2001
+  SUPPORTED_DEVICES += wnce2001
+  DEFAULT := n
 endef
-TARGET_DEVICES += mr-102n
+TARGET_DEVICES += netgear_wnce2001
 
-define Device/mzk-dp150n
-  DTS := MZK-DP150N
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Planex MZK-DP150N
-  DEVICE_PACKAGES := kmod-spi-dev
+define Device/nexaira_bc2
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := NexAira
+  DEVICE_MODEL := BC2
+  SUPPORTED_DEVICES += bc2
 endef
-TARGET_DEVICES += mzk-dp150n
+TARGET_DEVICES += nexaira_bc2
 
-define Device/mzk-w300nh2
-  DTS := MZK-W300NH2
-  IMAGE_SIZE := 3648k
+define Device/nexx_wt1520-4m
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
   IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | \
-	edimax-header -s CSYS -m RN52 -f 0x50000 -S 0xc0000
-  DEVICE_TITLE := Planex MZK-W300NH2
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B WT1520 -F 4M
+  DEVICE_VENDOR := Nexx
+  DEVICE_MODEL := WT1520
+  DEVICE_VARIANT := 4M
+  SUPPORTED_DEVICES += wt1520-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += mzk-w300nh2
+TARGET_DEVICES += nexx_wt1520-4m
 
-define Device/mzk-wdpr
-  DTS := MZK-WDPR
-  DEVICE_TITLE := Planex MZK-WDPR
+define Device/nexx_wt1520-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B WT1520 -F 8M
+  DEVICE_VENDOR := Nexx
+  DEVICE_MODEL := WT1520
+  DEVICE_VARIANT := 8M
+  SUPPORTED_DEVICES += wt1520-8M
 endef
-TARGET_DEVICES += mzk-wdpr
+TARGET_DEVICES += nexx_wt1520-8m
 
-define Device/nbg-419n
-  DTS := NBG-419N
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := ZyXEL NBG-419N
+define Device/nixcore_x1-16m
+  SOC := rt5350
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Nixcore
+  DEVICE_MODEL := X1
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += nixcore-x1 nixcore-x1-16M
 endef
-TARGET_DEVICES += nbg-419n
+TARGET_DEVICES += nixcore_x1-16m
 
-define Device/nbg-419n2
-  DTS := NBG-419N2
-  IMAGE_SIZE := $(ralink_default_fw_size_8M)
-  DEVICE_TITLE := ZyXEL NBG-419N2
+define Device/nixcore_x1-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Nixcore
+  DEVICE_MODEL := X1
+  DEVICE_VARIANT := 8M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += nixcore-x1 nixcore-x1-8M
 endef
-TARGET_DEVICES += nbg-419n2
+TARGET_DEVICES += nixcore_x1-8m
 
-define Device/ncs601w
-  DTS := NCS601W
-  DEVICE_TITLE := Wansview NCS601W
-  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc \
-		kmod-usb-core kmod-usb-ohci
+define Device/olimex_rt5350f-olinuxino
+  $(Device/uimage-lzma-loader)
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := OLIMEX
+  DEVICE_MODEL := RT5350F-OLinuXino
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += rt5350f-olinuxino
 endef
-TARGET_DEVICES += ncs601w
+TARGET_DEVICES += olimex_rt5350f-olinuxino
 
-define Device/nixcore-x1-8M
-  DTS := NIXCORE-8M
+define Device/olimex_rt5350f-olinuxino-evb
+  $(Device/uimage-lzma-loader)
+  SOC := rt5350
   IMAGE_SIZE := 7872k
-  SUPPORTED_DEVICES += nixcore-x1
-  DEVICE_TITLE := NixcoreX1 (8M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-i2c-core kmod-i2c-ralink kmod-spi-dev
+  DEVICE_VENDOR := OLIMEX
+  DEVICE_MODEL := RT5350F-OLinuXino-EVB
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += rt5350f-olinuxino-evb
 endef
-TARGET_DEVICES += nixcore-x1-8M
+TARGET_DEVICES += olimex_rt5350f-olinuxino-evb
 
-define Device/nixcore-x1-16M
-  DTS := NIXCORE-16M
-  IMAGE_SIZE := 16064k
-  SUPPORTED_DEVICES += nixcore-x1
-  DEVICE_TITLE := NixcoreX1 (16M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-i2c-core kmod-i2c-ralink kmod-spi-dev
+define Device/omnima_miniembplug
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Omnima
+  DEVICE_MODEL := MiniEMBPlug
+  SUPPORTED_DEVICES += miniembplug
 endef
-TARGET_DEVICES += nixcore-x1-16M
+TARGET_DEVICES += omnima_miniembplug
 
-define Device/nw718
-  DTS := NW718
-  IMAGE_SIZE := 3712k
-  UIMAGE_NAME:= ARA1B4NCRNW718;1
-  DEVICE_TITLE := Netcore NW718
+define Device/omnima_miniembwifi
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Omnima
+  DEVICE_MODEL := MiniEMBWiFi
+  SUPPORTED_DEVICES += miniembwifi
 endef
-TARGET_DEVICES += nw718
+TARGET_DEVICES += omnima_miniembwifi
 
-define Device/psr-680w
-  DTS := PSR-680W
+define Device/petatel_psr-680w
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Petatel PSR-680W Wireless 3G Router
-endef
-TARGET_DEVICES += psr-680w
-
-define Device/pwh2004
-  DTS := PWH2004
-  DEVICE_TITLE := Prolink PWH2004
-  DEVICE_PACKAGES :=
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Petatel
+  DEVICE_MODEL := PSR-680W Wireless 3G Router
+  SUPPORTED_DEVICES += psr-680w
+  DEFAULT := n
 endef
-TARGET_DEVICES += pwh2004
+TARGET_DEVICES += petatel_psr-680w
 
-define Device/px-4885-4M
-  DTS := PX-4885-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := 7Links PX-4885 (4M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb2 kmod-usb-ohci \
-	kmod-usb-ledtrig-usbport kmod-leds-gpio
+define Device/planex_mzk-dp150n
+  SOC := rt5350
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-DP150N
+  DEVICE_PACKAGES := kmod-spi-dev
+  SUPPORTED_DEVICES += mzk-dp150n
+  DEFAULT := n
 endef
-TARGET_DEVICES += px-4885-4M
+TARGET_DEVICES += planex_mzk-dp150n
 
-define Device/px-4885-8M
-  DTS := PX-4885-8M
-  DEVICE_TITLE := 7Links PX-4885 (8M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb2 kmod-usb-ohci \
-	kmod-usb-ledtrig-usbport kmod-leds-gpio
+define Device/planex_mzk-w300nh2
+  SOC := rt3052
+  IMAGE_SIZE := 3648k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | \
+	edimax-header -s CSYS -m RN52 -f 0x50000 -S 0xc0000
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-W300NH2
+  SUPPORTED_DEVICES += mzk-w300nh2
+  DEFAULT := n
 endef
-TARGET_DEVICES += px-4885-8M
+TARGET_DEVICES += planex_mzk-w300nh2
 
-define Device/rt5350f-olinuxino
-  DTS := RT5350F-OLINUXINO
-  DEVICE_TITLE := RT5350F-OLinuXino
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-ralink \
-		kmod-spi-dev
+define Device/planex_mzk-wdpr
+  SOC := rt3052
+  IMAGE_SIZE := 6656k
+  DEVICE_VENDOR := Planex
+  DEVICE_MODEL := MZK-WDPR
+  SUPPORTED_DEVICES += mzk-wdpr
 endef
-TARGET_DEVICES += rt5350f-olinuxino
+TARGET_DEVICES += planex_mzk-wdpr
 
-define Device/rt5350f-olinuxino-evb
-  DTS := RT5350F-OLINUXINO-EVB
-  DEVICE_TITLE := RT5350F-OLinuXino-EVB
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-ralink \
-		kmod-spi-dev
+define Device/poray_ip2202
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := IP2202
+  SUPPORTED_DEVICES += ip2202
 endef
-TARGET_DEVICES += rt5350f-olinuxino-evb
+TARGET_DEVICES += poray_ip2202
 
-define Device/rt-g32-b1
-  DTS := RT-G32-B1
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Asus RT-G32 B1
+define Device/poray_m3
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B M3 -F 4M
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := M3
+  DEVICE_PACKAGES := kmod-usb2
+  SUPPORTED_DEVICES += m3
+  DEFAULT := n
 endef
-TARGET_DEVICES += rt-g32-b1
+TARGET_DEVICES += poray_m3
 
-define Device/rt-n10-plus
-  DTS := RT-N10-PLUS
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Asus RT-N10+
+define Device/poray_m4-4m
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B M4 -F 4M
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := M4
+  DEVICE_VARIANT := 4M
+  DEVICE_PACKAGES := kmod-usb2
+  SUPPORTED_DEVICES += m4-4M
   DEFAULT := n
 endef
-TARGET_DEVICES += rt-n10-plus
+TARGET_DEVICES += poray_m4-4m
 
-define Device/rt-n13u
-  DTS := RT-N13U
-  DEVICE_TITLE := Asus RT-N13U
-  DEVICE_PACKAGES := kmod-leds-gpio kmod-rt2800-pci kmod-usb-dwc2
+define Device/poray_m4-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B M4 -F 8M
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := M4
+  DEVICE_VARIANT := 8M
+  DEVICE_PACKAGES := kmod-usb2
+  SUPPORTED_DEVICES += m4-8M
+endef
+TARGET_DEVICES += poray_m4-8m
+
+define Device/poray_x5
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B X5 -F 8M
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := X5/X6
+  DEVICE_PACKAGES := kmod-usb2
+  SUPPORTED_DEVICES += x5
 endef
-TARGET_DEVICES += rt-n13u
+TARGET_DEVICES += poray_x5
 
-define Device/rut5xx
-  DTS := RUT5XX
-  DEVICE_TITLE := Teltonika RUT5XX
-  DEVICE_PACKAGES := om-watchdog
+define Device/poray_x8
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B X8 -F 8M
+  DEVICE_VENDOR := Poray
+  DEVICE_MODEL := X8
+  DEVICE_PACKAGES := kmod-usb2
+  SUPPORTED_DEVICES += x8
 endef
-TARGET_DEVICES += rut5xx
+TARGET_DEVICES += poray_x8
 
-define Device/sl-r7205
-  DTS := SL-R7205
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Skyline SL-R7205 Wireless 3G Router
+define Device/prolink_pwh2004
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Prolink
+  DEVICE_MODEL := PWH2004
+  DEVICE_PACKAGES :=
+  SUPPORTED_DEVICES += pwh2004
 endef
-TARGET_DEVICES += sl-r7205
+TARGET_DEVICES += prolink_pwh2004
 
-define Device/tew-638apb-v2
-  DTS := TEW-638APB-V2
+define Device/ralink_v22rw-2x2
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGE/sysupgrade.bin := $$(sysupgrade_bin) | umedia-header 0x026382 | \
-        append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := TRENDnet TEW-638APB v2
-endef
-TARGET_DEVICES += tew-638apb-v2
-
-define Device/tew-714tru
-  DTS := TEW-714TRU
-  DEVICE_TITLE := TRENDnet TEW-714TRU
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Ralink
+  DEVICE_MODEL := AP-RT3052-V22RW-2X2
+  SUPPORTED_DEVICES += v22rw-2x2
+  DEFAULT := n
 endef
-TARGET_DEVICES += tew-714tru
+TARGET_DEVICES += ralink_v22rw-2x2
 
-define Device/ur-326n4g
-  DTS := UR-326N4G
+define Device/sitecom_wl-351
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := UPVEL UR-326N4G
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
-endef
-TARGET_DEVICES += ur-326n4g
-
-define Device/ur-336un
-  DTS := UR-336UN
-  DEVICE_TITLE := UPVEL UR-336UN
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Sitecom
+  DEVICE_MODEL := WL-351 v1
+  DEVICE_PACKAGES := kmod-switch-rtl8366rb
+  SUPPORTED_DEVICES += wl-351
+  DEFAULT := n
 endef
-TARGET_DEVICES += ur-336un
+TARGET_DEVICES += sitecom_wl-351
 
-define Device/v22rw-2x2
-  DTS := V22RW-2X2
+define Device/skyline_sl-r7205
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Ralink AP-RT3052-V22RW-2X2
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Skyline
+  DEVICE_MODEL := SL-R7205 Wireless 3G Router
+  SUPPORTED_DEVICES += sl-r7205
+  DEFAULT := n
 endef
-TARGET_DEVICES += v22rw-2x2
+TARGET_DEVICES += skyline_sl-r7205
 
-define Device/vocore-8M
-  DTS := VOCORE-8M
-  IMAGE_SIZE := 7872k
-  SUPPORTED_DEVICES += vocore
-  DEVICE_TITLE := VoCore (8M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-ralink \
-		kmod-spi-dev
+define Device/sparklan_wcr-150gn
+  SOC := rt3050
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Sparklan
+  DEVICE_MODEL := WCR-150GN
+  SUPPORTED_DEVICES += wcr-150gn
+  DEFAULT := n
 endef
-TARGET_DEVICES += vocore-8M
+TARGET_DEVICES += sparklan_wcr-150gn
 
-define Device/vocore-16M
-  DTS := VOCORE-16M
+define Device/teltonika_rut5xx
+  SOC := rt3050
   IMAGE_SIZE := 16064k
-  SUPPORTED_DEVICES += vocore
-  DEVICE_TITLE := VoCore (16M)
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-		kmod-i2c-core kmod-i2c-ralink \
-		kmod-spi-dev
+  DEVICE_VENDOR := Teltonika
+  DEVICE_MODEL := RUT5XX
+  DEVICE_PACKAGES := om-watchdog
+  SUPPORTED_DEVICES += rut5xx
 endef
-TARGET_DEVICES += vocore-16M
+TARGET_DEVICES += teltonika_rut5xx
 
-define Device/w150m
-  DTS := W150M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  UIMAGE_NAME:= W150M Kernel Image
-  DEVICE_TITLE := Tenda W150M
+define Device/tenda_3g150b
+  SOC := rt5350
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 3776k
+  UIMAGE_NAME:= Linux Kernel Image
+  DEVICE_VENDOR := Tenda
+  DEVICE_MODEL := 3G150B
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += 3g150b
+  DEFAULT := n
 endef
-TARGET_DEVICES += w150m
+TARGET_DEVICES += tenda_3g150b
 
-define Device/w306r-v20
-  DTS := W306R_V20
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  UIMAGE_NAME:= linkn Kernel Image
-  DEVICE_TITLE := Tenda W306R V2.0
+define Device/tenda_3g300m
+  SOC := rt3052
+  IMAGE_SIZE := 3776k
+  UIMAGE_NAME := 3G150M_SPI Kernel Image
+  DEVICE_VENDOR := Tenda
+  DEVICE_MODEL := 3G300M
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += 3g300m
+  DEFAULT := n
 endef
-TARGET_DEVICES += w306r-v20
+TARGET_DEVICES += tenda_3g300m
 
-define Device/w502u
-  DTS := W502U
-  DEVICE_TITLE := ALFA Networks W502U
+define Device/tenda_w150m
+  SOC := rt3050
+  IMAGE_SIZE := 3776k
+  UIMAGE_NAME:= W150M Kernel Image
+  DEVICE_VENDOR := Tenda
+  DEVICE_MODEL := W150M
+  SUPPORTED_DEVICES += w150m
+  DEFAULT := n
 endef
-TARGET_DEVICES += w502u
+TARGET_DEVICES += tenda_w150m
 
-define Device/wcr-150gn
-  DTS := WCR150GN
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Sparklan WCR-150GN
+define Device/tenda_w306r-v2
+  SOC := rt3052
+  IMAGE_SIZE := 3776k
+  UIMAGE_NAME:= linkn Kernel Image
+  DEVICE_VENDOR := Tenda
+  DEVICE_MODEL := W306R
+  DEVICE_VARIANT := V2.0
+  SUPPORTED_DEVICES += w306r-v20
+  DEFAULT := n
 endef
-TARGET_DEVICES += wcr-150gn
+TARGET_DEVICES += tenda_w306r-v2
 
-define Device/whr-g300n
-  DTS := WHR-G300N
+define Device/trendnet_tew-638apb-v2
+  SOC := rt3050
   BLOCKSIZE := 64k
-  IMAGE_SIZE := 3801088
-  DEVICE_TITLE := Buffalo WHR-G300N
-  IMAGES += tftp.bin
-  IMAGE/tftp.bin := $$(sysupgrade_bin) | \
-    check-size $$$$(IMAGE_SIZE) | buffalo-tftp-header
+  IMAGE_SIZE := 3776k
+  IMAGE/sysupgrade.bin := $$(sysupgrade_bin) | umedia-header 0x026382 | \
+	append-metadata | check-size
+  DEVICE_VENDOR := TRENDnet
+  DEVICE_MODEL := TEW-638APB
+  DEVICE_VARIANT := v2
+  SUPPORTED_DEVICES += tew-638apb-v2
+  DEFAULT := n
 endef
-TARGET_DEVICES += whr-g300n
+TARGET_DEVICES += trendnet_tew-638apb-v2
 
-define Device/wizard8800
-  DTS := WIZARD8800
-  UIMAGE_NAME:= Linux Kernel Image
-  DEVICE_TITLE := EasyAcc WIZARD 8800
+define Device/trendnet_tew-714tru
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := TRENDnet
+  DEVICE_MODEL := TEW-714TRU
+  SUPPORTED_DEVICES += tew-714tru
 endef
-TARGET_DEVICES += wizard8800
+TARGET_DEVICES += trendnet_tew-714tru
 
-define Device/wizfi630a
-  DTS := WIZFI630A
-  IMAGE_SIZE := $(ralink_default_fw_size_16M)
-  DEVICE_TITLE := WIZnet WizFi630A
+define Device/unbranded_a5-v11
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | \
+	poray-header -B A5-V11 -F 4M
+  DEVICE_VENDOR :=
+  DEVICE_MODEL := A5-V11
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += a5-v11
+  DEFAULT := n
 endef
-TARGET_DEVICES += wizfi630a
+TARGET_DEVICES += unbranded_a5-v11
 
-define Device/wl-330n
-  DTS := WL-330N
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Asus WL-330N
+define Device/unbranded_wr512-3gn-4m
+  SOC := rt3052
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := Ralink
+  DEVICE_MODEL := WR512-3GN
+  DEVICE_VARIANT := 4M
+  SUPPORTED_DEVICES += wr512-3gn-4M
+  DEFAULT := n
 endef
-TARGET_DEVICES += wl-330n
+TARGET_DEVICES += unbranded_wr512-3gn-4m
 
-define Device/wl-330n3g
-  DTS := WL-330N3G
-  BLOCKSIZE := 4k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Asus WL-330N3G
-  DEVICE_PACKAGES :=
+define Device/unbranded_wr512-3gn-8m
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Ralink
+  DEVICE_MODEL := WR512-3GN
+  DEVICE_VARIANT := 8M
+  SUPPORTED_DEVICES += wr512-3gn-8M
 endef
-TARGET_DEVICES += wl-330n3g
+TARGET_DEVICES += unbranded_wr512-3gn-8m
 
-define Device/wl-351
-  DTS := WL-351
+define Device/unbranded_xdx-rn502j
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := Sitecom WL-351 v1
-  DEVICE_PACKAGES := kmod-switch-rtl8366rb kmod-swconfig swconfig
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := XDX
+  DEVICE_MODEL := RN502J
+  SUPPORTED_DEVICES += xdxrn502j
   DEFAULT := n
 endef
-TARGET_DEVICES += wl-351
-
-define Device/wnce2001
-  DTS := WNCE2001
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin factory-NA.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	dap-header -s RT3052-AP-WNCE2001-3 -r WW -v 1.0.0.99
-  IMAGE/factory-NA.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	dap-header -s RT3052-AP-WNCE2001-3 -r NA -v 1.0.0.99
-  DEVICE_TITLE := Netgear WNCE2001
-endef
-TARGET_DEVICES += wnce2001
+TARGET_DEVICES += unbranded_xdx-rn502j
 
-define Device/wr512-3gn-4M
-  DTS := WR512-3GN-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := WR512-3GN (4M)
+define Device/upvel_ur-326n4g
+  SOC := rt3052
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := UPVEL
+  DEVICE_MODEL := UR-326N4G
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += ur-326n4g
   DEFAULT := n
 endef
-TARGET_DEVICES += wr512-3gn-4M
+TARGET_DEVICES += upvel_ur-326n4g
 
-define Device/wr512-3gn-8M
-  DTS := WR512-3GN-8M
-  DEVICE_TITLE := WR512-3GN (8M)
+define Device/upvel_ur-336un
+  SOC := rt3052
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := UPVEL
+  DEVICE_MODEL := UR-336UN
+  DEVICE_PACKAGES := kmod-usb-dwc2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += ur-336un
 endef
-TARGET_DEVICES += wr512-3gn-8M
+TARGET_DEVICES += upvel_ur-336un
 
-define Device/wr6202
-  DTS := WR6202
-  DEVICE_TITLE := AWB WR6202
+define Device/vocore_vocore-16m
+  SOC := rt5350
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := VoCore
+  DEVICE_MODEL := VoCore
+  DEVICE_VARIANT := 16M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += vocore vocore-16M
 endef
-TARGET_DEVICES += wr6202
+TARGET_DEVICES += vocore_vocore-16m
 
-define Device/wt1520-4M
-  DTS := WT1520-4M
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B WT1520 -F 4M
-  DEVICE_TITLE := Nexx WT1520 (4MB)
+define Device/vocore_vocore-8m
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := VoCore
+  DEVICE_MODEL := VoCore
+  DEVICE_VARIANT := 8M
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-i2c-ralink kmod-spi-dev
+  SUPPORTED_DEVICES += vocore vocore-8M
 endef
-TARGET_DEVICES += wt1520-4M
+TARGET_DEVICES += vocore_vocore-8m
 
-define Device/wt1520-8M
-  DTS := WT1520-8M
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B WT1520 -F 8M
-  DEVICE_TITLE := Nexx WT1520 (8MB)
+define Device/wansview_ncs601w
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wansview
+  DEVICE_MODEL := NCS601W
+  DEVICE_PACKAGES := kmod-video-core kmod-video-uvc kmod-usb-ohci
+  SUPPORTED_DEVICES += ncs601w
 endef
-TARGET_DEVICES += wt1520-8M
+TARGET_DEVICES += wansview_ncs601w
 
-define Device/x5
-  DTS := X5
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B X5 -F 8M
-  DEVICE_TITLE := Poray X5/X6
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-netdev kmod-ledtrig-timer
+define Device/wiznet_wizfi630a
+  SOC := rt5350
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := WIZnet
+  DEVICE_MODEL := WizFi630A
+  SUPPORTED_DEVICES += wizfi630a
 endef
-TARGET_DEVICES += x5
-
+TARGET_DEVICES += wiznet_wizfi630a
 
-define Device/x8
-  DTS := X8
-  IMAGES += factory.bin
-  IMAGE/factory.bin := \
-	$$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | poray-header -B X8 -F 8M
-  DEVICE_TITLE := Poray X8
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-netdev kmod-ledtrig-timer
+define Device/zorlik_zl5900v2
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Zorlik
+  DEVICE_MODEL := ZL5900V2
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
 endef
-TARGET_DEVICES += x8
+TARGET_DEVICES += zorlik_zl5900v2
 
-define Device/xdxrn502j
-  DTS := XDXRN502J
+define Device/zyxel_keenetic
+  SOC := rt3052
   BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := XDX RN502J
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ehci kmod-usb-ledtrig-usbport \
+	kmod-usb-dwc2
+  SUPPORTED_DEVICES += kn
 endef
-TARGET_DEVICES += xdxrn502j
+TARGET_DEVICES += zyxel_keenetic
 
-define Device/kn
-  DTS := kn
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := ZyXEL Keenetic
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ehci kmod-usb-ledtrig-usbport
-  DEFAULT := n
+define Device/zyxel_keenetic-lite-b
+  $(Device/uimage-lzma-loader)
+  SOC := rt5350
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Lite
+  DEVICE_VARIANT := B
 endef
-TARGET_DEVICES += kn
+TARGET_DEVICES += zyxel_keenetic-lite-b
 
 define Device/zyxel_keenetic-start
-  DTS := kn_st
-  IMAGE_SIZE := $(ralink_default_fw_size_4M)
-  DEVICE_TITLE := ZyXEL Keenetic Start
+  SOC := rt5350
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := Keenetic Start
+  DEFAULT := n
 endef
 TARGET_DEVICES += zyxel_keenetic-start
 
-define Device/zorlik_zl5900v2
-  DTS := ZL5900V2
-  DEVICE_TITLE := Zorlik ZL5900V2
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-ledtrig-netdev
+define Device/zyxel_nbg-419n
+  SOC := rt3052
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 3776k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := NBG-419N
+  SUPPORTED_DEVICES += nbg-419n
+  DEFAULT := n
 endef
-TARGET_DEVICES += zorlik_zl5900v2
+TARGET_DEVICES += zyxel_nbg-419n
+
+define Device/zyxel_nbg-419n-v2
+  SOC := rt3352
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := ZyXEL
+  DEVICE_MODEL := NBG-419N
+  DEVICE_VARIANT := v2
+  SUPPORTED_DEVICES += nbg-419n2
+endef
+TARGET_DEVICES += zyxel_nbg-419n-v2
diff --git a/iopsys-ramips/image/rt3883.mk b/iopsys-ramips/image/rt3883.mk
index b7839943574edfb0a6e13c3bda6ffc5754732ffa..1b46d570fd945dffa41b1455c7b31c2bc0377e86 100644
--- a/iopsys-ramips/image/rt3883.mk
+++ b/iopsys-ramips/image/rt3883.mk
@@ -5,115 +5,143 @@ define Build/mkrtn56uimg
 	$(STAGING_DIR_HOST)/bin/mkrtn56uimg $(1) $@
 endef
 
-define Device/br-6475nd
-  DTS := BR-6475ND
+define Device/asus_rt-n56u
+  SOC := rt3662
   BLOCKSIZE := 64k
-  IMAGE_SIZE := 7744k
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
-	edimax-header -s CSYS -m RN54 -f 0x70000 -S 0x01100000 | pad-rootfs | \
-	append-metadata | check-size $$$$(IMAGE_SIZE)
-  DEVICE_TITLE := Edimax BR-6475nD
-  DEVICE_PACKAGES := swconfig
+  IMAGE_SIZE := 7872k
+  IMAGE/sysupgrade.bin += | mkrtn56uimg -s
+  DEVICE_VENDOR := Asus
+  DEVICE_MODEL := RT-N56U
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += rt-n56u
 endef
-TARGET_DEVICES += br-6475nd
+TARGET_DEVICES += asus_rt-n56u
 
-define Device/cy-swr1100
-  $(Device/seama)
-  DTS := CY-SWR1100
+define Device/belkin_f9k1109v1
+  SOC := rt3883
   BLOCKSIZE := 64k
-  KERNEL := $(KERNEL_DTB)
-  SEAMA_SIGNATURE := wrgnd10_samsung_ss815
-  DEVICE_TITLE := Samsung CY-SWR1100
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 \
-	kmod-usb-ledtrig-usbport swconfig
+  DEVICE_VENDOR := Belkin
+  DEVICE_MODEL := F9K1109
+  DEVICE_VARIANT := Version 1.0
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport
+  IMAGE_SIZE := 7808k
+  KERNEL := kernel-bin | append-dtb | lzma -d16 | uImage lzma
+  # Stock firmware checks for this uImage image name during upload.
+  UIMAGE_NAME := N750F9K1103VB
 endef
-TARGET_DEVICES += cy-swr1100
-
+TARGET_DEVICES += belkin_f9k1109v1
 
-define Device/dir-645
+define Device/dlink_dir-645
   $(Device/seama)
-  DTS := DIR-645
+  $(Device/uimage-lzma-loader)
+  SOC := rt3662
   BLOCKSIZE := 4k
-  KERNEL := $(KERNEL_DTB)
+  IMAGE_SIZE := 7872k
+  KERNEL := kernel-bin | append-dtb | lzma -d10
   SEAMA_SIGNATURE := wrgn39_dlob.hans_dir645
-  DEVICE_TITLE := D-Link DIR-645
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
+  DEVICE_VENDOR := D-Link
+  DEVICE_MODEL := DIR-645
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += dir-645
 endef
-TARGET_DEVICES += dir-645
+TARGET_DEVICES += dlink_dir-645
 
-
-define Device/belkin_f9k1109v1
-  DTS := F9K1109V1
+define Device/edimax_br-6475nd
+  SOC := rt3662
   BLOCKSIZE := 64k
-  DEVICE_TITLE := Belkin F9K1109 Version 1.0
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
-  IMAGE_SIZE := 7224k
-  KERNEL := kernel-bin | append-dtb | lzma -d16 | uImage lzma
-  # Stock firmware checks for this uImage image name during upload.
-  UIMAGE_NAME := N750F9K1103VB
+  IMAGE_SIZE := 7744k
+  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
+	edimax-header -s CSYS -m RN54 -f 0x70000 -S 0x01100000 | pad-rootfs | \
+	append-metadata | check-size
+  DEVICE_VENDOR := Edimax
+  DEVICE_MODEL := BR-6475nD
+  SUPPORTED_DEVICES += br-6475nd
 endef
-TARGET_DEVICES += belkin_f9k1109v1
+TARGET_DEVICES += edimax_br-6475nd
 
-define Device/hpm
-  DTS := HPM
-  BLOCKSIZE := 64k
-  IMAGE_SIZE := 16064k
-  DEVICE_TITLE := Omnima HPM
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2
+define Device/engenius_esr600h
+  $(Device/uimage-lzma-loader)
+  SOC := rt3662
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.dlf
+  IMAGE/factory.dlf := $$(sysupgrade_bin) | check-size | \
+	senao-header -r 0x101 -p 0x44 -t 2
+  DEVICE_VENDOR := EnGenius
+  DEVICE_MODEL := ESR600H
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 uboot-envtools
 endef
-TARGET_DEVICES += hpm
+TARGET_DEVICES += engenius_esr600h
 
-
-define Device/rt-n56u
-  DTS := RT-N56U
+define Device/loewe_wmdr-143n
+  SOC := rt3662
   BLOCKSIZE := 64k
-  IMAGE/sysupgrade.bin += | mkrtn56uimg -s
-  DEVICE_TITLE := Asus RT-N56U
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Loewe
+  DEVICE_MODEL := WMDR-143N
+  SUPPORTED_DEVICES += wmdr-143n
 endef
-TARGET_DEVICES += rt-n56u
-
+TARGET_DEVICES += loewe_wmdr-143n
 
-define Device/tew-691gr
-  DTS := TEW-691GR
+define Device/omnima_hpm
+  SOC := rt3662
   BLOCKSIZE := 64k
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	umedia-header 0x026910
-  DEVICE_TITLE := TRENDnet TEW-691GR
-  DEVICE_PACKAGES := swconfig
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Omnima
+  DEVICE_MODEL := HPM
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += hpm
 endef
-TARGET_DEVICES += tew-691gr
+TARGET_DEVICES += omnima_hpm
 
-
-define Device/tew-692gr
-  DTS := TEW-692GR
+define Device/samsung_cy-swr1100
+  $(Device/seama)
+  SOC := rt3662
   BLOCKSIZE := 64k
-  IMAGES += factory.bin
-  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
-	umedia-header 0x026920
-  DEVICE_TITLE := TRENDnet TEW-692GR
-  DEVICE_PACKAGES := swconfig
+  IMAGE_SIZE := 7872k
+  KERNEL := $(KERNEL_DTB)
+  SEAMA_SIGNATURE := wrgnd10_samsung_ss815
+  DEVICE_VENDOR := Samsung
+  DEVICE_MODEL := CY-SWR1100
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport
+  SUPPORTED_DEVICES += cy-swr1100
 endef
-TARGET_DEVICES += tew-692gr
+TARGET_DEVICES += samsung_cy-swr1100
 
-
-define Device/wlr-6000
-  DTS := WLR-6000
+define Device/sitecom_wlr-6000
+  SOC := rt3883
   BLOCKSIZE := 4k
   IMAGE_SIZE := 7244k
   IMAGES += factory.dlf
-  IMAGE/factory.dlf := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \
+  IMAGE/factory.dlf := $$(sysupgrade_bin) | check-size | \
 	senao-header -r 0x0202 -p 0x41 -t 2
-  DEVICE_TITLE := Sitecom WLR-6000
-  DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
+  DEVICE_VENDOR := Sitecom
+  DEVICE_MODEL := WLR-6000
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
+  SUPPORTED_DEVICES += wlr-6000
 endef
-TARGET_DEVICES += wlr-6000
+TARGET_DEVICES += sitecom_wlr-6000
 
+define Device/trendnet_tew-691gr
+  SOC := rt3883
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | umedia-header 0x026910
+  DEVICE_VENDOR := TRENDnet
+  DEVICE_MODEL := TEW-691GR
+  SUPPORTED_DEVICES += tew-691gr
+endef
+TARGET_DEVICES += trendnet_tew-691gr
 
-define Device/wmdr-143n
-  DTS := WMDR-143N
+define Device/trendnet_tew-692gr
+  SOC := rt3883
   BLOCKSIZE := 64k
-  DEVICE_TITLE := Loewe WMDR-143N
+  IMAGE_SIZE := 7872k
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | check-size | umedia-header 0x026920
+  DEVICE_VENDOR := TRENDnet
+  DEVICE_MODEL := TEW-692GR
+  SUPPORTED_DEVICES += tew-692gr
 endef
-TARGET_DEVICES += wmdr-143n
+TARGET_DEVICES += trendnet_tew-692gr
diff --git a/iopsys-ramips/modules.mk b/iopsys-ramips/modules.mk
index a3bb2ce2c7b4e79dcf8cd88e280a8881faf1d905..117e6d25db2a095c655582fdd598975a71b40aa4 100644
--- a/iopsys-ramips/modules.mk
+++ b/iopsys-ramips/modules.mk
@@ -1,9 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0-only
 #
 # Copyright (C) 2006-2016 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
 
 OTHER_MENU:=Other modules
 
@@ -20,7 +17,7 @@ define KernelPackage/pwm-mediatek-ramips
   AUTOLOAD:=$(call AutoProbe,pwm-mediatek-ramips)
 endef
 
-define KernelPackage/pwm-mediatek/description
+define KernelPackage/pwm-mediatek-ramips/description
   Kernel modules for MediaTek Pulse Width Modulator
 endef
 
@@ -47,7 +44,7 @@ I2C_RALINK_MODULES:= \
 define KernelPackage/i2c-ralink
   $(call i2c_defaults,$(I2C_RALINK_MODULES),59)
   TITLE:=Ralink I2C Controller
-  DEPENDS:=kmod-i2c-core @TARGET_iopsys_ramips \
+  DEPENDS:=+kmod-i2c-core @TARGET_iopsys_ramips \
 	@!(TARGET_iopsys_ramips_mt7621||TARGET_ramips_mt76x8)
 endef
 
@@ -64,7 +61,7 @@ I2C_MT7621_MODULES:= \
 define KernelPackage/i2c-mt7628
   $(call i2c_defaults,$(I2C_MT7621_MODULES),59)
   TITLE:=MT7628/88 I2C Controller
-  DEPENDS:=kmod-i2c-core \
+  DEPENDS:=+kmod-i2c-core \
 	@(TARGET_ramips_mt76x8)
 endef
 
@@ -84,7 +81,7 @@ define KernelPackage/dma-ralink
 	CONFIG_DMA_RALINK
   FILES:= \
 	$(LINUX_DIR)/drivers/dma/virt-dma.ko \
-	$(LINUX_DIR)/drivers/dma/ralink-gdma.ko
+	$(LINUX_DIR)/drivers/staging/ralink-gdma/ralink-gdma.ko
   AUTOLOAD:=$(call AutoLoad,52,ralink-gdma)
 endef
 
@@ -104,8 +101,8 @@ define KernelPackage/hsdma-mtk
 	CONFIG_MTK_HSDMA
   FILES:= \
 	$(LINUX_DIR)/drivers/dma/virt-dma.ko \
-	$(LINUX_DIR)/drivers/dma/mtk-hsdma.ko
-  AUTOLOAD:=$(call AutoLoad,53,mtk-hsdma)
+	$(LINUX_DIR)/drivers/staging/mt7621-dma/hsdma-mt7621.ko
+  AUTOLOAD:=$(call AutoLoad,53,hsdma-mt7621)
 endef
 
 define KernelPackage/hsdma-mtk/description
diff --git a/iopsys-ramips/mt7620/base-files/etc/board.d/01_leds b/iopsys-ramips/mt7620/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..292f310d510c120ba79ddaafd166e0907f375133
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/board.d/01_leds
@@ -0,0 +1,226 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+aigale,ai-br100)
+	ucidef_set_led_netdev "wan" "wan" "blue:wan" "eth0.2"
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wlan" "wlan0"
+	;;
+alfa-network,ac1200rm)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan2g" "wlan1"
+	;;
+alfa-network,r36m-e4g)
+	ucidef_set_led_netdev "4g" "4g" "orange:4g" "wwan0"
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x8"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+alfa-network,tube-e4g)
+	ucidef_set_led_netdev "4g" "4g" "green:4g" "wwan0"
+	ucidef_set_led_netdev "lan" "lan" "blue:lan" "eth0"
+	;;
+asus,rp-n53)
+	ucidef_set_led_netdev "eth" "Network" "white:back" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wifi" "wlan0"
+	;;
+asus,rt-n12p)
+	ucidef_set_led_netdev "lan" "lan" "green:lan" eth0.1
+	ucidef_set_led_netdev "wan" "wan" "green:wan" eth0.2
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:air" "wlan0"
+	;;
+asus,rt-n14u)
+	ucidef_set_led_netdev "lan" "lan" "blue:lan" eth0.1
+	ucidef_set_led_netdev "wan" "wan" "blue:wan" eth0.2
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:air" "wlan0"
+	;;
+bdcom,wap2100-sk)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan2g" "wlan0"
+	;;
+comfast,cf-wr800n)
+	ucidef_set_led_netdev "lan" "lan" "white:ethernet" eth0.1
+	ucidef_set_led_netdev "wifi_led" "wifi" "white:wifi" "wlan0"
+	;;
+dlink,dir-810l|\
+trendnet,tew-810dr)
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+dlink,dwr-116-a1|\
+head-weblink,hdrm200|\
+ohyeah,oy-0001|\
+planex,mzk-ex300np|\
+zbtlink,zbt-we826-16m|\
+zbtlink,zbt-we826-32m|\
+zbtlink,zbt-wr8305rt|\
+zyxel,keenetic-omni|\
+zyxel,keenetic-omni-ii|\
+zyxel,keenetic-viva)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+dlink,dwr-118-a1)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1f"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x20"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan2g" "wlan1"
+	;;
+dlink,dwr-118-a2)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan2g" "wlan1"
+	;;
+dlink,dwr-921-c1|\
+dlink,dwr-922-e2)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x0f"
+	ucidef_set_led_netdev "signalstrength" "signalstrength" "green:sigstrength" "wwan0" "link"
+	ucidef_set_led_netdev "4g" "4g" "green:4g" "wwan0" "tx rx"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+dlink,dwr-960)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x2e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	;;
+dovado,tiny-ac)
+	ucidef_set_led_netdev "wifi_led" "wifi" "orange:wifi" "wlan0"
+	;;
+edimax,br-6478ac-v2|\
+edimax,ew-7478apc)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wlan" "wlan0"
+	;;
+edimax,ew-7476rpc|\
+edimax,ew-7478ac)
+	ucidef_set_led_switch "lan" "lan" "green:lan"  "switch0" "0x20"
+	;;
+elecom,wrh-300cr)
+	ucidef_set_led_netdev "lan" "lan" "green:ethernet" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+engenius,esr600)
+	ucidef_set_led_netdev "wlan5g" "5.0GHz" "blue:wlan5g" "wlan0"
+	ucidef_set_led_netdev "wlan2g" "2.4GHz" "blue:wlan2g" "wlan1"
+	;;
+glinet,gl-mt300a|\
+glinet,gl-mt300n|\
+glinet,gl-mt750)
+	ucidef_set_led_netdev "wifi_led" "wifi" "wlan" "wlan0"
+	;;
+hiwifi,hc5661|\
+hiwifi,hc5761)
+	ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x01"
+	;;
+hiwifi,hc5861)
+	ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x20"
+	;;
+hnet,c108)
+	ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0"
+	ucidef_set_led_netdev "modem" "modem" "green:modem" "wwan0"
+	;;
+iodata,wn-ac1167gr|\
+iodata,wn-ac733gr3)
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy0radio"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy1radio"
+	;;
+kimax,u25awf-h1)
+	ucidef_set_led_netdev "eth" "eth" "green:lan" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "red:wifi" "wlan0"
+	;;
+kimax,u35wf)
+	ucidef_set_led_netdev "eth" "ETH" "green:eth" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wifi" "wlan0"
+	;;
+kingston,mlw221|\
+kingston,mlwg2|\
+sanlinking,d240)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wifi" "wlan0"
+	;;
+lava,lr-25g001)
+	ucidef_set_led_netdev "wlan2g" "WiFi 2.4GHz" "green:wlan2g" "wlan1"
+	ucidef_set_led_netdev "wlan5g" "WiFi 5GHz" "green:wlan5g" "wlan0"
+	;;
+lenovo,newifi-y1)
+	ucidef_set_led_netdev "wifi" "WIFI" "blue:wifi" "wlan1"
+	ucidef_set_led_netdev "wifi5g" "WIFI5G" "blue:wifi5g" "wlan0"
+	ucidef_set_led_switch "lan" "LAN" "blue:lan" "switch0" "0x03"
+	;;
+lenovo,newifi-y1s)
+	ucidef_set_led_netdev "wifi" "WIFI" "yellow:wifi" "wlan1"
+	ucidef_set_led_netdev "wifi5g" "WIFI5G" "blue:wifi" "wlan0"
+	ucidef_set_led_netdev "wan" "WAN" "blue:internet" "eth0.2" "tx rx"
+	;;
+netgear,ex2700|\
+netgear,wn3000rp-v3)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:router" "wlan0"
+	;;
+netgear,ex3700|\
+netgear,ex6130)
+	ucidef_set_led_netdev "wlan5g" "ROUTER (green)" "green:router" "wlan0"
+	ucidef_set_led_netdev "wlan2g" "DEVICE (green)" "green:device" "wlan1"
+	;;
+netgear,jwnr2010-v5)
+	ucidef_set_led_switch "lan1" "lan1" "green:lan1" "switch0" "0x08"
+	ucidef_set_led_switch "lan2" "lan2" "green:lan2" "switch0" "0x04"
+	ucidef_set_led_switch "lan3" "lan3" "green:lan3" "switch0" "0x02"
+	ucidef_set_led_switch "lan4" "lan4" "green:lan4" "switch0" "0x01"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+phicomm,psg1208)
+	ucidef_set_led_netdev "wifi_led" "wifi" "white:wlan2g" "wlan0"
+	;;
+planex,mzk-ex750np|\
+zbtlink,zbt-we826-e)
+	ucidef_set_led_netdev "wifi_led" "wifi" "red:wifi" "wlan0"
+	;;
+ravpower,rp-wd03)
+	ucidef_set_led_netdev "internet" "internet" "green:wifi" "eth0"
+	;;
+tplink,archer-c2-v1)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch1" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch1" "0x01"
+	;;
+tplink,archer-c20-v1|\
+tplink,archer-c20i)
+	ucidef_set_led_switch "lan" "lan" "blue:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "blue:wan" "switch0" "0x01"
+	;;
+tplink,archer-c50-v1)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	;;
+tplink,archer-mr200)
+	ucidef_set_led_netdev "lan" "lan" "white:lan" "eth0.1"
+	ucidef_set_led_netdev "wan" "wan" "white:wan" "usb0"
+	;;
+tplink,re200-v1)
+	ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0"
+	;;
+youku,yk1)
+	ucidef_set_led_switch "wan" "wan" "blue:wan" "switch0" "0x10"
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:air" "wlan0"
+	;;
+zbtlink,zbt-ape522ii)
+	ucidef_set_led_netdev "wlan2g4" "wlan1-link" "green:wlan2g4" "wlan1"
+	ucidef_set_led_netdev "sys1" "wlan1" "green:sys1" "wlan1" "tx rx"
+	ucidef_set_led_netdev "sys2" "wlan0" "green:sys2" "wlan0" "tx rx"
+	;;
+zbtlink,zbt-wa05)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:air" "wlan0"
+	;;
+zbtlink,zbt-we1026-5g-16m)
+	ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+zbtlink,zbt-we1026-h-32m)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x8"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+zbtlink,zbt-we2026)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7620/base-files/etc/board.d/02_network b/iopsys-ramips/mt7620/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..398d275daee252f862999b91fb5eaf3b6f2bdfc8
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/board.d/02_network
@@ -0,0 +1,380 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	aigale,ai-br100|\
+	alfa-network,ac1200rm|\
+	asus,rt-n12p|\
+	dlink,dwr-116-a1|\
+	dlink,dwr-921-c1|\
+	dlink,dwr-922-e2|\
+	dovado,tiny-ac|\
+	ohyeah,oy-0001|\
+	phicomm,psg1208|\
+	planex,db-wrt01|\
+	planex,mzk-750dhp|\
+	ralink,mt7620a-evb|\
+	ralink,mt7620a-mt7610e-evb|\
+	ralink,mt7620a-v22sg-evb|\
+	sanlinking,d240|\
+	zbtlink,zbt-ape522ii|\
+	zbtlink,zbt-we826-16m|\
+	zbtlink,zbt-we826-32m|\
+	zbtlink,zbt-we826-e|\
+	zbtlink,zbt-wr8305rt|\
+	zyxel,keenetic-omni)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
+		;;
+	alfa-network,r36m-e4g|\
+	zbtlink,zbt-we1026-h-32m)
+		ucidef_add_switch "switch0" \
+			"3:lan" "4:wan" "6@eth0"
+		;;
+	alfa-network,tube-e4g|\
+	buffalo,wmr-300|\
+	dlink,dch-m225|\
+	edimax,ew-7476rpc|\
+	edimax,ew-7478ac|\
+	elecom,wrh-300cr|\
+	hootoo,ht-tm05|\
+	kimax,u25awf-h1|\
+	kimax,u35wf|\
+	kingston,mlw221|\
+	kingston,mlwg2|\
+	microduino,microwrt|\
+	netgear,ex2700|\
+	netgear,ex3700|\
+	netgear,ex6120|\
+	netgear,ex6130|\
+	netgear,wn3000rp-v3|\
+	planex,cs-qr10|\
+	planex,mzk-ex300np|\
+	planex,mzk-ex750np|\
+	ravpower,rp-wd03|\
+	sercomm,na930|\
+	tplink,re200-v1|\
+	tplink,re210-v1|\
+	yukai,bocco|\
+	zbtlink,zbt-cpe102|\
+	zte,q7)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_set_interface_lan "eth0"
+		;;
+	asus,rp-n53)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "6t@eth0"
+		;;
+	asus,rt-ac51u|\
+	asus,rt-ac54u|\
+	asus,rt-n14u|\
+	bdcom,wap2100-sk|\
+	edimax,ew-7478apc|\
+	glinet,gl-mt300a|\
+	glinet,gl-mt300n|\
+	glinet,gl-mt750|\
+	hiwifi,hc5661|\
+	wrtnode,wrtnode|\
+	zbtlink,zbt-wa05|\
+	zyxel,keenetic-omni-ii)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	buffalo,whr-300hp2|\
+	buffalo,whr-600d)
+		ucidef_add_switch "switch0" \
+			"0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "4:wan:5" "6@eth0"
+		;;
+	buffalo,whr-1166d)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "5:wan" "6@eth0"
+		;;
+	comfast,cf-wr800n|\
+	hnet,c108)
+		ucidef_add_switch "switch0" \
+			"4:lan" "6@eth0"
+		;;
+	dlink,dir-510l)
+		ucidef_add_switch "switch0" \
+			"0:lan" "6@eth0"
+		;;
+	dlink,dir-810l|\
+	netgear,jwnr2010-v5|\
+	phicomm,psg1218a|\
+	trendnet,tew-810dr|\
+	zbtlink,zbt-we2026)
+		ucidef_add_switch "switch0" \
+			"0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "4:wan" "6@eth0"
+		;;
+	dlink,dwr-118-a1)
+		ucidef_add_switch "switch0" \
+			"1:lan:2" "2:lan:3" "3:lan:1" "4:lan:0" "5:wan" "6@eth0"
+		;;
+	dlink,dwr-118-a2)
+		ucidef_add_switch "switch0" \
+			"1:lan:2" "2:lan:1" "3:lan:3" "4:lan" "0:wan" "6@eth0"
+		;;
+	dlink,dwr-960)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "5:lan" "0:wan" "6@eth0"
+		;;
+	edimax,br-6478ac-v2|\
+	lb-link,bl-w1200|\
+	tplink,archer-c2-v1)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_add_switch "switch1" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	engenius,esr600)
+		ucidef_add_switch "switch0" \
+			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan" "0@eth0"
+		;;
+	fon,fon2601)
+		ucidef_add_switch "switch0" \
+			"0:lan" "4:wan" "6@eth0"
+		;;
+	head-weblink,hdrm200)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "5:lan" "0:wan" "6@eth0"
+		;;
+	hiwifi,hc5761)
+		ucidef_add_switch "switch0" \
+			"1:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	hiwifi,hc5861)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "5:wan" "6@eth0"
+		;;
+	iodata,wn-ac1167gr|\
+	iodata,wn-ac733gr3|\
+	iptime,a1004ns)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_add_switch "switch1" \
+			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "6@eth0"
+		;;
+	iptime,a104ns)
+		ucidef_add_switch "switch0" \
+			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "6@eth0"
+		;;
+	lava,lr-25g001)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "5:wan" "0@eth0"
+		;;
+	lenovo,newifi-y1|\
+	xiaomi,miwifi-mini)
+		ucidef_add_switch "switch0" \
+			"0:lan:2" "1:lan:1" "4:wan" "6@eth0"
+		;;
+	lenovo,newifi-y1s)
+		ucidef_add_switch "switch0" \
+			"1:lan:4" "2:lan:3" "4:lan:2" "5:lan:1" "0:wan" "6@eth0"
+		;;
+	linksys,e1700|\
+	netis,wf2770|\
+	ralink,mt7620a-mt7530-evb)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_add_switch "switch1" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
+		;;
+	nexx,wt3020-4m|\
+	nexx,wt3020-8m)
+		ucidef_add_switch "switch0" \
+			"4:lan" "0:wan" "6@eth0"
+		;;
+	phicomm,k2g|\
+	wavlink,wl-wn530hg4)
+		ucidef_add_switch "switch0" \
+			"0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5:wan" "6@eth0"
+		;;
+	phicomm,psg1218b)
+		ucidef_add_switch "switch0" \
+			"0:lan:3" "1:lan:2" "2:lan:1" "3:wan" "6@eth0"
+		;;
+	tplink,archer-c20i|\
+	tplink,archer-c20-v1|\
+	tplink,archer-c50-v1)
+		ucidef_add_switch "switch0" \
+			"1:lan:3" "2:lan:4" "3:lan:1" "4:lan:2" "0:wan" "6@eth0"
+		;;
+	tplink,archer-mr200)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "6t@eth0"
+		ucidef_set_interface_wan "usb0"
+		;;
+	vonets,var11n-300)
+		ucidef_add_switch "switch0" \
+			"0:lan" "4:wan" "6@eth0"
+		;;
+	youku,yk1)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "4:wan" "6@eth0"
+		;;
+	zbtlink,zbt-we1026-5g-16m)
+		ucidef_add_switch "switch0" \
+			"0:lan" "6t@eth0"
+		;;
+	zyxel,keenetic-viva)
+		ucidef_add_switch "switch1" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "7t@eth0"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	aigale,ai-br100|\
+	asus,rt-n12p|\
+	asus,rt-n14u|\
+	bdcom,wap2100-sk|\
+	edimax,ew-7478apc|\
+	fon,fon2601|\
+	head-weblink,hdrm200|\
+	netgear,jwnr2010-v5|\
+	nexx,wt3020-4m|\
+	nexx,wt3020-8m|\
+	phicomm,psg1208|\
+	planex,db-wrt01|\
+	planex,mzk-750dhp|\
+	sanlinking,d240|\
+	vonets,var11n-300|\
+	wrtnode,wrtnode|\
+	youku,yk1|\
+	zbtlink,zbt-ape522ii|\
+	zbtlink,zbt-wa05|\
+	zbtlink,zbt-we2026|\
+	zbtlink,zbt-we826-16m|\
+	zbtlink,zbt-we826-32m|\
+	zbtlink,zbt-we826-e|\
+	zbtlink,zbt-wr8305rt)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1)
+		;;
+	alfa-network,ac1200rm|\
+	dlink,dir-810l|\
+	trendnet,tew-810dr)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
+		;;
+	alfa-network,r36m-e4g|\
+	zbtlink,zbt-we1026-h-32m)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	asus,rt-ac51u|\
+	asus,rt-ac54u)
+		lan_mac=$(mtd_get_mac_binary factory 0x22)
+		;;
+	dlink,dch-m225)
+		lan_mac=$(mtd_get_mac_ascii factory lanmac)
+		;;
+	dlink,dir-510l|\
+	dlink,dwr-116-a1|\
+	dlink,dwr-118-a1|\
+	dlink,dwr-118-a2|\
+	dlink,dwr-921-c1|\
+	dlink,dwr-922-e2|\
+	dlink,dwr-960|\
+	lava,lr-25g001)
+		wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
+		lan_mac=$(macaddr_add "$wan_mac" 1)
+		label_mac=$wan_mac
+		;;
+	dovado,tiny-ac)
+		lan_mac=$(mtd_get_mac_ascii u-boot-env LAN_MAC_ADDR)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env WAN_MAC_ADDR)
+		;;
+	edimax,br-6478ac-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 2)
+		;;
+	engenius,esr600)
+		lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		;;
+	glinet,gl-mt300a|\
+	glinet,gl-mt300n|\
+	glinet,gl-mt750)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4000)" 1)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	hiwifi,hc5661|\
+	hiwifi,hc5761|\
+	hiwifi,hc5861)
+		lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ")
+		label_mac=$lan_mac
+		[ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address)
+		wan_mac=$(macaddr_add "$lan_mac" 1)
+		;;
+	iodata,wn-ac1167gr|\
+	iodata,wn-ac733gr3)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		;;
+	iptime,a1004ns)
+		wan_mac=$(mtd_get_mac_binary u-boot 0x1fc40)
+		;;
+	iptime,a104ns)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary u-boot 0x1fc20)" 2)
+		;;
+	lb-link,bl-w1200|\
+	phicomm,k2g|\
+	phicomm,psg1218a|\
+	phicomm,psg1218b)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		label_mac=$wan_mac
+		;;
+	lenovo,newifi-y1|\
+	lenovo,newifi-y1s|\
+	ohyeah,oy-0001|\
+	wavlink,wl-wn530hg4)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		;;
+	linksys,e1700)
+		wan_mac=$(mtd_get_mac_ascii config WAN_MAC_ADDR)
+		;;
+	netis,wf2770)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		label_mac=$wan_mac
+		;;
+	tplink,archer-c2-v1|\
+	tplink,archer-c20-v1|\
+	tplink,archer-c20i|\
+	tplink,archer-c50-v1|\
+	tplink,archer-mr200)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary rom 0xf100)" 1)
+		;;
+	zbtlink,zbt-we1026-5g-16m)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	zyxel,keenetic-omni|\
+	zyxel,keenetic-omni-ii|\
+	zyxel,keenetic-viva)
+		wan_mac=$(mtd_get_mac_binary factory 0x28)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7620/base-files/etc/board.d/03_gpio_switches b/iopsys-ramips/mt7620/base-files/etc/board.d/03_gpio_switches
new file mode 100755
index 0000000000000000000000000000000000000000..959991598cdcded45d3595b3d89eeea1315d4f55
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/board.d/03_gpio_switches
@@ -0,0 +1,36 @@
+#!/bin/sh
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+dlink,dir-510l)
+	ucidef_add_gpio_switch "usb_enable1" "USB 1A enable" "12" "0"
+	ucidef_add_gpio_switch "usb_enable05" "USB 0.5A enable" "13" "1"
+	;;
+dlink,dwr-960)
+	ucidef_add_gpio_switch "power_mpcie" "mPCIe power" "0" "1"
+	;;
+head-weblink,hdrm200)
+	ucidef_add_gpio_switch "sim_switch" "SIM slot switch" "0"
+	ucidef_add_gpio_switch "io1" "I/O 1" "1"
+	ucidef_add_gpio_switch "io2" "I/O 2" "2"
+	ucidef_add_gpio_switch "io3" "I/O 3" "11"
+	ucidef_add_gpio_switch "io4" "I/O 4" "14"
+	ucidef_add_gpio_switch "power_mpcie" "mPCIe power" "21" "1"
+	;;
+lb-link,bl-w1200)
+	ucidef_add_gpio_switch "eth_leds_enable" "ETH LEDs enable" "10" "1"
+	;;
+zbtlink,zbt-we826-e)
+	ucidef_add_gpio_switch "sim_switch" "SIM slot switch" "13"
+	ucidef_add_gpio_switch "power_mpcie" "mPCIe power" "14" "1"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom b/iopsys-ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
new file mode 100644
index 0000000000000000000000000000000000000000..291f89f41df27809cce9aafd4e2604f8893b4403
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -0,0 +1,48 @@
+#!/bin/sh
+
+[ -e /lib/firmware/$FIRMWARE ] && exit 0
+
+. /lib/functions/caldata.sh
+
+jboot_eeprom_extract() {
+	local part=$1
+	local offset=$2
+	local mtd
+
+	mtd=$(find_mtd_part $part)
+	[ -n "$mtd" ] || \
+		caldata_die "no mtd device found for partition $part"
+
+	jboot_config_read -i $mtd -o $offset -e /lib/firmware/$FIRMWARE  2>/dev/null || \
+		caldata_die "failed to extract from $mtd"
+}
+
+board=$(board_name)
+
+case "$FIRMWARE" in
+"soc_wmac.eeprom")
+	case $board in
+	dlink,dir-510l|\
+	dlink,dwr-116-a1|\
+	dlink,dwr-118-a1|\
+	dlink,dwr-118-a2|\
+	dlink,dwr-921-c1|\
+	dlink,dwr-922-e2|\
+	dlink,dwr-960|\
+	lava,lr-25g001)
+		wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
+		wifi_mac=$(macaddr_add "$wan_mac" 1)
+		jboot_eeprom_extract "config" 0xE000
+		caldata_patch_mac $wifi_mac 0x4
+		;;
+	dovado,tiny-ac)
+		wifi_mac=$(mtd_get_mac_ascii u-boot-env INIC_MAC_ADDR)
+		caldata_extract "factory" 0x0 0x200
+		caldata_patch_mac $wifi_mac 0x4
+		;;
+	*)
+		caldata_die "Please define mtd-eeprom in $board DTS file!"
+		;;
+	esac
+	;;
+esac
diff --git a/iopsys-ramips/mt7620/base-files/etc/init.d/bootcount b/iopsys-ramips/mt7620/base-files/etc/init.d/bootcount
new file mode 100755
index 0000000000000000000000000000000000000000..06316e48caec1905b770c80ea1913f0dceada9ef
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/init.d/bootcount
@@ -0,0 +1,14 @@
+#!/bin/sh /etc/rc.common
+
+START=99
+
+boot() {
+	case $(board_name) in
+	alfa-network,ac1200rm|\
+	alfa-network,r36m-e4g|\
+	alfa-network,tube-e4g)
+		[ -n "$(fw_printenv bootcount bootchanged 2>/dev/null)" ] &&\
+			echo -e "bootcount\nbootchanged\n" | /usr/sbin/fw_setenv -s -
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt7620/base-files/etc/uci-defaults/05_fix-compat-version b/iopsys-ramips/mt7620/base-files/etc/uci-defaults/05_fix-compat-version
new file mode 100644
index 0000000000000000000000000000000000000000..9f981dfb830a3e2f277994ce775797ae9a8eea3e
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/etc/uci-defaults/05_fix-compat-version
@@ -0,0 +1,10 @@
+. /lib/functions.sh
+
+case "$(board_name)" in
+	ravpower,rp-wd03)
+		uci set system.@system[0].compat_version="2.0"
+		uci commit system
+		;;
+esac
+
+exit 0
diff --git a/iopsys-ramips/mt7620/base-files/lib/upgrade/platform.sh b/iopsys-ramips/mt7620/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..9f71dc918e50a21d3d14a077a4f4252e39267a68
--- /dev/null
+++ b/iopsys-ramips/mt7620/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,37 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+RAMFS_COPY_BIN='fw_printenv fw_setenv'
+RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	alfa-network,ac1200rm|\
+	alfa-network,r36m-e4g|\
+	alfa-network,tube-e4g)
+		[ "$(fw_printenv -n dual_image 2>/dev/null)" = "1" ] &&\
+		[ -n "$(find_mtd_part backup)" ] && {
+			PART_NAME=backup
+			if [ "$(fw_printenv -n bootactive 2>/dev/null)" = "1" ]; then
+				fw_setenv bootactive 2 || exit 1
+			else
+				fw_setenv bootactive 1 || exit 1
+			fi
+		}
+		default_do_upgrade "$1"
+		;;
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt7620/config-4.14 b/iopsys-ramips/mt7620/config-5.4
similarity index 78%
rename from iopsys-ramips/mt7620/config-4.14
rename to iopsys-ramips/mt7620/config-5.4
index 74da9ec5a1075e071f001720367563cbbfbe27fc..6a4dde7ecf3abc18f20bb65161d03f6ae884b53c 100644
--- a/iopsys-ramips/mt7620/config-4.14
+++ b/iopsys-ramips/mt7620/config-5.4
@@ -1,25 +1,23 @@
 CONFIG_AR8216_PHY=y
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
 CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_AT803X_PHY=y
 CONFIG_BLK_MQ_PCI=y
@@ -32,7 +30,9 @@ CONFIG_CLONE_BACKWARDS=y
 CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
 CONFIG_CMDLINE_BOOL=y
 # CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -44,84 +44,93 @@ CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DEBUG_PINCTRL=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
+# CONFIG_DMA_RALINK is not set
 # CONFIG_DTB_MT7620A_EVAL is not set
 # CONFIG_DTB_OMEGA2P is not set
 CONFIG_DTB_RT_NONE=y
 # CONFIG_DTB_VOCORE2 is not set
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_ETHERNET_PACKET_MANGLE=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MT7621 is not set
 CONFIG_GPIO_RALINK=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_HAVE_ARCH_COMPILER_H=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_COPY_THREAD_TLS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FAST_GUP=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
 CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
 CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
 CONFIG_HAVE_NET_DSA=y
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_ICPLUS_PHY=y
 CONFIG_INITRAMFS_SOURCE=""
@@ -132,24 +141,23 @@ CONFIG_IRQ_INTC=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MARVELL_PHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CBPF_JIT=y
 CONFIG_MIPS_CLOCK_VSYSCALL=y
 # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
@@ -157,7 +165,6 @@ CONFIG_MODULES_USE_ELF_REL=y
 # CONFIG_MT7621_WDT is not set
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
@@ -166,31 +173,32 @@ CONFIG_MTD_SPLIT_JIMAGE_FW=y
 CONFIG_MTD_SPLIT_SEAMA_FW=y
 CONFIG_MTD_SPLIT_TPLINK_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
+CONFIG_MTD_VIRT_CONCAT=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_MEDIATEK_GSW_MT7620=y
-CONFIG_NET_MEDIATEK_MDIO=y
-CONFIG_NET_MEDIATEK_MDIO_MT7620=y
-CONFIG_NET_MEDIATEK_MT7620=y
-# CONFIG_NET_MEDIATEK_RT3050 is not set
-CONFIG_NET_MEDIATEK_SOC=y
-CONFIG_NET_VENDOR_MEDIATEK=y
+CONFIG_NET_RALINK_GSW_MT7620=y
+CONFIG_NET_RALINK_MDIO=y
+CONFIG_NET_RALINK_MDIO_MT7620=y
+CONFIG_NET_RALINK_MT7620=y
+# CONFIG_NET_RALINK_RT3050 is not set
+CONFIG_NET_RALINK_SOC=y
+# CONFIG_NET_VENDOR_MEDIATEK is not set
+CONFIG_NET_VENDOR_RALINK=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DRIVERS_LEGACY=y
+# CONFIG_PCI_MT7621 is not set
+# CONFIG_PCI_MT7621_PHY is not set
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -200,15 +208,11 @@ CONFIG_PINCTRL_RT2880=y
 # CONFIG_PINCTRL_SINGLE is not set
 CONFIG_RALINK=y
 CONFIG_RALINK_WDT=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_RT288X=y
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SOC_MT7620=y
 # CONFIG_SOC_MT7621 is not set
@@ -217,6 +221,7 @@ CONFIG_SOC_MT7620=y
 # CONFIG_SOC_RT3883 is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 # CONFIG_SPI_MT7621 is not set
 CONFIG_SPI_RT2880=y
 CONFIG_SRCU=y
@@ -231,6 +236,7 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
diff --git a/iopsys-ramips/mt7620/profiles/00-default.mk b/iopsys-ramips/mt7620/profiles/00-default.mk
deleted file mode 100644
index 912d28880e67aa1d29c75bb4cfe5346e8e343ac2..0000000000000000000000000000000000000000
--- a/iopsys-ramips/mt7620/profiles/00-default.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (C) 2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
-	NAME:=Default Profile
-	PACKAGES:= kmod-usb-core kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-	PRIORITY:=1
-endef
-
-define Profile/Default/Description
-	Default package set compatible with most boards.
-endef
-$(eval $(call Profile,Default))
diff --git a/iopsys-ramips/mt7620/target.mk b/iopsys-ramips/mt7620/target.mk
index f3d450edf4aba37690b6faaa09f3735b0c875bc2..5fc61e49cf8f317e22a24b784b83196c8f7ee70c 100644
--- a/iopsys-ramips/mt7620/target.mk
+++ b/iopsys-ramips/mt7620/target.mk
@@ -7,7 +7,7 @@ BOARDNAME:=MT7620 based boards
 FEATURES+=usb ramdisk
 CPU_TYPE:=24kc
 
-DEFAULT_PACKAGES += kmod-rt2800-soc wpad-basic
+DEFAULT_PACKAGES += kmod-rt2800-soc wpad-basic-wolfssl swconfig
 
 define Target/Description
 	Build firmware images for Ralink MT7620 based boards.
diff --git a/iopsys-ramips/mt7621/base-files/etc/board.d/01_leds b/iopsys-ramips/mt7621/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..5fa9ad3fe81ad2bdaeb5179a52ec03359c7b4099
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/board.d/01_leds
@@ -0,0 +1,106 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+asus,rt-n56u-b1)
+	ucidef_set_led_netdev "lan" "LAN link" "blue:lan" "br-lan"
+	ucidef_set_led_netdev "wan" "WAN link" "blue:wan" "wan"
+	;;
+d-team,newifi-d2)
+	ucidef_set_led_netdev "internet" "internet" "amber:internet" "wan"
+	ucidef_set_led_netdev "wlan2g" "WiFi 2.4GHz" "blue:wlan2g" "wlan0"
+	ucidef_set_led_netdev "wlan5g" "WiFi 5GHz" "blue:wlan5g" "wlan1"
+	;;
+d-team,pbr-m1|\
+gehua,ghl-r-001|\
+jcg,y2|\
+xzwifi,creativebox-v1)
+	ucidef_set_led_netdev "internet" "internet" "blue:internet" "wan"
+	;;
+dlink,dir-1960-a1|\
+dlink,dir-2640-a1|\
+dlink,dir-2660-a1)
+	ucidef_set_led_netdev "wan" "wan" "white:net" "wan"
+	;;
+dlink,dir-860l-b1|\
+dlink,dir-867-a1|\
+dlink,dir-878-a1|\
+dlink,dir-882-a1|\
+dlink,dir-882-r1)
+	ucidef_set_led_netdev "wan" "wan" "green:net" "wan"
+	;;
+gnubee,gb-pc1|\
+gnubee,gb-pc2)
+	ucidef_set_led_netdev "lan1" "lan1" "green:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "lan2" "green:lan2" "lan2"
+	;;
+linksys,ea7300-v1|\
+linksys,ea7300-v2|\
+linksys,ea7500-v2)
+	ucidef_set_led_netdev "lan1" "lan1 link" "green:lan1" "lan1" "link"
+	ucidef_set_led_netdev "lan2" "lan2 link" "green:lan2" "lan2" "link"
+	ucidef_set_led_netdev "lan3" "lan3 link" "green:lan3" "lan3" "link"
+	ucidef_set_led_netdev "lan4" "lan4 link" "green:lan4" "lan4" "link"
+	ucidef_set_led_netdev "wan" "wan link" "green:wan" "wan" "link"
+	;;
+mikrotik,routerboard-760igs)
+	ucidef_set_led_netdev "sfp" "SFP" "blue:sfp" "sfp"
+	;;
+mikrotik,routerboard-m11g)
+	ucidef_set_rssimon "wlan0" "200000" "1"
+	ucidef_set_led_rssi "rssilow" "RSSILOW" "green:rssi0" "wlan0" "1" "100"
+	ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "green:rssi1" "wlan0" "20" "100"
+	ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "green:rssi2" "wlan0" "40" "100"
+	ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "green:rssi3" "wlan0" "60" "100"
+	ucidef_set_led_rssi "rssiveryhigh" "RSSIVERYHIGH" "green:rssi4" "wlan0" "80" "100"
+	;;
+mtc,wr1201)
+	ucidef_set_led_netdev "eth_link" "LAN link" "green:eth_link" "br-lan"
+	;;
+netgear,r6220|\
+netgear,r6260|\
+netgear,r6350|\
+netgear,r6850|\
+netgear,wac124|\
+netgear,wndr3700-v5)
+	ucidef_set_led_netdev "wan" "wan" "green:wan" "wan"
+	;;
+netgear,r6700-v2|\
+netgear,r6800)
+	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
+	ucidef_set_led_netdev "lan1" "LAN1" "white:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "LAN2" "white:lan2" "lan2"
+	ucidef_set_led_netdev "lan3" "LAN3" "white:lan3" "lan3"
+	ucidef_set_led_netdev "lan4" "LAN4" "white:lan4" "lan4"
+	;;
+tplink,re350-v1)
+	ucidef_set_led_netdev "wifi2g" "Wifi 2.4G" "blue:wifi2G" "wlan0"
+	ucidef_set_led_netdev "wifi5g" "Wifi 5G" "blue:wifi5G" "wlan1"
+	ucidef_set_led_netdev "eth_act" "LAN act" "green:eth_act" "lan" "tx rx"
+	ucidef_set_led_netdev "eth_link" "LAN link" "green:eth_link" "lan" "link"
+	;;
+tplink,re500-v1|\
+tplink,re650-v1)
+	ucidef_set_led_netdev "eth_act" "LAN act" "green:eth_act" "lan" "tx rx"
+	ucidef_set_led_netdev "eth_link" "LAN link" "green:eth_link" "lan" "link"
+	;;
+xiaomi,mi-router-ac2100)
+	ucidef_set_led_netdev "wan-blue" "WAN (blue)" "blue:wan" "wan"
+	;;
+xiaomi,redmi-router-ac2100)
+	ucidef_set_led_netdev "wan" "wan" "white:wan" "wan"
+	;;
+youhua,wr1200js)
+	ucidef_set_led_netdev "internet" "INTERNET" "green:wan" "wan"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7621/base-files/etc/board.d/02_network b/iopsys-ramips/mt7621/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..89e679be7cd802f40f2f2db080776c607e52e0d6
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/board.d/02_network
@@ -0,0 +1,155 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	asiarf,ap7621-001|\
+	winstars,ws-wn583a6)
+		ucidef_set_interfaces_lan_wan "lan" "wan"
+		;;
+	asiarf,ap7621-nv1|\
+	glinet,gl-mt1300|\
+	lenovo,newifi-d1|\
+	mikrotik,routerboard-m33g|\
+	xiaomi,mi-router-3g|\
+	xiaomi,mi-router-3g-v2|\
+	xiaomi,mi-router-4|\
+	xiaomi,mi-router-4a-gigabit)
+		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
+		;;
+	edimax,re23s|\
+	mikrotik,routerboard-m11g|\
+	netgear,ex6150|\
+	thunder,timecloud|\
+	tplink,re350-v1|\
+	tplink,re500-v1|\
+	tplink,re650-v1|\
+	ubnt,unifi-6-lite|\
+	ubnt,unifi-nanohd)
+		ucidef_set_interface_lan "lan"
+		;;
+	gehua,ghl-r-001|\
+	hiwifi,hc5962|\
+	xiaomi,mi-router-3-pro|\
+	xiaomi,mi-router-ac2100|\
+	xiaomi,redmi-router-ac2100)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		;;
+	gnubee,gb-pc1|\
+	gnubee,gb-pc2)
+		ucidef_set_interface_lan "lan1 lan2"
+		;;
+	linksys,re6500|\
+	netgear,wac104)
+		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
+		;;
+	mikrotik,routerboard-750gr3)
+		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4 lan5" "wan"
+		;;
+	mikrotik,routerboard-760igs)
+		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4 lan5" "wan sfp"
+		;;
+	tplink,eap235-wall-v1)
+		ucidef_set_interface_lan "lan0 lan1 lan2 lan3"
+		;;
+	ubnt,edgerouter-x)
+		ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4" "eth0"
+		;;
+	ubnt,edgerouter-x-sfp)
+		ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0"
+		;;
+	zyxel,wap6805)
+		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
+		ucidef_set_interface "qtn" ifname "eth1" protocol "static" ipaddr "1.1.1.1" netmask "255.255.255.0"
+		;;
+	*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	asus,rt-ac65p|\
+	asus,rt-ac85p)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env et1macaddr)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	buffalo,wsr-1166dhp)
+		local index="$(find_mtd_index "board_data")"
+		wan_mac="$(grep -m1 mac= "/dev/mtd${index}" | cut -d= -f2)"
+		lan_mac=$wan_mac
+		;;
+	dlink,dir-860l-b1)
+		lan_mac=$(mtd_get_mac_ascii factory lanmac)
+		wan_mac=$(mtd_get_mac_ascii factory wanmac)
+		;;
+	edimax,ra21s|\
+	edimax,rg21s)
+		lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		;;
+	elecom,wrc-2533ghbk-i)
+		lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		label_mac=$wan_mac
+		;;
+	hiwifi,hc5962)
+		lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ")
+		label_mac=$lan_mac
+		[ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address)
+		wan_mac=$(macaddr_add "$lan_mac" 1)
+		;;
+	iodata,wnpr2600g)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		label_mac=$wan_mac
+		;;
+	jcg,y2|\
+	wavlink,wl-wn531a6|\
+	winstars,ws-wn583a6|\
+	zbtlink,zbt-we1326|\
+	zbtlink,zbt-wg3526-16m|\
+	zbtlink,zbt-wg3526-32m)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	linksys,ea7300-v1|\
+	linksys,ea7300-v2|\
+	linksys,ea7500-v2)
+		lan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
+		wan_mac=$lan_mac
+		label_mac=$lan_mac
+		;;
+	mikrotik,routerboard-750gr3|\
+	mikrotik,routerboard-760igs|\
+	mikrotik,routerboard-m11g|\
+	mikrotik,routerboard-m33g)
+		label_mac=$(cat "/sys/firmware/mikrotik/hard_config/mac_base")
+		wan_mac=$label_mac
+		lan_mac=$(macaddr_add $label_mac 1)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7621/base-files/etc/board.d/03_gpio_switches b/iopsys-ramips/mt7621/base-files/etc/board.d/03_gpio_switches
new file mode 100755
index 0000000000000000000000000000000000000000..82bbdd24f674e7512e493d71495e40286e1fc14c
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/board.d/03_gpio_switches
@@ -0,0 +1,33 @@
+#!/bin/sh
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+mikrotik,routerboard-760igs)
+	ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "497"
+	;;
+telco-electronics,x1)
+	ucidef_add_gpio_switch "modem_reset" "Modem Reset" "496"
+	;;
+ubnt,edgerouter-x)
+	ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "480"
+	;;
+ubnt,edgerouter-x-sfp)
+	ucidef_add_gpio_switch "poe_power_port0" "PoE Power Port0" "400"
+	ucidef_add_gpio_switch "poe_power_port1" "PoE Power Port1" "401"
+	ucidef_add_gpio_switch "poe_power_port2" "PoE Power Port2" "402"
+	ucidef_add_gpio_switch "poe_power_port3" "PoE Power Port3" "403"
+	ucidef_add_gpio_switch "poe_power_port4" "PoE Power Port4" "404"
+	;;
+zyxel,wap6805)
+	ucidef_add_gpio_switch "qtn_power" "Quantenna Module Power" "496" "1"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7621/base-files/etc/board.d/05_compat-version b/iopsys-ramips/mt7621/base-files/etc/board.d/05_compat-version
new file mode 100755
index 0000000000000000000000000000000000000000..d79092f76f7e6d2e2ab819034bd5b1aee11e5356
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/board.d/05_compat-version
@@ -0,0 +1,19 @@
+#!/bin/sh
+#
+# Copyright (C) 2020 OpenWrt.org
+#
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+	*)
+		ucidef_set_compat_version "1.1"
+		;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/iopsys-ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
new file mode 100644
index 0000000000000000000000000000000000000000..e7f778aaf88a00913583adcf7336f9bd8f909414
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
@@ -0,0 +1,24 @@
+[ "$ACTION" == "add" ] || exit 0
+
+PHYNBR=${DEVPATH##*/phy}
+
+[ -n $PHYNBR ] || exit 0
+
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+board=$(board_name)
+
+case "$board" in
+	glinet,gl-mt1300)
+		[ "$PHYNBR" = "1" ] && \
+			macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress
+		;;
+	linksys,ea7300-v1|\
+	linksys,ea7300-v2|\
+	linksys,ea7500-v2)
+		hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
+		[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
+		[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
+		;;
+esac
diff --git a/iopsys-ramips/mt7621/base-files/etc/init.d/bootcount b/iopsys-ramips/mt7621/base-files/etc/init.d/bootcount
new file mode 100755
index 0000000000000000000000000000000000000000..7ef0053e679047165096244a00cb433960eec890
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/init.d/bootcount
@@ -0,0 +1,20 @@
+#!/bin/sh /etc/rc.common
+
+START=99
+
+boot() {
+	case $(board_name) in
+	alfa-network,quad-e4g)
+		[ -n "$(fw_printenv bootcount bootchanged 2>/dev/null)" ] &&\
+			echo -e "bootcount\nbootchanged\n" | /usr/sbin/fw_setenv -s -
+		;;
+	linksys,ea7300-v1|\
+	linksys,ea7300-v2|\
+	linksys,ea7500-v2)
+		mtd resetbc s_env || true
+		;;
+	samknows,whitebox-v8)
+		fw_setenv bootcount 0
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt7621/base-files/etc/init.d/set-irq-affinity b/iopsys-ramips/mt7621/base-files/etc/init.d/set-irq-affinity
new file mode 100755
index 0000000000000000000000000000000000000000..c118d928a76badd77dff28b272e5f904ae4a712a
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/init.d/set-irq-affinity
@@ -0,0 +1,19 @@
+#!/bin/sh /etc/rc.common
+
+START=99
+
+start() {
+	if grep -q 'processor.*: 2' /proc/cpuinfo; then
+		mask=4
+	elif grep -q 'processor.*: 1' /proc/cpuinfo; then
+		mask=2
+	else
+		return
+	fi
+
+	for irq in $(grep "mt76..e" /proc/interrupts | cut -d: -f1 | sed 's, *,,')
+	do
+		echo "$mask" > "/proc/irq/$irq/smp_affinity"
+		[ $mask = 4 ] && mask=8
+	done
+}
diff --git a/iopsys-ramips/mt7621/base-files/etc/uci-defaults/01_enable_packet_steering b/iopsys-ramips/mt7621/base-files/etc/uci-defaults/01_enable_packet_steering
new file mode 100644
index 0000000000000000000000000000000000000000..114c7e1a463f96a7107f7b4360c7a20d889da867
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/etc/uci-defaults/01_enable_packet_steering
@@ -0,0 +1,5 @@
+uci -q get network.globals.packet_steering > /dev/null || {
+	uci set network.globals='globals'
+	uci set network.globals.packet_steering=1
+	uci commit network
+}
diff --git a/iopsys-ramips/mt7621/base-files/lib/preinit/07_mt7621_bringup_dsa_master b/iopsys-ramips/mt7621/base-files/lib/preinit/07_mt7621_bringup_dsa_master
new file mode 100644
index 0000000000000000000000000000000000000000..0f4660d242b5bbf1c559518e51f7699029ce6d36
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/lib/preinit/07_mt7621_bringup_dsa_master
@@ -0,0 +1,20 @@
+. /lib/functions.sh
+
+mt7621_bringup_dsa_master() {
+    local board=$(board_name)
+    local masterif
+
+    case "$board" in
+    ubnt,edgerouter-x|\
+    ubnt,edgerouter-x-sfp)
+        masterif="dsa"
+        ;;
+    *)
+        masterif="eth0"
+        ;;
+    esac
+
+    ip link set $masterif up
+}
+
+boot_hook_add preinit_main mt7621_bringup_dsa_master
\ No newline at end of file
diff --git a/iopsys-ramips/mt7621/base-files/lib/upgrade/iodata.sh b/iopsys-ramips/mt7621/base-files/lib/upgrade/iodata.sh
new file mode 100644
index 0000000000000000000000000000000000000000..8303ae992262ff3d7e8ff9fcf371ab24a965f59f
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/lib/upgrade/iodata.sh
@@ -0,0 +1,64 @@
+#
+# Copyright (C) 2019 OpenWrt.org
+#
+
+. /lib/functions.sh
+
+iodata_mstc_prepare_fail() {
+	echo "failed to check and prepare the environment, rebooting..."
+	umount -a
+	reboot -f
+}
+
+# I-O DATA devices manufactured by MSTC (MitraStar Technology Corp.)
+# have two important flags:
+# - bootnum: switch between two os images
+#     use 1st image in OpenWrt
+# - debugflag: enable/disable debug
+#     users can interrupt Z-Loader for recovering the device if enabled
+#
+# parameters:
+# - $1: the offset of "debugflag"
+iodata_mstc_upgrade_prepare() {
+	local persist_mtd="$(find_mtd_part persist)"
+	local factory_mtd="$(find_mtd_part factory)"
+	local dflag_offset="$1"
+
+	if [ -z "$dflag_offset" ]; then
+		echo 'no debugflag offset provided'
+		iodata_mstc_prepare_fail
+	fi
+
+	if [ -z "$persist_mtd" ] || [ -z "$factory_mtd" ]; then
+		echo 'cannot find mtd partition(s), "factory" or "persist"'
+		iodata_mstc_prepare_fail
+	fi
+
+	local bootnum=$(hexdump -s 4 -n 1 -e '"%x"' ${persist_mtd})
+	local debugflag=$(hexdump -s $((dflag_offset)) -n 1 -e '"%x"' ${factory_mtd})
+
+	if [ "$bootnum" != "1" ] && [ "$bootnum" != "2" ]; then
+		echo "failed to get bootnum, please check the value at 0x4 in ${persist_mtd}"
+		iodata_mstc_prepare_fail
+	fi
+	if [ "$debugflag" != "0" ] && [ "$debugflag" != "1" ]; then
+		echo "failed to get debugflag, please check the value at ${dflag_offset} in ${factory_mtd}"
+		iodata_mstc_prepare_fail
+	fi
+	echo "current: bootnum => ${bootnum}, debugflag => ${debugflag}"
+
+	if [ "$bootnum" = "2" ]; then
+		if ! (echo -ne "\x01" | dd bs=1 count=1 seek=4 conv=notrunc of=${persist_mtd} 2>/dev/null); then
+			echo "failed to set bootnum"
+			iodata_mstc_prepare_fail
+		fi
+		echo "### switch to 1st os-image on next boot ###"
+	fi
+	if [ "$debugflag" = "0" ]; then
+		if ! (echo -ne "\x01" | dd bs=1 count=1 seek=$((dflag_offset)) conv=notrunc of=${factory_mtd} 2>/dev/null); then
+			echo "failed to set debugflag"
+			iodata_mstc_prepare_fail
+		fi
+		echo "### enable debug ###"
+	fi
+}
diff --git a/iopsys-ramips/mt7621/base-files/lib/upgrade/platform.sh b/iopsys-ramips/mt7621/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..c9152c5cf4d663fb922d74c8081e982662b92461
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,98 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+RAMFS_COPY_BIN='fw_printenv fw_setenv'
+RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	alfa-network,quad-e4g)
+		[ "$(fw_printenv -n dual_image 2>/dev/null)" = "1" ] &&\
+		[ -n "$(find_mtd_part backup)" ] && {
+			PART_NAME=backup
+			if [ "$(fw_printenv -n bootactive 2>/dev/null)" = "1" ]; then
+				fw_setenv bootactive 2 || exit 1
+			else
+				fw_setenv bootactive 1 || exit 1
+			fi
+		}
+		;;
+	mikrotik,routerboard-750gr3|\
+	mikrotik,routerboard-760igs|\
+	mikrotik,routerboard-m11g|\
+	mikrotik,routerboard-m33g)
+		[ "$(rootfs_type)" = "tmpfs" ] && mtd erase firmware
+		;;
+	asus,rt-ac65p|\
+	asus,rt-ac85p)
+		echo "Backing up firmware"
+		dd if=/dev/mtd4 bs=1024 count=4096  > /tmp/backup_firmware.bin
+		dd if=/dev/mtd5 bs=1024 count=52224 >> /tmp/backup_firmware.bin
+		mtd -e firmware2 write /tmp/backup_firmware.bin firmware2
+		;;
+	esac
+
+	case "$board" in
+	asus,rt-ac65p|\
+	asus,rt-ac85p|\
+	dlink,dir-1960-a1|\
+	dlink,dir-2640-a1|\
+	dlink,dir-2660-a1|\
+	hiwifi,hc5962|\
+	linksys,ea7300-v1|\
+	linksys,ea7300-v2|\
+	linksys,ea7500-v2|\
+	netgear,r6220|\
+	netgear,r6260|\
+	netgear,r6350|\
+	netgear,r6700-v2|\
+	netgear,r6800|\
+	netgear,r6850|\
+	netgear,wac104|\
+	netgear,wac124|\
+	netis,wf2881|\
+	xiaomi,mi-router-3g|\
+	xiaomi,mi-router-3-pro|\
+	xiaomi,mi-router-4|\
+	xiaomi,mi-router-ac2100|\
+	xiaomi,redmi-router-ac2100)
+		nand_do_upgrade "$1"
+		;;
+	iodata,wn-ax1167gr2|\
+	iodata,wn-ax2033gr|\
+	iodata,wn-dx1167r)
+		iodata_mstc_upgrade_prepare "0xfe75"
+		nand_do_upgrade "$1"
+		;;
+	iodata,wn-dx1200gr)
+		iodata_mstc_upgrade_prepare "0x1fe75"
+		nand_do_upgrade "$1"
+		;;
+	ubnt,edgerouter-x|\
+	ubnt,edgerouter-x-sfp)
+		platform_upgrade_ubnt_erx "$1"
+		;;
+	zyxel,wap6805)
+		local kernel2_mtd="$(find_mtd_part Kernel2)"
+		[ "$(hexdump -n 4 -e '"%x"' $kernel2_mtd)" = "56190527" ] &&\
+		[ "$(hexdump -n 4 -s 104 -e '"%x"' $kernel2_mtd)" != "0" ] &&\
+		dd bs=4 count=1 seek=26 conv=notrunc if=/dev/zero of=$kernel2_mtd 2>/dev/null &&\
+		echo "Kernel2 sequence number was reset to 0"
+		CI_KERNPART="Kernel"
+		nand_do_upgrade "$1"
+		;;
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt7621/base-files/lib/upgrade/ubnt.sh b/iopsys-ramips/mt7621/base-files/lib/upgrade/ubnt.sh
new file mode 100644
index 0000000000000000000000000000000000000000..748ec8e6286ee6acf0fe6957308088935653fe6d
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/lib/upgrade/ubnt.sh
@@ -0,0 +1,78 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+
+. /lib/functions.sh
+#Note: this code also uses some functions from nand.sh, but it is expected to be run by nand.sh, so we are not
+#sourcing it explicitly here
+
+UBNT_ERX_KERNEL_INDEX_OFFSET=160
+
+ubnt_get_target_kernel() {
+	local factory_mtd=$1
+	local current_kernel_index=$(hexdump -s $UBNT_ERX_KERNEL_INDEX_OFFSET -n 1 -e '/1 "%X "' ${factory_mtd})
+
+	if [ $current_kernel_index == "0" ]; then
+		echo 'kernel2'
+	elif [ $current_kernel_index == "1" ]; then
+		echo 'kernel1'
+	fi
+}
+
+ubnt_update_target_kernel() {
+	local factory_mtd=$1
+	local kernel_part=$2
+
+	local new_kernel_index
+	if [ $kernel_part == "kernel1" ]; then
+		new_kernel_index="\x00"
+	elif [ $kernel_part == "kernel2" ]; then
+		new_kernel_index="\x01"
+	else
+		echo 'Unknown kernel image index' >&2
+		return 1
+	fi
+
+	if ! (echo -e $new_kernel_index | dd of=${factory_mtd} bs=1 count=1 seek=$UBNT_ERX_KERNEL_INDEX_OFFSET); then
+		echo 'Failed to update kernel bootup index' >&2
+		return 1
+	fi
+}
+
+platform_upgrade_ubnt_erx() {
+	local factory_mtd=$(find_mtd_part factory)
+	if [ -z "$factory_mtd" ]; then
+		echo "cannot find factory partition" >&2
+		exit 1
+	fi
+
+	local kernel_part="$(ubnt_get_target_kernel ${factory_mtd})"
+	if [ -z "$kernel_part" ]; then
+		echo "cannot find factory partition" >&2
+		exit 1
+	fi
+
+	# This is a global defined in nand.sh, sets partition kernel will be flashed into
+	CI_KERNPART=${kernel_part}
+
+	#Remove volume possibly left over from stock firmware
+	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	if [ -z "$ubidev" ]; then
+		local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
+		if [ -z "$mtdnum" ]; then
+			echo "cannot find ubi mtd partition $CI_UBIPART" >&2
+			exit 1
+		fi
+		ubiattach -m "$mtdnum"
+		sync
+		ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	fi
+	if [ -n "$ubidev" ]; then
+		local troot_ubivol="$( nand_find_volume $ubidev troot )"
+		[ -n "$troot_ubivol" ] && ubirmvol /dev/$ubidev -N troot || true
+	fi
+
+	ubnt_update_target_kernel ${factory_mtd} ${kernel_part} || exit 1
+
+	nand_do_upgrade "$1"
+}
diff --git a/iopsys-ramips/mt7621/base-files/sbin/fixup-mac-address b/iopsys-ramips/mt7621/base-files/sbin/fixup-mac-address
new file mode 100755
index 0000000000000000000000000000000000000000..dad15c584216dfb5d913211c66c3b1f40f8587b9
--- /dev/null
+++ b/iopsys-ramips/mt7621/base-files/sbin/fixup-mac-address
@@ -0,0 +1,80 @@
+#!/bin/sh
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+partname=""
+offset=""
+NEW_MAC=
+YES=
+
+board=$(board_name)
+case $board in
+	mqmaker,witi)
+		partname=factory
+		offset=$((0xe000))
+	;;
+	*)
+		echo "Unsupported board"
+		exit 1
+	;;
+esac
+
+while [ -n "$1" ]; do
+	case "$1" in
+		??:??:??:??:??:??) NEW_MAC="$1";;
+		-y) YES=1;;
+		*)
+			cat <<EOF
+Unknown option/argument '$1'
+Usage: $0 [-y] [<macaddr>]
+EOF
+			exit 1
+		;;
+	esac
+	shift
+done
+
+ask_bool() {
+	local message="$1"
+	local default="$((! ${2:-0}))"
+	[ -n "$YES" ] && return 0
+	echo -n "$message "
+	read opt
+	case "$opt" in
+		y|Y) return 0;;
+		n|N) return 1;;
+		*) return $default;;
+	esac
+}
+
+convert_hex() {
+	hexdump -e '/1 "%02x "'
+}
+
+gen_mac() {
+	dd if=/dev/urandom bs=6 count=1 2>/dev/null
+}
+
+mac="$(mtd_get_mac_binary $partname $offset)"
+case "$mac" in
+	00:00:00:00:00:00);;
+	ff:ff:ff:ff:ff:ff);;
+	*)
+		echo "Current MAC address: $mac"
+		ask_bool "Overwrite (y/N)?" 0 || exit
+	;;
+esac
+
+if [ -n "$NEW_MAC" ]; then
+	set -- $(echo "$NEW_MAC" | sed 's,:, ,g')
+else
+	set -- $(gen_mac | convert_hex)
+	set -- $(printf %02x $(( (0x$1 & 0xfe) | 0x02 ))) $2 $3 $4 $5 $6
+fi
+echo "New MAC address: $1:$2:$3:$4:$5:$6"
+ask_bool "Write to EEPROM (y/N)?" || exit
+
+part=$(find_mtd_part "$partname")
+[ -n "$part" ] || exit
+echo -ne "\x$1\x$2\x$3\x$4\x$5\x$6" | dd of=$part conv=notrunc bs=1 count=6 seek=$offset 2>/dev/null
+echo "Done"
diff --git a/iopsys-ramips/mt7621/config-4.14 b/iopsys-ramips/mt7621/config-5.4
similarity index 66%
rename from iopsys-ramips/mt7621/config-4.14
rename to iopsys-ramips/mt7621/config-5.4
index eb4569bff204fade586f4b5a27d43e1b82f9fc06..057c782760ae6d613e0f5c27254c7667d86b2398 100644
--- a/iopsys-ramips/mt7621/config-4.14
+++ b/iopsys-ramips/mt7621/config-5.4
@@ -1,37 +1,25 @@
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
-CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
-CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_AT803X_PHY=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_BOARD_SCACHE=y
 CONFIG_BOUNCE=y
 CONFIG_CEVT_R4K=y
-# CONFIG_CEVT_SYSTICK_QUIRK is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLKSRC_MIPS_GIC=y
 CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
 CONFIG_COMMON_CLK=y
 # CONFIG_COMMON_CLK_BOSTON is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -44,7 +32,6 @@ CONFIG_CPU_MIPSR2_IRQ_EI=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_RMAP=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
@@ -55,84 +42,67 @@ CONFIG_CRYPTO_AEAD=y
 CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_DEFLATE=y
 CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_LZO=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_NULL2=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DEBUG_PINCTRL=y
+CONFIG_DIMLIB=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
+# CONFIG_DMA_RALINK is not set
+# CONFIG_DTB_GNUBEE1 is not set
+# CONFIG_DTB_GNUBEE2 is not set
 CONFIG_DTB_RT_NONE=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_IPI=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_MT7621=y
 # CONFIG_GPIO_RALINK is not set
-CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
-# CONFIG_GRO_CELLS is not set
+CONFIG_GRO_CELLS=y
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
-CONFIG_HAVE_ARCH_COMPILER_H=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_COPY_THREAD_TLS=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HIGHMEM=y
-CONFIG_HW_HAS_PCI=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
@@ -144,12 +114,18 @@ CONFIG_IRQ_DOMAIN_HIERARCHY=y
 CONFIG_IRQ_FORCED_THREADING=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
+CONFIG_LED_TRIGGER_PHY=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_LZO_DECOMPRESS=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
+CONFIG_MIKROTIK=y
+CONFIG_MIKROTIK_RB_SYSFS=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
@@ -162,30 +138,31 @@ CONFIG_MIPS_CM=y
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 CONFIG_MIPS_CPC=y
 CONFIG_MIPS_CPS=y
-# CONFIG_MIPS_CPS_NS16550 is not set
+# CONFIG_MIPS_CPS_NS16550_BOOL is not set
 CONFIG_MIPS_CPU_SCACHE=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
 CONFIG_MIPS_GIC=y
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
 CONFIG_MIPS_MT=y
 CONFIG_MIPS_MT_FPAFF=y
 CONFIG_MIPS_MT_SMP=y
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_NR_CPU_NR_MAP=4
 CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
-# CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MT7621_WDT=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_NAND_MT7621=y
 CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_ROUTERBOOT_PARTS=y
 CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_FIT_FW=y
 CONFIG_MTD_SPLIT_MINOR_FW=y
 CONFIG_MTD_SPLIT_SEAMA_FW=y
 CONFIG_MTD_SPLIT_TPLINK_FW=y
@@ -194,45 +171,46 @@ CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_MTD_UBI=y
 CONFIG_MTD_UBI_BEB_LIMIT=20
 CONFIG_MTD_UBI_BLOCK=y
-# CONFIG_MTD_UBI_FASTMAP is not set
-# CONFIG_MTD_UBI_GLUEBI is not set
 CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MTK_MTD_NAND=y
+CONFIG_MTD_VIRT_CONCAT=y
+# CONFIG_MTK_HSDMA is not set
 CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MT7530=y
+CONFIG_NET_DSA_TAG_MTK=y
 CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NET_MEDIATEK_GSW_MT7621=y
-CONFIG_NET_MEDIATEK_MDIO=y
-CONFIG_NET_MEDIATEK_MDIO_MT7620=y
-CONFIG_NET_MEDIATEK_MT7621=y
-CONFIG_NET_MEDIATEK_OFFLOAD=y
 CONFIG_NET_MEDIATEK_SOC=y
+CONFIG_NET_SWITCHDEV=y
 CONFIG_NET_VENDOR_MEDIATEK=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
+# CONFIG_NET_VENDOR_RALINK is not set
 CONFIG_NR_CPUS=4
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
 CONFIG_PADATA=y
 CONFIG_PCI=y
 CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
 CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_DRIVERS_GENERIC=y
+CONFIG_PCI_MT7621=y
+CONFIG_PCI_MT7621_PHY=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
 # CONFIG_PHY_RALINK_USB is not set
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_RT2880=y
 # CONFIG_PINCTRL_SINGLE is not set
+CONFIG_PINCTRL_SX150X=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO=y
 CONFIG_POWER_SUPPLY=y
@@ -244,8 +222,7 @@ CONFIG_RATIONAL=y
 CONFIG_RCU_NEED_SEGCBLIST=y
 CONFIG_RCU_STALL_COMMON=y
 CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_SPI=y
+CONFIG_REGMAP_MMIO=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RESET_CONTROLLER=y
@@ -253,16 +230,16 @@ CONFIG_RFS_ACCEL=y
 CONFIG_RPS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_BQ32K=y
+# CONFIG_RTC_DRV_JZ4740 is not set
 CONFIG_RTC_DRV_PCF8563=y
 CONFIG_RTC_I2C_AND_SPI=y
 CONFIG_RTC_MC146818_LIB=y
-# CONFIG_SCHED_INFO is not set
 CONFIG_SCHED_SMT=y
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_NR_UARTS=3
 CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SGL_ALLOC=y
 CONFIG_SMP=y
 CONFIG_SMP_UP=y
 # CONFIG_SOC_MT7620 is not set
@@ -272,11 +249,10 @@ CONFIG_SOC_MT7621=y
 # CONFIG_SOC_RT3883 is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 CONFIG_SPI_MT7621=y
 # CONFIG_SPI_RT2880 is not set
 CONFIG_SRCU=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_LEDS=y
 CONFIG_SWPHY=y
 CONFIG_SYNC_R4K=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
@@ -293,6 +269,8 @@ CONFIG_SYS_SUPPORTS_MIPS_CPS=y
 CONFIG_SYS_SUPPORTS_MULTITHREADING=y
 CONFIG_SYS_SUPPORTS_SCHED_SMT=y
 CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
@@ -310,5 +288,3 @@ CONFIG_WEAK_REORDERING_BEYOND_LLSC=y
 CONFIG_XPS=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_ZLIB_INFLATE=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
diff --git a/iopsys-ramips/mt7621/profiles/00-default.mk b/iopsys-ramips/mt7621/profiles/00-default.mk
deleted file mode 100644
index bf293d31638c2ad3a7be8c2152b48f1d405ef243..0000000000000000000000000000000000000000
--- a/iopsys-ramips/mt7621/profiles/00-default.mk
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# Copyright (C) 2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
-	NAME:=Default Profile
-	PRIORITY:=1
-	PACKAGES:=\
-		kmod-usb-core kmod-usb3 \
-		kmod-usb-ledtrig-usbport
-endef
-
-define Profile/Default/Description
-	Default package set compatible with most boards.
-endef
-$(eval $(call Profile,Default))
diff --git a/iopsys-ramips/mt7621/target.mk b/iopsys-ramips/mt7621/target.mk
index c2eba1d0da6f5f2fc7f9353033a1eb553d75ee81..d1f987b2e03da2d54eeeec4c92387444edd35681 100644
--- a/iopsys-ramips/mt7621/target.mk
+++ b/iopsys-ramips/mt7621/target.mk
@@ -6,6 +6,11 @@ SUBTARGET:=mt7621
 BOARDNAME:=MT7621 based boards
 FEATURES+=nand ramdisk rtc usb minor
 CPU_TYPE:=24kc
+KERNELNAME:=vmlinux vmlinuz
+# make Kernel/CopyImage use $LINUX_DIR/vmlinuz
+IMAGES_DIR:=../../..
+
+DEFAULT_PACKAGES += wpad-basic-wolfssl
 
 define Target/Description
 	Build firmware images for Ralink MT7621 based boards.
diff --git a/iopsys-ramips/mt76x8/base-files/etc/board.d/01_leds b/iopsys-ramips/mt76x8/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..47b73e01a207feff57a4a7e0e6fd74b5722b8622
--- /dev/null
+++ b/iopsys-ramips/mt76x8/base-files/etc/board.d/01_leds
@@ -0,0 +1,151 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+alfa-network,awusfree1)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wlan" "wlan0"
+	;;
+asus,rt-n10p-v3|\
+asus,rt-n11p-b1|\
+asus,rt-n12-vp-b1|\
+netgear,r6020|\
+netgear,r6080|\
+netgear,r6120)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0xf"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+cudy,wr1000)
+	ucidef_set_led_switch "wan" "wan" "blue:wan" "switch0" "0x10"
+	ucidef_set_led_switch "lan1" "lan1" "blue:lan1" "switch0" "0x08"
+	ucidef_set_led_switch "lan2" "lan2" "blue:lan2" "switch0" "0x04"
+	;;
+elecom,wrc-1167fs)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x8"
+	ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x10"
+	;;
+glinet,gl-mt300n-v2)
+	ucidef_set_led_netdev "wifi_led" "wifi" "red:wlan" "wlan0"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x1"
+	;;
+hilink,hlk-7628n|\
+skylab,skw92a)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+hilink,hlk-7688a)
+	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
+	;;
+hiwifi,hc5661a|\
+hiwifi,hc5761a)
+	ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x10"
+	;;
+mediatek,linkit-smart-7688)
+	ucidef_set_led_wlan "wifi" "wifi" "orange:wifi" "phy0tpt"
+	;;
+rakwireless,rak633)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wifi" "wlan0"
+	;;
+tama,w06)
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
+	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
+	;;
+tplink,archer-c20-v4|\
+tplink,archer-c20-v5|\
+tplink,tl-wr850n-v2)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	;;
+tplink,archer-c50-v3|\
+tplink,archer-c50-v4)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan2g" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "wlan5g" "green:wlan5g" "phy1tpt"
+	;;
+tplink,re200-v2|\
+tplink,re200-v3|\
+tplink,re200-v4|\
+tplink,re220-v2|\
+tplink,tl-mr3020-v3|\
+tplink,tl-wa801nd-v5)
+	ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0"
+	;;
+tplink,tl-mr3420-v5|\
+tplink,tl-wr840n-v4|\
+tplink,tl-wr842n-v5)
+	ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan" "phy0tpt"
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	;;
+tplink,tl-mr6400-v4)
+	ucidef_set_led_switch "lan" "lan" "white:lan" "switch0" "0x0e"
+	ucidef_set_led_switch "wan" "wan" "white:wan" "switch0" "0x10"
+	;;
+tplink,tl-mr6400-v5)
+	ucidef_set_led_switch "lan" "lan" "white:lan" "switch0" "0x07"
+	ucidef_set_led_switch "wan" "wan" "white:wan" "switch0" "0x08"
+	;;
+tplink,tl-wr841n-v13)
+	ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan" "phy0tpt"
+	ucidef_set_led_switch "lan1" "lan1" "green:lan1" "switch0" "0x2"
+	ucidef_set_led_switch "lan2" "lan2" "green:lan2" "switch0" "0x4"
+	ucidef_set_led_switch "lan3" "lan3" "green:lan3" "switch0" "0x8"
+	ucidef_set_led_switch "lan4" "lan4" "green:lan4" "switch0" "0x10"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	;;
+tplink,tl-wr841n-v14)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x1e"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	ucidef_set_led_wlan "wifi_led" "wifi" "green:wlan" "phy0tpt"
+	;;
+tplink,tl-wr902ac-v3)
+	ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan" "phy0tpt"
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x10"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+unielec,u7628-01-16m)
+	ucidef_set_led_switch "lan1" "lan1" "green:lan1" "switch0" "0x2"
+	ucidef_set_led_switch "lan2" "lan2" "green:lan2" "switch0" "0x4"
+	ucidef_set_led_switch "lan3" "lan3" "green:lan3" "switch0" "0x8"
+	ucidef_set_led_switch "lan4" "lan4" "green:lan4" "switch0" "0x10"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+wavlink,wl-wn570ha1)
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x01"
+	ucidef_set_rssimon "wlan0" "200000" "1"
+	ucidef_set_led_rssi "wifi-low" "wifi-low" "green:wifi-low" "wlan0" "1" "49"
+	ucidef_set_led_rssi "wifi-med" "wifi-med" "green:wifi-med" "wlan0" "50" "84"
+	ucidef_set_led_rssi "wifi-high" "wifi-high" "green:wifi-high" "wlan0" "85" "100"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+wavlink,wl-wn575a3)
+	ucidef_set_rssimon "wlan1" "200000" "1"
+	ucidef_set_led_rssi "wifi-low" "wifi-low" "green:wifi-low" "wlan1" "1" "49"
+	ucidef_set_led_rssi "wifi-med" "wifi-med" "green:wifi-med" "wlan1" "50" "84"
+	ucidef_set_led_rssi "wifi-high" "wifi-high" "green:wifi-high" "wlan1" "85" "100"
+	;;
+wavlink,wl-wn577a2)
+	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0x8"
+	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
+	;;
+zbtlink,zbt-we1226)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	ucidef_set_led_switch "lan1" "LAN1" "green:lan1" "switch0" "0x01"
+	ucidef_set_led_switch "lan2" "LAN2" "green:lan2" "switch0" "0x02"
+	ucidef_set_led_switch "wan" "WAN" "green:wan" "switch0" "0x10"
+	;;
+zyxel,keenetic-extra-ii)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x01"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt76x8/base-files/etc/board.d/02_network b/iopsys-ramips/mt76x8/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..b741b4f9b4dc6efaf4df66ce8ed744c4f925800a
--- /dev/null
+++ b/iopsys-ramips/mt76x8/base-files/etc/board.d/02_network
@@ -0,0 +1,265 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	alfa-network,awusfree1|\
+	d-team,pbr-d1|\
+	glinet,microuter-n300|\
+	glinet,vixmini|\
+	hak5,wifi-pineapple-mk7|\
+	mediatek,linkit-smart-7688|\
+	onion,omega2p|\
+	onion,omega2|\
+	ravpower,rp-wd009|\
+	tama,w06|\
+	tplink,re200-v2|\
+	tplink,re200-v3|\
+	tplink,re200-v4|\
+	tplink,re220-v2|\
+	tplink,re305-v1|\
+	tplink,tl-mr3020-v3|\
+	tplink,tl-wr802n-v4|\
+	tplink,tl-wa801nd-v5|\
+	widora,neo-16m|\
+	widora,neo-32m)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_set_interface_lan "eth0"
+		;;
+	asus,rt-n10p-v3|\
+	asus,rt-n11p-b1|\
+	asus,rt-n12-vp-b1|\
+	hiwifi,hc5661a|\
+	mediatek,mt7628an-eval-board|\
+	mercury,mac1200r-v2|\
+	totolink,lr1200|\
+	wavlink,wl-wn570ha1|\
+	wavlink,wl-wn575a3)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
+		;;
+	buffalo,wcr-1166ds|\
+	elecom,wrc-1167fs|\
+	wavlink,wl-wn577a2)
+		ucidef_add_switch "switch0" \
+			"3:lan" "4:wan" "6@eth0"
+		;;
+	cudy,wr1000)
+		ucidef_add_switch "switch0" \
+			"2:lan:2" "3:lan:1" "4:wan" "6@eth0"
+		;;
+	duzun,dm06)
+		ucidef_add_switch "switch0" \
+			"1:lan" "0:wan" "6@eth0"
+		;;
+	glinet,gl-mt300n-v2)
+		ucidef_add_switch "switch0" \
+			"1:lan" "0:wan" "6@eth0"
+		;;
+	hilink,hlk-7628n|\
+	hilink,hlk-7688a|\
+	hiwifi,hc5861b|\
+	skylab,skw92a|\
+	tplink,archer-c20-v4|\
+	tplink,archer-c20-v5|\
+	tplink,archer-c50-v3|\
+	tplink,archer-c50-v4|\
+	tplink,tl-mr3420-v5|\
+	tplink,tl-wr840n-v4|\
+	tplink,tl-wr840n-v5|\
+	tplink,tl-wr841n-v13|\
+	tplink,tl-wr841n-v14|\
+	tplink,tl-wr842n-v5|\
+	tplink,tl-wr850n-v2|\
+	unielec,u7628-01-16m|\
+	wrtnode,wrtnode2p|\
+	wrtnode,wrtnode2r|\
+	zyxel,keenetic-extra-ii)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	hiwifi,hc5761a)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "4:wan" "6@eth0"
+		;;
+	iptime,a3|\
+	totolink,a3)
+		ucidef_add_switch "switch0" \
+			"2:lan:2" "3:lan:1" "0:wan" "6@eth0"
+		;;
+	iptime,a604m)
+		ucidef_add_switch "switch0" \
+			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "6@eth0"
+		;;
+	jotale,js76x8-8m|\
+	jotale,js76x8-16m|\
+	jotale,js76x8-32m)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "6@eth0"
+		;;
+	netgear,r6020|\
+	netgear,r6080|\
+	netgear,r6120)
+		ucidef_add_switch "switch0" \
+			"0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "4:wan" "6@eth0"
+		;;
+	rakwireless,rak633)
+		ucidef_add_switch "switch0" \
+			"0:wan" "1:lan" "2:lan" "3:lan" "4:lan" "6t@eth0"
+		;;
+	tplink,tl-mr6400-v4)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
+		;;
+	tplink,tl-mr6400-v5)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:wan" "6@eth0"
+		;;
+	tplink,tl-wr902ac-v3)
+		ucidef_add_switch "switch0" \
+			"4:lan" "6@eth0"
+		;;
+	vocore,vocore2|\
+	vocore,vocore2-lite)
+		ucidef_add_switch "switch0" \
+			"0:lan" "2:lan" "6t@eth0"
+		;;
+	wiznet,wizfi630s)
+		ucidef_add_switch "switch0" \
+			"0:wan" "3:lan" "4:lan" "6@eth0"
+		;;
+	xiaomi,mi-router-4a-100m)
+		ucidef_add_switch "switch0" \
+			"4:lan:1" "2:lan:2" "0:wan" "6@eth0"
+		;;
+	xiaomi,mi-router-4c)
+		ucidef_add_switch "switch0" \
+			"4:lan:1" "2:lan:2" "1:wan" "6@eth0"
+		;;
+	xiaomi,miwifi-nano)
+		ucidef_add_switch "switch0" \
+			"0:lan:2" "2:lan:1" "4:wan" "6@eth0"
+		;;
+	zbtlink,zbt-we1226)
+		ucidef_add_switch "switch0" \
+			"0:lan:2" "1:lan:1" "4:wan" "6@eth0"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	buffalo,wcr-1166ds)
+		local index="$(find_mtd_index "board_data")"
+		wan_mac="$(grep -m1 mac= "/dev/mtd${index}" | cut -d= -f2)"
+		lan_mac=$wan_mac
+		;;
+	cudy,wr1000|\
+	hilink,hlk-7688a|\
+	wavlink,wl-wn577a2)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	duzun,dm06|\
+	netgear,r6020|\
+	netgear,r6080|\
+	netgear,r6120|\
+	wrtnode,wrtnode2p|\
+	wrtnode,wrtnode2r|\
+	zyxel,keenetic-extra-ii)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1)
+		;;
+	elecom,wrc-1167fs)
+		wan_mac=$(mtd_get_mac_binary factory 0x22)
+		label_mac=$wan_mac
+		;;
+	hilink,hlk-7628n)
+		lan_mac=$(macaddr_setbit_la "$(cat /sys/class/net/eth0/address)")
+		wan_mac=$(macaddr_add "$lan_mac" 1)
+		;;
+	hiwifi,hc5661a|\
+	hiwifi,hc5761a|\
+	hiwifi,hc5861b)
+		lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ")
+		label_mac=$lan_mac
+		[ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address)
+		wan_mac=$(macaddr_add "$lan_mac" 1)
+		;;
+	iptime,a3|\
+	iptime,a604m|\
+	totolink,a3)
+		wan_mac=$(mtd_get_mac_binary u-boot 0x1fc40)
+		;;
+	jotale,js76x8-8m|\
+	jotale,js76x8-16m|\
+	jotale,js76x8-32m|\
+	skylab,skw92a|\
+	totolink,lr1200)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		;;
+	mercury,mac1200r-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory_info 0xd)" 1)
+		;;
+	rakwireless,rak633|\
+	unielec,u7628-01-16m|\
+	wavlink,wl-wn575a3)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
+		;;
+	tplink,archer-c20-v4|\
+	tplink,archer-c50-v3|\
+	tplink,tl-mr3420-v5|\
+	tplink,tl-wr840n-v4|\
+	tplink,tl-wr840n-v5|\
+	tplink,tl-wr841n-v13|\
+	tplink,tl-wr841n-v14|\
+	tplink,tl-wr842n-v5|\
+	tplink,tl-wr850n-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0xf100)" 1)
+		;;
+	tplink,archer-c20-v5|\
+	tplink,archer-c50-v4)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary rom 0xf100)" 1)
+		;;
+	vocore,vocore2|\
+	vocore,vocore2-lite)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	wavlink,wl-wn570ha1|\
+	zbtlink,zbt-we1226)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x2e)" 1)
+		;;
+	wiznet,wizfi630s)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		wan_mac=$(mtd_get_mac_binary factory 0x28)
+		;;
+	xiaomi,mi-router-4a-100m|\
+	xiaomi,mi-router-4c)
+		wan_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/mt76x8/base-files/etc/init.d/bootcount b/iopsys-ramips/mt76x8/base-files/etc/init.d/bootcount
new file mode 100755
index 0000000000000000000000000000000000000000..23f1e71b41809c63ba9a0256be0100476f339344
--- /dev/null
+++ b/iopsys-ramips/mt76x8/base-files/etc/init.d/bootcount
@@ -0,0 +1,16 @@
+#!/bin/sh /etc/rc.common
+
+START=99
+
+boot() {
+	case $(board_name) in
+	alfa-network,awusfree1)
+		[ -n "$(fw_printenv bootcount bootchanged 2>/dev/null)" ] &&\
+			echo -e "bootcount\nbootchanged\n" | /usr/sbin/fw_setenv -s -
+		;;
+	xiaomi,mi-router-4c|\
+	xiaomi,miwifi-nano)
+		fw_setenv flag_boot_success 1
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt76x8/base-files/lib/upgrade/platform.sh b/iopsys-ramips/mt76x8/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..20adfafc3dd037d403358a69dfbdcc2f013c6164
--- /dev/null
+++ b/iopsys-ramips/mt76x8/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,40 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+RAMFS_COPY_BIN='fw_printenv fw_setenv'
+RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	alfa-network,awusfree1)
+		[ "$(fw_printenv -n dual_image 2>/dev/null)" = "1" ] &&\
+		[ -n "$(find_mtd_part backup)" ] && {
+			PART_NAME=backup
+			if [ "$(fw_printenv -n bootactive 2>/dev/null)" = "1" ]; then
+				fw_setenv bootactive 2 || exit 1
+			else
+				fw_setenv bootactive 1 || exit 1
+			fi
+		}
+		default_do_upgrade "$1"
+		;;
+	tplink,archer-c20-v5|\
+	tplink,archer-c50-v4)
+		MTD_ARGS="-t romfile"
+		default_do_upgrade "$1"
+		;;
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/mt76x8/config-4.14 b/iopsys-ramips/mt76x8/config-5.4
similarity index 78%
rename from iopsys-ramips/mt76x8/config-4.14
rename to iopsys-ramips/mt76x8/config-5.4
index 00de57685550d9f2c1e57825291a562730f9b4ef..ec21b3722bb8295fa33049458ec355d66cc1b966 100644
--- a/iopsys-ramips/mt76x8/config-4.14
+++ b/iopsys-ramips/mt76x8/config-5.4
@@ -1,24 +1,22 @@
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
 CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_AT803X_PHY=y
 CONFIG_BLK_MQ_PCI=y
@@ -31,7 +29,9 @@ CONFIG_CLONE_BACKWARDS=y
 CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
 CONFIG_CMDLINE_BOOL=y
 # CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -43,83 +43,94 @@ CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DEBUG_PINCTRL=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
+# CONFIG_DMA_RALINK is not set
 # CONFIG_DTB_MT7620A_EVAL is not set
 # CONFIG_DTB_OMEGA2P is not set
 CONFIG_DTB_RT_NONE=y
 # CONFIG_DTB_VOCORE2 is not set
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_MT7621=y
 # CONFIG_GPIO_RALINK is not set
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_HAVE_ARCH_COMPILER_H=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_COPY_THREAD_TLS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FAST_GUP=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
 CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
 CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
 CONFIG_HAVE_NET_DSA=y
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_ICPLUS_PHY=y
 CONFIG_INITRAMFS_SOURCE=""
@@ -130,23 +141,22 @@ CONFIG_IRQ_INTC=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CBPF_JIT=y
 CONFIG_MIPS_CLOCK_VSYSCALL=y
 # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
@@ -154,7 +164,6 @@ CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MT7621_WDT=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPLIT_TPLINK_FW=y
@@ -162,27 +171,27 @@ CONFIG_MTD_SPLIT_TRX_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_MEDIATEK_ESW_RT3050=y
-# CONFIG_NET_MEDIATEK_MT7620 is not set
-CONFIG_NET_MEDIATEK_RT3050=y
-CONFIG_NET_MEDIATEK_SOC=y
-CONFIG_NET_VENDOR_MEDIATEK=y
+CONFIG_NET_RALINK_ESW_RT3050=y
+# CONFIG_NET_RALINK_MT7620 is not set
+CONFIG_NET_RALINK_RT3050=y
+CONFIG_NET_RALINK_SOC=y
+# CONFIG_NET_VENDOR_MEDIATEK is not set
+CONFIG_NET_VENDOR_RALINK=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DRIVERS_LEGACY=y
+# CONFIG_PCI_MT7621 is not set
+# CONFIG_PCI_MT7621_PHY is not set
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -192,18 +201,14 @@ CONFIG_PINCTRL_RT2880=y
 # CONFIG_PINCTRL_SINGLE is not set
 CONFIG_RALINK=y
 # CONFIG_RALINK_WDT is not set
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RESET_CONTROLLER=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_NR_UARTS=3
 CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SOC_MT7620=y
 # CONFIG_SOC_MT7621 is not set
@@ -212,6 +217,7 @@ CONFIG_SOC_MT7620=y
 # CONFIG_SOC_RT3883 is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 CONFIG_SPI_MT7621=y
 # CONFIG_SPI_RT2880 is not set
 CONFIG_SRCU=y
@@ -226,6 +232,7 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
diff --git a/iopsys-ramips/mt76x8/profiles/00-default.mk b/iopsys-ramips/mt76x8/profiles/00-default.mk
deleted file mode 100644
index 162ac14315ce72be0885ad76fff787499b43c845..0000000000000000000000000000000000000000
--- a/iopsys-ramips/mt76x8/profiles/00-default.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (C) 2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
-	NAME:=Default Profile
-	PRIORITY:=1
-	PACKAGES:= kmod-usb-core kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-endef
-
-define Profile/Default/Description
-	Default package set compatible with most boards.
-endef
-$(eval $(call Profile,Default))
diff --git a/iopsys-ramips/mt76x8/target.mk b/iopsys-ramips/mt76x8/target.mk
index 4fc448915c94276520c86c1d83467aca5405de37..f939e4ca4c67f6c6578cef2b4726e78826449f23 100644
--- a/iopsys-ramips/mt76x8/target.mk
+++ b/iopsys-ramips/mt76x8/target.mk
@@ -4,10 +4,10 @@
 
 SUBTARGET:=mt76x8
 BOARDNAME:=MT76x8 based boards
-FEATURES+=usb
+FEATURES+=usb ramdisk
 CPU_TYPE:=24kc
 
-DEFAULT_PACKAGES += kmod-mt7603 wpad-basic
+DEFAULT_PACKAGES += kmod-mt7603 wpad-basic-wolfssl swconfig
 
 define Target/Description
 	Build firmware images for Ralink MT76x8 based boards.
diff --git a/iopsys-ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch b/iopsys-ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch
deleted file mode 100644
index 4f803dfd0d89fa6817b99240d3a4a9caf265770a..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 35d017947401d9f449a7e55e52506744e0c62577 Mon Sep 17 00:00:00 2001
-From: Mathias Kresin <dev@kresin.me>
-Date: Wed, 22 Aug 2018 22:38:06 +0200
-Subject: [PATCH] MIPS: ralink: Add rt3352 SPI_CS1 pinmux
-
-The rt3352 has a pin that can be used as second spi chip select,
-watchdog reset or GPIO. The pinmux setup was missing the definition of
-said pin.
-
-The pin is configured via the same bit on rt5350, so reuse the existing
-macro.
-
-Signed-off-by: Mathias Kresin <dev@kresin.me>
-Signed-off-by: Paul Burton <paul.burton@mips.com>
-Patchwork: https://patchwork.linux-mips.org/patch/20301/
-Cc: John Crispin <john@phrozen.org>
-Cc: Ralf Baechle <ralf@linux-mips.org>
-Cc: James Hogan <jhogan@kernel.org>
-Cc: linux-mips@linux-mips.org
-Cc: linux-kernel@vger.kernel.org
----
- arch/mips/ralink/rt305x.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/mips/ralink/rt305x.c
-+++ b/arch/mips/ralink/rt305x.c
-@@ -49,6 +49,10 @@ static struct rt2880_pmx_func rgmii_func
- static struct rt2880_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
- static struct rt2880_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
- static struct rt2880_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
-+static struct rt2880_pmx_func rt3352_cs1_func[] = {
-+	FUNC("spi_cs1", 0, 45, 1),
-+	FUNC("wdg_cs1", 1, 45, 1),
-+};
- 
- static struct rt2880_pmx_group rt3050_pinmux_data[] = {
- 	GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
-@@ -75,6 +79,7 @@ static struct rt2880_pmx_group rt3352_pi
- 	GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
- 	GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
- 	GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
-+	GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
- 	{ 0 }
- };
- 
diff --git a/iopsys-ramips/patches-4.14/0002-MIPS-pci-rt2880-set-pci-controller-of_node.patch b/iopsys-ramips/patches-4.14/0002-MIPS-pci-rt2880-set-pci-controller-of_node.patch
deleted file mode 100644
index 7ac092cfb012c04b0aa0ae21c7c894e7a471f85e..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0002-MIPS-pci-rt2880-set-pci-controller-of_node.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0eb1cfffd5433d8dce3e4163a5cd9accc6000856 Mon Sep 17 00:00:00 2001
-From: Tobias Wolf <dev-NTEO@vplace.de>
-Date: Wed, 5 Sep 2018 08:51:26 +0200
-Subject: [PATCH] MIPS: pci-rt2880: set pci controller of_node
-
-Set the PCI controller of_node such that PCI devices can be
-instantiated via device tree.
-
-Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
-Signed-off-by: Mathias Kresin <dev@kresin.me>
-Acked-by: John Crispin <john@phrozen.org>
-Signed-off-by: Paul Burton <paul.burton@mips.com>
-Patchwork: https://patchwork.linux-mips.org/patch/20423/
-Cc: Ralf Baechle <ralf@linux-mips.org>
-Cc: James Hogan <jhogan@kernel.org>
-Cc: linux-mips@linux-mips.org
-Cc: linux-kernel@vger.kernel.org
----
- arch/mips/pci/pci-rt2880.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/pci/pci-rt2880.c
-+++ b/arch/mips/pci/pci-rt2880.c
-@@ -246,6 +246,8 @@ static int rt288x_pci_probe(struct platf
- 	rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000);
- 	(void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0);
- 
-+	rt2880_pci_controller.of_node = pdev->dev.of_node;
-+
- 	register_pci_controller(&rt2880_pci_controller);
- 	return 0;
- }
diff --git a/iopsys-ramips/patches-4.14/0004-MIPS-ralink-add-MT7621-pcie-driver.patch b/iopsys-ramips/patches-4.14/0004-MIPS-ralink-add-MT7621-pcie-driver.patch
deleted file mode 100644
index b6f1ce93f4f36fb4468eeb5d6d379d7cdc8a7a36..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0004-MIPS-ralink-add-MT7621-pcie-driver.patch
+++ /dev/null
@@ -1,861 +0,0 @@
-From fec11d4e8dc5cc79bcd7c8fd55038ac21ac39965 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 16 Mar 2014 05:22:39 +0000
-Subject: [PATCH 04/53] MIPS: ralink: add MT7621 pcie driver
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/pci/Makefile     |    1 +
- arch/mips/pci/pci-mt7621.c |  813 ++++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 814 insertions(+)
- create mode 100644 arch/mips/pci/pci-mt7621.c
-
---- a/arch/mips/pci/Makefile
-+++ b/arch/mips/pci/Makefile
-@@ -47,6 +47,7 @@ obj-$(CONFIG_SNI_RM)		+= fixup-sni.o ops
- obj-$(CONFIG_LANTIQ)		+= fixup-lantiq.o
- obj-$(CONFIG_PCI_LANTIQ)	+= pci-lantiq.o ops-lantiq.o
- obj-$(CONFIG_SOC_MT7620)	+= pci-mt7620.o
-+obj-$(CONFIG_SOC_MT7621)	+= pci-mt7621.o
- obj-$(CONFIG_SOC_RT288X)	+= pci-rt2880.o
- obj-$(CONFIG_SOC_RT3883)	+= pci-rt3883.o
- obj-$(CONFIG_TANBAC_TB0219)	+= fixup-tb0219.o
---- /dev/null
-+++ b/arch/mips/pci/pci-mt7621.c
-@@ -0,0 +1,836 @@
-+/**************************************************************************
-+ *
-+ *  BRIEF MODULE DESCRIPTION
-+ *     PCI init for Ralink RT2880 solution
-+ *
-+ *  Copyright 2007 Ralink Inc. (bruce_chang@ralinktech.com.tw)
-+ *
-+ *  This program is free software; you can redistribute  it and/or modify it
-+ *  under  the terms of  the GNU General  Public License as published by the
-+ *  Free Software Foundation;  either version 2 of the  License, or (at your
-+ *  option) any later version.
-+ *
-+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
-+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
-+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
-+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
-+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
-+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
-+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *  You should have received a copy of the  GNU General Public License along
-+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
-+ *  675 Mass Ave, Cambridge, MA 02139, USA.
-+ *
-+ *
-+ **************************************************************************
-+ * May 2007 Bruce Chang
-+ * Initial Release
-+ *
-+ * May 2009 Bruce Chang
-+ * support RT2880/RT3883 PCIe
-+ *
-+ * May 2011 Bruce Chang
-+ * support RT6855/MT7620 PCIe
-+ *
-+ **************************************************************************
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/version.h>
-+#include <asm/pci.h>
-+#include <asm/io.h>
-+#include <asm/mips-cm.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/delay.h>
-+#include <linux/of.h>
-+#include <linux/of_pci.h>
-+#include <linux/of_irq.h>
-+#include <linux/platform_device.h>
-+
-+#include <ralink_regs.h>
-+
-+extern void pcie_phy_init(void);
-+extern void chk_phy_pll(void);
-+
-+/*
-+ * These functions and structures provide the BIOS scan and mapping of the PCI
-+ * devices.
-+ */
-+
-+#define CONFIG_PCIE_PORT0
-+#define CONFIG_PCIE_PORT1
-+#define CONFIG_PCIE_PORT2
-+#define RALINK_PCIE0_CLK_EN             (1<<24)
-+#define RALINK_PCIE1_CLK_EN             (1<<25)
-+#define RALINK_PCIE2_CLK_EN             (1<<26)
-+
-+#define RALINK_PCI_CONFIG_ADDR                         0x20
-+#define RALINK_PCI_CONFIG_DATA_VIRTUAL_REG     0x24
-+#define RALINK_INT_PCIE0         pcie_irq[0]
-+#define RALINK_INT_PCIE1         pcie_irq[1]
-+#define RALINK_INT_PCIE2         pcie_irq[2]
-+#define RALINK_PCI_MEMBASE              *(volatile u32 *)(RALINK_PCI_BASE + 0x0028)
-+#define RALINK_PCI_IOBASE               *(volatile u32 *)(RALINK_PCI_BASE + 0x002C)
-+#define RALINK_PCIE0_RST                (1<<24)
-+#define RALINK_PCIE1_RST                (1<<25)
-+#define RALINK_PCIE2_RST                (1<<26)
-+#define RALINK_SYSCTL_BASE              0xBE000000
-+
-+#define RALINK_PCI_PCICFG_ADDR          *(volatile u32 *)(RALINK_PCI_BASE + 0x0000)
-+#define RALINK_PCI_PCIMSK_ADDR          *(volatile u32 *)(RALINK_PCI_BASE + 0x000C)
-+#define RALINK_PCI_BASE                 0xBE140000
-+
-+#define RALINK_PCIEPHY_P0P1_CTL_OFFSET (RALINK_PCI_BASE + 0x9000)
-+#define RT6855_PCIE0_OFFSET     0x2000
-+#define RT6855_PCIE1_OFFSET     0x3000
-+#define RT6855_PCIE2_OFFSET     0x4000
-+
-+#define RALINK_PCI0_BAR0SETUP_ADDR      *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0010)
-+#define RALINK_PCI0_IMBASEBAR0_ADDR     *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0018)
-+#define RALINK_PCI0_ID                  *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0030)
-+#define RALINK_PCI0_CLASS               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0034)
-+#define RALINK_PCI0_SUBID               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0038)
-+#define RALINK_PCI0_STATUS              *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0050)
-+#define RALINK_PCI0_DERR                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0060)
-+#define RALINK_PCI0_ECRC                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE0_OFFSET + 0x0064)
-+
-+#define RALINK_PCI1_BAR0SETUP_ADDR      *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0010)
-+#define RALINK_PCI1_IMBASEBAR0_ADDR     *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0018)
-+#define RALINK_PCI1_ID                  *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0030)
-+#define RALINK_PCI1_CLASS               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0034)
-+#define RALINK_PCI1_SUBID               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0038)
-+#define RALINK_PCI1_STATUS              *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0050)
-+#define RALINK_PCI1_DERR                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0060)
-+#define RALINK_PCI1_ECRC                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE1_OFFSET + 0x0064)
-+
-+#define RALINK_PCI2_BAR0SETUP_ADDR      *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0010)
-+#define RALINK_PCI2_IMBASEBAR0_ADDR     *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0018)
-+#define RALINK_PCI2_ID                  *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0030)
-+#define RALINK_PCI2_CLASS               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0034)
-+#define RALINK_PCI2_SUBID               *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0038)
-+#define RALINK_PCI2_STATUS              *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0050)
-+#define RALINK_PCI2_DERR                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0060)
-+#define RALINK_PCI2_ECRC                *(volatile u32 *)(RALINK_PCI_BASE + RT6855_PCIE2_OFFSET + 0x0064)
-+
-+#define RALINK_PCIEPHY_P0P1_CTL_OFFSET  (RALINK_PCI_BASE + 0x9000)
-+#define RALINK_PCIEPHY_P2_CTL_OFFSET    (RALINK_PCI_BASE + 0xA000)
-+
-+
-+#define MV_WRITE(ofs, data)  \
-+        *(volatile u32 *)(RALINK_PCI_BASE+(ofs)) = cpu_to_le32(data)
-+#define MV_READ(ofs, data)   \
-+	        *(data) = le32_to_cpu(*(volatile u32 *)(RALINK_PCI_BASE+(ofs)))
-+#define MV_READ_DATA(ofs)    \
-+		        le32_to_cpu(*(volatile u32 *)(RALINK_PCI_BASE+(ofs)))
-+
-+#define MV_WRITE_16(ofs, data)  \
-+        *(volatile u16 *)(RALINK_PCI_BASE+(ofs)) = cpu_to_le16(data)
-+#define MV_READ_16(ofs, data)   \
-+	        *(data) = le16_to_cpu(*(volatile u16 *)(RALINK_PCI_BASE+(ofs)))
-+
-+#define MV_WRITE_8(ofs, data)  \
-+        *(volatile u8 *)(RALINK_PCI_BASE+(ofs)) = data
-+#define MV_READ_8(ofs, data)   \
-+	        *(data) = *(volatile u8 *)(RALINK_PCI_BASE+(ofs))
-+
-+
-+
-+#define RALINK_PCI_MM_MAP_BASE	0x60000000
-+#define RALINK_PCI_IO_MAP_BASE	0x1e160000
-+
-+#define RALINK_SYSTEM_CONTROL_BASE	0xbe000000
-+#define GPIO_PERST
-+#define ASSERT_SYSRST_PCIE(val)		do {	\
-+						if (*(unsigned int *)(0xbe00000c) == 0x00030101)	\
-+							RALINK_RSTCTRL |= val;	\
-+						else	\
-+							RALINK_RSTCTRL &= ~val;	\
-+					} while(0)
-+#define DEASSERT_SYSRST_PCIE(val) 	do {	\
-+						if (*(unsigned int *)(0xbe00000c) == 0x00030101)	\
-+							RALINK_RSTCTRL &= ~val;	\
-+						else	\
-+							RALINK_RSTCTRL |= val;	\
-+					} while(0)
-+#define RALINK_SYSCFG1			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x14)
-+#define RALINK_CLKCFG1			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x30)
-+#define RALINK_RSTCTRL			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x34)
-+#define RALINK_GPIOMODE			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x60)
-+#define RALINK_PCIE_CLK_GEN		*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x7c)
-+#define RALINK_PCIE_CLK_GEN1		*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x80)
-+#define PPLL_CFG1			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0x9c)
-+#define PPLL_DRV			*(unsigned int *)(RALINK_SYSTEM_CONTROL_BASE + 0xa0)
-+//RALINK_SYSCFG1 bit
-+#define RALINK_PCI_HOST_MODE_EN		(1<<7)
-+#define RALINK_PCIE_RC_MODE_EN		(1<<8)
-+//RALINK_RSTCTRL bit
-+#define RALINK_PCIE_RST			(1<<23)
-+#define RALINK_PCI_RST			(1<<24)
-+//RALINK_CLKCFG1 bit
-+#define RALINK_PCI_CLK_EN		(1<<19)
-+#define RALINK_PCIE_CLK_EN		(1<<21)
-+//RALINK_GPIOMODE bit
-+#define PCI_SLOTx2			(1<<11)
-+#define PCI_SLOTx1			(2<<11)
-+//MTK PCIE PLL bit
-+#define PDRV_SW_SET			(1<<31)
-+#define LC_CKDRVPD_			(1<<19)
-+
-+#define MEMORY_BASE 0x0
-+static int pcie_link_status = 0;
-+
-+#define PCI_ACCESS_READ_1  0
-+#define PCI_ACCESS_READ_2  1
-+#define PCI_ACCESS_READ_4  2
-+#define PCI_ACCESS_WRITE_1 3
-+#define PCI_ACCESS_WRITE_2 4
-+#define PCI_ACCESS_WRITE_4 5
-+
-+static int pcie_irq[3];
-+
-+static int config_access(unsigned char access_type, struct pci_bus *bus,
-+			unsigned int devfn, unsigned int where, u32 * data)
-+{
-+	unsigned int slot = PCI_SLOT(devfn);
-+	u8 func = PCI_FUNC(devfn);
-+	uint32_t address_reg, data_reg;
-+	unsigned int address;
-+
-+	address_reg = RALINK_PCI_CONFIG_ADDR;
-+	data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
-+
-+	address = (((where&0xF00)>>8)<<24) |(bus->number << 16) | (slot << 11) | (func << 8) | (where & 0xfc) | 0x80000000;
-+	MV_WRITE(address_reg, address);
-+
-+	switch(access_type) {
-+	case PCI_ACCESS_WRITE_1:
-+		MV_WRITE_8(data_reg+(where&0x3), *data);
-+		break;
-+	case PCI_ACCESS_WRITE_2:
-+		MV_WRITE_16(data_reg+(where&0x3), *data);
-+		break;
-+	case PCI_ACCESS_WRITE_4:
-+		MV_WRITE(data_reg, *data);
-+		break;
-+	case PCI_ACCESS_READ_1:
-+		MV_READ_8( data_reg+(where&0x3), data);
-+		break;
-+	case PCI_ACCESS_READ_2:
-+		MV_READ_16(data_reg+(where&0x3), data);
-+		break;
-+	case PCI_ACCESS_READ_4:
-+		MV_READ(data_reg, data);
-+		break;
-+	default:
-+		printk("no specify access type\n");
-+		break;
-+	}
-+	return 0;
-+}
-+
-+static int
-+read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val)
-+{
-+	return config_access(PCI_ACCESS_READ_1, bus, devfn, (unsigned int)where, (u32 *)val);
-+}
-+
-+static int
-+read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val)
-+{
-+	return config_access(PCI_ACCESS_READ_2, bus, devfn, (unsigned int)where, (u32 *)val);
-+}
-+
-+static int
-+read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
-+{
-+	return config_access(PCI_ACCESS_READ_4, bus, devfn, (unsigned int)where, (u32 *)val);
-+}
-+
-+static int
-+write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
-+{
-+	if (config_access(PCI_ACCESS_WRITE_1, bus, devfn, (unsigned int)where, (u32 *)&val))
-+		return -1;
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int
-+write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
-+{
-+	if (config_access(PCI_ACCESS_WRITE_2, bus, devfn, where, (u32 *)&val))
-+		return -1;
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int
-+write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
-+{
-+	if (config_access(PCI_ACCESS_WRITE_4, bus, devfn, where, &val))
-+		return -1;
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+
-+static int
-+pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
-+{
-+	switch (size) {
-+	case 1:
-+		return read_config_byte(bus, devfn, where, (u8 *) val);
-+	case 2:
-+		return read_config_word(bus, devfn, where, (u16 *) val);
-+	default:
-+		return read_config_dword(bus, devfn, where, val);
-+	}
-+}
-+
-+static int
-+pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
-+{
-+	switch (size) {
-+	case 1:
-+		return write_config_byte(bus, devfn, where, (u8) val);
-+	case 2:
-+		return write_config_word(bus, devfn, where, (u16) val);
-+	default:
-+		return write_config_dword(bus, devfn, where, val);
-+	}
-+}
-+
-+struct pci_ops mt7621_pci_ops= {
-+	.read		=  pci_config_read,
-+	.write		= pci_config_write,
-+};
-+
-+static struct resource mt7621_res_pci_mem1 = {
-+	.name		= "PCI MEM1",
-+	.start		= RALINK_PCI_MM_MAP_BASE,
-+	.end		= (u32)((RALINK_PCI_MM_MAP_BASE + (unsigned char *)0x0fffffff)),
-+	.flags		= IORESOURCE_MEM,
-+};
-+static struct resource mt7621_res_pci_io1 = {
-+	.name		= "PCI I/O1",
-+	.start		= RALINK_PCI_IO_MAP_BASE,
-+	.end		= (u32)((RALINK_PCI_IO_MAP_BASE + (unsigned char *)0x0ffff)),
-+	.flags		= IORESOURCE_IO,
-+};
-+
-+static struct pci_controller mt7621_controller = {
-+	.pci_ops	= &mt7621_pci_ops,
-+	.mem_resource	= &mt7621_res_pci_mem1,
-+	.io_resource	= &mt7621_res_pci_io1,
-+	.mem_offset	= 0x00000000UL,
-+	.io_offset	= 0x00000000UL,
-+	.io_map_base	= 0xa0000000,
-+};
-+
-+static void
-+read_config(unsigned long bus, unsigned long dev, unsigned long func, unsigned long reg, unsigned long *val)
-+{
-+	unsigned int address_reg, data_reg, address;
-+
-+	address_reg = RALINK_PCI_CONFIG_ADDR;
-+        data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
-+	address = (((reg & 0xF00)>>8)<<24) | (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000 ;
-+        MV_WRITE(address_reg, address);
-+        MV_READ(data_reg, val);
-+	return;
-+}
-+
-+static void
-+write_config(unsigned long bus, unsigned long dev, unsigned long func, unsigned long reg, unsigned long val)
-+{
-+	unsigned int address_reg, data_reg, address;
-+
-+	address_reg = RALINK_PCI_CONFIG_ADDR;
-+	data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
-+	address = (((reg & 0xF00)>>8)<<24) | (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000 ;
-+	MV_WRITE(address_reg, address);
-+	MV_WRITE(data_reg, val);
-+	return;
-+}
-+
-+
-+int
-+pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	u16 cmd;
-+	u32 val;
-+	int irq = 0;
-+
-+	if ((dev->bus->number == 0) && (slot == 0)) {
-+		write_config(0, 0, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
-+		read_config(0, 0, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
-+		printk("BAR0 at slot 0 = %x\n", val);
-+		printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
-+	} else if((dev->bus->number == 0) && (slot == 0x1)) {
-+		write_config(0, 1, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
-+		read_config(0, 1, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
-+		printk("BAR0 at slot 1 = %x\n", val);
-+		printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
-+	} else if((dev->bus->number == 0) && (slot == 0x2)) {
-+		write_config(0, 2, 0, PCI_BASE_ADDRESS_0, MEMORY_BASE);
-+		read_config(0, 2, 0, PCI_BASE_ADDRESS_0, (unsigned long *)&val);
-+		printk("BAR0 at slot 2 = %x\n", val);
-+		printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
-+	} else if ((dev->bus->number == 1) && (slot == 0x0)) {
-+		switch (pcie_link_status) {
-+		case 2:
-+		case 6:
-+			irq = RALINK_INT_PCIE1;
-+			break;
-+		case 4:
-+			irq = RALINK_INT_PCIE2;
-+			break;
-+		default:
-+			irq = RALINK_INT_PCIE0;
-+		}
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else if ((dev->bus->number == 2) && (slot == 0x0)) {
-+		switch (pcie_link_status) {
-+		case 5:
-+		case 6:
-+			irq = RALINK_INT_PCIE2;
-+			break;
-+		default:
-+			irq = RALINK_INT_PCIE1;
-+		}
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else if ((dev->bus->number == 2) && (slot == 0x1)) {
-+		switch (pcie_link_status) {
-+		case 5:
-+		case 6:
-+			irq = RALINK_INT_PCIE2;
-+			break;
-+		default:
-+			irq = RALINK_INT_PCIE1;
-+		}
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else if ((dev->bus->number ==3) && (slot == 0x0)) {
-+		irq = RALINK_INT_PCIE2;
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else if ((dev->bus->number ==3) && (slot == 0x1)) {
-+		irq = RALINK_INT_PCIE2;
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else if ((dev->bus->number ==3) && (slot == 0x2)) {
-+		irq = RALINK_INT_PCIE2;
-+		printk("bus=0x%x, slot = 0x%x, irq=0x%x\n",dev->bus->number, slot, dev->irq);
-+	} else {
-+		printk("bus=0x%x, slot = 0x%x\n",dev->bus->number, slot);
-+		return 0;
-+	}
-+
-+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x14);  //configure cache line size 0x14
-+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xFF);  //configure latency timer 0x10
-+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+	cmd = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
-+	pci_write_config_word(dev, PCI_COMMAND, cmd);
-+	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
-+	return irq;
-+}
-+
-+void
-+set_pcie_phy(u32 *addr, int start_b, int bits, int val)
-+{
-+//	printk("0x%p:", addr);
-+//	printk(" %x", *addr);
-+	*(unsigned int *)(addr) &= ~(((1<<bits) - 1)<<start_b);
-+	*(unsigned int *)(addr) |= val << start_b;
-+//	printk(" -> %x\n", *addr);
-+}
-+
-+void
-+bypass_pipe_rst(void)
-+{
-+#if defined (CONFIG_PCIE_PORT0)
-+	/* PCIe Port 0 */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x02c), 12, 1, 0x01);	// rg_pe1_pipe_rst_b
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x02c),  4, 1, 0x01);	// rg_pe1_pipe_cmd_frc[4]
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	/* PCIe Port 1 */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x12c), 12, 1, 0x01);	// rg_pe1_pipe_rst_b
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x12c),  4, 1, 0x01);	// rg_pe1_pipe_cmd_frc[4]
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	/* PCIe Port 2 */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x02c), 12, 1, 0x01);	// rg_pe1_pipe_rst_b
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x02c),  4, 1, 0x01);	// rg_pe1_pipe_cmd_frc[4]
-+#endif
-+}
-+
-+void
-+set_phy_for_ssc(void)
-+{
-+	unsigned long reg = (*(volatile u32 *)(RALINK_SYSCTL_BASE + 0x10));
-+
-+	reg = (reg >> 6) & 0x7;
-+#if defined (CONFIG_PCIE_PORT0) || defined (CONFIG_PCIE_PORT1)
-+	/* Set PCIe Port0 & Port1 PHY to disable SSC */
-+	/* Debug Xtal Type */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x400),  8, 1, 0x01);	// rg_pe1_frc_h_xtal_type
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x400),  9, 2, 0x00);	// rg_pe1_h_xtal_type
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000),  4, 1, 0x01);	// rg_pe1_frc_phy_en               //Force Port 0 enable control
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100),  4, 1, 0x01);	// rg_pe1_frc_phy_en               //Force Port 1 enable control
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000),  5, 1, 0x00);	// rg_pe1_phy_en                   //Port 0 disable
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100),  5, 1, 0x00);	// rg_pe1_phy_en                   //Port 1 disable
-+	if(reg <= 5 && reg >= 3) { 	// 40MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490),  6, 2, 0x01);	// RG_PE1_H_PLL_PREDIV             //Pre-divider ratio (for host mode)
-+		printk("***** Xtal 40MHz *****\n");
-+	} else {			// 25MHz | 20MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490),  6, 2, 0x00);	// RG_PE1_H_PLL_PREDIV             //Pre-divider ratio (for host mode)
-+		if (reg >= 6) { 	
-+			printk("***** Xtal 25MHz *****\n");
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4bc),  4, 2, 0x01);	// RG_PE1_H_PLL_FBKSEL             //Feedback clock select
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x49c),  0,31, 0x18000000);	// RG_PE1_H_LCDDS_PCW_NCPO         //DDS NCPO PCW (for host mode)
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a4),  0,16, 0x18d);	// RG_PE1_H_LCDDS_SSC_PRD          //DDS SSC dither period control
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a8),  0,12, 0x4a);	// RG_PE1_H_LCDDS_SSC_DELTA        //DDS SSC dither amplitude control
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a8), 16,12, 0x4a);	// RG_PE1_H_LCDDS_SSC_DELTA1       //DDS SSC dither amplitude control for initial
-+		} else {
-+			printk("***** Xtal 20MHz *****\n");
-+		}
-+	}
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a0),  5, 1, 0x01);	// RG_PE1_LCDDS_CLK_PH_INV         //DDS clock inversion
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 22, 2, 0x02);	// RG_PE1_H_PLL_BC                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 18, 4, 0x06);	// RG_PE1_H_PLL_BP                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 12, 4, 0x02);	// RG_PE1_H_PLL_IR                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490),  8, 4, 0x01);	// RG_PE1_H_PLL_IC                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4ac), 16, 3, 0x00);	// RG_PE1_H_PLL_BR                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490),  1, 3, 0x02);	// RG_PE1_PLL_DIVEN                
-+	if(reg <= 5 && reg >= 3) { 	// 40MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414),  6, 2, 0x01);	// rg_pe1_mstckdiv		//value of da_pe1_mstckdiv when force mode enable
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414),  5, 1, 0x01);	// rg_pe1_frc_mstckdiv          //force mode enable of da_pe1_mstckdiv      
-+	}
-+	/* Enable PHY and disable force mode */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000),  5, 1, 0x01);	// rg_pe1_phy_en                   //Port 0 enable
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100),  5, 1, 0x01);	// rg_pe1_phy_en                   //Port 1 enable
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000),  4, 1, 0x00);	// rg_pe1_frc_phy_en               //Force Port 0 disable control
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100),  4, 1, 0x00);	// rg_pe1_frc_phy_en               //Force Port 1 disable control
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	/* Set PCIe Port2 PHY to disable SSC */
-+	/* Debug Xtal Type */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x400),  8, 1, 0x01);	// rg_pe1_frc_h_xtal_type
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x400),  9, 2, 0x00);	// rg_pe1_h_xtal_type
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000),  4, 1, 0x01);	// rg_pe1_frc_phy_en               //Force Port 0 enable control
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000),  5, 1, 0x00);	// rg_pe1_phy_en                   //Port 0 disable
-+	if(reg <= 5 && reg >= 3) { 	// 40MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490),  6, 2, 0x01);	// RG_PE1_H_PLL_PREDIV             //Pre-divider ratio (for host mode)
-+	} else {			// 25MHz | 20MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490),  6, 2, 0x00);	// RG_PE1_H_PLL_PREDIV             //Pre-divider ratio (for host mode)
-+		if (reg >= 6) { 	// 25MHz Xtal
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4bc),  4, 2, 0x01);	// RG_PE1_H_PLL_FBKSEL             //Feedback clock select
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x49c),  0,31, 0x18000000);	// RG_PE1_H_LCDDS_PCW_NCPO         //DDS NCPO PCW (for host mode)
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a4),  0,16, 0x18d);	// RG_PE1_H_LCDDS_SSC_PRD          //DDS SSC dither period control
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a8),  0,12, 0x4a);	// RG_PE1_H_LCDDS_SSC_DELTA        //DDS SSC dither amplitude control
-+			set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a8), 16,12, 0x4a);	// RG_PE1_H_LCDDS_SSC_DELTA1       //DDS SSC dither amplitude control for initial
-+		}
-+	}
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a0),  5, 1, 0x01);	// RG_PE1_LCDDS_CLK_PH_INV         //DDS clock inversion
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 22, 2, 0x02);	// RG_PE1_H_PLL_BC                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 18, 4, 0x06);	// RG_PE1_H_PLL_BP                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 12, 4, 0x02);	// RG_PE1_H_PLL_IR                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490),  8, 4, 0x01);	// RG_PE1_H_PLL_IC                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4ac), 16, 3, 0x00);	// RG_PE1_H_PLL_BR                 
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490),  1, 3, 0x02);	// RG_PE1_PLL_DIVEN                
-+	if(reg <= 5 && reg >= 3) { 	// 40MHz Xtal
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x414),  6, 2, 0x01);	// rg_pe1_mstckdiv		//value of da_pe1_mstckdiv when force mode enable
-+		set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x414),  5, 1, 0x01);	// rg_pe1_frc_mstckdiv          //force mode enable of da_pe1_mstckdiv      
-+	}
-+	/* Enable PHY and disable force mode */
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000),  5, 1, 0x01);	// rg_pe1_phy_en                   //Port 0 enable
-+	set_pcie_phy((u32 *)(RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000),  4, 1, 0x00);	// rg_pe1_frc_phy_en               //Force Port 0 disable control
-+#endif
-+}
-+
-+void setup_cm_memory_region(struct resource *mem_resource)
-+{
-+	resource_size_t mask;
-+	if (mips_cps_numiocu(0)) {
-+		/* FIXME: hardware doesn't accept mask values with 1s after
-+		   0s (e.g. 0xffef), so it would be great to warn if that's
-+		   about to happen */
-+		mask = ~(mem_resource->end - mem_resource->start);
-+
-+		write_gcr_reg1_base(mem_resource->start);
-+		write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0);
-+		printk("PCI coherence region base: 0x%08lx, mask/settings: 0x%08lx\n",
-+		       read_gcr_reg1_base(),
-+		       read_gcr_reg1_mask());
-+	}
-+}
-+
-+static int mt7621_pci_probe(struct platform_device *pdev)
-+{
-+	unsigned long val = 0;
-+	int i;
-+
-+	for (i = 0; i < 3; i++)
-+		pcie_irq[i] = irq_of_parse_and_map(pdev->dev.of_node, i);
-+
-+	iomem_resource.start = 0;
-+	iomem_resource.end= ~0;
-+	ioport_resource.start= 0;
-+	ioport_resource.end = ~0;
-+
-+#if defined (CONFIG_PCIE_PORT0)
-+	val = RALINK_PCIE0_RST;
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	val |= RALINK_PCIE1_RST;
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	val |= RALINK_PCIE2_RST;
-+#endif
-+	ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST | RALINK_PCIE1_RST | RALINK_PCIE2_RST);
-+	printk("pull PCIe RST: RALINK_RSTCTRL = %x\n", RALINK_RSTCTRL);
-+#if defined GPIO_PERST /* add GPIO control instead of PERST_N */ /*chhung*/
-+	*(unsigned int *)(0xbe000060) &= ~(0x3<<10 | 0x3<<3);
-+	*(unsigned int *)(0xbe000060) |= 0x1<<10 | 0x1<<3;
-+	mdelay(100);
-+	*(unsigned int *)(0xbe000600) |= 0x1<<19 | 0x1<<8 | 0x1<<7; // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3)
-+	mdelay(100);
-+	*(unsigned int *)(0xbe000620) &= ~(0x1<<19 | 0x1<<8 | 0x1<<7);		// clear DATA
-+
-+	mdelay(100);
-+#else
-+	*(unsigned int *)(0xbe000060) &= ~0x00000c00;
-+#endif
-+#if defined (CONFIG_PCIE_PORT0)
-+	val = RALINK_PCIE0_RST;
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	val |= RALINK_PCIE1_RST;
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	val |= RALINK_PCIE2_RST;
-+#endif
-+	DEASSERT_SYSRST_PCIE(val);
-+	printk("release PCIe RST: RALINK_RSTCTRL = %x\n", RALINK_RSTCTRL);
-+
-+	if ((*(unsigned int *)(0xbe00000c)&0xFFFF) == 0x0101) // MT7621 E2
-+		bypass_pipe_rst();
-+	set_phy_for_ssc();
-+	printk("release PCIe RST: RALINK_RSTCTRL = %x\n", RALINK_RSTCTRL);
-+
-+#if defined (CONFIG_PCIE_PORT0)
-+	read_config(0, 0, 0, 0x70c, &val);
-+	printk("Port 0 N_FTS = %x\n", (unsigned int)val);
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	read_config(0, 1, 0, 0x70c, &val);
-+	printk("Port 1 N_FTS = %x\n", (unsigned int)val);
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	read_config(0, 2, 0, 0x70c, &val);
-+	printk("Port 2 N_FTS = %x\n", (unsigned int)val);
-+#endif
-+
-+	RALINK_RSTCTRL = (RALINK_RSTCTRL | RALINK_PCIE_RST);
-+	RALINK_SYSCFG1 &= ~(0x30);
-+	RALINK_SYSCFG1 |= (2<<4);
-+	RALINK_PCIE_CLK_GEN &= 0x7fffffff;
-+	RALINK_PCIE_CLK_GEN1 &= 0x80ffffff;
-+	RALINK_PCIE_CLK_GEN1 |= 0xa << 24;
-+	RALINK_PCIE_CLK_GEN |= 0x80000000;
-+	mdelay(50);
-+	RALINK_RSTCTRL = (RALINK_RSTCTRL & ~RALINK_PCIE_RST);
-+	
-+
-+#if defined GPIO_PERST /* add GPIO control instead of PERST_N */  /*chhung*/
-+	*(unsigned int *)(0xbe000620) |= 0x1<<19 | 0x1<<8 | 0x1<<7;		// set DATA
-+	mdelay(100);
-+#else
-+	RALINK_PCI_PCICFG_ADDR &= ~(1<<1); //de-assert PERST
-+#endif
-+	mdelay(500);
-+
-+
-+	mdelay(500);
-+#if defined (CONFIG_PCIE_PORT0)
-+	if(( RALINK_PCI0_STATUS & 0x1) == 0)
-+	{
-+		printk("PCIE0 no card, disable it(RST&CLK)\n");
-+		ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST);
-+		RALINK_CLKCFG1 = (RALINK_CLKCFG1 & ~RALINK_PCIE0_CLK_EN);
-+		pcie_link_status &= ~(1<<0);
-+	} else {
-+		pcie_link_status |= 1<<0;
-+		RALINK_PCI_PCIMSK_ADDR |= (1<<20); // enable pcie1 interrupt
-+	}
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	if(( RALINK_PCI1_STATUS & 0x1) == 0)
-+	{
-+		printk("PCIE1 no card, disable it(RST&CLK)\n");
-+		ASSERT_SYSRST_PCIE(RALINK_PCIE1_RST);
-+		RALINK_CLKCFG1 = (RALINK_CLKCFG1 & ~RALINK_PCIE1_CLK_EN);
-+		pcie_link_status &= ~(1<<1);
-+	} else {
-+		pcie_link_status |= 1<<1;
-+		RALINK_PCI_PCIMSK_ADDR |= (1<<21); // enable pcie1 interrupt
-+	}
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	if (( RALINK_PCI2_STATUS & 0x1) == 0) {
-+		printk("PCIE2 no card, disable it(RST&CLK)\n");
-+		ASSERT_SYSRST_PCIE(RALINK_PCIE2_RST);
-+		RALINK_CLKCFG1 = (RALINK_CLKCFG1 & ~RALINK_PCIE2_CLK_EN);
-+		pcie_link_status &= ~(1<<2);
-+	} else {
-+		pcie_link_status |= 1<<2;
-+		RALINK_PCI_PCIMSK_ADDR |= (1<<22); // enable pcie2 interrupt
-+	}
-+#endif
-+	if (pcie_link_status == 0)
-+		return 0;
-+
-+/*
-+pcie(2/1/0) link status	pcie2_num	pcie1_num	pcie0_num
-+3'b000			x		x		x
-+3'b001			x		x		0
-+3'b010			x		0		x
-+3'b011			x		1		0
-+3'b100			0		x		x
-+3'b101			1		x		0
-+3'b110			1		0		x
-+3'b111			2		1		0
-+*/
-+	switch(pcie_link_status) {
-+	case 2:
-+		RALINK_PCI_PCICFG_ADDR &= ~0x00ff0000;
-+		RALINK_PCI_PCICFG_ADDR |= 0x1 << 16;	//port0
-+		RALINK_PCI_PCICFG_ADDR |= 0x0 << 20;	//port1
-+		break;
-+	case 4:
-+		RALINK_PCI_PCICFG_ADDR &= ~0x0fff0000;
-+		RALINK_PCI_PCICFG_ADDR |= 0x1 << 16;	//port0
-+		RALINK_PCI_PCICFG_ADDR |= 0x2 << 20;	//port1
-+		RALINK_PCI_PCICFG_ADDR |= 0x0 << 24;	//port2
-+		break;
-+	case 5:
-+		RALINK_PCI_PCICFG_ADDR &= ~0x0fff0000;
-+		RALINK_PCI_PCICFG_ADDR |= 0x0 << 16;	//port0
-+		RALINK_PCI_PCICFG_ADDR |= 0x2 << 20;	//port1
-+		RALINK_PCI_PCICFG_ADDR |= 0x1 << 24;	//port2
-+		break;
-+	case 6:
-+		RALINK_PCI_PCICFG_ADDR &= ~0x0fff0000;
-+		RALINK_PCI_PCICFG_ADDR |= 0x2 << 16;	//port0
-+		RALINK_PCI_PCICFG_ADDR |= 0x0 << 20;	//port1
-+		RALINK_PCI_PCICFG_ADDR |= 0x1 << 24;	//port2
-+		break;
-+	}
-+	printk(" -> %x\n", RALINK_PCI_PCICFG_ADDR);
-+	//printk(" RALINK_PCI_ARBCTL = %x\n", RALINK_PCI_ARBCTL);
-+
-+/*
-+	ioport_resource.start = mt7621_res_pci_io1.start;
-+  	ioport_resource.end = mt7621_res_pci_io1.end;
-+*/
-+
-+	RALINK_PCI_MEMBASE = 0xffffffff; //RALINK_PCI_MM_MAP_BASE;
-+	RALINK_PCI_IOBASE = RALINK_PCI_IO_MAP_BASE;
-+
-+#if defined (CONFIG_PCIE_PORT0)
-+	//PCIe0
-+	if((pcie_link_status & 0x1) != 0) {
-+		RALINK_PCI0_BAR0SETUP_ADDR = 0x7FFF0001;	//open 7FFF:2G; ENABLE
-+		RALINK_PCI0_IMBASEBAR0_ADDR = MEMORY_BASE;
-+		RALINK_PCI0_CLASS = 0x06040001;
-+		printk("PCIE0 enabled\n");
-+	}
-+#endif
-+#if defined (CONFIG_PCIE_PORT1)
-+	//PCIe1
-+	if ((pcie_link_status & 0x2) != 0) {
-+		RALINK_PCI1_BAR0SETUP_ADDR = 0x7FFF0001;	//open 7FFF:2G; ENABLE
-+		RALINK_PCI1_IMBASEBAR0_ADDR = MEMORY_BASE;
-+		RALINK_PCI1_CLASS = 0x06040001;
-+		printk("PCIE1 enabled\n");
-+	}
-+#endif
-+#if defined (CONFIG_PCIE_PORT2)
-+	//PCIe2
-+	if ((pcie_link_status & 0x4) != 0) {
-+		RALINK_PCI2_BAR0SETUP_ADDR = 0x7FFF0001;	//open 7FFF:2G; ENABLE
-+		RALINK_PCI2_IMBASEBAR0_ADDR = MEMORY_BASE;
-+		RALINK_PCI2_CLASS = 0x06040001;
-+		printk("PCIE2 enabled\n");
-+	}
-+#endif
-+
-+
-+	switch(pcie_link_status) {
-+	case 7:
-+		read_config(0, 2, 0, 0x4, &val);
-+		write_config(0, 2, 0, 0x4, val|0x4);
-+		// write_config(0, 1, 0, 0x4, val|0x7);
-+		read_config(0, 2, 0, 0x70c, &val);
-+		val &= ~(0xff)<<8;
-+		val |= 0x50<<8;
-+		write_config(0, 2, 0, 0x70c, val);
-+	case 3:
-+	case 5:
-+	case 6:
-+		read_config(0, 1, 0, 0x4, &val);
-+		write_config(0, 1, 0, 0x4, val|0x4);
-+		// write_config(0, 1, 0, 0x4, val|0x7);
-+		read_config(0, 1, 0, 0x70c, &val);
-+		val &= ~(0xff)<<8;
-+		val |= 0x50<<8;
-+		write_config(0, 1, 0, 0x70c, val);
-+	default:
-+		read_config(0, 0, 0, 0x4, &val);
-+		write_config(0, 0, 0, 0x4, val|0x4); //bus master enable
-+		// write_config(0, 0, 0, 0x4, val|0x7); //bus master enable
-+		read_config(0, 0, 0, 0x70c, &val);
-+		val &= ~(0xff)<<8;
-+		val |= 0x50<<8;
-+		write_config(0, 0, 0, 0x70c, val);
-+	}
-+
-+	pci_load_of_ranges(&mt7621_controller, pdev->dev.of_node);
-+	setup_cm_memory_region(mt7621_controller.mem_resource);
-+	register_pci_controller(&mt7621_controller);
-+	return 0;
-+
-+}
-+
-+int pcibios_plat_dev_init(struct pci_dev *dev)
-+{
-+	return 0;
-+}
-+
-+static const struct of_device_id mt7621_pci_ids[] = {
-+	{ .compatible = "mediatek,mt7621-pci" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, mt7621_pci_ids);
-+
-+static struct platform_driver mt7621_pci_driver = {
-+	.probe = mt7621_pci_probe,
-+	.driver = {
-+		.name = "mt7621-pci",
-+		.owner = THIS_MODULE,
-+		.of_match_table = of_match_ptr(mt7621_pci_ids),
-+	},
-+};
-+
-+static int __init mt7621_pci_init(void)
-+{
-+	return platform_driver_register(&mt7621_pci_driver);
-+}
-+
-+arch_initcall(mt7621_pci_init);
diff --git a/iopsys-ramips/patches-4.14/0009-PCI-MIPS-enable-PCIe-on-MT7688.patch b/iopsys-ramips/patches-4.14/0009-PCI-MIPS-enable-PCIe-on-MT7688.patch
deleted file mode 100644
index 6ca15fe32edfe90a6877a434e1e60f3e136e0fa2..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0009-PCI-MIPS-enable-PCIe-on-MT7688.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 7768798964eb0e4f95eaecffb93b5d0ca28a38af Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Sat, 3 Jun 2017 20:00:03 +0200
-Subject: [PATCH] MIPS: pci-mt7620: enabled PCIe on MT7688
-To: linux-mips@linux-mips.org,
-    John Crispin <john@phrozen.org>
-Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn>,
-    Ralf Baechle <ralf@linux-mips.org>,
-    linux-mediatek@lists.infradead.org
-
-Use PCIe support for MT7628AN also on MT7688.
-Tested on WRTNODE2R.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- arch/mips/pci/pci-mt7620.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/pci/pci-mt7620.c
-+++ b/arch/mips/pci/pci-mt7620.c
-@@ -316,6 +316,7 @@ static int mt7620_pci_probe(struct platf
- 		break;
- 
- 	case MT762X_SOC_MT7628AN:
-+	case MT762X_SOC_MT7688:
- 		if (mt7628_pci_hw_init(pdev))
- 			return -1;
- 		break;
diff --git a/iopsys-ramips/patches-4.14/0025-pinctrl-ralink-add-pinctrl-driver.patch b/iopsys-ramips/patches-4.14/0025-pinctrl-ralink-add-pinctrl-driver.patch
deleted file mode 100644
index a374e01b5935f96697b405f8338515cd49eae2ca..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0025-pinctrl-ralink-add-pinctrl-driver.patch
+++ /dev/null
@@ -1,524 +0,0 @@
-From 7adbe9a88c33c6e362a10b109d963b5500a21f00 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 27 Jul 2014 09:34:05 +0100
-Subject: [PATCH 25/53] pinctrl: ralink: add pinctrl driver
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/Kconfig                |    2 +
- drivers/pinctrl/Kconfig          |    5 +
- drivers/pinctrl/Makefile         |    1 +
- drivers/pinctrl/pinctrl-rt2880.c |  474 ++++++++++++++++++++++++++++++++++++++
- 4 files changed, 482 insertions(+)
- create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -629,6 +629,8 @@ config RALINK
- 	select CLKDEV_LOOKUP
- 	select ARCH_HAS_RESET_CONTROLLER
- 	select RESET_CONTROLLER
-+	select PINCTRL
-+	select PINCTRL_RT2880
- 
- config SGI_IP22
- 	bool "SGI IP22 (Indy/Indigo2)"
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -143,6 +143,11 @@ config PINCTRL_LPC18XX
- 	help
- 	  Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
- 
-+config PINCTRL_RT2880
-+	bool
-+	depends on RALINK
-+	select PINMUX
-+
- config PINCTRL_FALCON
- 	bool
- 	depends on SOC_FALCON
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_PINCTRL_PALMAS)	+= pinctrl-
- obj-$(CONFIG_PINCTRL_PIC32)	+= pinctrl-pic32.o
- obj-$(CONFIG_PINCTRL_PISTACHIO)	+= pinctrl-pistachio.o
- obj-$(CONFIG_PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
-+obj-$(CONFIG_PINCTRL_RT2880)	+= pinctrl-rt2880.o
- obj-$(CONFIG_PINCTRL_RZA1)	+= pinctrl-rza1.o
- obj-$(CONFIG_PINCTRL_SINGLE)	+= pinctrl-single.o
- obj-$(CONFIG_PINCTRL_SIRF)	+= sirf/
---- /dev/null
-+++ b/drivers/pinctrl/pinctrl-rt2880.c
-@@ -0,0 +1,472 @@
-+/*
-+ *  linux/drivers/pinctrl/pinctrl-rt2880.c
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License version 2 as
-+ *  publishhed by the Free Software Foundation.
-+ *
-+ *  Copyright (C) 2013 John Crispin <blogic@openwrt.org>
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/device.h>
-+#include <linux/io.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+#include <linux/of.h>
-+#include <linux/pinctrl/pinctrl.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/consumer.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include <asm/mach-ralink/ralink_regs.h>
-+#include <asm/mach-ralink/pinmux.h>
-+#include <asm/mach-ralink/mt7620.h>
-+
-+#include "core.h"
-+
-+#define SYSC_REG_GPIO_MODE	0x60
-+#define SYSC_REG_GPIO_MODE2	0x64
-+
-+struct rt2880_priv {
-+	struct device *dev;
-+
-+	struct pinctrl_pin_desc *pads;
-+	struct pinctrl_desc *desc;
-+
-+	struct rt2880_pmx_func **func;
-+	int func_count;
-+
-+	struct rt2880_pmx_group *groups;
-+	const char **group_names;
-+	int group_count;
-+
-+	uint8_t *gpio;
-+	int max_pins;
-+};
-+
-+static int rt2880_get_group_count(struct pinctrl_dev *pctrldev)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	return p->group_count;
-+}
-+
-+static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
-+					 unsigned group)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	if (group >= p->group_count)
-+		return NULL;
-+
-+	return p->group_names[group];
-+}
-+
-+static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
-+				 unsigned group,
-+				 const unsigned **pins,
-+				 unsigned *num_pins)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	if (group >= p->group_count)
-+		return -EINVAL;
-+
-+	*pins = p->groups[group].func[0].pins;
-+	*num_pins = p->groups[group].func[0].pin_count;
-+
-+	return 0;
-+}
-+
-+static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
-+				    struct pinctrl_map *map, unsigned num_maps)
-+{
-+	int i;
-+
-+	for (i = 0; i < num_maps; i++)
-+		if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN ||
-+		    map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
-+			kfree(map[i].data.configs.configs);
-+	kfree(map);
-+}
-+
-+static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
-+					struct seq_file *s,
-+					unsigned offset)
-+{
-+	seq_printf(s, "ralink pio");
-+}
-+
-+static void rt2880_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctrldev,
-+				struct device_node *np,
-+				struct pinctrl_map **map)
-+{
-+        const char *function;
-+	int func = of_property_read_string(np, "ralink,function", &function);
-+	int grps = of_property_count_strings(np, "ralink,group");
-+	int i;
-+
-+	if (func || !grps)
-+		return;
-+
-+	for (i = 0; i < grps; i++) {
-+	        const char *group;
-+
-+		of_property_read_string_index(np, "ralink,group", i, &group);
-+
-+		(*map)->type = PIN_MAP_TYPE_MUX_GROUP;
-+		(*map)->name = function;
-+		(*map)->data.mux.group = group;
-+		(*map)->data.mux.function = function;
-+		(*map)++;
-+	}
-+}
-+
-+static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
-+				struct device_node *np_config,
-+				struct pinctrl_map **map,
-+				unsigned *num_maps)
-+{
-+	int max_maps = 0;
-+	struct pinctrl_map *tmp;
-+	struct device_node *np;
-+
-+	for_each_child_of_node(np_config, np) {
-+		int ret = of_property_count_strings(np, "ralink,group");
-+
-+		if (ret >= 0)
-+			max_maps += ret;
-+	}
-+
-+	if (!max_maps)
-+		return -EINVAL;
-+
-+	*map = kzalloc(max_maps * sizeof(struct pinctrl_map), GFP_KERNEL);
-+	if (!*map)
-+		return -ENOMEM;
-+
-+	tmp = *map;
-+
-+	for_each_child_of_node(np_config, np)
-+		rt2880_pinctrl_dt_subnode_to_map(pctrldev, np, &tmp);
-+	*num_maps = max_maps;
-+
-+	return 0;
-+}
-+
-+static const struct pinctrl_ops rt2880_pctrl_ops = {
-+	.get_groups_count	= rt2880_get_group_count,
-+	.get_group_name		= rt2880_get_group_name,
-+	.get_group_pins		= rt2880_get_group_pins,
-+	.pin_dbg_show		= rt2880_pinctrl_pin_dbg_show,
-+	.dt_node_to_map		= rt2880_pinctrl_dt_node_to_map,
-+	.dt_free_map		= rt2880_pinctrl_dt_free_map,
-+};
-+
-+static int rt2880_pmx_func_count(struct pinctrl_dev *pctrldev)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	return p->func_count;
-+}
-+
-+static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
-+					 unsigned func)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	return p->func[func]->name;
-+}
-+
-+static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
-+				unsigned func,
-+				const char * const **groups,
-+				unsigned * const num_groups)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	if (p->func[func]->group_count == 1)
-+		*groups = &p->group_names[p->func[func]->groups[0]];
-+	else
-+		*groups = p->group_names;
-+
-+	*num_groups = p->func[func]->group_count;
-+
-+	return 0;
-+}
-+
-+static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
-+				unsigned func,
-+				unsigned group)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+        u32 mode = 0;
-+	u32 reg = SYSC_REG_GPIO_MODE;
-+	int i;
-+	int shift;
-+
-+	/* dont allow double use */
-+	if (p->groups[group].enabled) {
-+		dev_err(p->dev, "%s is already enabled\n", p->groups[group].name);
-+		return -EBUSY;
-+	}
-+
-+	p->groups[group].enabled = 1;
-+	p->func[func]->enabled = 1;
-+
-+	shift = p->groups[group].shift;
-+	if (shift >= 32) {
-+		shift -= 32;
-+		reg = SYSC_REG_GPIO_MODE2;
-+	}
-+	mode = rt_sysc_r32(reg);
-+	mode &= ~(p->groups[group].mask << shift);
-+
-+	/* mark the pins as gpio */
-+	for (i = 0; i < p->groups[group].func[0].pin_count; i++)
-+		p->gpio[p->groups[group].func[0].pins[i]] = 1;
-+
-+	/* function 0 is gpio and needs special handling */
-+	if (func == 0) {
-+		mode |= p->groups[group].gpio << shift;
-+	} else {
-+		for (i = 0; i < p->func[func]->pin_count; i++)
-+			p->gpio[p->func[func]->pins[i]] = 0;
-+		mode |= p->func[func]->value << shift;
-+	}
-+	rt_sysc_w32(mode, reg);
-+
-+	return 0;
-+}
-+
-+static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
-+				struct pinctrl_gpio_range *range,
-+				unsigned pin)
-+{
-+	struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
-+
-+	if (!p->gpio[pin]) {
-+		dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct pinmux_ops rt2880_pmx_group_ops = {
-+	.get_functions_count	= rt2880_pmx_func_count,
-+	.get_function_name	= rt2880_pmx_func_name,
-+	.get_function_groups	= rt2880_pmx_group_get_groups,
-+	.set_mux		= rt2880_pmx_group_enable,
-+	.gpio_request_enable	= rt2880_pmx_group_gpio_request_enable,
-+};
-+
-+static struct pinctrl_desc rt2880_pctrl_desc = {
-+	.owner		= THIS_MODULE,
-+	.name		= "rt2880-pinmux",
-+	.pctlops	= &rt2880_pctrl_ops,
-+	.pmxops		= &rt2880_pmx_group_ops,
-+};
-+
-+static struct rt2880_pmx_func gpio_func = {
-+	.name = "gpio",
-+};
-+
-+static int rt2880_pinmux_index(struct rt2880_priv *p)
-+{
-+	struct rt2880_pmx_func **f;
-+	struct rt2880_pmx_group *mux = p->groups;
-+	int i, j, c = 0;
-+
-+	/* count the mux functions */
-+	while (mux->name) {
-+		p->group_count++;
-+		mux++;
-+	}
-+
-+	/* allocate the group names array needed by the gpio function */
-+	p->group_names = devm_kzalloc(p->dev, sizeof(char *) * p->group_count, GFP_KERNEL);
-+	if (!p->group_names)
-+		return -1;
-+
-+	for (i = 0; i < p->group_count; i++) {
-+		p->group_names[i] = p->groups[i].name;
-+		p->func_count += p->groups[i].func_count;
-+	}
-+
-+	/* we have a dummy function[0] for gpio */
-+	p->func_count++;
-+
-+	/* allocate our function and group mapping index buffers */
-+	f = p->func = devm_kzalloc(p->dev, sizeof(struct rt2880_pmx_func) * p->func_count, GFP_KERNEL);
-+	gpio_func.groups = devm_kzalloc(p->dev, sizeof(int) * p->group_count, GFP_KERNEL);
-+	if (!f || !gpio_func.groups)
-+		return -1;
-+
-+	/* add a backpointer to the function so it knows its group */
-+	gpio_func.group_count = p->group_count;
-+	for (i = 0; i < gpio_func.group_count; i++)
-+		gpio_func.groups[i] = i;
-+
-+	f[c] = &gpio_func;
-+	c++;
-+
-+	/* add remaining functions */
-+	for (i = 0; i < p->group_count; i++) {
-+		for (j = 0; j < p->groups[i].func_count; j++) {
-+			f[c] = &p->groups[i].func[j];
-+			f[c]->groups = devm_kzalloc(p->dev, sizeof(int), GFP_KERNEL);
-+			f[c]->groups[0] = i;
-+			f[c]->group_count = 1;
-+			c++;
-+		}
-+	}
-+	return 0;
-+}
-+
-+static int rt2880_pinmux_pins(struct rt2880_priv *p)
-+{
-+	int i, j;
-+
-+	/* loop over the functions and initialize the pins array. also work out the highest pin used */
-+	for (i = 0; i < p->func_count; i++) {
-+		int pin;
-+
-+		if (!p->func[i]->pin_count)
-+			continue;
-+
-+		p->func[i]->pins = devm_kzalloc(p->dev, sizeof(int) * p->func[i]->pin_count, GFP_KERNEL);
-+		for (j = 0; j < p->func[i]->pin_count; j++)
-+			p->func[i]->pins[j] = p->func[i]->pin_first + j;
-+
-+		pin = p->func[i]->pin_first + p->func[i]->pin_count;
-+		if (pin > p->max_pins)
-+			p->max_pins = pin;
-+	}
-+
-+	/* the buffer that tells us which pins are gpio */
-+	p->gpio = devm_kzalloc(p->dev,sizeof(uint8_t) * p->max_pins,
-+		GFP_KERNEL);
-+	/* the pads needed to tell pinctrl about our pins */
-+	p->pads = devm_kzalloc(p->dev,
-+		sizeof(struct pinctrl_pin_desc) * p->max_pins,
-+		GFP_KERNEL);
-+	if (!p->pads || !p->gpio ) {
-+		dev_err(p->dev, "Failed to allocate gpio data\n");
-+		return -ENOMEM;
-+	}
-+
-+	memset(p->gpio, 1, sizeof(uint8_t) * p->max_pins);
-+	for (i = 0; i < p->func_count; i++) {
-+		if (!p->func[i]->pin_count)
-+			continue;
-+
-+		for (j = 0; j < p->func[i]->pin_count; j++)
-+			p->gpio[p->func[i]->pins[j]] = 0;
-+	}
-+
-+	/* pin 0 is always a gpio */
-+	p->gpio[0] = 1;
-+
-+	/* set the pads */
-+	for (i = 0; i < p->max_pins; i++) {
-+		/* strlen("ioXY") + 1 = 5 */
-+		char *name = devm_kzalloc(p->dev, 5, GFP_KERNEL);
-+
-+		if (!name) {
-+			dev_err(p->dev, "Failed to allocate pad name\n");
-+			return -ENOMEM;
-+		}
-+		snprintf(name, 5, "io%d", i);
-+		p->pads[i].number = i;
-+		p->pads[i].name = name;
-+	}
-+	p->desc->pins = p->pads;
-+	p->desc->npins = p->max_pins;
-+
-+	return 0;
-+}
-+
-+static int rt2880_pinmux_probe(struct platform_device *pdev)
-+{
-+	struct rt2880_priv *p;
-+	struct pinctrl_dev *dev;
-+	struct device_node *np;
-+
-+	if (!rt2880_pinmux_data)
-+		return -ENOSYS;
-+
-+	/* setup the private data */
-+	p = devm_kzalloc(&pdev->dev, sizeof(struct rt2880_priv), GFP_KERNEL);
-+	if (!p)
-+		return -ENOMEM;
-+
-+	p->dev = &pdev->dev;
-+	p->desc = &rt2880_pctrl_desc;
-+	p->groups = rt2880_pinmux_data;
-+	platform_set_drvdata(pdev, p);
-+
-+	/* init the device */
-+	if (rt2880_pinmux_index(p)) {
-+		dev_err(&pdev->dev, "failed to load index\n");
-+		return -EINVAL;
-+	}
-+	if (rt2880_pinmux_pins(p)) {
-+		dev_err(&pdev->dev, "failed to load pins\n");
-+		return -EINVAL;
-+	}
-+	dev = pinctrl_register(p->desc, &pdev->dev, p);
-+	if (IS_ERR(dev))
-+		return PTR_ERR(dev);
-+
-+	/* finalize by adding gpio ranges for enables gpio controllers */
-+	for_each_compatible_node(np, NULL, "ralink,rt2880-gpio") {
-+		const __be32 *ngpio, *gpiobase;
-+		struct pinctrl_gpio_range *range;
-+		char *name;
-+
-+		if (!of_device_is_available(np))
-+			continue;
-+
-+		ngpio = of_get_property(np, "ralink,nr-gpio", NULL);
-+		gpiobase = of_get_property(np, "ralink,gpio-base", NULL);
-+		if (!ngpio || !gpiobase) {
-+			dev_err(&pdev->dev, "failed to load chip info\n");
-+			return -EINVAL;
-+		}
-+
-+		range = devm_kzalloc(p->dev, sizeof(struct pinctrl_gpio_range) + 4, GFP_KERNEL);
-+		range->name = name = (char *) &range[1];
-+		sprintf(name, "pio");
-+		range->npins = __be32_to_cpu(*ngpio);
-+		range->base = __be32_to_cpu(*gpiobase);
-+		range->pin_base = range->base;
-+		pinctrl_add_gpio_range(dev, range);
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id rt2880_pinmux_match[] = {
-+	{ .compatible = "ralink,rt2880-pinmux" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, rt2880_pinmux_match);
-+
-+static struct platform_driver rt2880_pinmux_driver = {
-+	.probe = rt2880_pinmux_probe,
-+	.driver = {
-+		.name = "rt2880-pinmux",
-+		.owner = THIS_MODULE,
-+		.of_match_table = rt2880_pinmux_match,
-+	},
-+};
-+
-+int __init rt2880_pinmux_init(void)
-+{
-+	return platform_driver_register(&rt2880_pinmux_driver);
-+}
-+
-+core_initcall_sync(rt2880_pinmux_init);
diff --git a/iopsys-ramips/patches-4.14/0028-GPIO-ralink-add-mt7621-gpio-controller.patch b/iopsys-ramips/patches-4.14/0028-GPIO-ralink-add-mt7621-gpio-controller.patch
deleted file mode 100644
index debeae28060a2e1a59931124efad21bc355fe445..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0028-GPIO-ralink-add-mt7621-gpio-controller.patch
+++ /dev/null
@@ -1,405 +0,0 @@
-From 61ac7d9b4228de8c332900902c2b93189b042eab Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 27 Jul 2014 11:00:32 +0100
-Subject: [PATCH 28/53] GPIO: ralink: add mt7621 gpio controller
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/Kconfig          |    3 +
- drivers/gpio/Kconfig       |    6 +
- drivers/gpio/Makefile      |    1 +
- drivers/gpio/gpio-mt7621.c |  354 ++++++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 364 insertions(+)
- create mode 100644 drivers/gpio/gpio-mt7621.c
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -631,6 +631,9 @@ config RALINK
- 	select RESET_CONTROLLER
- 	select PINCTRL
- 	select PINCTRL_RT2880
-+	select ARCH_HAS_RESET_CONTROLLER
-+	select RESET_CONTROLLER
-+	select ARCH_REQUIRE_GPIOLIB
- 
- config SGI_IP22
- 	bool "SGI IP22 (Indy/Indigo2)"
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -298,6 +298,12 @@ config GPIO_MENZ127
- 	help
- 	 Say yes here to support the MEN 16Z127 GPIO Controller
- 
-+config GPIO_MT7621
-+	bool "Mediatek GPIO Support"
-+	depends on SOC_MT7620 || SOC_MT7621
-+	help
-+	  Say yes here to support the Mediatek SoC GPIO device
-+
- config GPIO_MM_LANTIQ
- 	bool "Lantiq Memory mapped GPIOs"
- 	depends on LANTIQ && SOC_XWAY
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -152,3 +152,4 @@ obj-$(CONFIG_GPIO_ZEVIO)	+= gpio-zevio.o
- obj-$(CONFIG_GPIO_ZYNQ)		+= gpio-zynq.o
- obj-$(CONFIG_GPIO_ZX)		+= gpio-zx.o
- obj-$(CONFIG_GPIO_LOONGSON1)	+= gpio-loongson1.o
-+obj-$(CONFIG_GPIO_MT7621)	+= gpio-mt7621.o
---- /dev/null
-+++ b/drivers/gpio/gpio-mt7621.c
-@@ -0,0 +1,354 @@
-+/*
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ *
-+ * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
-+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
-+ */
-+
-+#include <linux/io.h>
-+#include <linux/err.h>
-+#include <linux/gpio.h>
-+#include <linux/module.h>
-+#include <linux/of_irq.h>
-+#include <linux/spinlock.h>
-+#include <linux/irqdomain.h>
-+#include <linux/interrupt.h>
-+#include <linux/platform_device.h>
-+
-+#define MTK_MAX_BANK		3
-+#define MTK_BANK_WIDTH		32
-+
-+enum mediatek_gpio_reg {
-+	GPIO_REG_CTRL = 0,
-+	GPIO_REG_POL,
-+	GPIO_REG_DATA,
-+	GPIO_REG_DSET,
-+	GPIO_REG_DCLR,
-+	GPIO_REG_REDGE,
-+	GPIO_REG_FEDGE,
-+	GPIO_REG_HLVL,
-+	GPIO_REG_LLVL,
-+	GPIO_REG_STAT,
-+	GPIO_REG_EDGE,
-+};
-+
-+static void __iomem *mediatek_gpio_membase;
-+static int mediatek_gpio_irq;
-+static struct irq_domain *mediatek_gpio_irq_domain;
-+static atomic_t irq_refcount = ATOMIC_INIT(0);
-+
-+struct mtk_gc {
-+	struct gpio_chip chip;
-+	spinlock_t lock;
-+	int bank;
-+	u32 rising;
-+	u32 falling;
-+} *gc_map[MTK_MAX_BANK];
-+
-+static inline struct mtk_gc
-+*to_mediatek_gpio(struct gpio_chip *chip)
-+{
-+	struct mtk_gc *mgc;
-+
-+	mgc = container_of(chip, struct mtk_gc, chip);
-+
-+	return mgc;
-+}
-+
-+static inline void
-+mtk_gpio_w32(struct mtk_gc *rg, u8 reg, u32 val)
-+{
-+	iowrite32(val, mediatek_gpio_membase + (reg * 0x10) + (rg->bank * 0x4));
-+}
-+
-+static inline u32
-+mtk_gpio_r32(struct mtk_gc *rg, u8 reg)
-+{
-+	return ioread32(mediatek_gpio_membase + (reg * 0x10) + (rg->bank * 0x4));
-+}
-+
-+static void
-+mediatek_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+
-+	mtk_gpio_w32(rg, (value) ? GPIO_REG_DSET : GPIO_REG_DCLR, BIT(offset));
-+}
-+
-+static int
-+mediatek_gpio_get(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+
-+	return !!(mtk_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset));
-+}
-+
-+static int
-+mediatek_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+	unsigned long flags;
-+	u32 t;
-+
-+	spin_lock_irqsave(&rg->lock, flags);
-+	t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
-+	t &= ~BIT(offset);
-+	mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
-+	spin_unlock_irqrestore(&rg->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int
-+mediatek_gpio_direction_output(struct gpio_chip *chip,
-+					unsigned offset, int value)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+	unsigned long flags;
-+	u32 t;
-+
-+	spin_lock_irqsave(&rg->lock, flags);
-+	t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
-+	t |= BIT(offset);
-+	mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
-+	mediatek_gpio_set(chip, offset, value);
-+	spin_unlock_irqrestore(&rg->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int
-+mediatek_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+	unsigned long flags;
-+	u32 t;
-+
-+	spin_lock_irqsave(&rg->lock, flags);
-+	t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
-+	spin_unlock_irqrestore(&rg->lock, flags);
-+
-+	if (t & BIT(offset))
-+		return 0;
-+
-+	return 1;
-+}
-+
-+static int
-+mediatek_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
-+{
-+	struct mtk_gc *rg = to_mediatek_gpio(chip);
-+
-+	return irq_create_mapping(mediatek_gpio_irq_domain, pin + (rg->bank * MTK_BANK_WIDTH));
-+}
-+
-+static int
-+mediatek_gpio_bank_probe(struct platform_device *pdev, struct device_node *bank)
-+{
-+	const __be32 *id = of_get_property(bank, "reg", NULL);
-+	struct mtk_gc *rg = devm_kzalloc(&pdev->dev,
-+				sizeof(struct mtk_gc), GFP_KERNEL);
-+
-+	if (!rg || !id || be32_to_cpu(*id) > MTK_MAX_BANK)
-+		return -ENOMEM;
-+
-+	gc_map[be32_to_cpu(*id)] = rg;
-+
-+	memset(rg, 0, sizeof(struct mtk_gc));
-+
-+	spin_lock_init(&rg->lock);
-+
-+	rg->chip.parent = &pdev->dev;
-+	rg->chip.label = dev_name(&pdev->dev);
-+	rg->chip.of_node = bank;
-+	rg->chip.base = MTK_BANK_WIDTH * be32_to_cpu(*id);
-+	rg->chip.ngpio = MTK_BANK_WIDTH;
-+	rg->chip.direction_input = mediatek_gpio_direction_input;
-+	rg->chip.direction_output = mediatek_gpio_direction_output;
-+	rg->chip.get_direction = mediatek_gpio_get_direction;
-+	rg->chip.get = mediatek_gpio_get;
-+	rg->chip.set = mediatek_gpio_set;
-+	if (mediatek_gpio_irq_domain)
-+		rg->chip.to_irq = mediatek_gpio_to_irq;
-+	rg->bank = be32_to_cpu(*id);
-+
-+	/* set polarity to low for all gpios */
-+	mtk_gpio_w32(rg, GPIO_REG_POL, 0);
-+
-+	dev_info(&pdev->dev, "registering %d gpios\n", rg->chip.ngpio);
-+
-+	return gpiochip_add(&rg->chip);
-+}
-+
-+static void
-+mediatek_gpio_irq_handler(struct irq_desc *desc)
-+{
-+	int i;
-+
-+	for (i = 0; i < MTK_MAX_BANK; i++) {
-+		struct mtk_gc *rg = gc_map[i];
-+		unsigned long pending;
-+		int bit;
-+
-+		if (!rg)
-+			continue;
-+
-+		pending = mtk_gpio_r32(rg, GPIO_REG_STAT);
-+
-+		for_each_set_bit(bit, &pending, MTK_BANK_WIDTH) {
-+			u32 map = irq_find_mapping(mediatek_gpio_irq_domain, (MTK_BANK_WIDTH * i) + bit);
-+
-+			generic_handle_irq(map);
-+			mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit));
-+		}
-+	}
-+}
-+
-+static void
-+mediatek_gpio_irq_unmask(struct irq_data *d)
-+{
-+	int pin = d->hwirq;
-+	int bank = pin / 32;
-+	struct mtk_gc *rg = gc_map[bank];
-+	unsigned long flags;
-+	u32 rise, fall;
-+
-+	if (!rg)
-+		return;
-+
-+	rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
-+	fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
-+
-+	spin_lock_irqsave(&rg->lock, flags);
-+	mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(d->hwirq) & rg->rising));
-+	mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(d->hwirq) & rg->falling));
-+	spin_unlock_irqrestore(&rg->lock, flags);
-+}
-+
-+static void
-+mediatek_gpio_irq_mask(struct irq_data *d)
-+{
-+	int pin = d->hwirq;
-+	int bank = pin / 32;
-+	struct mtk_gc *rg = gc_map[bank];
-+	unsigned long flags;
-+	u32 rise, fall;
-+
-+	if (!rg)
-+		return;
-+
-+	rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
-+	fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
-+
-+	spin_lock_irqsave(&rg->lock, flags);
-+	mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(d->hwirq));
-+	mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(d->hwirq));
-+	spin_unlock_irqrestore(&rg->lock, flags);
-+}
-+
-+static int
-+mediatek_gpio_irq_type(struct irq_data *d, unsigned int type)
-+{
-+	int pin = d->hwirq;
-+	int bank = pin / 32;
-+	struct mtk_gc *rg = gc_map[bank];
-+	u32 mask = BIT(d->hwirq);
-+
-+	if (!rg)
-+		return -1;
-+
-+	if (type == IRQ_TYPE_PROBE) {
-+		if ((rg->rising | rg->falling) & mask)
-+			return 0;
-+
-+		type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-+	}
-+
-+	if (type & IRQ_TYPE_EDGE_RISING)
-+		rg->rising |= mask;
-+	else
-+		rg->rising &= ~mask;
-+
-+	if (type & IRQ_TYPE_EDGE_FALLING)
-+		rg->falling |= mask;
-+	else
-+		rg->falling &= ~mask;
-+
-+	return 0;
-+}
-+
-+static struct irq_chip mediatek_gpio_irq_chip = {
-+	.name		= "GPIO",
-+	.irq_unmask	= mediatek_gpio_irq_unmask,
-+	.irq_mask	= mediatek_gpio_irq_mask,
-+	.irq_mask_ack	= mediatek_gpio_irq_mask,
-+	.irq_set_type	= mediatek_gpio_irq_type,
-+};
-+
-+static int
-+mediatek_gpio_gpio_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
-+{
-+	irq_set_chip_and_handler(irq, &mediatek_gpio_irq_chip, handle_level_irq);
-+	irq_set_handler_data(irq, d);
-+
-+	return 0;
-+}
-+
-+static const struct irq_domain_ops irq_domain_ops = {
-+	.xlate = irq_domain_xlate_onecell,
-+	.map = mediatek_gpio_gpio_map,
-+};
-+
-+static int
-+mediatek_gpio_probe(struct platform_device *pdev)
-+{
-+	struct device_node *bank, *np = pdev->dev.of_node;
-+	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+
-+	mediatek_gpio_membase = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(mediatek_gpio_membase))
-+		return PTR_ERR(mediatek_gpio_membase);
-+
-+	mediatek_gpio_irq = irq_of_parse_and_map(np, 0);
-+	if (mediatek_gpio_irq) {
-+		mediatek_gpio_irq_domain = irq_domain_add_linear(np,
-+			MTK_MAX_BANK * MTK_BANK_WIDTH,
-+			&irq_domain_ops, NULL);
-+		if (!mediatek_gpio_irq_domain)
-+			dev_err(&pdev->dev, "irq_domain_add_linear failed\n");
-+	}
-+
-+	for_each_child_of_node(np, bank)
-+		if (of_device_is_compatible(bank, "mtk,mt7621-gpio-bank"))
-+			mediatek_gpio_bank_probe(pdev, bank);
-+
-+	if (mediatek_gpio_irq_domain)
-+		irq_set_chained_handler(mediatek_gpio_irq, mediatek_gpio_irq_handler);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id mediatek_gpio_match[] = {
-+	{ .compatible = "mtk,mt7621-gpio" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, mediatek_gpio_match);
-+
-+static struct platform_driver mediatek_gpio_driver = {
-+	.probe = mediatek_gpio_probe,
-+	.driver = {
-+		.name = "mt7621_gpio",
-+		.owner = THIS_MODULE,
-+		.of_match_table = mediatek_gpio_match,
-+	},
-+};
-+
-+static int __init
-+mediatek_gpio_init(void)
-+{
-+	return platform_driver_register(&mediatek_gpio_driver);
-+}
-+
-+subsys_initcall(mediatek_gpio_init);
diff --git a/iopsys-ramips/patches-4.14/0034-NET-multi-phy-support.patch b/iopsys-ramips/patches-4.14/0034-NET-multi-phy-support.patch
deleted file mode 100644
index 98ea5f557c3670c1756af6f09082acf32ed8c06a..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0034-NET-multi-phy-support.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 0b6eb1e68290243d439ee330ea8d0b239a5aec69 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 27 Jul 2014 09:38:50 +0100
-Subject: [PATCH 34/53] NET: multi phy support
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/net/phy/phy.c |    9 ++++++---
- include/linux/phy.h   |    1 +
- 2 files changed, 7 insertions(+), 3 deletions(-)
-
---- a/drivers/net/phy/phy.c
-+++ b/drivers/net/phy/phy.c
-@@ -913,7 +913,10 @@ void phy_state_machine(struct work_struc
- 		/* If the link is down, give up on negotiation for now */
- 		if (!phydev->link) {
- 			phydev->state = PHY_NOLINK;
--			phy_link_down(phydev, true);
-+			if (!phydev->no_auto_carrier_off)
-+				phy_link_down(phydev, true);
-+			else
-+				phy_link_down(phydev, false);
- 			break;
- 		}
- 
-@@ -1000,7 +1003,10 @@ void phy_state_machine(struct work_struc
- 			phy_link_up(phydev);
- 		} else {
- 			phydev->state = PHY_NOLINK;
--			phy_link_down(phydev, true);
-+			if (!phydev->no_auto_carrier_off)
-+				phy_link_down(phydev, true);
-+			else
-+				phy_link_down(phydev, false);
- 		}
- 
- 		if (phy_interrupt_is_valid(phydev))
-@@ -1010,7 +1016,10 @@ void phy_state_machine(struct work_struc
- 	case PHY_HALTED:
- 		if (phydev->link) {
- 			phydev->link = 0;
--			phy_link_down(phydev, true);
-+			if (!phydev->no_auto_carrier_off)
-+				phy_link_down(phydev, true);
-+			else
-+				phy_link_down(phydev, false);
- 			do_suspend = true;
- 		}
- 		break;
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -414,6 +414,7 @@ struct phy_device {
- 	bool suspended_by_mdio_bus;
- 	bool sysfs_links;
- 	bool loopback_enabled;
-+	bool no_auto_carrier_off;
- 
- 	enum phy_state state;
- 
diff --git a/iopsys-ramips/patches-4.14/0037-mtd-cfi-cmdset-0002-force-word-write.patch b/iopsys-ramips/patches-4.14/0037-mtd-cfi-cmdset-0002-force-word-write.patch
deleted file mode 100644
index 4f44aed3abc24ba6afada858831bd6e751ef7ee6..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0037-mtd-cfi-cmdset-0002-force-word-write.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From ee9081b2726a5ca8cde5497afdc5425e21ff8f8b Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Mon, 15 Jul 2013 00:39:21 +0200
-Subject: [PATCH 37/53] mtd: cfi cmdset 0002 force word write
-
----
- drivers/mtd/chips/cfi_cmdset_0002.c |    9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/chips/cfi_cmdset_0002.c
-+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -40,7 +40,7 @@
- #include <linux/mtd/xip.h>
- 
- #define AMD_BOOTLOC_BUG
--#define FORCE_WORD_WRITE 0
-+#define FORCE_WORD_WRITE 1
- 
- #define MAX_RETRIES 3
- 
-@@ -51,7 +51,9 @@
- 
- static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-+#if !FORCE_WORD_WRITE
- static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-+#endif
- static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
- static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
- static void cfi_amdstd_sync (struct mtd_info *);
-@@ -202,6 +204,7 @@ static void fixup_amd_bootblock(struct m
- }
- #endif
- 
-+#if !FORCE_WORD_WRITE
- static void fixup_use_write_buffers(struct mtd_info *mtd)
- {
- 	struct map_info *map = mtd->priv;
-@@ -211,6 +214,7 @@ static void fixup_use_write_buffers(stru
- 		mtd->_write = cfi_amdstd_write_buffers;
- 	}
- }
-+#endif /* !FORCE_WORD_WRITE */
- 
- /* Atmel chips don't use the same PRI format as AMD chips */
- static void fixup_convert_atmel_pri(struct mtd_info *mtd)
-@@ -1797,6 +1801,7 @@ static int cfi_amdstd_write_words(struct
- /*
-  * FIXME: interleaved mode not tested, and probably not supported!
-  */
-+#if !FORCE_WORD_WRITE
- static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
- 				    unsigned long adr, const u_char *buf,
- 				    int len)
-@@ -1929,7 +1934,6 @@ static int __xipram do_write_buffer(stru
- 	return ret;
- }
- 
--
- static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
- 				    size_t *retlen, const u_char *buf)
- {
-@@ -2004,6 +2008,7 @@ static int cfi_amdstd_write_buffers(stru
- 
- 	return 0;
- }
-+#endif /* !FORCE_WORD_WRITE */
- 
- /*
-  * Wait for the flash chip to become ready to write data
diff --git a/iopsys-ramips/patches-4.14/0038-Revert-mtd-nand-Remove-unused-chip-write_page-hook.patch b/iopsys-ramips/patches-4.14/0038-Revert-mtd-nand-Remove-unused-chip-write_page-hook.patch
deleted file mode 100644
index 8d20c45c7c159ae102b7827afb7619600f13bab5..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0038-Revert-mtd-nand-Remove-unused-chip-write_page-hook.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Subject: [PATCH] Revert "mtd: nand: Remove unused chip->write_page() hook"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This reverts commit f107d7a43923a83d837b3ea3c7b7de58cd014bbd.
-
-OpenWrt's downstream driver mtk_nand2 still uses that callback.
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
----
-
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -2577,7 +2577,7 @@ static int nand_write_page_syndrome(stru
- }
- 
- /**
-- * nand_write_page - write one page
-+ * nand_write_page - [REPLACEABLE] write one page
-  * @mtd: MTD device structure
-  * @chip: NAND chip descriptor
-  * @offset: address offset within the page
-@@ -2761,9 +2761,9 @@ static int nand_do_write_ops(struct mtd_
- 			memset(chip->oob_poi, 0xff, mtd->oobsize);
- 		}
- 
--		ret = nand_write_page(mtd, chip, column, bytes, wbuf,
--				      oob_required, page,
--				      (ops->mode == MTD_OPS_RAW));
-+		ret = chip->write_page(mtd, chip, column, bytes, wbuf,
-+					oob_required, page,
-+					(ops->mode == MTD_OPS_RAW));
- 		if (ret)
- 			break;
- 
-@@ -4719,6 +4719,9 @@ int nand_scan_tail(struct mtd_info *mtd)
- 		}
- 	}
- 
-+	if (!chip->write_page)
-+		chip->write_page = nand_write_page;
-+
- 	/*
- 	 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
- 	 * selected and we have 256 byte pagesize fallback to software ECC
---- a/include/linux/mtd/rawnand.h
-+++ b/include/linux/mtd/rawnand.h
-@@ -860,6 +860,7 @@ struct nand_manufacturer_ops {
-  *			structure which is shared among multiple independent
-  *			devices.
-  * @priv:		[OPTIONAL] pointer to private chip data
-+ * @write_page:		[REPLACEABLE] High-level page write function
-  * @manufacturer:	[INTERN] Contains manufacturer information
-  */
- 
-@@ -883,6 +884,9 @@ struct nand_chip {
- 	int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
- 	int (*erase)(struct mtd_info *mtd, int page);
- 	int (*scan_bbt)(struct mtd_info *mtd);
-+	int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
-+			uint32_t offset, int data_len, const uint8_t *buf,
-+			int oob_required, int page, int raw);
- 	int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
- 			int feature_addr, uint8_t *subfeature_para);
- 	int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
diff --git a/iopsys-ramips/patches-4.14/0039-mtd-add-mt7621-nand-support.patch b/iopsys-ramips/patches-4.14/0039-mtd-add-mt7621-nand-support.patch
deleted file mode 100644
index 66980a8472129301759511a7cb4501a6b50d0771..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0039-mtd-add-mt7621-nand-support.patch
+++ /dev/null
@@ -1,4436 +0,0 @@
-From 0e1c4e3c97b83b4e7da65b1c56f0a7d40736ac53 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 27 Jul 2014 11:05:17 +0100
-Subject: [PATCH 39/53] mtd: add mt7621 nand support
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/mtd/nand/Kconfig            |    6 +
- drivers/mtd/nand/Makefile           |    1 +
- drivers/mtd/nand/bmt.c              |  750 ++++++++++++
- drivers/mtd/nand/bmt.h              |   80 ++
- drivers/mtd/nand/dev-nand.c         |   63 +
- drivers/mtd/nand/mt6575_typedefs.h  |  340 ++++++
- drivers/mtd/nand/mtk_nand2.c         | 2304 +++++++++++++++++++++++++++++++++++
- drivers/mtd/nand/mtk_nand2.h         |  452 +++++++
- drivers/mtd/nand/nand_base.c        |    6 +-
- drivers/mtd/nand/nand_def.h         |  123 ++
- drivers/mtd/nand/nand_device_list.h |   55 +
- drivers/mtd/nand/partition.h        |  115 ++
- 13 files changed, 4311 insertions(+), 3 deletions(-)
- create mode 100644 drivers/mtd/nand/bmt.c
- create mode 100644 drivers/mtd/nand/bmt.h
- create mode 100644 drivers/mtd/nand/dev-nand.c
- create mode 100644 drivers/mtd/nand/mt6575_typedefs.h
- create mode 100644 drivers/mtd/nand/mtk_nand2.c
- create mode 100644 drivers/mtd/nand/mtk_nand2.h
- create mode 100644 drivers/mtd/nand/nand_def.h
- create mode 100644 drivers/mtd/nand/nand_device_list.h
- create mode 100644 drivers/mtd/nand/partition.h
-
---- a/drivers/mtd/nand/Kconfig
-+++ b/drivers/mtd/nand/Kconfig
-@@ -563,4 +563,10 @@ config MTD_NAND_MTK
- 	  Enables support for NAND controller on MTK SoCs.
- 	  This controller is found on mt27xx, mt81xx, mt65xx SoCs.
- 
-+config MTK_MTD_NAND
-+	tristate "Support for MTK SoC NAND controller"
-+	depends on SOC_MT7621
-+	select MTD_NAND_IDS
-+	select MTD_NAND_ECC
-+
- endif # MTD_NAND
---- a/drivers/mtd/nand/Makefile
-+++ b/drivers/mtd/nand/Makefile
-@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_HISI504)	        +
- obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand/
- obj-$(CONFIG_MTD_NAND_QCOM)		+= qcom_nandc.o
- obj-$(CONFIG_MTD_NAND_MTK)		+= mtk_nand.o mtk_ecc.o
-+obj-$(CONFIG_MTK_MTD_NAND)		+= mtk_nand2.o bmt.o
- 
- nand-objs := nand_base.o nand_bbt.o nand_timings.o nand_ids.o
- nand-objs += nand_amd.o
---- /dev/null
-+++ b/drivers/mtd/nand/bmt.c
-@@ -0,0 +1,750 @@
-+#include "bmt.h"
-+
-+typedef struct
-+{
-+    char signature[3];
-+    u8 version;
-+    u8 bad_count;               // bad block count in pool
-+    u8 mapped_count;            // mapped block count in pool
-+    u8 checksum;
-+    u8 reseverd[13];
-+} phys_bmt_header;
-+
-+typedef struct
-+{
-+    phys_bmt_header header;
-+    bmt_entry table[MAX_BMT_SIZE];
-+} phys_bmt_struct;
-+
-+typedef struct
-+{
-+    char signature[3];
-+} bmt_oob_data;
-+
-+static char MAIN_SIGNATURE[] = "BMT";
-+static char OOB_SIGNATURE[] = "bmt";
-+#define SIGNATURE_SIZE      (3)
-+
-+#define MAX_DAT_SIZE        0x1000
-+#define MAX_OOB_SIZE        0x80
-+
-+static struct mtd_info *mtd_bmt;
-+static struct nand_chip *nand_chip_bmt;
-+#define BLOCK_SIZE_BMT          (1 << nand_chip_bmt->phys_erase_shift)
-+#define PAGE_SIZE_BMT           (1 << nand_chip_bmt->page_shift)
-+
-+#define OFFSET(block)       ((block) * BLOCK_SIZE_BMT)  
-+#define PAGE_ADDR(block)    ((block) * BLOCK_SIZE_BMT / PAGE_SIZE_BMT)
-+
-+/*********************************************************************
-+* Flash is splited into 2 parts, system part is for normal system    *
-+* system usage, size is system_block_count, another is replace pool  *
-+*    +-------------------------------------------------+             *
-+*    |     system_block_count     |   bmt_block_count  |             *
-+*    +-------------------------------------------------+             *
-+*********************************************************************/
-+static u32 total_block_count;   // block number in flash
-+static u32 system_block_count;
-+static int bmt_block_count;     // bmt table size
-+// static int bmt_count;               // block used in bmt
-+static int page_per_block;      // page per count
-+
-+static u32 bmt_block_index;     // bmt block index
-+static bmt_struct bmt;          // dynamic created global bmt table
-+
-+static u8 dat_buf[MAX_DAT_SIZE];
-+static u8 oob_buf[MAX_OOB_SIZE];
-+static bool pool_erased;
-+
-+/***************************************************************
-+*                                                              
-+* Interface adaptor for preloader/uboot/kernel                 
-+*    These interfaces operate on physical address, read/write
-+*       physical data.
-+*                                                              
-+***************************************************************/
-+int nand_read_page_bmt(u32 page, u8 * dat, u8 * oob)
-+{
-+    return mtk_nand_exec_read_page(mtd_bmt, page, PAGE_SIZE_BMT, dat, oob);
-+}
-+
-+bool nand_block_bad_bmt(u32 offset)
-+{
-+    return mtk_nand_block_bad_hw(mtd_bmt, offset);
-+}
-+
-+bool nand_erase_bmt(u32 offset)
-+{
-+    int status;
-+    if (offset < 0x20000)
-+    {
-+        MSG(INIT, "erase offset: 0x%x\n", offset);
-+    }
-+
-+    status = mtk_nand_erase_hw(mtd_bmt, offset / PAGE_SIZE_BMT); // as nand_chip structure doesn't have a erase function defined
-+    if (status & NAND_STATUS_FAIL)
-+        return false;
-+    else
-+        return true;
-+}
-+
-+int mark_block_bad_bmt(u32 offset)
-+{
-+    return mtk_nand_block_markbad_hw(mtd_bmt, offset);   //mark_block_bad_hw(offset);
-+}
-+
-+bool nand_write_page_bmt(u32 page, u8 * dat, u8 * oob)
-+{
-+    if (mtk_nand_exec_write_page(mtd_bmt, page, PAGE_SIZE_BMT, dat, oob))
-+        return false;
-+    else
-+        return true;
-+}
-+
-+/***************************************************************
-+*                                                              *
-+* static internal function                                     *
-+*                                                              *
-+***************************************************************/
-+static void dump_bmt_info(bmt_struct * bmt)
-+{
-+    int i;
-+
-+    MSG(INIT, "BMT v%d. total %d mapping:\n", bmt->version, bmt->mapped_count);
-+    for (i = 0; i < bmt->mapped_count; i++)
-+    {
-+        MSG(INIT, "\t0x%x -> 0x%x\n", bmt->table[i].bad_index, bmt->table[i].mapped_index);
-+    }
-+}
-+
-+static bool match_bmt_signature(u8 * dat, u8 * oob)
-+{
-+
-+    if (memcmp(dat + MAIN_SIGNATURE_OFFSET, MAIN_SIGNATURE, SIGNATURE_SIZE))
-+    {
-+        return false;
-+    }
-+
-+    if (memcmp(oob + OOB_SIGNATURE_OFFSET, OOB_SIGNATURE, SIGNATURE_SIZE))
-+    {
-+        MSG(INIT, "main signature match, oob signature doesn't match, but ignore\n");
-+    }
-+    return true;
-+}
-+
-+static u8 cal_bmt_checksum(phys_bmt_struct * phys_table, int bmt_size)
-+{
-+    int i;
-+    u8 checksum = 0;
-+    u8 *dat = (u8 *) phys_table;
-+
-+    checksum += phys_table->header.version;
-+    checksum += phys_table->header.mapped_count;
-+
-+    dat += sizeof(phys_bmt_header);
-+    for (i = 0; i < bmt_size * sizeof(bmt_entry); i++)
-+    {
-+        checksum += dat[i];
-+    }
-+
-+    return checksum;
-+}
-+
-+
-+static int is_block_mapped(int index)
-+{
-+    int i;
-+    for (i = 0; i < bmt.mapped_count; i++)
-+    {
-+        if (index == bmt.table[i].mapped_index)
-+            return i;
-+    }
-+    return -1;
-+}
-+
-+static bool is_page_used(u8 * dat, u8 * oob)
-+{
-+    return ((oob[OOB_INDEX_OFFSET] != 0xFF) || (oob[OOB_INDEX_OFFSET + 1] != 0xFF));
-+}
-+
-+static bool valid_bmt_data(phys_bmt_struct * phys_table)
-+{
-+    int i;
-+    u8 checksum = cal_bmt_checksum(phys_table, bmt_block_count);
-+
-+    // checksum correct?
-+    if (phys_table->header.checksum != checksum)
-+    {
-+        MSG(INIT, "BMT Data checksum error: %x %x\n", phys_table->header.checksum, checksum);
-+        return false;
-+    }
-+
-+    MSG(INIT, "BMT Checksum is: 0x%x\n", phys_table->header.checksum);
-+
-+    // block index correct?
-+    for (i = 0; i < phys_table->header.mapped_count; i++)
-+    {
-+        if (phys_table->table[i].bad_index >= total_block_count || phys_table->table[i].mapped_index >= total_block_count || phys_table->table[i].mapped_index < system_block_count)
-+        {
-+            MSG(INIT, "index error: bad_index: %d, mapped_index: %d\n", phys_table->table[i].bad_index, phys_table->table[i].mapped_index);
-+            return false;
-+        }
-+    }
-+
-+    // pass check, valid bmt.
-+    MSG(INIT, "Valid BMT, version v%d\n", phys_table->header.version);
-+    return true;
-+}
-+
-+static void fill_nand_bmt_buffer(bmt_struct * bmt, u8 * dat, u8 * oob)
-+{
-+    phys_bmt_struct phys_bmt;
-+
-+    dump_bmt_info(bmt);
-+
-+    // fill phys_bmt_struct structure with bmt_struct
-+    memset(&phys_bmt, 0xFF, sizeof(phys_bmt));
-+
-+    memcpy(phys_bmt.header.signature, MAIN_SIGNATURE, SIGNATURE_SIZE);
-+    phys_bmt.header.version = BMT_VERSION;
-+    // phys_bmt.header.bad_count = bmt->bad_count;
-+    phys_bmt.header.mapped_count = bmt->mapped_count;
-+    memcpy(phys_bmt.table, bmt->table, sizeof(bmt_entry) * bmt_block_count);
-+
-+    phys_bmt.header.checksum = cal_bmt_checksum(&phys_bmt, bmt_block_count);
-+
-+    memcpy(dat + MAIN_SIGNATURE_OFFSET, &phys_bmt, sizeof(phys_bmt));
-+    memcpy(oob + OOB_SIGNATURE_OFFSET, OOB_SIGNATURE, SIGNATURE_SIZE);
-+}
-+
-+// return valid index if found BMT, else return 0
-+static int load_bmt_data(int start, int pool_size)
-+{
-+    int bmt_index = start + pool_size - 1;  // find from the end
-+    phys_bmt_struct phys_table;
-+    int i;
-+
-+    MSG(INIT, "[%s]: begin to search BMT from block 0x%x\n", __FUNCTION__, bmt_index);
-+
-+    for (bmt_index = start + pool_size - 1; bmt_index >= start; bmt_index--)
-+    {
-+        if (nand_block_bad_bmt(OFFSET(bmt_index)))
-+        {
-+            MSG(INIT, "Skip bad block: %d\n", bmt_index);
-+            continue;
-+        }
-+
-+        if (!nand_read_page_bmt(PAGE_ADDR(bmt_index), dat_buf, oob_buf))
-+        {
-+            MSG(INIT, "Error found when read block %d\n", bmt_index);
-+            continue;
-+        }
-+
-+        if (!match_bmt_signature(dat_buf, oob_buf))
-+        {
-+            continue;
-+        }
-+
-+        MSG(INIT, "Match bmt signature @ block: 0x%x\n", bmt_index);
-+
-+        memcpy(&phys_table, dat_buf + MAIN_SIGNATURE_OFFSET, sizeof(phys_table));
-+
-+        if (!valid_bmt_data(&phys_table))
-+        {
-+            MSG(INIT, "BMT data is not correct %d\n", bmt_index);
-+            continue;
-+        } else
-+        {
-+            bmt.mapped_count = phys_table.header.mapped_count;
-+            bmt.version = phys_table.header.version;
-+            // bmt.bad_count = phys_table.header.bad_count;
-+            memcpy(bmt.table, phys_table.table, bmt.mapped_count * sizeof(bmt_entry));
-+
-+            MSG(INIT, "bmt found at block: %d, mapped block: %d\n", bmt_index, bmt.mapped_count);
-+
-+            for (i = 0; i < bmt.mapped_count; i++)
-+            {
-+                if (!nand_block_bad_bmt(OFFSET(bmt.table[i].bad_index)))
-+                {
-+                    MSG(INIT, "block 0x%x is not mark bad, should be power lost last time\n", bmt.table[i].bad_index);
-+                    mark_block_bad_bmt(OFFSET(bmt.table[i].bad_index));
-+                }
-+            }
-+
-+            return bmt_index;
-+        }
-+    }
-+
-+    MSG(INIT, "bmt block not found!\n");
-+    return 0;
-+}
-+
-+/*************************************************************************
-+* Find an available block and erase.                                     *
-+* start_from_end: if true, find available block from end of flash.       *
-+*                 else, find from the beginning of the pool              *
-+* need_erase: if true, all unmapped blocks in the pool will be erased    *
-+*************************************************************************/
-+static int find_available_block(bool start_from_end)
-+{
-+    int i;                      // , j;
-+    int block = system_block_count;
-+    int direction;
-+    // int avail_index = 0;
-+    MSG(INIT, "Try to find_available_block, pool_erase: %d\n", pool_erased);
-+
-+    // erase all un-mapped blocks in pool when finding avaliable block
-+    if (!pool_erased)
-+    {
-+        MSG(INIT, "Erase all un-mapped blocks in pool\n");
-+        for (i = 0; i < bmt_block_count; i++)
-+        {
-+            if (block == bmt_block_index)
-+            {
-+                MSG(INIT, "Skip bmt block 0x%x\n", block);
-+                continue;
-+            }
-+
-+            if (nand_block_bad_bmt(OFFSET(block + i)))
-+            {
-+                MSG(INIT, "Skip bad block 0x%x\n", block + i);
-+                continue;
-+            }
-+//if(block==4095)
-+//{
-+//  continue;
-+//}
-+
-+            if (is_block_mapped(block + i) >= 0)
-+            {
-+                MSG(INIT, "Skip mapped block 0x%x\n", block + i);
-+                continue;
-+            }
-+
-+            if (!nand_erase_bmt(OFFSET(block + i)))
-+            {
-+                MSG(INIT, "Erase block 0x%x failed\n", block + i);
-+                mark_block_bad_bmt(OFFSET(block + i));
-+            }
-+        }
-+
-+        pool_erased = 1;
-+    }
-+
-+    if (start_from_end)
-+    {
-+        block = total_block_count - 1;
-+        direction = -1;
-+    } else
-+    {
-+        block = system_block_count;
-+        direction = 1;
-+    }
-+
-+    for (i = 0; i < bmt_block_count; i++, block += direction)
-+    {
-+        if (block == bmt_block_index)
-+        {
-+            MSG(INIT, "Skip bmt block 0x%x\n", block);
-+            continue;
-+        }
-+
-+        if (nand_block_bad_bmt(OFFSET(block)))
-+        {
-+            MSG(INIT, "Skip bad block 0x%x\n", block);
-+            continue;
-+        }
-+
-+        if (is_block_mapped(block) >= 0)
-+        {
-+            MSG(INIT, "Skip mapped block 0x%x\n", block);
-+            continue;
-+        }
-+
-+        MSG(INIT, "Find block 0x%x available\n", block);
-+        return block;
-+    }
-+
-+    return 0;
-+}
-+
-+static unsigned short get_bad_index_from_oob(u8 * oob_buf)
-+{
-+    unsigned short index;
-+    memcpy(&index, oob_buf + OOB_INDEX_OFFSET, OOB_INDEX_SIZE);
-+
-+    return index;
-+}
-+
-+void set_bad_index_to_oob(u8 * oob, u16 index)
-+{
-+    memcpy(oob + OOB_INDEX_OFFSET, &index, sizeof(index));
-+}
-+
-+static int migrate_from_bad(int offset, u8 * write_dat, u8 * write_oob)
-+{
-+    int page;
-+    int error_block = offset / BLOCK_SIZE_BMT;
-+    int error_page = (offset / PAGE_SIZE_BMT) % page_per_block;
-+    int to_index;
-+
-+    memcpy(oob_buf, write_oob, MAX_OOB_SIZE);
-+
-+    to_index = find_available_block(false);
-+
-+    if (!to_index)
-+    {
-+        MSG(INIT, "Cannot find an available block for BMT\n");
-+        return 0;
-+    }
-+
-+    {                           // migrate error page first
-+        MSG(INIT, "Write error page: 0x%x\n", error_page);
-+        if (!write_dat)
-+        {
-+            nand_read_page_bmt(PAGE_ADDR(error_block) + error_page, dat_buf, NULL);
-+            write_dat = dat_buf;
-+        }
-+        // memcpy(oob_buf, write_oob, MAX_OOB_SIZE);
-+
-+        if (error_block < system_block_count)
-+            set_bad_index_to_oob(oob_buf, error_block); // if error_block is already a mapped block, original mapping index is in OOB.
-+
-+        if (!nand_write_page_bmt(PAGE_ADDR(to_index) + error_page, write_dat, oob_buf))
-+        {
-+            MSG(INIT, "Write to page 0x%x fail\n", PAGE_ADDR(to_index) + error_page);
-+            mark_block_bad_bmt(to_index);
-+            return migrate_from_bad(offset, write_dat, write_oob);
-+        }
-+    }
-+
-+    for (page = 0; page < page_per_block; page++)
-+    {
-+        if (page != error_page)
-+        {
-+            nand_read_page_bmt(PAGE_ADDR(error_block) + page, dat_buf, oob_buf);
-+            if (is_page_used(dat_buf, oob_buf))
-+            {
-+                if (error_block < system_block_count)
-+                {
-+                    set_bad_index_to_oob(oob_buf, error_block);
-+                }
-+                MSG(INIT, "\tmigrate page 0x%x to page 0x%x\n", PAGE_ADDR(error_block) + page, PAGE_ADDR(to_index) + page);
-+                if (!nand_write_page_bmt(PAGE_ADDR(to_index) + page, dat_buf, oob_buf))
-+                {
-+                    MSG(INIT, "Write to page 0x%x fail\n", PAGE_ADDR(to_index) + page);
-+                    mark_block_bad_bmt(to_index);
-+                    return migrate_from_bad(offset, write_dat, write_oob);
-+                }
-+            }
-+        }
-+    }
-+
-+    MSG(INIT, "Migrate from 0x%x to 0x%x done!\n", error_block, to_index);
-+
-+    return to_index;
-+}
-+
-+static bool write_bmt_to_flash(u8 * dat, u8 * oob)
-+{
-+    bool need_erase = true;
-+    MSG(INIT, "Try to write BMT\n");
-+
-+    if (bmt_block_index == 0)
-+    {
-+        // if we don't have index, we don't need to erase found block as it has been erased in find_available_block()
-+        need_erase = false;
-+        if (!(bmt_block_index = find_available_block(true)))
-+        {
-+            MSG(INIT, "Cannot find an available block for BMT\n");
-+            return false;
-+        }
-+    }
-+
-+    MSG(INIT, "Find BMT block: 0x%x\n", bmt_block_index);
-+
-+    // write bmt to flash
-+    if (need_erase)
-+    {
-+        if (!nand_erase_bmt(OFFSET(bmt_block_index)))
-+        {
-+            MSG(INIT, "BMT block erase fail, mark bad: 0x%x\n", bmt_block_index);
-+            mark_block_bad_bmt(OFFSET(bmt_block_index));
-+            // bmt.bad_count++;
-+
-+            bmt_block_index = 0;
-+            return write_bmt_to_flash(dat, oob);    // recursive call 
-+        }
-+    }
-+
-+    if (!nand_write_page_bmt(PAGE_ADDR(bmt_block_index), dat, oob))
-+    {
-+        MSG(INIT, "Write BMT data fail, need to write again\n");
-+        mark_block_bad_bmt(OFFSET(bmt_block_index));
-+        // bmt.bad_count++;
-+
-+        bmt_block_index = 0;
-+        return write_bmt_to_flash(dat, oob);    // recursive call 
-+    }
-+
-+    MSG(INIT, "Write BMT data to block 0x%x success\n", bmt_block_index);
-+    return true;
-+}
-+
-+/*******************************************************************
-+* Reconstruct bmt, called when found bmt info doesn't match bad 
-+* block info in flash.
-+* 
-+* Return NULL for failure
-+*******************************************************************/
-+bmt_struct *reconstruct_bmt(bmt_struct * bmt)
-+{
-+    int i;
-+    int index = system_block_count;
-+    unsigned short bad_index;
-+    int mapped;
-+
-+    // init everything in BMT struct 
-+    bmt->version = BMT_VERSION;
-+    bmt->bad_count = 0;
-+    bmt->mapped_count = 0;
-+
-+    memset(bmt->table, 0, bmt_block_count * sizeof(bmt_entry));
-+
-+    for (i = 0; i < bmt_block_count; i++, index++)
-+    {
-+        if (nand_block_bad_bmt(OFFSET(index)))
-+        {
-+            MSG(INIT, "Skip bad block: 0x%x\n", index);
-+            // bmt->bad_count++;
-+            continue;
-+        }
-+
-+        MSG(INIT, "read page: 0x%x\n", PAGE_ADDR(index));
-+        nand_read_page_bmt(PAGE_ADDR(index), dat_buf, oob_buf);
-+        /* if (mtk_nand_read_page_hw(PAGE_ADDR(index), dat_buf))
-+           {
-+           MSG(INIT,  "Error when read block %d\n", bmt_block_index);
-+           continue;
-+           } */
-+
-+        if ((bad_index = get_bad_index_from_oob(oob_buf)) >= system_block_count)
-+        {
-+            MSG(INIT, "get bad index: 0x%x\n", bad_index);
-+            if (bad_index != 0xFFFF)
-+                MSG(INIT, "Invalid bad index found in block 0x%x, bad index 0x%x\n", index, bad_index);
-+            continue;
-+        }
-+
-+        MSG(INIT, "Block 0x%x is mapped to bad block: 0x%x\n", index, bad_index);
-+
-+        if (!nand_block_bad_bmt(OFFSET(bad_index)))
-+        {
-+            MSG(INIT, "\tbut block 0x%x is not marked as bad, invalid mapping\n", bad_index);
-+            continue;           // no need to erase here, it will be erased later when trying to write BMT
-+        }
-+
-+        if ((mapped = is_block_mapped(bad_index)) >= 0)
-+        {
-+            MSG(INIT, "bad block 0x%x is mapped to 0x%x, should be caused by power lost, replace with one\n", bmt->table[mapped].bad_index, bmt->table[mapped].mapped_index);
-+            bmt->table[mapped].mapped_index = index;    // use new one instead.
-+        } else
-+        {
-+            // add mapping to BMT
-+            bmt->table[bmt->mapped_count].bad_index = bad_index;
-+            bmt->table[bmt->mapped_count].mapped_index = index;
-+            bmt->mapped_count++;
-+        }
-+
-+        MSG(INIT, "Add mapping: 0x%x -> 0x%x to BMT\n", bad_index, index);
-+
-+    }
-+
-+    MSG(INIT, "Scan replace pool done, mapped block: %d\n", bmt->mapped_count);
-+    // dump_bmt_info(bmt);
-+
-+    // fill NAND BMT buffer
-+    memset(oob_buf, 0xFF, sizeof(oob_buf));
-+    fill_nand_bmt_buffer(bmt, dat_buf, oob_buf);
-+
-+    // write BMT back
-+    if (!write_bmt_to_flash(dat_buf, oob_buf))
-+    {
-+        MSG(INIT, "TRAGEDY: cannot find a place to write BMT!!!!\n");
-+    }
-+
-+    return bmt;
-+}
-+
-+/*******************************************************************
-+* [BMT Interface]
-+*
-+* Description:
-+*   Init bmt from nand. Reconstruct if not found or data error
-+*
-+* Parameter:
-+*   size: size of bmt and replace pool
-+* 
-+* Return: 
-+*   NULL for failure, and a bmt struct for success
-+*******************************************************************/
-+bmt_struct *init_bmt(struct nand_chip * chip, int size)
-+{
-+    struct mtk_nand_host *host;
-+
-+    if (size > 0 && size < MAX_BMT_SIZE)
-+    {
-+        MSG(INIT, "Init bmt table, size: %d\n", size);
-+        bmt_block_count = size;
-+    } else
-+    {
-+        MSG(INIT, "Invalid bmt table size: %d\n", size);
-+        return NULL;
-+    }
-+    nand_chip_bmt = chip;
-+    system_block_count = chip->chipsize >> chip->phys_erase_shift;
-+    total_block_count = bmt_block_count + system_block_count;
-+    page_per_block = BLOCK_SIZE_BMT / PAGE_SIZE_BMT;
-+    host = (struct mtk_nand_host *)chip->priv;
-+    mtd_bmt = host->mtd;
-+
-+    MSG(INIT, "mtd_bmt: %p, nand_chip_bmt: %p\n", mtd_bmt, nand_chip_bmt);
-+    MSG(INIT, "bmt count: %d, system count: %d\n", bmt_block_count, system_block_count);
-+
-+    // set this flag, and unmapped block in pool will be erased.
-+    pool_erased = 0;
-+    memset(bmt.table, 0, size * sizeof(bmt_entry));
-+    if ((bmt_block_index = load_bmt_data(system_block_count, size)))
-+    {
-+        MSG(INIT, "Load bmt data success @ block 0x%x\n", bmt_block_index);
-+        dump_bmt_info(&bmt);
-+        return &bmt;
-+    } else
-+    {
-+        MSG(INIT, "Load bmt data fail, need re-construct!\n");
-+#ifndef __UBOOT_NAND__            // BMT is not re-constructed in UBOOT.
-+        if (reconstruct_bmt(&bmt))
-+            return &bmt;
-+        else
-+#endif
-+            return NULL;
-+    }
-+}
-+
-+/*******************************************************************
-+* [BMT Interface]
-+*
-+* Description:
-+*   Update BMT.
-+*
-+* Parameter:
-+*   offset: update block/page offset.
-+*   reason: update reason, see update_reason_t for reason.
-+*   dat/oob: data and oob buffer for write fail.
-+* 
-+* Return: 
-+*   Return true for success, and false for failure.
-+*******************************************************************/
-+bool update_bmt(u32 offset, update_reason_t reason, u8 * dat, u8 * oob)
-+{
-+    int map_index;
-+    int orig_bad_block = -1;
-+    // int bmt_update_index;
-+    int i;
-+    int bad_index = offset / BLOCK_SIZE_BMT;
-+
-+#ifndef MTK_NAND_BMT
-+	return false;
-+#endif
-+    if (reason == UPDATE_WRITE_FAIL)
-+    {
-+        MSG(INIT, "Write fail, need to migrate\n");
-+        if (!(map_index = migrate_from_bad(offset, dat, oob)))
-+        {
-+            MSG(INIT, "migrate fail\n");
-+            return false;
-+        }
-+    } else
-+    {
-+        if (!(map_index = find_available_block(false)))
-+        {
-+            MSG(INIT, "Cannot find block in pool\n");
-+            return false;
-+        }
-+    }
-+
-+    // now let's update BMT
-+    if (bad_index >= system_block_count)    // mapped block become bad, find original bad block
-+    {
-+        for (i = 0; i < bmt_block_count; i++)
-+        {
-+            if (bmt.table[i].mapped_index == bad_index)
-+            {
-+                orig_bad_block = bmt.table[i].bad_index;
-+                break;
-+            }
-+        }
-+        // bmt.bad_count++;
-+        MSG(INIT, "Mapped block becomes bad, orig bad block is 0x%x\n", orig_bad_block);
-+
-+        bmt.table[i].mapped_index = map_index;
-+    } else
-+    {
-+        bmt.table[bmt.mapped_count].mapped_index = map_index;
-+        bmt.table[bmt.mapped_count].bad_index = bad_index;
-+        bmt.mapped_count++;
-+    }
-+
-+    memset(oob_buf, 0xFF, sizeof(oob_buf));
-+    fill_nand_bmt_buffer(&bmt, dat_buf, oob_buf);
-+    if (!write_bmt_to_flash(dat_buf, oob_buf))
-+        return false;
-+
-+    mark_block_bad_bmt(offset);
-+
-+    return true;
-+}
-+
-+/*******************************************************************
-+* [BMT Interface]
-+*
-+* Description:
-+*   Given an block index, return mapped index if it's mapped, else 
-+*   return given index.
-+*
-+* Parameter:
-+*   index: given an block index. This value cannot exceed 
-+*   system_block_count.
-+*
-+* Return NULL for failure
-+*******************************************************************/
-+u16 get_mapping_block_index(int index)
-+{
-+    int i;
-+#ifndef MTK_NAND_BMT
-+	return index;
-+#endif
-+    if (index > system_block_count)
-+    {
-+        return index;
-+    }
-+
-+    for (i = 0; i < bmt.mapped_count; i++)
-+    {
-+        if (bmt.table[i].bad_index == index)
-+        {
-+            return bmt.table[i].mapped_index;
-+        }
-+    }
-+
-+    return index;
-+}
-+#ifdef __KERNEL_NAND__
-+EXPORT_SYMBOL_GPL(init_bmt);
-+EXPORT_SYMBOL_GPL(update_bmt);
-+EXPORT_SYMBOL_GPL(get_mapping_block_index);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("MediaTek");
-+MODULE_DESCRIPTION("Bad Block mapping management for MediaTek NAND Flash Driver");
-+#endif
---- /dev/null
-+++ b/drivers/mtd/nand/bmt.h
-@@ -0,0 +1,80 @@
-+#ifndef __BMT_H__
-+#define __BMT_H__
-+
-+#include "nand_def.h"
-+
-+#if defined(__PRELOADER_NAND__)
-+
-+#include "nand.h"
-+
-+#elif defined(__UBOOT_NAND__)
-+
-+#include <linux/mtd/nand.h>
-+#include "mtk_nand2.h"
-+
-+#elif defined(__KERNEL_NAND__)
-+
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/rawnand.h>
-+#include <linux/module.h>
-+#include "mtk_nand2.h"
-+
-+#endif
-+
-+
-+#define MAX_BMT_SIZE        (0x80)
-+#define BMT_VERSION         (1) // initial version
-+
-+#define MAIN_SIGNATURE_OFFSET   (0)
-+#define OOB_SIGNATURE_OFFSET    (1)
-+#define OOB_INDEX_OFFSET        (29)
-+#define OOB_INDEX_SIZE          (2)
-+#define FAKE_INDEX              (0xAAAA)
-+
-+typedef struct _bmt_entry_
-+{
-+    u16 bad_index;              // bad block index
-+    u16 mapped_index;           // mapping block index in the replace pool
-+} bmt_entry;
-+
-+typedef enum
-+{
-+    UPDATE_ERASE_FAIL,
-+    UPDATE_WRITE_FAIL,
-+    UPDATE_UNMAPPED_BLOCK,
-+    UPDATE_REASON_COUNT,
-+} update_reason_t;
-+
-+typedef struct
-+{
-+    bmt_entry table[MAX_BMT_SIZE];
-+    u8 version;
-+    u8 mapped_count;            // mapped block count in pool
-+    u8 bad_count;               // bad block count in pool. Not used in V1
-+} bmt_struct;
-+
-+/***************************************************************
-+*                                                              *
-+* Interface BMT need to use                                    *
-+*                                                              *
-+***************************************************************/
-+extern bool mtk_nand_exec_read_page(struct mtd_info *mtd, u32 row, u32 page_size, u8 * dat, u8 * oob);
-+extern int mtk_nand_block_bad_hw(struct mtd_info *mtd, loff_t ofs);
-+extern int mtk_nand_erase_hw(struct mtd_info *mtd, int page);
-+extern int mtk_nand_block_markbad_hw(struct mtd_info *mtd, loff_t ofs);
-+extern int mtk_nand_exec_write_page(struct mtd_info *mtd, u32 row, u32 page_size, u8 * dat, u8 * oob);
-+
-+
-+/***************************************************************
-+*                                                              *
-+* Different function interface for preloader/uboot/kernel      *
-+*                                                              *
-+***************************************************************/
-+void set_bad_index_to_oob(u8 * oob, u16 index);
-+
-+
-+bmt_struct *init_bmt(struct nand_chip *nand, int size);
-+bool update_bmt(u32 offset, update_reason_t reason, u8 * dat, u8 * oob);
-+unsigned short get_mapping_block_index(int index);
-+
-+#endif                          // #ifndef __BMT_H__
---- /dev/null
-+++ b/drivers/mtd/nand/dev-nand.c
-@@ -0,0 +1,63 @@
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+
-+#include "mt6575_typedefs.h"
-+
-+#define RALINK_NAND_CTRL_BASE               0xBE003000
-+#define NFI_base    RALINK_NAND_CTRL_BASE
-+#define RALINK_NANDECC_CTRL_BASE    0xBE003800
-+#define NFIECC_base RALINK_NANDECC_CTRL_BASE
-+#define MT7621_NFI_IRQ_ID		SURFBOARDINT_NAND
-+#define MT7621_NFIECC_IRQ_ID	SURFBOARDINT_NAND_ECC
-+
-+#define SURFBOARDINT_NAND 22
-+#define SURFBOARDINT_NAND_ECC 23
-+
-+static struct resource MT7621_resource_nand[] = {
-+        {
-+                .start          = NFI_base,
-+                .end            = NFI_base + 0x1A0,
-+                .flags          = IORESOURCE_MEM,
-+        },
-+        {
-+                .start          = NFIECC_base,
-+                .end            = NFIECC_base + 0x150,
-+                .flags          = IORESOURCE_MEM,
-+        },
-+        {
-+                .start          = MT7621_NFI_IRQ_ID,
-+                .flags          = IORESOURCE_IRQ,
-+        },
-+        {
-+                .start          = MT7621_NFIECC_IRQ_ID,
-+                .flags          = IORESOURCE_IRQ,
-+        },
-+};
-+
-+static struct platform_device MT7621_nand_dev = {
-+    .name = "MT7621-NAND",
-+    .id   = 0,
-+        .num_resources  = ARRAY_SIZE(MT7621_resource_nand),
-+        .resource               = MT7621_resource_nand,
-+    .dev            = {
-+        .platform_data = &mt7621_nand_hw,
-+    },
-+};
-+
-+
-+int __init mtk_nand_register(void)
-+{
-+
-+	int retval = 0;
-+
-+	retval = platform_device_register(&MT7621_nand_dev);
-+	if (retval != 0) {
-+		printk(KERN_ERR "register nand device fail\n");
-+		return retval;
-+	}
-+
-+
-+	return retval;
-+}
-+arch_initcall(mtk_nand_register);
---- /dev/null
-+++ b/drivers/mtd/nand/mt6575_typedefs.h
-@@ -0,0 +1,340 @@
-+/* Copyright Statement:
-+ *
-+ * This software/firmware and related documentation ("MediaTek Software") are
-+ * protected under relevant copyright laws. The information contained herein
-+ * is confidential and proprietary to MediaTek Inc. and/or its licensors.
-+ * Without the prior written permission of MediaTek inc. and/or its licensors,
-+ * any reproduction, modification, use or disclosure of MediaTek Software,
-+ * and information contained herein, in whole or in part, shall be strictly prohibited.
-+ */
-+/* MediaTek Inc. (C) 2010. All rights reserved.
-+ *
-+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
-+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
-+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
-+ * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
-+ * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
-+ * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
-+ * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
-+ * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
-+ * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
-+ * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
-+ * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
-+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
-+ * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
-+ * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
-+ * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
-+ * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
-+ *
-+ * The following software/firmware and/or related documentation ("MediaTek Software")
-+ * have been modified by MediaTek Inc. All revisions are subject to any receiver's
-+ * applicable license agreements with MediaTek Inc.
-+ */
-+
-+/*****************************************************************************
-+*  Copyright Statement:
-+*  --------------------
-+*  This software is protected by Copyright and the information contained
-+*  herein is confidential. The software may not be copied and the information
-+*  contained herein may not be used or disclosed except with the written
-+*  permission of MediaTek Inc. (C) 2008
-+*
-+*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
-+*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
-+*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
-+*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
-+*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
-+*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
-+*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
-+*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
-+*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
-+*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
-+*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
-+*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
-+*
-+*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
-+*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
-+*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
-+*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
-+*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
-+*
-+*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
-+*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
-+*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
-+*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
-+*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
-+*
-+*****************************************************************************/
-+
-+#ifndef _MT6575_TYPEDEFS_H
-+#define _MT6575_TYPEDEFS_H
-+
-+#if defined (__KERNEL_NAND__)
-+#include <linux/bug.h>
-+#else
-+#define true 		1 
-+#define false 		0  
-+#define bool		u8
-+#endif
-+
-+// ---------------------------------------------------------------------------
-+//  Basic Type Definitions
-+// ---------------------------------------------------------------------------
-+
-+typedef volatile unsigned char  *P_kal_uint8;
-+typedef volatile unsigned short *P_kal_uint16;
-+typedef volatile unsigned int   *P_kal_uint32;
-+
-+typedef long            LONG;
-+typedef unsigned char   UBYTE;
-+typedef short           SHORT;
-+
-+typedef signed char     kal_int8;
-+typedef signed short    kal_int16;
-+typedef signed int      kal_int32;
-+typedef long long       kal_int64;
-+typedef unsigned char   kal_uint8;
-+typedef unsigned short  kal_uint16;
-+typedef unsigned int    kal_uint32;
-+typedef unsigned long long  kal_uint64;
-+typedef char            kal_char;
-+
-+typedef unsigned int            *UINT32P;
-+typedef volatile unsigned short *UINT16P;
-+typedef volatile unsigned char  *UINT8P;
-+typedef unsigned char           *U8P;
-+
-+typedef volatile unsigned char  *P_U8;
-+typedef volatile signed char    *P_S8;
-+typedef volatile unsigned short *P_U16;
-+typedef volatile signed short   *P_S16;
-+typedef volatile unsigned int   *P_U32;
-+typedef volatile signed int     *P_S32;
-+typedef unsigned long long      *P_U64;
-+typedef signed long long        *P_S64;
-+
-+typedef unsigned char       U8;
-+typedef signed char         S8;
-+typedef unsigned short      U16;
-+typedef signed short        S16;
-+typedef unsigned int        U32;
-+typedef signed int          S32;
-+typedef unsigned long long  U64;
-+typedef signed long long    S64;
-+//typedef unsigned char       bool;
-+
-+typedef unsigned char   UINT8;
-+typedef unsigned short  UINT16;
-+typedef unsigned int    UINT32;
-+typedef unsigned short  USHORT;
-+typedef signed char     INT8;
-+typedef signed short    INT16;
-+typedef signed int      INT32;
-+typedef unsigned int    DWORD;
-+typedef void            VOID;
-+typedef unsigned char   BYTE;
-+typedef float           FLOAT;
-+
-+typedef char           *LPCSTR;
-+typedef short          *LPWSTR;
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Constants
-+// ---------------------------------------------------------------------------
-+
-+#define IMPORT  EXTERN
-+#ifndef __cplusplus
-+  #define EXTERN  extern
-+#else
-+  #define EXTERN  extern "C"
-+#endif
-+#define LOCAL     static
-+#define GLOBAL
-+#define EXPORT    GLOBAL
-+
-+#define EQ        ==
-+#define NEQ       !=
-+#define AND       &&
-+#define OR        ||
-+#define XOR(A,B)  ((!(A) AND (B)) OR ((A) AND !(B)))
-+
-+#ifndef FALSE
-+  #define FALSE (0)
-+#endif
-+
-+#ifndef TRUE
-+  #define TRUE  (1)
-+#endif
-+
-+#ifndef NULL
-+  #define NULL  (0)
-+#endif
-+
-+//enum boolean {false, true};
-+enum {RX, TX, NONE};
-+
-+#ifndef BOOL
-+typedef unsigned char  BOOL;
-+#endif
-+
-+typedef enum {
-+   KAL_FALSE = 0,
-+   KAL_TRUE  = 1,
-+} kal_bool;
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Type Casting
-+// ---------------------------------------------------------------------------
-+
-+#define AS_INT32(x)     (*(INT32 *)((void*)x))
-+#define AS_INT16(x)     (*(INT16 *)((void*)x))
-+#define AS_INT8(x)      (*(INT8  *)((void*)x))
-+
-+#define AS_UINT32(x)    (*(UINT32 *)((void*)x))
-+#define AS_UINT16(x)    (*(UINT16 *)((void*)x))
-+#define AS_UINT8(x)     (*(UINT8  *)((void*)x))
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Register Manipulations
-+// ---------------------------------------------------------------------------
-+
-+#define READ_REGISTER_UINT32(reg) \
-+    (*(volatile UINT32 * const)(reg))
-+
-+#define WRITE_REGISTER_UINT32(reg, val) \
-+    (*(volatile UINT32 * const)(reg)) = (val)
-+
-+#define READ_REGISTER_UINT16(reg) \
-+    (*(volatile UINT16 * const)(reg))
-+
-+#define WRITE_REGISTER_UINT16(reg, val) \
-+    (*(volatile UINT16 * const)(reg)) = (val)
-+
-+#define READ_REGISTER_UINT8(reg) \
-+    (*(volatile UINT8 * const)(reg))
-+
-+#define WRITE_REGISTER_UINT8(reg, val) \
-+    (*(volatile UINT8 * const)(reg)) = (val)
-+
-+#define INREG8(x)           READ_REGISTER_UINT8((UINT8*)((void*)(x)))
-+#define OUTREG8(x, y)       WRITE_REGISTER_UINT8((UINT8*)((void*)(x)), (UINT8)(y))
-+#define SETREG8(x, y)       OUTREG8(x, INREG8(x)|(y))
-+#define CLRREG8(x, y)       OUTREG8(x, INREG8(x)&~(y))
-+#define MASKREG8(x, y, z)   OUTREG8(x, (INREG8(x)&~(y))|(z))
-+
-+#define INREG16(x)          READ_REGISTER_UINT16((UINT16*)((void*)(x)))
-+#define OUTREG16(x, y)      WRITE_REGISTER_UINT16((UINT16*)((void*)(x)),(UINT16)(y))
-+#define SETREG16(x, y)      OUTREG16(x, INREG16(x)|(y))
-+#define CLRREG16(x, y)      OUTREG16(x, INREG16(x)&~(y))
-+#define MASKREG16(x, y, z)  OUTREG16(x, (INREG16(x)&~(y))|(z))
-+
-+#define INREG32(x)          READ_REGISTER_UINT32((UINT32*)((void*)(x)))
-+#define OUTREG32(x, y)      WRITE_REGISTER_UINT32((UINT32*)((void*)(x)), (UINT32)(y))
-+#define SETREG32(x, y)      OUTREG32(x, INREG32(x)|(y))
-+#define CLRREG32(x, y)      OUTREG32(x, INREG32(x)&~(y))
-+#define MASKREG32(x, y, z)  OUTREG32(x, (INREG32(x)&~(y))|(z))
-+
-+
-+#define DRV_Reg8(addr)              INREG8(addr)
-+#define DRV_WriteReg8(addr, data)   OUTREG8(addr, data)
-+#define DRV_SetReg8(addr, data)     SETREG8(addr, data)
-+#define DRV_ClrReg8(addr, data)     CLRREG8(addr, data)
-+
-+#define DRV_Reg16(addr)             INREG16(addr)
-+#define DRV_WriteReg16(addr, data)  OUTREG16(addr, data)
-+#define DRV_SetReg16(addr, data)    SETREG16(addr, data)
-+#define DRV_ClrReg16(addr, data)    CLRREG16(addr, data)
-+
-+#define DRV_Reg32(addr)             INREG32(addr)
-+#define DRV_WriteReg32(addr, data)  OUTREG32(addr, data)
-+#define DRV_SetReg32(addr, data)    SETREG32(addr, data)
-+#define DRV_ClrReg32(addr, data)    CLRREG32(addr, data)
-+
-+// !!! DEPRECATED, WILL BE REMOVED LATER !!!
-+#define DRV_Reg(addr)               DRV_Reg16(addr)
-+#define DRV_WriteReg(addr, data)    DRV_WriteReg16(addr, data)
-+#define DRV_SetReg(addr, data)      DRV_SetReg16(addr, data)
-+#define DRV_ClrReg(addr, data)      DRV_ClrReg16(addr, data)
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Compiler Time Deduction Macros
-+// ---------------------------------------------------------------------------
-+
-+#define _MASK_OFFSET_1(x, n)  ((x) & 0x1) ? (n) :
-+#define _MASK_OFFSET_2(x, n)  _MASK_OFFSET_1((x), (n)) _MASK_OFFSET_1((x) >> 1, (n) + 1)
-+#define _MASK_OFFSET_4(x, n)  _MASK_OFFSET_2((x), (n)) _MASK_OFFSET_2((x) >> 2, (n) + 2)
-+#define _MASK_OFFSET_8(x, n)  _MASK_OFFSET_4((x), (n)) _MASK_OFFSET_4((x) >> 4, (n) + 4)
-+#define _MASK_OFFSET_16(x, n) _MASK_OFFSET_8((x), (n)) _MASK_OFFSET_8((x) >> 8, (n) + 8)
-+#define _MASK_OFFSET_32(x, n) _MASK_OFFSET_16((x), (n)) _MASK_OFFSET_16((x) >> 16, (n) + 16)
-+
-+#define MASK_OFFSET_ERROR (0xFFFFFFFF)
-+
-+#define MASK_OFFSET(x) (_MASK_OFFSET_32(x, 0) MASK_OFFSET_ERROR)
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Assertions
-+// ---------------------------------------------------------------------------
-+
-+#ifndef ASSERT
-+    #define ASSERT(expr)        BUG_ON(!(expr))
-+#endif
-+
-+#ifndef NOT_IMPLEMENTED
-+    #define NOT_IMPLEMENTED()   BUG_ON(1)
-+#endif    
-+
-+#define STATIC_ASSERT(pred)         STATIC_ASSERT_X(pred, __LINE__)
-+#define STATIC_ASSERT_X(pred, line) STATIC_ASSERT_XX(pred, line)
-+#define STATIC_ASSERT_XX(pred, line) \
-+    extern char assertion_failed_at_##line[(pred) ? 1 : -1]
-+
-+// ---------------------------------------------------------------------------
-+//  Resolve Compiler Warnings
-+// ---------------------------------------------------------------------------
-+
-+#define NOT_REFERENCED(x)   { (x) = (x); }
-+
-+
-+// ---------------------------------------------------------------------------
-+//  Utilities
-+// ---------------------------------------------------------------------------
-+
-+#define MAXIMUM(A,B)       (((A)>(B))?(A):(B))
-+#define MINIMUM(A,B)       (((A)<(B))?(A):(B))
-+
-+#define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
-+#define DVT_DELAYMACRO(u4Num)                                            \
-+{                                                                        \
-+    UINT32 u4Count = 0 ;                                                 \
-+    for (u4Count = 0; u4Count < u4Num; u4Count++ );                      \
-+}                                                                        \
-+
-+#define    A68351B      0
-+#define    B68351B      1
-+#define    B68351D      2
-+#define    B68351E      3
-+#define    UNKNOWN_IC_VERSION   0xFF
-+
-+/* NAND driver */
-+struct mtk_nand_host_hw {
-+    unsigned int nfi_bus_width;		    /* NFI_BUS_WIDTH */ 
-+	unsigned int nfi_access_timing;		/* NFI_ACCESS_TIMING */  
-+	unsigned int nfi_cs_num;			/* NFI_CS_NUM */
-+	unsigned int nand_sec_size;			/* NAND_SECTOR_SIZE */
-+	unsigned int nand_sec_shift;		/* NAND_SECTOR_SHIFT */
-+	unsigned int nand_ecc_size;
-+	unsigned int nand_ecc_bytes;
-+	unsigned int nand_ecc_mode;
-+};
-+extern struct mtk_nand_host_hw mt7621_nand_hw;
-+extern unsigned int	CFG_BLOCKSIZE;
-+
-+#endif  // _MT6575_TYPEDEFS_H
-+
---- /dev/null
-+++ b/drivers/mtd/nand/mtk_nand2.c
-@@ -0,0 +1,2345 @@
-+/******************************************************************************
-+* mtk_nand2.c - MTK NAND Flash Device Driver
-+ *
-+* Copyright 2009-2012 MediaTek Co.,Ltd.
-+ *
-+* DESCRIPTION:
-+* 	This file provid the other drivers nand relative functions
-+ *
-+* modification history
-+* ----------------------------------------
-+* v3.0, 11 Feb 2010, mtk
-+* ----------------------------------------
-+******************************************************************************/
-+#include "nand_def.h"
-+#include <linux/slab.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/delay.h>
-+#include <linux/errno.h>
-+#include <linux/sched.h>
-+#include <linux/types.h>
-+#include <linux/wait.h>
-+#include <linux/spinlock.h>
-+#include <linux/interrupt.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/rawnand.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/nand_ecc.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/jiffies.h>
-+#include <linux/platform_device.h>
-+#include <linux/proc_fs.h>
-+#include <linux/time.h>
-+#include <linux/mm.h>
-+#include <asm/io.h>
-+#include <asm/cacheflush.h>
-+#include <asm/uaccess.h>
-+#include <linux/miscdevice.h>
-+#include "mtk_nand2.h"
-+#include "nand_device_list.h"
-+
-+#include "bmt.h"
-+#include "partition.h"
-+
-+unsigned int CFG_BLOCKSIZE;
-+
-+static int shift_on_bbt = 0;
-+int mtk_nand_read_oob_hw(struct mtd_info *mtd, struct nand_chip *chip, int page);
-+
-+static const char * const probe_types[] = { "cmdlinepart", "ofpart", NULL };
-+
-+#define NAND_CMD_STATUS_MULTI  0x71
-+
-+void show_stack(struct task_struct *tsk, unsigned long *sp);
-+extern void mt_irq_set_sens(unsigned int irq, unsigned int sens);
-+extern void mt_irq_set_polarity(unsigned int irq,unsigned int polarity);
-+
-+struct mtk_nand_host	mtk_nand_host;	/* include mtd_info and nand_chip structs */
-+struct mtk_nand_host_hw mt7621_nand_hw = {
-+    .nfi_bus_width          = 8,
-+    .nfi_access_timing      = NFI_DEFAULT_ACCESS_TIMING,
-+    .nfi_cs_num             = NFI_CS_NUM,
-+    .nand_sec_size          = 512,
-+    .nand_sec_shift         = 9,
-+    .nand_ecc_size          = 2048,
-+    .nand_ecc_bytes         = 32,
-+    .nand_ecc_mode          = NAND_ECC_HW,
-+};
-+
-+
-+/*******************************************************************************
-+ * Gloable Varible Definition
-+ *******************************************************************************/
-+
-+#define NFI_ISSUE_COMMAND(cmd, col_addr, row_addr, col_num, row_num) \
-+   do { \
-+      DRV_WriteReg(NFI_CMD_REG16,cmd);\
-+      while (DRV_Reg32(NFI_STA_REG32) & STA_CMD_STATE);\
-+      DRV_WriteReg32(NFI_COLADDR_REG32, col_addr);\
-+      DRV_WriteReg32(NFI_ROWADDR_REG32, row_addr);\
-+      DRV_WriteReg(NFI_ADDRNOB_REG16, col_num | (row_num<<ADDR_ROW_NOB_SHIFT));\
-+      while (DRV_Reg32(NFI_STA_REG32) & STA_ADDR_STATE);\
-+   }while(0);
-+
-+//-------------------------------------------------------------------------------
-+static struct NAND_CMD g_kCMD;
-+static u32 g_u4ChipVer;
-+bool g_bInitDone;
-+static bool g_bcmdstatus;
-+static u32 g_value = 0;
-+static int g_page_size;
-+
-+BOOL g_bHwEcc = true;
-+
-+
-+extern void nand_release_device(struct mtd_info *mtd);
-+extern int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state);
-+
-+#if defined(MTK_NAND_BMT)
-+static bmt_struct *g_bmt;
-+#endif
-+struct mtk_nand_host *host;
-+extern struct mtd_partition g_pasStatic_Partition[];
-+int part_num = NUM_PARTITIONS;
-+int manu_id;
-+int dev_id;
-+
-+/* this constant was taken from linux/nand/nand.h v 3.14
-+ * in later versions it seems it was removed in order to save a bit of space
-+ */
-+#define NAND_MAX_OOBSIZE 774
-+static u8 local_oob_buf[NAND_MAX_OOBSIZE];
-+
-+static u8 nand_badblock_offset = 0;
-+
-+static void nand_bbt_set(struct mtd_info *mtd, int page, int flag)
-+{
-+	struct nand_chip *this = mtd->priv;
-+	int block;
-+
-+	block = (int)(page >> (this->bbt_erase_shift - this->page_shift - 1));
-+	this->bbt[block >> 3] &= ~(0x03 << (block & 0x6));
-+	this->bbt[block >> 3] |= (flag & 0x3) << (block & 0x6);
-+}
-+
-+static int nand_bbt_get(struct mtd_info *mtd, int page)
-+{
-+	struct nand_chip *this = mtd->priv;
-+	int block;
-+
-+	block = (int)(page >> (this->bbt_erase_shift - this->page_shift - 1));
-+	return (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
-+}
-+
-+void nand_enable_clock(void)
-+{
-+    //enable_clock(MT65XX_PDN_PERI_NFI, "NAND");
-+}
-+
-+void nand_disable_clock(void)
-+{
-+    //disable_clock(MT65XX_PDN_PERI_NFI, "NAND");
-+}
-+
-+struct nand_ecclayout {
-+	__u32 eccbytes;
-+	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];
-+	__u32 oobavail;
-+	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
-+};
-+
-+static struct nand_ecclayout *layout;
-+
-+static struct nand_ecclayout nand_oob_16 = {
-+	.eccbytes = 8,
-+	.eccpos = {8, 9, 10, 11, 12, 13, 14, 15},
-+	.oobfree = {{1, 6}, {0, 0}}
-+};
-+
-+struct nand_ecclayout nand_oob_64 = {
-+	.eccbytes = 32,
-+	.eccpos = {32, 33, 34, 35, 36, 37, 38, 39,
-+		40, 41, 42, 43, 44, 45, 46, 47,
-+		48, 49, 50, 51, 52, 53, 54, 55,
-+		56, 57, 58, 59, 60, 61, 62, 63},
-+	.oobfree = {{1, 7}, {9, 7}, {17, 7}, {25, 6}, {0, 0}}
-+};
-+
-+struct nand_ecclayout nand_oob_128 = {
-+	.eccbytes = 64,
-+	.eccpos = {
-+		64, 65, 66, 67, 68, 69, 70, 71,
-+		72, 73, 74, 75, 76, 77, 78, 79,
-+		80, 81, 82, 83, 84, 85, 86, 86,
-+		88, 89, 90, 91, 92, 93, 94, 95,
-+		96, 97, 98, 99, 100, 101, 102, 103,
-+		104, 105, 106, 107, 108, 109, 110, 111,
-+		112, 113, 114, 115, 116, 117, 118, 119,
-+		120, 121, 122, 123, 124, 125, 126, 127},
-+	.oobfree = {{1, 7}, {9, 7}, {17, 7}, {25, 7}, {33, 7}, {41, 7}, {49, 7}, {57, 6}}
-+};
-+
-+flashdev_info devinfo;
-+
-+void dump_nfi(void)
-+{
-+}
-+
-+void dump_ecc(void)
-+{
-+}
-+
-+u32
-+nand_virt_to_phys_add(u32 va)
-+{
-+	u32 pageOffset = (va & (PAGE_SIZE - 1));
-+	pgd_t *pgd;
-+	pmd_t *pmd;
-+	pte_t *pte;
-+	u32 pa;
-+
-+	if (virt_addr_valid(va))
-+		return __virt_to_phys(va);
-+
-+	if (NULL == current) {
-+		printk(KERN_ERR "[nand_virt_to_phys_add] ERROR ,current is NULL! \n");
-+		return 0;
-+	}
-+
-+	if (NULL == current->mm) {
-+		printk(KERN_ERR "[nand_virt_to_phys_add] ERROR current->mm is NULL! tgid=0x%x, name=%s \n", current->tgid, current->comm);
-+		return 0;
-+	}
-+
-+	pgd = pgd_offset(current->mm, va);  /* what is tsk->mm */
-+	if (pgd_none(*pgd) || pgd_bad(*pgd)) {
-+		printk(KERN_ERR "[nand_virt_to_phys_add] ERROR, va=0x%x, pgd invalid! \n", va);
-+		return 0;
-+	}
-+
-+	pmd = pmd_offset((pud_t *)pgd, va);
-+	if (pmd_none(*pmd) || pmd_bad(*pmd)) {
-+		printk(KERN_ERR "[nand_virt_to_phys_add] ERROR, va=0x%x, pmd invalid! \n", va);
-+		return 0;
-+	}
-+
-+	pte = pte_offset_map(pmd, va);
-+	if (pte_present(*pte)) {
-+		pa = (pte_val(*pte) & (PAGE_MASK)) | pageOffset;
-+		return pa;
-+	}
-+
-+	printk(KERN_ERR "[nand_virt_to_phys_add] ERROR va=0x%x, pte invalid! \n", va);
-+	return 0;
-+}
-+EXPORT_SYMBOL(nand_virt_to_phys_add);
-+
-+bool
-+get_device_info(u16 id, u32 ext_id, flashdev_info * pdevinfo)
-+{
-+	u32 index;
-+	for (index = 0; gen_FlashTable[index].id != 0; index++) {
-+		if (id == gen_FlashTable[index].id && ext_id == gen_FlashTable[index].ext_id) {
-+			pdevinfo->id = gen_FlashTable[index].id;
-+			pdevinfo->ext_id = gen_FlashTable[index].ext_id;
-+			pdevinfo->blocksize = gen_FlashTable[index].blocksize;
-+			pdevinfo->addr_cycle = gen_FlashTable[index].addr_cycle;
-+			pdevinfo->iowidth = gen_FlashTable[index].iowidth;
-+			pdevinfo->timmingsetting = gen_FlashTable[index].timmingsetting;
-+			pdevinfo->advancedmode = gen_FlashTable[index].advancedmode;
-+			pdevinfo->pagesize = gen_FlashTable[index].pagesize;
-+			pdevinfo->sparesize = gen_FlashTable[index].sparesize;
-+			pdevinfo->totalsize = gen_FlashTable[index].totalsize;
-+			memcpy(pdevinfo->devciename, gen_FlashTable[index].devciename, sizeof(pdevinfo->devciename));
-+			printk(KERN_INFO "Device found in MTK table, ID: %x, EXT_ID: %x\n", id, ext_id);
-+
-+			goto find;
-+		}
-+	}
-+
-+find:
-+	if (0 == pdevinfo->id) {
-+		printk(KERN_INFO "Device not found, ID: %x\n", id);
-+		return false;
-+	} else {
-+		return true;
-+	}
-+}
-+
-+static void
-+ECC_Config(struct mtk_nand_host_hw *hw,u32 ecc_bit)
-+{
-+	u32 u4ENCODESize;
-+	u32 u4DECODESize;
-+	u32 ecc_bit_cfg = ECC_CNFG_ECC4;
-+
-+	switch(ecc_bit){
-+	case 4:
-+		ecc_bit_cfg = ECC_CNFG_ECC4;
-+		break;
-+	case 8:
-+		ecc_bit_cfg = ECC_CNFG_ECC8;
-+		break;
-+	case 10:
-+		ecc_bit_cfg = ECC_CNFG_ECC10;
-+		break;
-+	case 12:
-+		ecc_bit_cfg = ECC_CNFG_ECC12;
-+		break;
-+	default:
-+		break;
-+	}
-+	DRV_WriteReg16(ECC_DECCON_REG16, DEC_DE);
-+	do {
-+	} while (!DRV_Reg16(ECC_DECIDLE_REG16));
-+
-+	DRV_WriteReg16(ECC_ENCCON_REG16, ENC_DE);
-+	do {
-+	} while (!DRV_Reg32(ECC_ENCIDLE_REG32));
-+
-+	/* setup FDM register base */
-+	DRV_WriteReg32(ECC_FDMADDR_REG32, NFI_FDM0L_REG32);
-+
-+	/* Sector + FDM */
-+	u4ENCODESize = (hw->nand_sec_size + 8) << 3;
-+	/* Sector + FDM + YAFFS2 meta data bits */
-+	u4DECODESize = ((hw->nand_sec_size + 8) << 3) + ecc_bit * 13;
-+
-+	/* configure ECC decoder && encoder */
-+	DRV_WriteReg32(ECC_DECCNFG_REG32, ecc_bit_cfg | DEC_CNFG_NFI | DEC_CNFG_EMPTY_EN | (u4DECODESize << DEC_CNFG_CODE_SHIFT));
-+
-+	DRV_WriteReg32(ECC_ENCCNFG_REG32, ecc_bit_cfg | ENC_CNFG_NFI | (u4ENCODESize << ENC_CNFG_MSG_SHIFT));
-+	NFI_SET_REG32(ECC_DECCNFG_REG32, DEC_CNFG_EL);
-+}
-+
-+static void
-+ECC_Decode_Start(void)
-+{
-+	while (!(DRV_Reg16(ECC_DECIDLE_REG16) & DEC_IDLE))
-+		;
-+	DRV_WriteReg16(ECC_DECCON_REG16, DEC_EN);
-+}
-+
-+static void
-+ECC_Decode_End(void)
-+{
-+	while (!(DRV_Reg16(ECC_DECIDLE_REG16) & DEC_IDLE))
-+		;
-+	DRV_WriteReg16(ECC_DECCON_REG16, DEC_DE);
-+}
-+
-+static void
-+ECC_Encode_Start(void)
-+{
-+	while (!(DRV_Reg32(ECC_ENCIDLE_REG32) & ENC_IDLE))
-+		;
-+	mb();
-+	DRV_WriteReg16(ECC_ENCCON_REG16, ENC_EN);
-+}
-+
-+static void
-+ECC_Encode_End(void)
-+{
-+	/* wait for device returning idle */
-+	while (!(DRV_Reg32(ECC_ENCIDLE_REG32) & ENC_IDLE)) ;
-+	mb();
-+	DRV_WriteReg16(ECC_ENCCON_REG16, ENC_DE);
-+}
-+
-+static bool
-+mtk_nand_check_bch_error(struct mtd_info *mtd, u8 * pDataBuf, u32 u4SecIndex, u32 u4PageAddr)
-+{
-+	bool bRet = true;
-+	u16 u2SectorDoneMask = 1 << u4SecIndex;
-+	u32 u4ErrorNumDebug, i, u4ErrNum;
-+	u32 timeout = 0xFFFF;
-+	// int el;
-+	u32 au4ErrBitLoc[6];
-+	u32 u4ErrByteLoc, u4BitOffset;
-+	u32 u4ErrBitLoc1th, u4ErrBitLoc2nd;
-+
-+	//4 // Wait for Decode Done
-+	while (0 == (u2SectorDoneMask & DRV_Reg16(ECC_DECDONE_REG16))) {
-+		timeout--;
-+		if (0 == timeout)
-+			return false;
-+	}
-+	/* We will manually correct the error bits in the last sector, not all the sectors of the page! */
-+	memset(au4ErrBitLoc, 0x0, sizeof(au4ErrBitLoc));
-+	u4ErrorNumDebug = DRV_Reg32(ECC_DECENUM_REG32);
-+	u4ErrNum = DRV_Reg32(ECC_DECENUM_REG32) >> (u4SecIndex << 2);
-+	u4ErrNum &= 0xF;
-+
-+	if (u4ErrNum) {
-+		if (0xF == u4ErrNum) {
-+			mtd->ecc_stats.failed++;
-+			bRet = false;
-+			printk(KERN_ERR"mtk_nand: UnCorrectable at PageAddr=%d\n", u4PageAddr);
-+		} else {
-+			for (i = 0; i < ((u4ErrNum + 1) >> 1); ++i) {
-+				au4ErrBitLoc[i] = DRV_Reg32(ECC_DECEL0_REG32 + i);
-+				u4ErrBitLoc1th = au4ErrBitLoc[i] & 0x1FFF;
-+				if (u4ErrBitLoc1th < 0x1000) {
-+					u4ErrByteLoc = u4ErrBitLoc1th / 8;
-+					u4BitOffset = u4ErrBitLoc1th % 8;
-+					pDataBuf[u4ErrByteLoc] = pDataBuf[u4ErrByteLoc] ^ (1 << u4BitOffset);
-+					mtd->ecc_stats.corrected++;
-+				} else {
-+					mtd->ecc_stats.failed++;
-+				}
-+				u4ErrBitLoc2nd = (au4ErrBitLoc[i] >> 16) & 0x1FFF;
-+				if (0 != u4ErrBitLoc2nd) {
-+					if (u4ErrBitLoc2nd < 0x1000) {
-+						u4ErrByteLoc = u4ErrBitLoc2nd / 8;
-+						u4BitOffset = u4ErrBitLoc2nd % 8;
-+						pDataBuf[u4ErrByteLoc] = pDataBuf[u4ErrByteLoc] ^ (1 << u4BitOffset);
-+						mtd->ecc_stats.corrected++;
-+					} else {
-+						mtd->ecc_stats.failed++;
-+						//printk(KERN_ERR"UnCorrectable High ErrLoc=%d\n", au4ErrBitLoc[i]);
-+					}
-+				}
-+			}
-+		}
-+		if (0 == (DRV_Reg16(ECC_DECFER_REG16) & (1 << u4SecIndex)))
-+			bRet = false;
-+	}
-+	return bRet;
-+}
-+
-+static bool
-+mtk_nand_RFIFOValidSize(u16 u2Size)
-+{
-+	u32 timeout = 0xFFFF;
-+	while (FIFO_RD_REMAIN(DRV_Reg16(NFI_FIFOSTA_REG16)) < u2Size) {
-+		timeout--;
-+		if (0 == timeout)
-+			return false;
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_WFIFOValidSize(u16 u2Size)
-+{
-+	u32 timeout = 0xFFFF;
-+
-+	while (FIFO_WR_REMAIN(DRV_Reg16(NFI_FIFOSTA_REG16)) > u2Size) {
-+		timeout--;
-+		if (0 == timeout)
-+			return false;
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_status_ready(u32 u4Status)
-+{
-+	u32 timeout = 0xFFFF;
-+
-+	while ((DRV_Reg32(NFI_STA_REG32) & u4Status) != 0) {
-+		timeout--;
-+		if (0 == timeout)
-+			return false;
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_reset(void)
-+{
-+	int timeout = 0xFFFF;
-+	if (DRV_Reg16(NFI_MASTERSTA_REG16)) {
-+		mb();
-+		DRV_WriteReg16(NFI_CON_REG16, CON_FIFO_FLUSH | CON_NFI_RST);
-+		while (DRV_Reg16(NFI_MASTERSTA_REG16)) {
-+			timeout--;
-+			if (!timeout)
-+				MSG(INIT, "Wait for NFI_MASTERSTA timeout\n");
-+		}
-+	}
-+	/* issue reset operation */
-+	mb();
-+	DRV_WriteReg16(NFI_CON_REG16, CON_FIFO_FLUSH | CON_NFI_RST);
-+
-+	return mtk_nand_status_ready(STA_NFI_FSM_MASK | STA_NAND_BUSY) && mtk_nand_RFIFOValidSize(0) && mtk_nand_WFIFOValidSize(0);
-+}
-+
-+static void
-+mtk_nand_set_mode(u16 u2OpMode)
-+{
-+	u16 u2Mode = DRV_Reg16(NFI_CNFG_REG16);
-+	u2Mode &= ~CNFG_OP_MODE_MASK;
-+	u2Mode |= u2OpMode;
-+	DRV_WriteReg16(NFI_CNFG_REG16, u2Mode);
-+}
-+
-+static void
-+mtk_nand_set_autoformat(bool bEnable)
-+{
-+	if (bEnable)
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_AUTO_FMT_EN);
-+	else
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AUTO_FMT_EN);
-+}
-+
-+static void
-+mtk_nand_configure_fdm(u16 u2FDMSize)
-+{
-+	NFI_CLN_REG16(NFI_PAGEFMT_REG16, PAGEFMT_FDM_MASK | PAGEFMT_FDM_ECC_MASK);
-+	NFI_SET_REG16(NFI_PAGEFMT_REG16, u2FDMSize << PAGEFMT_FDM_SHIFT);
-+	NFI_SET_REG16(NFI_PAGEFMT_REG16, u2FDMSize << PAGEFMT_FDM_ECC_SHIFT);
-+}
-+
-+static void
-+mtk_nand_configure_lock(void)
-+{
-+	u32 u4WriteColNOB = 2;
-+	u32 u4WriteRowNOB = 3;
-+	u32 u4EraseColNOB = 0;
-+	u32 u4EraseRowNOB = 3;
-+	DRV_WriteReg16(NFI_LOCKANOB_REG16,
-+		(u4WriteColNOB << PROG_CADD_NOB_SHIFT) | (u4WriteRowNOB << PROG_RADD_NOB_SHIFT) | (u4EraseColNOB << ERASE_CADD_NOB_SHIFT) | (u4EraseRowNOB << ERASE_RADD_NOB_SHIFT));
-+
-+	if (CHIPVER_ECO_1 == g_u4ChipVer) {
-+		int i;
-+		for (i = 0; i < 16; ++i) {
-+			DRV_WriteReg32(NFI_LOCK00ADD_REG32 + (i << 1), 0xFFFFFFFF);
-+			DRV_WriteReg32(NFI_LOCK00FMT_REG32 + (i << 1), 0xFFFFFFFF);
-+		}
-+		//DRV_WriteReg16(NFI_LOCKANOB_REG16, 0x0);
-+		DRV_WriteReg32(NFI_LOCKCON_REG32, 0xFFFFFFFF);
-+		DRV_WriteReg16(NFI_LOCK_REG16, NFI_LOCK_ON);
-+	}
-+}
-+
-+static bool
-+mtk_nand_pio_ready(void)
-+{
-+	int count = 0;
-+	while (!(DRV_Reg16(NFI_PIO_DIRDY_REG16) & 1)) {
-+		count++;
-+		if (count > 0xffff) {
-+			printk("PIO_DIRDY timeout\n");
-+			return false;
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_set_command(u16 command)
-+{
-+	mb();
-+	DRV_WriteReg16(NFI_CMD_REG16, command);
-+	return mtk_nand_status_ready(STA_CMD_STATE);
-+}
-+
-+static bool
-+mtk_nand_set_address(u32 u4ColAddr, u32 u4RowAddr, u16 u2ColNOB, u16 u2RowNOB)
-+{
-+	mb();
-+	DRV_WriteReg32(NFI_COLADDR_REG32, u4ColAddr);
-+	DRV_WriteReg32(NFI_ROWADDR_REG32, u4RowAddr);
-+	DRV_WriteReg16(NFI_ADDRNOB_REG16, u2ColNOB | (u2RowNOB << ADDR_ROW_NOB_SHIFT));
-+	return mtk_nand_status_ready(STA_ADDR_STATE);
-+}
-+
-+static void mtk_nfc_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)
-+{
-+	if (ctrl & NAND_ALE) {
-+		mtk_nand_set_address(dat, 0, 1, 0);
-+	} else if (ctrl & NAND_CLE) {
-+		mtk_nand_reset();
-+                mtk_nand_set_mode(0x6000);
-+		mtk_nand_set_command(dat);
-+	}
-+}
-+
-+static bool
-+mtk_nand_check_RW_count(u16 u2WriteSize)
-+{
-+	u32 timeout = 0xFFFF;
-+	u16 u2SecNum = u2WriteSize >> 9;
-+
-+	while (ADDRCNTR_CNTR(DRV_Reg16(NFI_ADDRCNTR_REG16)) < u2SecNum) {
-+		timeout--;
-+		if (0 == timeout) {
-+			printk(KERN_INFO "[%s] timeout\n", __FUNCTION__);
-+			return false;
-+		}
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_ready_for_read(struct nand_chip *nand, u32 u4RowAddr, u32 u4ColAddr, bool full, u8 * buf)
-+{
-+	/* Reset NFI HW internal state machine and flush NFI in/out FIFO */
-+	bool bRet = false;
-+	u16 sec_num = 1 << (nand->page_shift - 9);
-+	u32 col_addr = u4ColAddr;
-+	u32 colnob = 2, rownob = devinfo.addr_cycle - 2;
-+	if (nand->options & NAND_BUSWIDTH_16)
-+		col_addr /= 2;
-+
-+	if (!mtk_nand_reset())
-+		goto cleanup;
-+	if (g_bHwEcc)	{
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+	} else	{
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+	}
-+
-+	mtk_nand_set_mode(CNFG_OP_READ);
-+	NFI_SET_REG16(NFI_CNFG_REG16, CNFG_READ_EN);
-+	DRV_WriteReg16(NFI_CON_REG16, sec_num << CON_NFI_SEC_SHIFT);
-+
-+	if (full) {
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+
-+		if (g_bHwEcc)
-+			NFI_SET_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		else
-+			NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+	} else {
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+	}
-+
-+	mtk_nand_set_autoformat(full);
-+	if (full)
-+		if (g_bHwEcc)
-+			ECC_Decode_Start();
-+	if (!mtk_nand_set_command(NAND_CMD_READ0))
-+		goto cleanup;
-+	if (!mtk_nand_set_address(col_addr, u4RowAddr, colnob, rownob))
-+		goto cleanup;
-+	if (!mtk_nand_set_command(NAND_CMD_READSTART))
-+		goto cleanup;
-+	if (!mtk_nand_status_ready(STA_NAND_BUSY))
-+		goto cleanup;
-+
-+	bRet = true;
-+
-+cleanup:
-+	return bRet;
-+}
-+
-+static bool
-+mtk_nand_ready_for_write(struct nand_chip *nand, u32 u4RowAddr, u32 col_addr, bool full, u8 * buf)
-+{
-+	bool bRet = false;
-+	u32 sec_num = 1 << (nand->page_shift - 9);
-+	u32 colnob = 2, rownob = devinfo.addr_cycle - 2;
-+	if (nand->options & NAND_BUSWIDTH_16)
-+		col_addr /= 2;
-+
-+	/* Reset NFI HW internal state machine and flush NFI in/out FIFO */
-+	if (!mtk_nand_reset())
-+		return false;
-+
-+	mtk_nand_set_mode(CNFG_OP_PRGM);
-+
-+	NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_READ_EN);
-+
-+	DRV_WriteReg16(NFI_CON_REG16, sec_num << CON_NFI_SEC_SHIFT);
-+
-+	if (full) {
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+		if (g_bHwEcc)
-+			NFI_SET_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		else
-+			NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+	} else {
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+	}
-+
-+	mtk_nand_set_autoformat(full);
-+
-+	if (full)
-+		if (g_bHwEcc)
-+			ECC_Encode_Start();
-+
-+	if (!mtk_nand_set_command(NAND_CMD_SEQIN))
-+		goto cleanup;
-+	//1 FIXED ME: For Any Kind of AddrCycle
-+	if (!mtk_nand_set_address(col_addr, u4RowAddr, colnob, rownob))
-+		goto cleanup;
-+
-+	if (!mtk_nand_status_ready(STA_NAND_BUSY))
-+		goto cleanup;
-+
-+	bRet = true;
-+
-+cleanup:
-+	return bRet;
-+}
-+
-+static bool
-+mtk_nand_check_dececc_done(u32 u4SecNum)
-+{
-+	u32 timeout, dec_mask;
-+
-+	timeout = 0xffff;
-+	dec_mask = (1 << u4SecNum) - 1;
-+	while ((dec_mask != DRV_Reg(ECC_DECDONE_REG16)) && timeout > 0)
-+		timeout--;
-+	if (timeout == 0) {
-+		MSG(VERIFY, "ECC_DECDONE: timeout\n");
-+		return false;
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_mcu_read_data(u8 * buf, u32 length)
-+{
-+	int timeout = 0xffff;
-+	u32 i;
-+	u32 *buf32 = (u32 *) buf;
-+	if ((u32) buf % 4 || length % 4)
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+	else
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+
-+	//DRV_WriteReg32(NFI_STRADDR_REG32, 0);
-+	mb();
-+	NFI_SET_REG16(NFI_CON_REG16, CON_NFI_BRD);
-+
-+	if ((u32) buf % 4 || length % 4) {
-+		for (i = 0; (i < (length)) && (timeout > 0);) {
-+			if (DRV_Reg16(NFI_PIO_DIRDY_REG16) & 1) {
-+				*buf++ = (u8) DRV_Reg32(NFI_DATAR_REG32);
-+				i++;
-+			} else {
-+				timeout--;
-+			}
-+			if (0 == timeout) {
-+				printk(KERN_ERR "[%s] timeout\n", __FUNCTION__);
-+				dump_nfi();
-+				return false;
-+			}
-+		}
-+	} else {
-+		for (i = 0; (i < (length >> 2)) && (timeout > 0);) {
-+			if (DRV_Reg16(NFI_PIO_DIRDY_REG16) & 1) {
-+				*buf32++ = DRV_Reg32(NFI_DATAR_REG32);
-+				i++;
-+			} else {
-+				timeout--;
-+			}
-+			if (0 == timeout) {
-+				printk(KERN_ERR "[%s] timeout\n", __FUNCTION__);
-+				dump_nfi();
-+				return false;
-+			}
-+		}
-+	}
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_read_page_data(struct mtd_info *mtd, u8 * pDataBuf, u32 u4Size)
-+{
-+	return mtk_nand_mcu_read_data(pDataBuf, u4Size);
-+}
-+
-+static bool
-+mtk_nand_mcu_write_data(struct mtd_info *mtd, const u8 * buf, u32 length)
-+{
-+	u32 timeout = 0xFFFF;
-+	u32 i;
-+	u32 *pBuf32;
-+	NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+	mb();
-+	NFI_SET_REG16(NFI_CON_REG16, CON_NFI_BWR);
-+	pBuf32 = (u32 *) buf;
-+
-+	if ((u32) buf % 4 || length % 4)
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+	else
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+
-+	if ((u32) buf % 4 || length % 4) {
-+		for (i = 0; (i < (length)) && (timeout > 0);) {
-+			if (DRV_Reg16(NFI_PIO_DIRDY_REG16) & 1) {
-+				DRV_WriteReg32(NFI_DATAW_REG32, *buf++);
-+				i++;
-+			} else {
-+				timeout--;
-+			}
-+			if (0 == timeout) {
-+				printk(KERN_ERR "[%s] timeout\n", __FUNCTION__);
-+				dump_nfi();
-+				return false;
-+			}
-+		}
-+	} else {
-+		for (i = 0; (i < (length >> 2)) && (timeout > 0);) {
-+			if (DRV_Reg16(NFI_PIO_DIRDY_REG16) & 1) {
-+				DRV_WriteReg32(NFI_DATAW_REG32, *pBuf32++);
-+				i++;
-+			} else {
-+				timeout--;
-+			}
-+			if (0 == timeout) {
-+				printk(KERN_ERR "[%s] timeout\n", __FUNCTION__);
-+				dump_nfi();
-+				return false;
-+			}
-+		}
-+	}
-+
-+	return true;
-+}
-+
-+static bool
-+mtk_nand_write_page_data(struct mtd_info *mtd, u8 * buf, u32 size)
-+{
-+	return mtk_nand_mcu_write_data(mtd, buf, size);
-+}
-+
-+static void
-+mtk_nand_read_fdm_data(u8 * pDataBuf, u32 u4SecNum)
-+{
-+	u32 i;
-+	u32 *pBuf32 = (u32 *) pDataBuf;
-+
-+	if (pBuf32) {
-+		for (i = 0; i < u4SecNum; ++i) {
-+			*pBuf32++ = DRV_Reg32(NFI_FDM0L_REG32 + (i << 1));
-+			*pBuf32++ = DRV_Reg32(NFI_FDM0M_REG32 + (i << 1));
-+		}
-+	}
-+}
-+
-+static u8 fdm_buf[64];
-+static void
-+mtk_nand_write_fdm_data(struct nand_chip *chip, u8 * pDataBuf, u32 u4SecNum)
-+{
-+	u32 i, j;
-+	u8 checksum = 0;
-+	bool empty = true;
-+	struct nand_oobfree *free_entry;
-+	u32 *pBuf32;
-+
-+	memcpy(fdm_buf, pDataBuf, u4SecNum * 8);
-+
-+	free_entry = layout->oobfree;
-+	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free_entry[i].length; i++) {
-+		for (j = 0; j < free_entry[i].length; j++) {
-+			if (pDataBuf[free_entry[i].offset + j] != 0xFF)
-+				empty = false;
-+			checksum ^= pDataBuf[free_entry[i].offset + j];
-+		}
-+	}
-+
-+	if (!empty) {
-+		fdm_buf[free_entry[i - 1].offset + free_entry[i - 1].length] = checksum;
-+	}
-+
-+	pBuf32 = (u32 *) fdm_buf;
-+	for (i = 0; i < u4SecNum; ++i) {
-+		DRV_WriteReg32(NFI_FDM0L_REG32 + (i << 1), *pBuf32++);
-+		DRV_WriteReg32(NFI_FDM0M_REG32 + (i << 1), *pBuf32++);
-+	}
-+}
-+
-+static void
-+mtk_nand_stop_read(void)
-+{
-+	NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_BRD);
-+	mtk_nand_reset();
-+	if (g_bHwEcc)
-+		ECC_Decode_End();
-+	DRV_WriteReg16(NFI_INTR_EN_REG16, 0);
-+}
-+
-+static void
-+mtk_nand_stop_write(void)
-+{
-+	NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_BWR);
-+	if (g_bHwEcc)
-+		ECC_Encode_End();
-+	DRV_WriteReg16(NFI_INTR_EN_REG16, 0);
-+}
-+
-+bool
-+mtk_nand_exec_read_page(struct mtd_info *mtd, u32 u4RowAddr, u32 u4PageSize, u8 * pPageBuf, u8 * pFDMBuf)
-+{
-+	u8 *buf;
-+	bool bRet = true;
-+	struct nand_chip *nand = mtd->priv;
-+	u32 u4SecNum = u4PageSize >> 9;
-+
-+	buf = pPageBuf;
-+	if (mtk_nand_ready_for_read(nand, u4RowAddr, 0, true, buf)) {
-+		int j;
-+		for (j = 0 ; j < u4SecNum; j++) {
-+			if (!mtk_nand_read_page_data(mtd, buf+j*512, 512))
-+				bRet = false;
-+			if(g_bHwEcc && !mtk_nand_check_dececc_done(j+1))
-+				bRet = false;
-+			if(g_bHwEcc && !mtk_nand_check_bch_error(mtd, buf+j*512, j, u4RowAddr))
-+				bRet = false;
-+		}
-+		if (!mtk_nand_status_ready(STA_NAND_BUSY))
-+			bRet = false;
-+
-+		mtk_nand_read_fdm_data(pFDMBuf, u4SecNum);
-+		mtk_nand_stop_read();
-+	}
-+
-+	return bRet;
-+}
-+
-+int
-+mtk_nand_exec_write_page(struct mtd_info *mtd, u32 u4RowAddr, u32 u4PageSize, u8 * pPageBuf, u8 * pFDMBuf)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	u32 u4SecNum = u4PageSize >> 9;
-+	u8 *buf;
-+	u8 status;
-+
-+	MSG(WRITE, "mtk_nand_exec_write_page, page: 0x%x\n", u4RowAddr);
-+
-+	buf = pPageBuf;
-+
-+	if (mtk_nand_ready_for_write(chip, u4RowAddr, 0, true, buf)) {
-+		mtk_nand_write_fdm_data(chip, pFDMBuf, u4SecNum);
-+		(void)mtk_nand_write_page_data(mtd, buf, u4PageSize);
-+		(void)mtk_nand_check_RW_count(u4PageSize);
-+		mtk_nand_stop_write();
-+		(void)mtk_nand_set_command(NAND_CMD_PAGEPROG);
-+		while (DRV_Reg32(NFI_STA_REG32) & STA_NAND_BUSY) ;
-+	}
-+
-+	status = chip->waitfunc(mtd, chip);
-+	if (status & NAND_STATUS_FAIL)
-+		return -EIO;
-+	return 0;
-+}
-+
-+static int
-+get_start_end_block(struct mtd_info *mtd, int block, int *start_blk, int *end_blk)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int i;
-+
-+	*start_blk = 0;
-+        for (i = 0; i <= part_num; i++)
-+        {
-+		if (i == part_num)
-+		{
-+			// try the last reset partition
-+			*end_blk = (chip->chipsize >> chip->phys_erase_shift) - 1;
-+			if (*start_blk <= *end_blk)
-+			{
-+				if ((block >= *start_blk) && (block <= *end_blk))
-+					break;
-+			}
-+		}
-+		// skip All partition entry
-+		else if (g_pasStatic_Partition[i].size == MTDPART_SIZ_FULL)
-+		{
-+			continue;
-+		}
-+                *end_blk = *start_blk + (g_pasStatic_Partition[i].size >> chip->phys_erase_shift) - 1;
-+                if ((block >= *start_blk) && (block <= *end_blk))
-+                        break;
-+                *start_blk = *end_blk + 1;
-+        }
-+        if (*start_blk > *end_blk)
-+	{
-+                return -1;
-+	}
-+	return 0;
-+}
-+
-+static int
-+block_remap(struct mtd_info *mtd, int block)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int start_blk, end_blk;
-+	int j, block_offset;
-+	int bad_block = 0;
-+
-+	if (chip->bbt == NULL) {
-+		printk("ERROR!! no bbt table for block_remap\n");
-+		return -1;
-+	}
-+
-+	if (get_start_end_block(mtd, block, &start_blk, &end_blk) < 0) {
-+		printk("ERROR!! can not find start_blk and end_blk\n");
-+		return -1;
-+	}
-+
-+	block_offset = block - start_blk;
-+	for (j = start_blk; j <= end_blk;j++) {
-+		if (((chip->bbt[j >> 2] >> ((j<<1) & 0x6)) & 0x3) == 0x0) {
-+			if (!block_offset)
-+				break;
-+			block_offset--;
-+		} else {
-+			bad_block++;
-+		}
-+	}
-+	if (j <= end_blk) {
-+		return j;
-+	} else {
-+		// remap to the bad block
-+		for (j = end_blk; bad_block > 0; j--)
-+		{
-+			if (((chip->bbt[j >> 2] >> ((j<<1) & 0x6)) & 0x3) != 0x0)
-+			{
-+				bad_block--;
-+				if (bad_block <= block_offset)
-+					return j;
-+			}
-+		}
-+	}
-+
-+	printk("Error!! block_remap error\n");
-+	return -1;
-+}
-+
-+int
-+check_block_remap(struct mtd_info *mtd, int block)
-+{
-+	if (shift_on_bbt)
-+		return  block_remap(mtd, block);
-+	else
-+		return block;
-+}
-+EXPORT_SYMBOL(check_block_remap);
-+
-+
-+static int
-+write_next_on_fail(struct mtd_info *mtd, char *write_buf, int page, int * to_blk)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int i, j, to_page = 0, first_page;
-+	char *buf, *oob;
-+	int start_blk = 0, end_blk;
-+	int mapped_block;
-+	int page_per_block_bit = chip->phys_erase_shift - chip->page_shift;
-+	int block = page >> page_per_block_bit;
-+
-+	// find next available block in the same MTD partition 
-+	mapped_block = block_remap(mtd, block);
-+	if (mapped_block == -1)
-+		return NAND_STATUS_FAIL;
-+
-+	get_start_end_block(mtd, block, &start_blk, &end_blk);
-+
-+	buf = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL | GFP_DMA);
-+	if (buf == NULL)
-+		return -1;
-+
-+	oob = buf + mtd->writesize;
-+	for ((*to_blk) = block + 1; (*to_blk) <= end_blk ; (*to_blk)++)	{
-+		if (nand_bbt_get(mtd, (*to_blk) << page_per_block_bit) == 0) {
-+			int status;
-+			status = mtk_nand_erase_hw(mtd, (*to_blk) << page_per_block_bit);
-+			if (status & NAND_STATUS_FAIL)	{
-+				mtk_nand_block_markbad_hw(mtd, (*to_blk) << chip->phys_erase_shift);
-+				nand_bbt_set(mtd, (*to_blk) << page_per_block_bit, 0x3);
-+			} else {
-+				/* good block */
-+				to_page = (*to_blk) << page_per_block_bit;
-+				break;
-+			}
-+		}
-+	}
-+
-+	if (!to_page) {
-+		kfree(buf);
-+		return -1;
-+	}
-+
-+	first_page = (page >> page_per_block_bit) << page_per_block_bit;
-+	for (i = 0; i < (1 << page_per_block_bit); i++) {
-+		if ((first_page + i) != page) {
-+			mtk_nand_read_oob_hw(mtd, chip, (first_page+i));
-+			for (j = 0; j < mtd->oobsize; j++)
-+				if (chip->oob_poi[j] != (unsigned char)0xff)
-+					break;
-+			if (j < mtd->oobsize)	{
-+				mtk_nand_exec_read_page(mtd, (first_page+i), mtd->writesize, buf, oob);
-+				memset(oob, 0xff, mtd->oobsize);
-+				if (mtk_nand_exec_write_page(mtd, to_page + i, mtd->writesize, (u8 *)buf, oob) != 0) {
-+					int ret, new_blk = 0;
-+					nand_bbt_set(mtd, to_page, 0x3);
-+					ret =  write_next_on_fail(mtd, buf, to_page + i, &new_blk);
-+					if (ret) {
-+						kfree(buf);
-+						mtk_nand_block_markbad_hw(mtd, to_page << chip->page_shift);
-+						return ret;
-+					}
-+					mtk_nand_block_markbad_hw(mtd, to_page << chip->page_shift);
-+					*to_blk = new_blk;
-+					to_page = ((*to_blk) <<  page_per_block_bit);
-+				}
-+			}
-+		} else {
-+			memset(chip->oob_poi, 0xff, mtd->oobsize);
-+			if (mtk_nand_exec_write_page(mtd, to_page + i, mtd->writesize, (u8 *)write_buf, chip->oob_poi) != 0) {
-+				int ret, new_blk = 0;
-+				nand_bbt_set(mtd, to_page, 0x3);
-+				ret =  write_next_on_fail(mtd, write_buf, to_page + i, &new_blk);
-+				if (ret) {
-+					kfree(buf);
-+					mtk_nand_block_markbad_hw(mtd, to_page << chip->page_shift);
-+					return ret;
-+				}
-+				mtk_nand_block_markbad_hw(mtd, to_page << chip->page_shift);
-+				*to_blk = new_blk;
-+				to_page = ((*to_blk) <<  page_per_block_bit);
-+			}
-+		}
-+	}
-+
-+	kfree(buf);
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, uint32_t offset,
-+		int data_len, const u8 * buf, int oob_required, int page, int raw)
-+{
-+	int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	int block = page / page_per_block;
-+	u16 page_in_block = page % page_per_block;
-+	int mapped_block = block;
-+
-+#if defined(MTK_NAND_BMT)
-+	mapped_block = get_mapping_block_index(block);
-+	// write bad index into oob
-+	if (mapped_block != block)
-+		set_bad_index_to_oob(chip->oob_poi, block);
-+	else
-+		set_bad_index_to_oob(chip->oob_poi, FAKE_INDEX);
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1)
-+			return NAND_STATUS_FAIL;
-+		if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+			return NAND_STATUS_FAIL;
-+	}
-+#endif
-+	do {
-+		if (mtk_nand_exec_write_page(mtd, page_in_block + mapped_block * page_per_block, mtd->writesize, (u8 *)buf, chip->oob_poi)) {
-+			MSG(INIT, "write fail at block: 0x%x, page: 0x%x\n", mapped_block, page_in_block);
-+#if defined(MTK_NAND_BMT)
-+			if (update_bmt((page_in_block + mapped_block * page_per_block) << chip->page_shift, UPDATE_WRITE_FAIL, (u8 *) buf, chip->oob_poi)) {
-+				MSG(INIT, "Update BMT success\n");
-+				return 0;
-+			} else {
-+				MSG(INIT, "Update BMT fail\n");
-+				return -EIO;
-+			}
-+#else
-+			{
-+				int new_blk;
-+				nand_bbt_set(mtd, page_in_block + mapped_block * page_per_block, 0x3);
-+				if (write_next_on_fail(mtd, (char *)buf, page_in_block + mapped_block * page_per_block, &new_blk) != 0)
-+				{
-+				mtk_nand_block_markbad_hw(mtd, (page_in_block + mapped_block * page_per_block) << chip->page_shift);
-+				return NAND_STATUS_FAIL;
-+				}
-+				mtk_nand_block_markbad_hw(mtd, (page_in_block + mapped_block * page_per_block) << chip->page_shift);
-+				break;
-+			}
-+#endif
-+		} else
-+			break;
-+	} while(1);
-+
-+	return 0;
-+}
-+
-+static void
-+mtk_nand_command_bp(struct mtd_info *mtd, unsigned int command, int column, int page_addr)
-+{
-+	struct nand_chip *nand = mtd->priv;
-+
-+	switch (command) {
-+	case NAND_CMD_SEQIN:
-+		memset(g_kCMD.au1OOB, 0xFF, sizeof(g_kCMD.au1OOB));
-+		g_kCMD.pDataBuf = NULL;
-+		g_kCMD.u4RowAddr = page_addr;
-+		g_kCMD.u4ColAddr = column;
-+		break;
-+
-+	case NAND_CMD_PAGEPROG:
-+		if (g_kCMD.pDataBuf || (0xFF != g_kCMD.au1OOB[nand_badblock_offset])) {
-+			u8 *pDataBuf = g_kCMD.pDataBuf ? g_kCMD.pDataBuf : nand->buffers->databuf;
-+			mtk_nand_exec_write_page(mtd, g_kCMD.u4RowAddr, mtd->writesize, pDataBuf, g_kCMD.au1OOB);
-+			g_kCMD.u4RowAddr = (u32) - 1;
-+			g_kCMD.u4OOBRowAddr = (u32) - 1;
-+		}
-+		break;
-+
-+	case NAND_CMD_READOOB:
-+		g_kCMD.u4RowAddr = page_addr;
-+		g_kCMD.u4ColAddr = column + mtd->writesize;
-+		break;
-+
-+	case NAND_CMD_READ0:
-+		g_kCMD.u4RowAddr = page_addr;
-+		g_kCMD.u4ColAddr = column;
-+		break;
-+
-+	case NAND_CMD_ERASE1:
-+		nand->state=FL_ERASING;
-+		(void)mtk_nand_reset();
-+		mtk_nand_set_mode(CNFG_OP_ERASE);
-+		(void)mtk_nand_set_command(NAND_CMD_ERASE1);
-+		(void)mtk_nand_set_address(0, page_addr, 0, devinfo.addr_cycle - 2);
-+		break;
-+
-+	case NAND_CMD_ERASE2:
-+		(void)mtk_nand_set_command(NAND_CMD_ERASE2);
-+		while (DRV_Reg32(NFI_STA_REG32) & STA_NAND_BUSY)
-+			;
-+		break;
-+
-+	case NAND_CMD_STATUS:
-+		(void)mtk_nand_reset();
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_BYTE_RW);
-+		mtk_nand_set_mode(CNFG_OP_SRD);
-+		mtk_nand_set_mode(CNFG_READ_EN);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		(void)mtk_nand_set_command(NAND_CMD_STATUS);
-+		NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_NOB_MASK);
-+		mb();
-+		DRV_WriteReg16(NFI_CON_REG16, CON_NFI_SRD | (1 << CON_NFI_NOB_SHIFT));
-+		g_bcmdstatus = true;
-+		break;
-+
-+	case NAND_CMD_RESET:
-+		(void)mtk_nand_reset();
-+		DRV_WriteReg16(NFI_INTR_EN_REG16, INTR_RST_DONE_EN);
-+		(void)mtk_nand_set_command(NAND_CMD_RESET);
-+		DRV_WriteReg16(NFI_BASE+0x44, 0xF1);
-+		while(!(DRV_Reg16(NFI_INTR_REG16)&INTR_RST_DONE_EN))
-+			;
-+		break;
-+
-+	case NAND_CMD_READID:
-+		mtk_nand_reset();
-+		/* Disable HW ECC */
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_READ_EN | CNFG_BYTE_RW);
-+		(void)mtk_nand_reset();
-+		mb();
-+		mtk_nand_set_mode(CNFG_OP_SRD);
-+		(void)mtk_nand_set_command(NAND_CMD_READID);
-+		(void)mtk_nand_set_address(0, 0, 1, 0);
-+		DRV_WriteReg16(NFI_CON_REG16, CON_NFI_SRD);
-+		while (DRV_Reg32(NFI_STA_REG32) & STA_DATAR_STATE)
-+			;
-+		break;
-+
-+	default:
-+		BUG();
-+		break;
-+	}
-+}
-+
-+static void
-+mtk_nand_select_chip(struct mtd_info *mtd, int chip)
-+{
-+	if ((chip == -1) && (false == g_bInitDone)) {
-+		struct nand_chip *nand = mtd->priv;
-+		struct mtk_nand_host *host = nand->priv;
-+		struct mtk_nand_host_hw *hw = host->hw;
-+		u32 spare_per_sector = mtd->oobsize / (mtd->writesize / 512);
-+		u32 ecc_bit = 4;
-+		u32 spare_bit = PAGEFMT_SPARE_16;
-+
-+		if (spare_per_sector >= 28) {
-+			spare_bit = PAGEFMT_SPARE_28;
-+			ecc_bit = 12;
-+			spare_per_sector = 28;
-+		} else if (spare_per_sector >= 27) {
-+			spare_bit = PAGEFMT_SPARE_27;
-+			ecc_bit = 8;
-+			spare_per_sector = 27;
-+		} else if (spare_per_sector >= 26) {
-+			spare_bit = PAGEFMT_SPARE_26;
-+			ecc_bit = 8;
-+			spare_per_sector = 26;
-+		} else if (spare_per_sector >= 16) {
-+			spare_bit = PAGEFMT_SPARE_16;
-+			ecc_bit = 4;
-+			spare_per_sector = 16;
-+		} else {
-+			MSG(INIT, "[NAND]: NFI not support oobsize: %x\n", spare_per_sector);
-+			ASSERT(0);
-+		}
-+		mtd->oobsize = spare_per_sector*(mtd->writesize/512);
-+		MSG(INIT, "[NAND]select ecc bit:%d, sparesize :%d spare_per_sector=%d\n",ecc_bit,mtd->oobsize,spare_per_sector);
-+		/* Setup PageFormat */
-+		if (4096 == mtd->writesize) {
-+			NFI_SET_REG16(NFI_PAGEFMT_REG16, (spare_bit << PAGEFMT_SPARE_SHIFT) | PAGEFMT_4K);
-+			nand->cmdfunc = mtk_nand_command_bp;
-+		} else if (2048 == mtd->writesize) {
-+			NFI_SET_REG16(NFI_PAGEFMT_REG16, (spare_bit << PAGEFMT_SPARE_SHIFT) | PAGEFMT_2K);
-+			nand->cmdfunc = mtk_nand_command_bp;
-+		}
-+		ECC_Config(hw,ecc_bit);
-+		g_bInitDone = true;
-+	}
-+	switch (chip) {
-+	case -1:
-+		break;
-+	case 0:
-+	case 1:
-+		/*  Jun Shen, 2011.04.13  */
-+		/* Note: MT6577 EVB NAND  is mounted on CS0, but FPGA is CS1  */
-+		DRV_WriteReg16(NFI_CSEL_REG16, chip);
-+		/*  Jun Shen, 2011.04.13 */
-+		break;
-+	}
-+}
-+
-+static uint8_t
-+mtk_nand_read_byte(struct mtd_info *mtd)
-+{
-+	uint8_t retval = 0;
-+
-+	if (!mtk_nand_pio_ready()) {
-+		printk("pio ready timeout\n");
-+		retval = false;
-+	}
-+
-+	if (g_bcmdstatus) {
-+		retval = DRV_Reg8(NFI_DATAR_REG32);
-+		NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_NOB_MASK);
-+		mtk_nand_reset();
-+		if (g_bHwEcc) {
-+			NFI_SET_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		} else {
-+			NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		}
-+		g_bcmdstatus = false;
-+	} else
-+		retval = DRV_Reg8(NFI_DATAR_REG32);
-+
-+	return retval;
-+}
-+
-+static void
-+mtk_nand_read_buf(struct mtd_info *mtd, uint8_t * buf, int len)
-+{
-+	struct nand_chip *nand = (struct nand_chip *)mtd->priv;
-+	struct NAND_CMD *pkCMD = &g_kCMD;
-+	u32 u4ColAddr = pkCMD->u4ColAddr;
-+	u32 u4PageSize = mtd->writesize;
-+
-+	if (u4ColAddr < u4PageSize) {
-+		if ((u4ColAddr == 0) && (len >= u4PageSize)) {
-+			mtk_nand_exec_read_page(mtd, pkCMD->u4RowAddr, u4PageSize, buf, pkCMD->au1OOB);
-+			if (len > u4PageSize) {
-+				u32 u4Size = min(len - u4PageSize, sizeof(pkCMD->au1OOB));
-+				memcpy(buf + u4PageSize, pkCMD->au1OOB, u4Size);
-+			}
-+		} else {
-+			mtk_nand_exec_read_page(mtd, pkCMD->u4RowAddr, u4PageSize, nand->buffers->databuf, pkCMD->au1OOB);
-+			memcpy(buf, nand->buffers->databuf + u4ColAddr, len);
-+		}
-+		pkCMD->u4OOBRowAddr = pkCMD->u4RowAddr;
-+	} else {
-+		u32 u4Offset = u4ColAddr - u4PageSize;
-+		u32 u4Size = min(len - u4Offset, sizeof(pkCMD->au1OOB));
-+		if (pkCMD->u4OOBRowAddr != pkCMD->u4RowAddr) {
-+			mtk_nand_exec_read_page(mtd, pkCMD->u4RowAddr, u4PageSize, nand->buffers->databuf, pkCMD->au1OOB);
-+			pkCMD->u4OOBRowAddr = pkCMD->u4RowAddr;
-+		}
-+		memcpy(buf, pkCMD->au1OOB + u4Offset, u4Size);
-+	}
-+	pkCMD->u4ColAddr += len;
-+}
-+
-+static void
-+mtk_nand_write_buf(struct mtd_info *mtd, const uint8_t * buf, int len)
-+{
-+	struct NAND_CMD *pkCMD = &g_kCMD;
-+	u32 u4ColAddr = pkCMD->u4ColAddr;
-+	u32 u4PageSize = mtd->writesize;
-+	int i4Size, i;
-+
-+	if (u4ColAddr >= u4PageSize) {
-+		u32 u4Offset = u4ColAddr - u4PageSize;
-+		u8 *pOOB = pkCMD->au1OOB + u4Offset;
-+		i4Size = min(len, (int)(sizeof(pkCMD->au1OOB) - u4Offset));
-+		for (i = 0; i < i4Size; i++) {
-+			pOOB[i] &= buf[i];
-+		}
-+	} else {
-+		pkCMD->pDataBuf = (u8 *) buf;
-+	}
-+
-+	pkCMD->u4ColAddr += len;
-+}
-+
-+static int
-+mtk_nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t * buf, int oob_required, int page)
-+{
-+	mtk_nand_write_buf(mtd, buf, mtd->writesize);
-+	mtk_nand_write_buf(mtd, chip->oob_poi, mtd->oobsize);
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, uint8_t * buf, int oob_required, int page)
-+{
-+	struct NAND_CMD *pkCMD = &g_kCMD;
-+	u32 u4ColAddr = pkCMD->u4ColAddr;
-+	u32 u4PageSize = mtd->writesize;
-+
-+	if (u4ColAddr == 0) {
-+		mtk_nand_exec_read_page(mtd, pkCMD->u4RowAddr, u4PageSize, buf, chip->oob_poi);
-+		pkCMD->u4ColAddr += u4PageSize + mtd->oobsize;
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, u8 * buf, int page)
-+{
-+	int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	int block = page / page_per_block;
-+	u16 page_in_block = page % page_per_block;
-+	int mapped_block = block;
-+
-+#if defined (MTK_NAND_BMT)
-+	mapped_block = get_mapping_block_index(block);
-+	if (mtk_nand_exec_read_page(mtd, page_in_block + mapped_block * page_per_block,
-+			mtd->writesize, buf, chip->oob_poi))
-+		return 0;
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1)
-+			return NAND_STATUS_FAIL;
-+		if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+			return NAND_STATUS_FAIL;
-+	}
-+
-+	if (mtk_nand_exec_read_page(mtd, page_in_block + mapped_block * page_per_block, mtd->writesize, buf, chip->oob_poi))
-+		return 0;
-+	else
-+		return -EIO;
-+#endif
-+}
-+
-+int
-+mtk_nand_erase_hw(struct mtd_info *mtd, int page)
-+{
-+	struct nand_chip *chip = (struct nand_chip *)mtd->priv;
-+
-+	chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
-+	chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
-+
-+	return chip->waitfunc(mtd, chip);
-+}
-+
-+static int
-+mtk_nand_erase(struct mtd_info *mtd, int page)
-+{
-+	// get mapping 
-+	struct nand_chip *chip = mtd->priv;
-+	int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	int page_in_block = page % page_per_block;
-+	int block = page / page_per_block;
-+	int mapped_block = block;
-+
-+#if defined(MTK_NAND_BMT)    
-+	mapped_block = get_mapping_block_index(block);
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1)
-+			return NAND_STATUS_FAIL;
-+		if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+			return NAND_STATUS_FAIL;
-+	}
-+#endif
-+
-+	do {
-+		int status = mtk_nand_erase_hw(mtd, page_in_block + page_per_block * mapped_block);
-+
-+		if (status & NAND_STATUS_FAIL) {
-+#if defined (MTK_NAND_BMT)    	
-+			if (update_bmt( (page_in_block + mapped_block * page_per_block) << chip->page_shift,
-+					UPDATE_ERASE_FAIL, NULL, NULL))
-+			{
-+				MSG(INIT, "Erase fail at block: 0x%x, update BMT success\n", mapped_block);
-+				return 0;
-+			} else {
-+				MSG(INIT, "Erase fail at block: 0x%x, update BMT fail\n", mapped_block);
-+				return NAND_STATUS_FAIL;
-+			}
-+#else
-+			mtk_nand_block_markbad_hw(mtd, (page_in_block + mapped_block * page_per_block) << chip->page_shift);
-+			nand_bbt_set(mtd, page_in_block + mapped_block * page_per_block, 0x3);
-+			if (shift_on_bbt) {
-+				mapped_block = block_remap(mtd, block);
-+				if (mapped_block == -1)
-+					return NAND_STATUS_FAIL;
-+				if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+					return NAND_STATUS_FAIL;
-+			} else
-+				return NAND_STATUS_FAIL;
-+#endif
-+		} else
-+			break;
-+	} while(1);
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_read_oob_raw(struct mtd_info *mtd, uint8_t * buf, int page_addr, int len)
-+{
-+	struct nand_chip *chip = (struct nand_chip *)mtd->priv;
-+	u32 col_addr = 0;
-+	u32 sector = 0;
-+	int res = 0;
-+	u32 colnob = 2, rawnob = devinfo.addr_cycle - 2;
-+	int randomread = 0;
-+	int read_len = 0;
-+	int sec_num = 1<<(chip->page_shift-9);
-+	int spare_per_sector = mtd->oobsize/sec_num;
-+
-+	if (len >  NAND_MAX_OOBSIZE || len % OOB_AVAI_PER_SECTOR || !buf) {
-+		printk(KERN_WARNING "[%s] invalid parameter, len: %d, buf: %p\n", __FUNCTION__, len, buf);
-+		return -EINVAL;
-+	}
-+	if (len > spare_per_sector)
-+		randomread = 1;
-+	if (!randomread || !(devinfo.advancedmode & RAMDOM_READ)) {
-+		while (len > 0) {
-+			read_len = min(len, spare_per_sector);
-+			col_addr = NAND_SECTOR_SIZE + sector * (NAND_SECTOR_SIZE + spare_per_sector); // TODO: Fix this hard-code 16
-+			if (!mtk_nand_ready_for_read(chip, page_addr, col_addr, false, NULL)) {
-+				printk(KERN_WARNING "mtk_nand_ready_for_read return failed\n");
-+				res = -EIO;
-+				goto error;
-+			}
-+			if (!mtk_nand_mcu_read_data(buf + spare_per_sector * sector, read_len)) {
-+				printk(KERN_WARNING "mtk_nand_mcu_read_data return failed\n");
-+				res = -EIO;
-+				goto error;
-+			}
-+			mtk_nand_check_RW_count(read_len);
-+			mtk_nand_stop_read();
-+			sector++;
-+			len -= read_len;
-+		}
-+	} else {
-+		col_addr = NAND_SECTOR_SIZE;
-+		if (chip->options & NAND_BUSWIDTH_16)
-+			col_addr /= 2;
-+		if (!mtk_nand_reset())
-+			goto error;
-+		mtk_nand_set_mode(0x6000);
-+		NFI_SET_REG16(NFI_CNFG_REG16, CNFG_READ_EN);
-+		DRV_WriteReg16(NFI_CON_REG16, 4 << CON_NFI_SEC_SHIFT);
-+
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_AHB);
-+		NFI_CLN_REG16(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+
-+		mtk_nand_set_autoformat(false);
-+
-+		if (!mtk_nand_set_command(NAND_CMD_READ0))
-+			goto error;
-+		//1 FIXED ME: For Any Kind of AddrCycle
-+		if (!mtk_nand_set_address(col_addr, page_addr, colnob, rawnob))
-+			goto error;
-+		if (!mtk_nand_set_command(NAND_CMD_READSTART))
-+			goto error;
-+		if (!mtk_nand_status_ready(STA_NAND_BUSY))
-+			goto error;
-+		read_len = min(len, spare_per_sector);
-+		if (!mtk_nand_mcu_read_data(buf + spare_per_sector * sector, read_len)) {
-+			printk(KERN_WARNING "mtk_nand_mcu_read_data return failed first 16\n");
-+			res = -EIO;
-+			goto error;
-+		}
-+		sector++;
-+		len -= read_len;
-+		mtk_nand_stop_read();
-+		while (len > 0) {
-+			read_len = min(len,  spare_per_sector);
-+			if (!mtk_nand_set_command(0x05))
-+				goto error;
-+			col_addr = NAND_SECTOR_SIZE + sector * (NAND_SECTOR_SIZE + spare_per_sector);
-+			if (chip->options & NAND_BUSWIDTH_16)
-+				col_addr /= 2;
-+			DRV_WriteReg32(NFI_COLADDR_REG32, col_addr);
-+			DRV_WriteReg16(NFI_ADDRNOB_REG16, 2);
-+			DRV_WriteReg16(NFI_CON_REG16, 4 << CON_NFI_SEC_SHIFT);
-+			if (!mtk_nand_status_ready(STA_ADDR_STATE))
-+				goto error;
-+			if (!mtk_nand_set_command(0xE0))
-+				goto error;
-+			if (!mtk_nand_status_ready(STA_NAND_BUSY))
-+				goto error;
-+			if (!mtk_nand_mcu_read_data(buf + spare_per_sector * sector, read_len)) {
-+				printk(KERN_WARNING "mtk_nand_mcu_read_data return failed first 16\n");
-+				res = -EIO;
-+				goto error;
-+			}
-+			mtk_nand_stop_read();
-+			sector++;
-+			len -= read_len;
-+		}
-+	}
-+error:
-+	NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_BRD);
-+	return res;
-+}
-+
-+static int
-+mtk_nand_write_oob_raw(struct mtd_info *mtd, const uint8_t * buf, int page_addr, int len)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	u32 col_addr = 0;
-+	u32 sector = 0;
-+	int write_len = 0;
-+	int status;
-+	int sec_num = 1<<(chip->page_shift-9);
-+	int spare_per_sector = mtd->oobsize/sec_num;
-+
-+	if (len >  NAND_MAX_OOBSIZE || len % OOB_AVAI_PER_SECTOR || !buf) {
-+		printk(KERN_WARNING "[%s] invalid parameter, len: %d, buf: %p\n", __FUNCTION__, len, buf);
-+		return -EINVAL;
-+	}
-+
-+	while (len > 0) {
-+		write_len = min(len,  spare_per_sector);
-+		col_addr = sector * (NAND_SECTOR_SIZE +  spare_per_sector) + NAND_SECTOR_SIZE;
-+		if (!mtk_nand_ready_for_write(chip, page_addr, col_addr, false, NULL))
-+			return -EIO;
-+		if (!mtk_nand_mcu_write_data(mtd, buf + sector * spare_per_sector, write_len))
-+			return -EIO;
-+		(void)mtk_nand_check_RW_count(write_len);
-+		NFI_CLN_REG16(NFI_CON_REG16, CON_NFI_BWR);
-+		(void)mtk_nand_set_command(NAND_CMD_PAGEPROG);
-+		while (DRV_Reg32(NFI_STA_REG32) & STA_NAND_BUSY)
-+			;
-+		status = chip->waitfunc(mtd, chip);
-+		if (status & NAND_STATUS_FAIL) {
-+			printk(KERN_INFO "status: %d\n", status);
-+			return -EIO;
-+		}
-+		len -= write_len;
-+		sector++;
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_write_oob_hw(struct mtd_info *mtd, struct nand_chip *chip, int page)
-+{
-+	int i, iter;
-+	int sec_num = 1<<(chip->page_shift-9);
-+	int spare_per_sector = mtd->oobsize/sec_num;
-+
-+	memcpy(local_oob_buf, chip->oob_poi, mtd->oobsize);
-+
-+	// copy ecc data
-+	for (i = 0; i < layout->eccbytes; i++) {
-+		iter = (i / (spare_per_sector-OOB_AVAI_PER_SECTOR)) *  spare_per_sector + OOB_AVAI_PER_SECTOR + i % (spare_per_sector-OOB_AVAI_PER_SECTOR);
-+		local_oob_buf[iter] = chip->oob_poi[layout->eccpos[i]];
-+	}
-+
-+	// copy FDM data
-+	for (i = 0; i < sec_num; i++)
-+		memcpy(&local_oob_buf[i * spare_per_sector], &chip->oob_poi[i * OOB_AVAI_PER_SECTOR], OOB_AVAI_PER_SECTOR);
-+
-+	return mtk_nand_write_oob_raw(mtd, local_oob_buf, page, mtd->oobsize);
-+}
-+
-+static int mtk_nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
-+{
-+	int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	int block = page / page_per_block;
-+	u16 page_in_block = page % page_per_block;
-+	int mapped_block = block;
-+
-+#if defined(MTK_NAND_BMT)
-+	mapped_block = get_mapping_block_index(block);
-+	// write bad index into oob
-+	if (mapped_block != block)
-+		set_bad_index_to_oob(chip->oob_poi, block);
-+	else
-+		set_bad_index_to_oob(chip->oob_poi, FAKE_INDEX);
-+#else
-+	if (shift_on_bbt)
-+	{
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1)
-+			return NAND_STATUS_FAIL;
-+		if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+			return NAND_STATUS_FAIL;
-+	}
-+#endif
-+	do {
-+		if (mtk_nand_write_oob_hw(mtd, chip, page_in_block + mapped_block * page_per_block /* page */)) {
-+			MSG(INIT, "write oob fail at block: 0x%x, page: 0x%x\n", mapped_block, page_in_block);
-+#if defined(MTK_NAND_BMT)      
-+			if (update_bmt((page_in_block + mapped_block * page_per_block) << chip->page_shift,
-+					UPDATE_WRITE_FAIL, NULL, chip->oob_poi))
-+			{
-+				MSG(INIT, "Update BMT success\n");
-+				return 0;
-+			} else {
-+				MSG(INIT, "Update BMT fail\n");
-+				return -EIO;
-+			}
-+#else
-+			mtk_nand_block_markbad_hw(mtd, (page_in_block + mapped_block * page_per_block) << chip->page_shift);
-+			nand_bbt_set(mtd, page_in_block + mapped_block * page_per_block, 0x3);
-+			if (shift_on_bbt) {
-+				mapped_block = block_remap(mtd, mapped_block);
-+				if (mapped_block == -1)
-+					return NAND_STATUS_FAIL;
-+				if (nand_bbt_get(mtd, mapped_block << (chip->phys_erase_shift - chip->page_shift)) != 0x0)
-+					return NAND_STATUS_FAIL;
-+			} else {
-+				return NAND_STATUS_FAIL;
-+			}
-+#endif
-+		} else
-+			break;
-+	} while (1);
-+
-+	return 0;
-+}
-+
-+int
-+mtk_nand_block_markbad_hw(struct mtd_info *mtd, loff_t offset)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int block = (int)offset >> chip->phys_erase_shift;
-+	int page = block * (1 << (chip->phys_erase_shift - chip->page_shift));
-+	u8 buf[8];
-+
-+	memset(buf, 0xFF, 8);
-+	buf[0] = 0;
-+	return  mtk_nand_write_oob_raw(mtd, buf, page, 8);
-+}
-+
-+static int
-+mtk_nand_block_markbad(struct mtd_info *mtd, loff_t offset)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int block = (int)offset >> chip->phys_erase_shift;
-+	int ret;
-+	int mapped_block = block;
-+
-+	nand_get_device(chip, mtd, FL_WRITING);
-+
-+#if defined(MTK_NAND_BMT)    
-+	mapped_block = get_mapping_block_index(block);
-+	ret = mtk_nand_block_markbad_hw(mtd, mapped_block << chip->phys_erase_shift);
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1) {
-+			printk("NAND mark bad failed\n");
-+			nand_release_device(mtd);
-+			return NAND_STATUS_FAIL;
-+		}
-+	}
-+	ret = mtk_nand_block_markbad_hw(mtd, mapped_block << chip->phys_erase_shift);
-+#endif
-+	nand_release_device(mtd);
-+
-+	return ret;
-+}
-+
-+int
-+mtk_nand_read_oob_hw(struct mtd_info *mtd, struct nand_chip *chip, int page)
-+{
-+	int i;
-+	u8 iter = 0;
-+
-+	int sec_num = 1<<(chip->page_shift-9);
-+	int spare_per_sector = mtd->oobsize/sec_num;
-+
-+	if (mtk_nand_read_oob_raw(mtd, chip->oob_poi, page, mtd->oobsize)) {
-+		printk(KERN_ERR "[%s]mtk_nand_read_oob_raw return failed\n", __FUNCTION__);
-+		return -EIO;
-+	}
-+
-+	// adjust to ecc physical layout to memory layout
-+	/*********************************************************/
-+	/* FDM0 | ECC0 | FDM1 | ECC1 | FDM2 | ECC2 | FDM3 | ECC3 */
-+	/*  8B  |  8B  |  8B  |  8B  |  8B  |  8B  |  8B  |  8B  */
-+	/*********************************************************/
-+
-+	memcpy(local_oob_buf, chip->oob_poi, mtd->oobsize);
-+	// copy ecc data
-+	for (i = 0; i < layout->eccbytes; i++) {
-+		iter = (i / (spare_per_sector-OOB_AVAI_PER_SECTOR)) *  spare_per_sector + OOB_AVAI_PER_SECTOR + i % (spare_per_sector-OOB_AVAI_PER_SECTOR);
-+		chip->oob_poi[layout->eccpos[i]] = local_oob_buf[iter];
-+	}
-+
-+	// copy FDM data
-+	for (i = 0; i < sec_num; i++) {
-+		memcpy(&chip->oob_poi[i * OOB_AVAI_PER_SECTOR], &local_oob_buf[i *  spare_per_sector], OOB_AVAI_PER_SECTOR);
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
-+{
-+	int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	int block = page / page_per_block;
-+	u16 page_in_block = page % page_per_block;
-+	int mapped_block = block;
-+
-+#if defined (MTK_NAND_BMT)
-+	mapped_block = get_mapping_block_index(block);
-+	mtk_nand_read_oob_hw(mtd, chip, page_in_block + mapped_block * page_per_block);
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+		if (mapped_block == -1)
-+			return NAND_STATUS_FAIL;
-+		// allow to read oob even if the block is bad
-+	}
-+	if (mtk_nand_read_oob_hw(mtd, chip, page_in_block + mapped_block * page_per_block)!=0)
-+		return -1;
-+#endif
-+	return 0;
-+}
-+
-+int
-+mtk_nand_block_bad_hw(struct mtd_info *mtd, loff_t ofs)
-+{
-+	struct nand_chip *chip = (struct nand_chip *)mtd->priv;
-+	int page_addr = (int)(ofs >> chip->page_shift);
-+	unsigned int page_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
-+	unsigned char oob_buf[8];
-+
-+	page_addr &= ~(page_per_block - 1);
-+	if (mtk_nand_read_oob_raw(mtd, oob_buf, page_addr, sizeof(oob_buf))) {
-+		printk(KERN_WARNING "mtk_nand_read_oob_raw return error\n");
-+		return 1;
-+	}
-+
-+	if (oob_buf[0] != 0xff) {
-+		printk(KERN_WARNING "Bad block detected at 0x%x, oob_buf[0] is 0x%x\n", page_addr, oob_buf[0]);
-+		// dump_nfi();
-+		return 1;
-+	}
-+
-+	return 0;
-+}
-+
-+static int
-+mtk_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
-+{
-+	struct nand_chip *chip = (struct nand_chip *)mtd->priv;
-+	int block = (int)ofs >> chip->phys_erase_shift;
-+	int mapped_block = block;
-+	int ret;
-+
-+#if defined(MTK_NAND_BMT)    
-+	mapped_block = get_mapping_block_index(block);
-+#else
-+	if (shift_on_bbt) {
-+		mapped_block = block_remap(mtd, block);
-+	}
-+#endif
-+
-+	ret = mtk_nand_block_bad_hw(mtd, mapped_block << chip->phys_erase_shift);
-+#if defined (MTK_NAND_BMT)	
-+	if (ret) {
-+		MSG(INIT, "Unmapped bad block: 0x%x\n", mapped_block);
-+		if (update_bmt(mapped_block << chip->phys_erase_shift, UPDATE_UNMAPPED_BLOCK, NULL, NULL)) {
-+			MSG(INIT, "Update BMT success\n");
-+			ret = 0;
-+		} else {
-+			MSG(INIT, "Update BMT fail\n");
-+			ret = 1;
-+		}
-+	}
-+#endif
-+
-+	return ret;
-+}
-+
-+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-+char gacBuf[4096 + 288];
-+
-+static int
-+mtk_nand_verify_buf(struct mtd_info *mtd, const uint8_t * buf, int len)
-+{
-+	struct nand_chip *chip = (struct nand_chip *)mtd->priv;
-+	struct NAND_CMD *pkCMD = &g_kCMD;
-+	u32 u4PageSize = mtd->writesize;
-+	u32 *pSrc, *pDst;
-+	int i;
-+
-+	mtk_nand_exec_read_page(mtd, pkCMD->u4RowAddr, u4PageSize, gacBuf, gacBuf + u4PageSize);
-+
-+	pSrc = (u32 *) buf;
-+	pDst = (u32 *) gacBuf;
-+	len = len / sizeof(u32);
-+	for (i = 0; i < len; ++i) {
-+		if (*pSrc != *pDst) {
-+			MSG(VERIFY, "mtk_nand_verify_buf page fail at page %d\n", pkCMD->u4RowAddr);
-+			return -1;
-+		}
-+		pSrc++;
-+		pDst++;
-+	}
-+
-+	pSrc = (u32 *) chip->oob_poi;
-+	pDst = (u32 *) (gacBuf + u4PageSize);
-+
-+	if ((pSrc[0] != pDst[0]) || (pSrc[1] != pDst[1]) || (pSrc[2] != pDst[2]) || (pSrc[3] != pDst[3]) || (pSrc[4] != pDst[4]) || (pSrc[5] != pDst[5])) {
-+	// TODO: Ask Designer Why?
-+	//(pSrc[6] != pDst[6]) || (pSrc[7] != pDst[7])) 
-+		MSG(VERIFY, "mtk_nand_verify_buf oob fail at page %d\n", pkCMD->u4RowAddr);
-+		MSG(VERIFY, "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", pSrc[0], pSrc[1], pSrc[2], pSrc[3], pSrc[4], pSrc[5], pSrc[6], pSrc[7]);
-+		MSG(VERIFY, "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", pDst[0], pDst[1], pDst[2], pDst[3], pDst[4], pDst[5], pDst[6], pDst[7]);
-+		return -1;
-+	}
-+	return 0;
-+}
-+#endif
-+
-+static void
-+mtk_nand_init_hw(struct mtk_nand_host *host) {
-+	struct mtk_nand_host_hw *hw = host->hw;
-+	u32 data;
-+
-+	data = DRV_Reg32(RALINK_SYSCTL_BASE+0x60);
-+	data &= ~((0x3<<18)|(0x3<<16));
-+	data |= ((0x2<<18) |(0x2<<16));
-+	DRV_WriteReg32(RALINK_SYSCTL_BASE+0x60, data);
-+
-+	MSG(INIT, "Enable NFI Clock\n");
-+	nand_enable_clock();
-+
-+	g_bInitDone = false;
-+	g_kCMD.u4OOBRowAddr = (u32) - 1;
-+
-+	/* Set default NFI access timing control */
-+	DRV_WriteReg32(NFI_ACCCON_REG32, hw->nfi_access_timing);
-+	DRV_WriteReg16(NFI_CNFG_REG16, 0);
-+	DRV_WriteReg16(NFI_PAGEFMT_REG16, 0);
-+
-+	/* Reset the state machine and data FIFO, because flushing FIFO */
-+	(void)mtk_nand_reset();
-+
-+	/* Set the ECC engine */
-+	if (hw->nand_ecc_mode == NAND_ECC_HW) {
-+		MSG(INIT, "%s : Use HW ECC\n", MODULE_NAME);
-+		if (g_bHwEcc)
-+			NFI_SET_REG32(NFI_CNFG_REG16, CNFG_HW_ECC_EN);
-+		ECC_Config(host->hw,4);
-+		mtk_nand_configure_fdm(8);
-+		mtk_nand_configure_lock();
-+	}
-+
-+	NFI_SET_REG16(NFI_IOCON_REG16, 0x47);
-+}
-+
-+static int mtk_nand_dev_ready(struct mtd_info *mtd)
-+{
-+	return !(DRV_Reg32(NFI_STA_REG32) & STA_NAND_BUSY);
-+}
-+
-+#define FACT_BBT_BLOCK_NUM  32 // use the latest 32 BLOCK for factory bbt table
-+#define FACT_BBT_OOB_SIGNATURE  1
-+#define FACT_BBT_SIGNATURE_LEN  7
-+const u8 oob_signature[] = "mtknand";
-+static u8 *fact_bbt = 0;
-+static u32 bbt_size = 0;
-+
-+static int
-+read_fact_bbt(struct mtd_info *mtd, unsigned int page)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+
-+	// read oob
-+	if (mtk_nand_read_oob_hw(mtd, chip, page)==0)
-+	{
-+		if (chip->oob_poi[nand_badblock_offset] != 0xFF)
-+		{
-+			printk("Bad Block on Page %x\n", page);
-+			return -1;
-+		}
-+		if (memcmp(&chip->oob_poi[FACT_BBT_OOB_SIGNATURE], oob_signature, FACT_BBT_SIGNATURE_LEN) != 0)
-+		{
-+			printk("compare signature failed %x\n", page);
-+			return -1;
-+		}
-+		if (mtk_nand_exec_read_page(mtd, page, mtd->writesize, chip->buffers->databuf, chip->oob_poi))
-+		{
-+			printk("Signature matched and data read!\n");
-+			memcpy(fact_bbt, chip->buffers->databuf, (bbt_size <= mtd->writesize)? bbt_size:mtd->writesize);
-+			return 0;
-+		}
-+
-+	}
-+	printk("failed at page %x\n", page);
-+	return -1;
-+}
-+
-+static int
-+load_fact_bbt(struct mtd_info *mtd)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	int i;
-+	u32 total_block;
-+
-+	total_block = 1 << (chip->chip_shift - chip->phys_erase_shift);
-+	bbt_size = total_block >> 2;
-+
-+	if ((!fact_bbt) && (bbt_size))
-+		fact_bbt = (u8 *)kmalloc(bbt_size, GFP_KERNEL);
-+	if (!fact_bbt)
-+		return -1;
-+
-+	for (i = total_block - 1; i >= (total_block - FACT_BBT_BLOCK_NUM); i--)
-+	{
-+		if (read_fact_bbt(mtd, i << (chip->phys_erase_shift - chip->page_shift)) == 0)
-+		{
-+			printk("load_fact_bbt success %d\n", i);
-+			return 0;
-+		}
-+
-+	}
-+	printk("load_fact_bbt failed\n");
-+	return -1;
-+}
-+
-+static int oob_mtk_ooblayout_ecc(struct mtd_info *mtd, int section,
-+				struct mtd_oob_region *oobregion)
-+{
-+	oobregion->length = 8;
-+	oobregion->offset = layout->eccpos[section * 8];
-+
-+	return 0;
-+}
-+
-+static int oob_mtk_ooblayout_free(struct mtd_info *mtd, int section,
-+				 struct mtd_oob_region *oobregion)
-+{
-+	if (section >= (layout->eccbytes / 8)) {
-+		return -ERANGE;
-+	}
-+	oobregion->offset = layout->oobfree[section].offset;
-+	oobregion->length = layout->oobfree[section].length;
-+
-+	return 0;
-+}
-+
-+
-+static const struct mtd_ooblayout_ops oob_mtk_ops = {
-+	.ecc = oob_mtk_ooblayout_ecc,
-+	.free = oob_mtk_ooblayout_free,
-+};
-+
-+static int
-+mtk_nand_probe(struct platform_device *pdev)
-+{
-+	struct mtd_part_parser_data ppdata;
-+	struct mtk_nand_host_hw *hw;
-+	struct nand_chip *nand_chip;
-+	struct mtd_info *mtd;
-+	u8 ext_id1, ext_id2, ext_id3;
-+	int err = 0;
-+	int id;
-+	u32 ext_id;
-+	int i;
-+	u32 data;
-+
-+	data = DRV_Reg32(RALINK_SYSCTL_BASE+0x60);
-+	data &= ~((0x3<<18)|(0x3<<16));
-+	data |= ((0x2<<18) |(0x2<<16));
-+	DRV_WriteReg32(RALINK_SYSCTL_BASE+0x60, data);
-+
-+	hw = &mt7621_nand_hw;
-+	BUG_ON(!hw);
-+	/* Allocate memory for the device structure (and zero it) */
-+	host = kzalloc(sizeof(struct mtk_nand_host), GFP_KERNEL);
-+	if (!host) {
-+		MSG(INIT, "mtk_nand: failed to allocate device structure.\n");
-+		return -ENOMEM;
-+	}
-+
-+	host->hw = hw;
-+
-+	/* init mtd data structure */
-+	nand_chip = &host->nand_chip;
-+	nand_chip->priv = host;     /* link the private data structures */
-+
-+	mtd = host->mtd = &nand_chip->mtd;
-+	mtd->priv = nand_chip;
-+	mtd->owner = THIS_MODULE;
-+	mtd->name  = "MT7621-NAND";
-+
-+	hw->nand_ecc_mode = NAND_ECC_HW;
-+
-+	/* Set address of NAND IO lines */
-+	nand_chip->IO_ADDR_R = (void __iomem *)NFI_DATAR_REG32;
-+	nand_chip->IO_ADDR_W = (void __iomem *)NFI_DATAW_REG32;
-+	nand_chip->chip_delay = 20; /* 20us command delay time */
-+	nand_chip->ecc.mode = hw->nand_ecc_mode;    /* enable ECC */
-+	nand_chip->ecc.strength = 1;
-+	nand_chip->read_byte = mtk_nand_read_byte;
-+	nand_chip->read_buf = mtk_nand_read_buf;
-+	nand_chip->write_buf = mtk_nand_write_buf;
-+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-+	nand_chip->verify_buf = mtk_nand_verify_buf;
-+#endif
-+	nand_chip->select_chip = mtk_nand_select_chip;
-+	nand_chip->dev_ready = mtk_nand_dev_ready;
-+	nand_chip->cmdfunc = mtk_nand_command_bp;
-+	nand_chip->ecc.read_page = mtk_nand_read_page_hwecc;
-+	nand_chip->ecc.write_page = mtk_nand_write_page_hwecc;
-+
-+	mtd_set_ooblayout(mtd, &oob_mtk_ops);
-+	nand_chip->ecc.size = hw->nand_ecc_size;    //2048
-+	nand_chip->ecc.bytes = hw->nand_ecc_bytes;  //32
-+
-+	// For BMT, we need to revise driver architecture
-+	nand_chip->write_page = mtk_nand_write_page;
-+	nand_chip->ecc.write_oob = mtk_nand_write_oob;
-+	nand_chip->block_markbad = mtk_nand_block_markbad;   // need to add nand_get_device()/nand_release_device().
-+	nand_chip->read_page = mtk_nand_read_page;
-+	nand_chip->ecc.read_oob = mtk_nand_read_oob;
-+	nand_chip->block_bad = mtk_nand_block_bad;
-+        nand_chip->cmd_ctrl = mtk_nfc_cmd_ctrl;
-+
-+	//Qwert:Add for Uboot
-+	mtk_nand_init_hw(host);
-+	/* Select the device */
-+	nand_chip->select_chip(mtd, NFI_DEFAULT_CS);
-+
-+	/*
-+	* Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
-+	* after power-up
-+	*/
-+	nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-+
-+	memset(&devinfo, 0 , sizeof(flashdev_info));
-+
-+	/* Send the command for reading device ID */
-+
-+	nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
-+
-+	/* Read manufacturer and device IDs */
-+	manu_id = nand_chip->read_byte(mtd);
-+	dev_id = nand_chip->read_byte(mtd);
-+	id = dev_id | (manu_id << 8);
-+	        ext_id1 = nand_chip->read_byte(mtd);
-+		    ext_id2 = nand_chip->read_byte(mtd);
-+		        ext_id3 = nand_chip->read_byte(mtd);
-+			    ext_id = ext_id1 << 16 | ext_id2 << 8 | ext_id3;
-+	if (!get_device_info(id, ext_id, &devinfo)) {
-+		u32 chip_mode = RALINK_REG(RALINK_SYSCTL_BASE+0x010)&0x0F;
-+		MSG(INIT, "Not Support this Device! \r\n");
-+		memset(&devinfo, 0 , sizeof(flashdev_info));
-+		MSG(INIT, "chip_mode=%08X\n",chip_mode);
-+
-+		/* apply bootstrap first */
-+		devinfo.addr_cycle = 5;
-+		devinfo.iowidth = 8;
-+
-+		switch (chip_mode) {
-+		case 10:
-+			devinfo.pagesize = 2048;
-+			devinfo.sparesize = 128;
-+			devinfo.totalsize = 128;
-+			devinfo.blocksize = 128;
-+			break;
-+		case 11:
-+			devinfo.pagesize = 4096;
-+			devinfo.sparesize = 128;
-+			devinfo.totalsize = 1024;
-+			devinfo.blocksize = 256;
-+			break;
-+		case 12:
-+			devinfo.pagesize = 4096;
-+			devinfo.sparesize = 224;
-+			devinfo.totalsize = 2048;
-+			devinfo.blocksize = 512;
-+			break;
-+		default:
-+		case 1:
-+			devinfo.pagesize = 2048;
-+			devinfo.sparesize = 64;
-+			devinfo.totalsize = 128;
-+			devinfo.blocksize = 128;
-+			break;
-+		}
-+
-+		devinfo.timmingsetting = NFI_DEFAULT_ACCESS_TIMING;
-+		devinfo.devciename[0] = 'U';
-+		devinfo.advancedmode = 0;
-+	}
-+	mtd->writesize = devinfo.pagesize;
-+	mtd->erasesize = (devinfo.blocksize<<10);
-+	mtd->oobsize = devinfo.sparesize;
-+
-+	nand_chip->chipsize = (devinfo.totalsize<<20);
-+	nand_chip->page_shift = ffs(mtd->writesize) - 1;
-+	nand_chip->pagemask = (nand_chip->chipsize >> nand_chip->page_shift) - 1;
-+	nand_chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
-+	nand_chip->chip_shift = ffs(nand_chip->chipsize) - 1;//0x1C;//ffs(nand_chip->chipsize) - 1;
-+        nand_chip->cmd_ctrl = mtk_nfc_cmd_ctrl;
-+
-+	if (devinfo.pagesize == 4096)
-+		layout = &nand_oob_128;
-+	else if (devinfo.pagesize == 2048)
-+		layout = &nand_oob_64;
-+	else if (devinfo.pagesize == 512)
-+		layout = &nand_oob_16;
-+
-+	layout->eccbytes = devinfo.sparesize-OOB_AVAI_PER_SECTOR*(devinfo.pagesize/NAND_SECTOR_SIZE);
-+	for (i = 0; i < layout->eccbytes; i++)
-+		layout->eccpos[i]=OOB_AVAI_PER_SECTOR*(devinfo.pagesize/NAND_SECTOR_SIZE)+i;
-+
-+	MSG(INIT, "Support this Device in MTK table! %x \r\n", id);
-+	hw->nfi_bus_width = devinfo.iowidth;
-+	DRV_WriteReg32(NFI_ACCCON_REG32, devinfo.timmingsetting);
-+
-+	/* 16-bit bus width */
-+	if (hw->nfi_bus_width == 16) {
-+		MSG(INIT, "%s : Set the 16-bit I/O settings!\n", MODULE_NAME);
-+		nand_chip->options |= NAND_BUSWIDTH_16;
-+	}
-+	mtd->oobsize = devinfo.sparesize;
-+	hw->nfi_cs_num = 1;
-+
-+	nand_chip->options |= NAND_USE_BOUNCE_BUFFER;
-+	nand_chip->buf_align = 16;
-+
-+	/* Scan to find existance of the device */
-+	if (nand_scan(mtd, hw->nfi_cs_num)) {
-+		MSG(INIT, "%s : nand_scan fail.\n", MODULE_NAME);
-+		err = -ENXIO;
-+		goto out;
-+	}
-+
-+	nand_chip->erase = mtk_nand_erase;
-+
-+	g_page_size = mtd->writesize;
-+	platform_set_drvdata(pdev, host);
-+	if (hw->nfi_bus_width == 16) {
-+		NFI_SET_REG16(NFI_PAGEFMT_REG16, PAGEFMT_DBYTE_EN);
-+	}
-+
-+	nand_chip->select_chip(mtd, 0);
-+#if defined(MTK_NAND_BMT)  
-+	nand_chip->chipsize -= (BMT_POOL_SIZE) << nand_chip->phys_erase_shift;
-+#endif
-+	mtd->size = nand_chip->chipsize;
-+
-+	CFG_BLOCKSIZE = mtd->erasesize;
-+
-+#if defined(MTK_NAND_BMT)
-+	if (!g_bmt) {
-+		if (!(g_bmt = init_bmt(nand_chip, BMT_POOL_SIZE))) {
-+			MSG(INIT, "Error: init bmt failed\n");
-+			return 0;
-+		}
-+	}
-+#endif
-+
-+	nand_set_flash_node(nand_chip, pdev->dev.of_node);
-+	err = mtd_device_parse_register(mtd, probe_types, &ppdata,
-+					NULL, 0);
-+	if (!err) {
-+		MSG(INIT, "[mtk_nand] probe successfully!\n");
-+		nand_disable_clock();
-+		shift_on_bbt = 0;
-+		if (load_fact_bbt(mtd) == 0) {
-+			int i;
-+			for (i = 0; i < 0x100; i++)
-+				nand_chip->bbt[i] |= fact_bbt[i];
-+		}
-+
-+		return err;
-+	}
-+
-+out:
-+	MSG(INIT, "[NFI] mtk_nand_probe fail, err = %d!\n", err);
-+	nand_release(nand_chip);
-+	platform_set_drvdata(pdev, NULL);
-+	kfree(host);
-+	nand_disable_clock();
-+	return err;
-+}
-+
-+static int
-+mtk_nand_remove(struct platform_device *pdev)
-+{
-+	struct mtk_nand_host *host = platform_get_drvdata(pdev);
-+	struct mtd_info *mtd = host->mtd;
-+	struct nand_chip *nand_chip = &host->nand_chip;
-+
-+	nand_release(nand_chip);
-+	kfree(host);
-+	nand_disable_clock();
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id mt7621_nand_match[] = {
-+	{ .compatible = "mtk,mt7621-nand" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, mt7621_nand_match);
-+
-+static struct platform_driver mtk_nand_driver = {
-+	.probe = mtk_nand_probe,
-+	.remove = mtk_nand_remove,
-+	.driver = {
-+		.name = "MT7621-NAND",
-+		.owner = THIS_MODULE,
-+		.of_match_table = mt7621_nand_match,
-+	},
-+};
-+
-+static int __init
-+mtk_nand_init(void)
-+{
-+	printk("MediaTek Nand driver init, version %s\n", VERSION);
-+
-+	return platform_driver_register(&mtk_nand_driver);
-+}
-+
-+static void __exit
-+mtk_nand_exit(void)
-+{
-+	platform_driver_unregister(&mtk_nand_driver);
-+}
-+
-+module_init(mtk_nand_init);
-+module_exit(mtk_nand_exit);
-+MODULE_LICENSE("GPL");
---- /dev/null
-+++ b/drivers/mtd/nand/mtk_nand2.h
-@@ -0,0 +1,452 @@
-+#ifndef __MTK_NAND_H
-+#define __MTK_NAND_H
-+
-+#define RALINK_NAND_CTRL_BASE         0xBE003000
-+#define RALINK_SYSCTL_BASE            0xBE000000
-+#define RALINK_NANDECC_CTRL_BASE      0xBE003800
-+/*******************************************************************************
-+ * NFI Register Definition 
-+ *******************************************************************************/
-+
-+#define NFI_CNFG_REG16  	((volatile P_U16)(NFI_BASE+0x0000))
-+#define NFI_PAGEFMT_REG16   ((volatile P_U16)(NFI_BASE+0x0004))
-+#define NFI_CON_REG16      	((volatile P_U16)(NFI_BASE+0x0008))
-+#define NFI_ACCCON_REG32   	((volatile P_U32)(NFI_BASE+0x000C))
-+#define NFI_INTR_EN_REG16   ((volatile P_U16)(NFI_BASE+0x0010))
-+#define NFI_INTR_REG16      ((volatile P_U16)(NFI_BASE+0x0014))
-+
-+#define NFI_CMD_REG16   	((volatile P_U16)(NFI_BASE+0x0020))
-+
-+#define NFI_ADDRNOB_REG16   ((volatile P_U16)(NFI_BASE+0x0030))
-+#define NFI_COLADDR_REG32  	((volatile P_U32)(NFI_BASE+0x0034))
-+#define NFI_ROWADDR_REG32  	((volatile P_U32)(NFI_BASE+0x0038))
-+
-+#define NFI_STRDATA_REG16   ((volatile P_U16)(NFI_BASE+0x0040))
-+
-+#define NFI_DATAW_REG32    	((volatile P_U32)(NFI_BASE+0x0050))
-+#define NFI_DATAR_REG32    	((volatile P_U32)(NFI_BASE+0x0054))
-+#define NFI_PIO_DIRDY_REG16 ((volatile P_U16)(NFI_BASE+0x0058))
-+
-+#define NFI_STA_REG32      	((volatile P_U32)(NFI_BASE+0x0060))
-+#define NFI_FIFOSTA_REG16   ((volatile P_U16)(NFI_BASE+0x0064))
-+#define NFI_LOCKSTA_REG16   ((volatile P_U16)(NFI_BASE+0x0068))
-+
-+#define NFI_ADDRCNTR_REG16  ((volatile P_U16)(NFI_BASE+0x0070))
-+
-+#define NFI_STRADDR_REG32  	((volatile P_U32)(NFI_BASE+0x0080))
-+#define NFI_BYTELEN_REG16   ((volatile P_U16)(NFI_BASE+0x0084))
-+
-+#define NFI_CSEL_REG16      ((volatile P_U16)(NFI_BASE+0x0090))
-+#define NFI_IOCON_REG16     ((volatile P_U16)(NFI_BASE+0x0094))
-+
-+#define NFI_FDM0L_REG32    	((volatile P_U32)(NFI_BASE+0x00A0))
-+#define NFI_FDM0M_REG32    	((volatile P_U32)(NFI_BASE+0x00A4))
-+
-+#define NFI_LOCK_REG16	  	((volatile P_U16)(NFI_BASE+0x0100))
-+#define NFI_LOCKCON_REG32  	((volatile P_U32)(NFI_BASE+0x0104))
-+#define NFI_LOCKANOB_REG16  ((volatile P_U16)(NFI_BASE+0x0108))
-+#define NFI_LOCK00ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0110))
-+#define NFI_LOCK00FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0114))
-+#define NFI_LOCK01ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0118))
-+#define NFI_LOCK01FMT_REG32 ((volatile P_U32)(NFI_BASE+0x011C))
-+#define NFI_LOCK02ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0120))
-+#define NFI_LOCK02FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0124))
-+#define NFI_LOCK03ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0128))
-+#define NFI_LOCK03FMT_REG32 ((volatile P_U32)(NFI_BASE+0x012C))
-+#define NFI_LOCK04ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0130))
-+#define NFI_LOCK04FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0134))
-+#define NFI_LOCK05ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0138))
-+#define NFI_LOCK05FMT_REG32 ((volatile P_U32)(NFI_BASE+0x013C))
-+#define NFI_LOCK06ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0140))
-+#define NFI_LOCK06FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0144))
-+#define NFI_LOCK07ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0148))
-+#define NFI_LOCK07FMT_REG32 ((volatile P_U32)(NFI_BASE+0x014C))
-+#define NFI_LOCK08ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0150))
-+#define NFI_LOCK08FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0154))
-+#define NFI_LOCK09ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0158))
-+#define NFI_LOCK09FMT_REG32 ((volatile P_U32)(NFI_BASE+0x015C))
-+#define NFI_LOCK10ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0160))
-+#define NFI_LOCK10FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0164))
-+#define NFI_LOCK11ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0168))
-+#define NFI_LOCK11FMT_REG32 ((volatile P_U32)(NFI_BASE+0x016C))
-+#define NFI_LOCK12ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0170))
-+#define NFI_LOCK12FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0174))
-+#define NFI_LOCK13ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0178))
-+#define NFI_LOCK13FMT_REG32 ((volatile P_U32)(NFI_BASE+0x017C))
-+#define NFI_LOCK14ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0180))
-+#define NFI_LOCK14FMT_REG32 ((volatile P_U32)(NFI_BASE+0x0184))
-+#define NFI_LOCK15ADD_REG32 ((volatile P_U32)(NFI_BASE+0x0188))
-+#define NFI_LOCK15FMT_REG32 ((volatile P_U32)(NFI_BASE+0x018C))
-+
-+#define NFI_FIFODATA0_REG32 ((volatile P_U32)(NFI_BASE+0x0190))
-+#define NFI_FIFODATA1_REG32 ((volatile P_U32)(NFI_BASE+0x0194))
-+#define NFI_FIFODATA2_REG32 ((volatile P_U32)(NFI_BASE+0x0198))
-+#define NFI_FIFODATA3_REG32 ((volatile P_U32)(NFI_BASE+0x019C))
-+#define NFI_MASTERSTA_REG16 ((volatile P_U16)(NFI_BASE+0x0210))
-+
-+
-+/*******************************************************************************
-+ * NFI Register Field Definition 
-+ *******************************************************************************/
-+
-+/* NFI_CNFG */
-+#define CNFG_AHB             (0x0001)
-+#define CNFG_READ_EN         (0x0002)
-+#define CNFG_DMA_BURST_EN    (0x0004)
-+#define CNFG_BYTE_RW         (0x0040)
-+#define CNFG_HW_ECC_EN       (0x0100)
-+#define CNFG_AUTO_FMT_EN     (0x0200)
-+#define CNFG_OP_IDLE         (0x0000)
-+#define CNFG_OP_READ         (0x1000)
-+#define CNFG_OP_SRD          (0x2000)
-+#define CNFG_OP_PRGM         (0x3000)
-+#define CNFG_OP_ERASE        (0x4000)
-+#define CNFG_OP_RESET        (0x5000)
-+#define CNFG_OP_CUST         (0x6000)
-+#define CNFG_OP_MODE_MASK    (0x7000)
-+#define CNFG_OP_MODE_SHIFT   (12)
-+
-+/* NFI_PAGEFMT */
-+#define PAGEFMT_512          (0x0000)
-+#define PAGEFMT_2K           (0x0001)
-+#define PAGEFMT_4K           (0x0002)
-+
-+#define PAGEFMT_PAGE_MASK    (0x0003)
-+
-+#define PAGEFMT_DBYTE_EN     (0x0008)
-+
-+#define PAGEFMT_SPARE_16     (0x0000)
-+#define PAGEFMT_SPARE_26     (0x0001)
-+#define PAGEFMT_SPARE_27     (0x0002)
-+#define PAGEFMT_SPARE_28     (0x0003)
-+#define PAGEFMT_SPARE_MASK   (0x0030)
-+#define PAGEFMT_SPARE_SHIFT  (4)
-+
-+#define PAGEFMT_FDM_MASK     (0x0F00)
-+#define PAGEFMT_FDM_SHIFT    (8)
-+
-+#define PAGEFMT_FDM_ECC_MASK  (0xF000)
-+#define PAGEFMT_FDM_ECC_SHIFT (12)
-+
-+/* NFI_CON */
-+#define CON_FIFO_FLUSH       (0x0001)
-+#define CON_NFI_RST          (0x0002)
-+#define CON_NFI_SRD          (0x0010)
-+
-+#define CON_NFI_NOB_MASK     (0x0060)
-+#define CON_NFI_NOB_SHIFT    (5)
-+
-+#define CON_NFI_BRD          (0x0100)
-+#define CON_NFI_BWR          (0x0200)
-+
-+#define CON_NFI_SEC_MASK     (0xF000)
-+#define CON_NFI_SEC_SHIFT    (12)
-+
-+/* NFI_ACCCON */
-+#define ACCCON_SETTING       ()
-+
-+/* NFI_INTR_EN */
-+#define INTR_RD_DONE_EN      (0x0001)
-+#define INTR_WR_DONE_EN      (0x0002)
-+#define INTR_RST_DONE_EN     (0x0004)
-+#define INTR_ERASE_DONE_EN   (0x0008)
-+#define INTR_BSY_RTN_EN      (0x0010)
-+#define INTR_ACC_LOCK_EN     (0x0020)
-+#define INTR_AHB_DONE_EN     (0x0040)
-+#define INTR_ALL_INTR_DE     (0x0000)
-+#define INTR_ALL_INTR_EN     (0x007F)
-+
-+/* NFI_INTR */
-+#define INTR_RD_DONE         (0x0001)
-+#define INTR_WR_DONE         (0x0002)
-+#define INTR_RST_DONE        (0x0004)
-+#define INTR_ERASE_DONE      (0x0008)
-+#define INTR_BSY_RTN         (0x0010)
-+#define INTR_ACC_LOCK        (0x0020)
-+#define INTR_AHB_DONE        (0x0040)
-+
-+/* NFI_ADDRNOB */
-+#define ADDR_COL_NOB_MASK    (0x0003)
-+#define ADDR_COL_NOB_SHIFT   (0)
-+#define ADDR_ROW_NOB_MASK    (0x0030)
-+#define ADDR_ROW_NOB_SHIFT   (4)
-+
-+/* NFI_STA */
-+#define STA_READ_EMPTY       (0x00001000)
-+#define STA_ACC_LOCK         (0x00000010)
-+#define STA_CMD_STATE        (0x00000001)
-+#define STA_ADDR_STATE       (0x00000002)
-+#define STA_DATAR_STATE      (0x00000004)
-+#define STA_DATAW_STATE      (0x00000008)
-+
-+#define STA_NAND_FSM_MASK    (0x1F000000)
-+#define STA_NAND_BUSY        (0x00000100)
-+#define STA_NAND_BUSY_RETURN (0x00000200)
-+#define STA_NFI_FSM_MASK     (0x000F0000)
-+#define STA_NFI_OP_MASK      (0x0000000F)
-+
-+/* NFI_FIFOSTA */
-+#define FIFO_RD_EMPTY        (0x0040)
-+#define FIFO_RD_FULL         (0x0080)
-+#define FIFO_WR_FULL         (0x8000)
-+#define FIFO_WR_EMPTY        (0x4000)
-+#define FIFO_RD_REMAIN(x)    (0x1F&(x))
-+#define FIFO_WR_REMAIN(x)    ((0x1F00&(x))>>8)
-+
-+/* NFI_ADDRCNTR */
-+#define ADDRCNTR_CNTR(x)     ((0xF000&(x))>>12)
-+#define ADDRCNTR_OFFSET(x)   (0x03FF&(x))
-+
-+/* NFI_LOCK */
-+#define NFI_LOCK_ON          (0x0001)
-+
-+/* NFI_LOCKANOB */
-+#define PROG_RADD_NOB_MASK   (0x7000)
-+#define PROG_RADD_NOB_SHIFT  (12)
-+#define PROG_CADD_NOB_MASK   (0x0300)
-+#define PROG_CADD_NOB_SHIFT  (8)
-+#define ERASE_RADD_NOB_MASK   (0x0070)
-+#define ERASE_RADD_NOB_SHIFT  (4)
-+#define ERASE_CADD_NOB_MASK   (0x0007)
-+#define ERASE_CADD_NOB_SHIFT  (0)
-+
-+/*******************************************************************************
-+ * ECC Register Definition 
-+ *******************************************************************************/
-+
-+#define ECC_ENCCON_REG16	((volatile P_U16)(NFIECC_BASE+0x0000))
-+#define ECC_ENCCNFG_REG32  	((volatile P_U32)(NFIECC_BASE+0x0004))
-+#define ECC_ENCDIADDR_REG32	((volatile P_U32)(NFIECC_BASE+0x0008))
-+#define ECC_ENCIDLE_REG32  	((volatile P_U32)(NFIECC_BASE+0x000C))
-+#define ECC_ENCPAR0_REG32   ((volatile P_U32)(NFIECC_BASE+0x0010))
-+#define ECC_ENCPAR1_REG32   ((volatile P_U32)(NFIECC_BASE+0x0014))
-+#define ECC_ENCPAR2_REG32   ((volatile P_U32)(NFIECC_BASE+0x0018))
-+#define ECC_ENCPAR3_REG32   ((volatile P_U32)(NFIECC_BASE+0x001C))
-+#define ECC_ENCPAR4_REG32   ((volatile P_U32)(NFIECC_BASE+0x0020))
-+#define ECC_ENCSTA_REG32    ((volatile P_U32)(NFIECC_BASE+0x0024))
-+#define ECC_ENCIRQEN_REG16  ((volatile P_U16)(NFIECC_BASE+0x0028))
-+#define ECC_ENCIRQSTA_REG16 ((volatile P_U16)(NFIECC_BASE+0x002C))
-+
-+#define ECC_DECCON_REG16    ((volatile P_U16)(NFIECC_BASE+0x0100))
-+#define ECC_DECCNFG_REG32   ((volatile P_U32)(NFIECC_BASE+0x0104))
-+#define ECC_DECDIADDR_REG32 ((volatile P_U32)(NFIECC_BASE+0x0108))
-+#define ECC_DECIDLE_REG16   ((volatile P_U16)(NFIECC_BASE+0x010C))
-+#define ECC_DECFER_REG16    ((volatile P_U16)(NFIECC_BASE+0x0110))
-+#define ECC_DECENUM_REG32   ((volatile P_U32)(NFIECC_BASE+0x0114))
-+#define ECC_DECDONE_REG16   ((volatile P_U16)(NFIECC_BASE+0x0118))
-+#define ECC_DECEL0_REG32    ((volatile P_U32)(NFIECC_BASE+0x011C))
-+#define ECC_DECEL1_REG32    ((volatile P_U32)(NFIECC_BASE+0x0120))
-+#define ECC_DECEL2_REG32    ((volatile P_U32)(NFIECC_BASE+0x0124))
-+#define ECC_DECEL3_REG32    ((volatile P_U32)(NFIECC_BASE+0x0128))
-+#define ECC_DECEL4_REG32    ((volatile P_U32)(NFIECC_BASE+0x012C))
-+#define ECC_DECEL5_REG32    ((volatile P_U32)(NFIECC_BASE+0x0130))
-+#define ECC_DECIRQEN_REG16  ((volatile P_U16)(NFIECC_BASE+0x0134))
-+#define ECC_DECIRQSTA_REG16 ((volatile P_U16)(NFIECC_BASE+0x0138))
-+#define ECC_FDMADDR_REG32   ((volatile P_U32)(NFIECC_BASE+0x013C))
-+#define ECC_DECFSM_REG32    ((volatile P_U32)(NFIECC_BASE+0x0140))
-+#define ECC_SYNSTA_REG32    ((volatile P_U32)(NFIECC_BASE+0x0144))
-+#define ECC_DECNFIDI_REG32  ((volatile P_U32)(NFIECC_BASE+0x0148))
-+#define ECC_SYN0_REG32      ((volatile P_U32)(NFIECC_BASE+0x014C))
-+
-+/*******************************************************************************
-+ * ECC register definition
-+ *******************************************************************************/
-+/* ECC_ENCON */
-+#define ENC_EN             		(0x0001)
-+#define ENC_DE                 	(0x0000)
-+
-+/* ECC_ENCCNFG */
-+#define ECC_CNFG_ECC4          	(0x0000)
-+#define ECC_CNFG_ECC6          	(0x0001)
-+#define ECC_CNFG_ECC8          	(0x0002)
-+#define ECC_CNFG_ECC10         	(0x0003)
-+#define ECC_CNFG_ECC12         	(0x0004)
-+#define ECC_CNFG_ECC_MASK      	(0x00000007)
-+
-+#define ENC_CNFG_NFI           	(0x0010)
-+#define ENC_CNFG_MODE_MASK     	(0x0010)
-+
-+#define ENC_CNFG_META6         	(0x10300000)
-+#define ENC_CNFG_META8         	(0x10400000)
-+
-+#define ENC_CNFG_MSG_MASK  		(0x1FFF0000)
-+#define ENC_CNFG_MSG_SHIFT 		(0x10)
-+
-+/* ECC_ENCIDLE */
-+#define ENC_IDLE           		(0x0001)
-+
-+/* ECC_ENCSTA */
-+#define STA_FSM            		(0x001F)
-+#define STA_COUNT_PS       		(0xFF10)
-+#define STA_COUNT_MS       		(0x3FFF0000)
-+
-+/* ECC_ENCIRQEN */
-+#define ENC_IRQEN          		(0x0001)
-+
-+/* ECC_ENCIRQSTA */
-+#define ENC_IRQSTA         		(0x0001)
-+
-+/* ECC_DECCON */
-+#define DEC_EN             		(0x0001)
-+#define DEC_DE             		(0x0000)
-+
-+/* ECC_ENCCNFG */
-+#define DEC_CNFG_ECC4          (0x0000)
-+//#define DEC_CNFG_ECC6          (0x0001)
-+//#define DEC_CNFG_ECC12         (0x0002)
-+#define DEC_CNFG_NFI           (0x0010)
-+//#define DEC_CNFG_META6         (0x10300000)
-+//#define DEC_CNFG_META8         (0x10400000)
-+
-+#define DEC_CNFG_FER           (0x01000)
-+#define DEC_CNFG_EL            (0x02000)
-+#define DEC_CNFG_CORRECT       (0x03000)
-+#define DEC_CNFG_TYPE_MASK     (0x03000)
-+
-+#define DEC_CNFG_EMPTY_EN      (0x80000000)
-+
-+#define DEC_CNFG_CODE_MASK     (0x1FFF0000)
-+#define DEC_CNFG_CODE_SHIFT    (0x10)
-+
-+/* ECC_DECIDLE */
-+#define DEC_IDLE           		(0x0001)
-+
-+/* ECC_DECFER */
-+#define DEC_FER0               (0x0001)
-+#define DEC_FER1               (0x0002)
-+#define DEC_FER2               (0x0004)
-+#define DEC_FER3               (0x0008)
-+#define DEC_FER4               (0x0010)
-+#define DEC_FER5               (0x0020)
-+#define DEC_FER6               (0x0040)
-+#define DEC_FER7               (0x0080)
-+
-+/* ECC_DECENUM */
-+#define ERR_NUM0               (0x0000000F)
-+#define ERR_NUM1               (0x000000F0)
-+#define ERR_NUM2               (0x00000F00)
-+#define ERR_NUM3               (0x0000F000)
-+#define ERR_NUM4               (0x000F0000)
-+#define ERR_NUM5               (0x00F00000)
-+#define ERR_NUM6               (0x0F000000)
-+#define ERR_NUM7               (0xF0000000)
-+
-+/* ECC_DECDONE */
-+#define DEC_DONE0               (0x0001)
-+#define DEC_DONE1               (0x0002)
-+#define DEC_DONE2               (0x0004)
-+#define DEC_DONE3               (0x0008)
-+#define DEC_DONE4               (0x0010)
-+#define DEC_DONE5               (0x0020)
-+#define DEC_DONE6               (0x0040)
-+#define DEC_DONE7               (0x0080)
-+
-+/* ECC_DECIRQEN */
-+#define DEC_IRQEN         		(0x0001)
-+
-+/* ECC_DECIRQSTA */
-+#define DEC_IRQSTA      		(0x0001)
-+
-+#define CHIPVER_ECO_1           (0x8a00)
-+#define CHIPVER_ECO_2           (0x8a01)
-+
-+//#define NAND_PFM
-+
-+/*******************************************************************************
-+ * Data Structure Definition
-+ *******************************************************************************/
-+struct mtk_nand_host 
-+{
-+	struct nand_chip		nand_chip;
-+	struct mtd_info			*mtd;
-+	struct mtk_nand_host_hw	*hw;
-+};
-+
-+struct NAND_CMD
-+{
-+	u32	u4ColAddr;
-+	u32 u4RowAddr;
-+	u32 u4OOBRowAddr;
-+	u8	au1OOB[288];
-+	u8*	pDataBuf;
-+#ifdef NAND_PFM	
-+	u32 pureReadOOB;
-+	u32 pureReadOOBNum;
-+#endif
-+};
-+
-+/*
-+ *	ECC layout control structure. Exported to userspace for
-+ *  diagnosis and to allow creation of raw images
-+struct nand_ecclayout {
-+	uint32_t eccbytes;
-+	uint32_t eccpos[64];
-+	uint32_t oobavail;
-+	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
-+};
-+*/
-+#define __DEBUG_NAND		1			/* Debug information on/off */
-+
-+/* Debug message event */
-+#define DBG_EVT_NONE		0x00000000	/* No event */
-+#define DBG_EVT_INIT		0x00000001	/* Initial related event */
-+#define DBG_EVT_VERIFY		0x00000002	/* Verify buffer related event */
-+#define DBG_EVT_PERFORMANCE	0x00000004	/* Performance related event */
-+#define DBG_EVT_READ		0x00000008	/* Read related event */
-+#define DBG_EVT_WRITE		0x00000010	/* Write related event */
-+#define DBG_EVT_ERASE		0x00000020	/* Erase related event */
-+#define DBG_EVT_BADBLOCK	0x00000040	/* Badblock related event */
-+#define DBG_EVT_POWERCTL	0x00000080	/* Suspend/Resume related event */
-+
-+#define DBG_EVT_ALL			0xffffffff
-+
-+#define DBG_EVT_MASK      	(DBG_EVT_INIT)
-+
-+#if __DEBUG_NAND
-+#define MSG(evt, fmt, args...) \
-+do {	\
-+	if ((DBG_EVT_##evt) & DBG_EVT_MASK) { \
-+		printk(fmt, ##args); \
-+	} \
-+} while(0)
-+
-+#define MSG_FUNC_ENTRY(f)	MSG(FUC, "<FUN_ENT>: %s\n", __FUNCTION__)
-+#else
-+#define MSG(evt, fmt, args...) do{}while(0)
-+#define MSG_FUNC_ENTRY(f)	   do{}while(0)
-+#endif
-+
-+#define RAMDOM_READ 1<<0
-+#define CACHE_READ  1<<1
-+
-+typedef struct
-+{
-+   u16 id;          //deviceid+menuid
-+   u32 ext_id; 
-+   u8  addr_cycle;
-+   u8  iowidth;
-+   u16 totalsize;   
-+   u16 blocksize;
-+   u16 pagesize;
-+   u16 sparesize;
-+   u32 timmingsetting;
-+   char devciename[14];
-+   u32 advancedmode;   //
-+}flashdev_info,*pflashdev_info;
-+
-+/* NAND driver */
-+#if 0
-+struct mtk_nand_host_hw {
-+    unsigned int nfi_bus_width;		    /* NFI_BUS_WIDTH */ 
-+	unsigned int nfi_access_timing;		/* NFI_ACCESS_TIMING */  
-+	unsigned int nfi_cs_num;			/* NFI_CS_NUM */
-+	unsigned int nand_sec_size;			/* NAND_SECTOR_SIZE */
-+	unsigned int nand_sec_shift;		/* NAND_SECTOR_SHIFT */
-+	unsigned int nand_ecc_size;
-+	unsigned int nand_ecc_bytes;
-+	unsigned int nand_ecc_mode;
-+};
-+extern struct mtk_nand_host_hw mt7621_nand_hw;
-+extern u32	CFG_BLOCKSIZE;
-+#endif
-+#endif
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -48,7 +48,7 @@
- #include <linux/mtd/partitions.h>
- #include <linux/of.h>
- 
--static int nand_get_device(struct mtd_info *mtd, int new_state);
-+int nand_get_device(struct mtd_info *mtd, int new_state);
- 
- static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
- 			     struct mtd_oob_ops *ops);
-@@ -240,7 +240,7 @@ static int check_offs_len(struct mtd_inf
-  *
-  * Release chip lock and wake up anyone waiting on the device.
-  */
--static void nand_release_device(struct mtd_info *mtd)
-+void nand_release_device(struct mtd_info *mtd)
- {
- 	struct nand_chip *chip = mtd_to_nand(mtd);
- 
-@@ -968,7 +968,7 @@ static void panic_nand_get_device(struct
-  *
-  * Get the device and lock it for exclusive access
-  */
--static int
-+int
- nand_get_device(struct mtd_info *mtd, int new_state)
- {
- 	struct nand_chip *chip = mtd_to_nand(mtd);
---- /dev/null
-+++ b/drivers/mtd/nand/nand_def.h
-@@ -0,0 +1,123 @@
-+#ifndef __NAND_DEF_H__
-+#define __NAND_DEF_H__
-+
-+#define VERSION  	"v2.1 Fix AHB virt2phys error"
-+#define MODULE_NAME	"# MTK NAND #"
-+#define PROCNAME    "driver/nand"
-+
-+#undef TESTTIME
-+//#define __UBOOT_NAND__			1
-+#define __KERNEL_NAND__		1
-+//#define __PRELOADER_NAND__	1
-+//#define PMT 1
-+//#define _MTK_NAND_DUMMY_DRIVER
-+//#define CONFIG_BADBLOCK_CHECK	1
-+//#ifdef CONFIG_BADBLOCK_CHECK
-+//#define MTK_NAND_BMT	1
-+//#endif
-+#define ECC_ENABLE		1
-+#define MANUAL_CORRECT	1
-+//#define __INTERNAL_USE_AHB_MODE__ 	(0)
-+#define SKIP_BAD_BLOCK
-+#define FACT_BBT
-+
-+#ifndef NAND_OTP_SUPPORT
-+#define NAND_OTP_SUPPORT 0
-+#endif
-+
-+/*******************************************************************************
-+ * Macro definition 
-+ *******************************************************************************/
-+//#define NFI_SET_REG32(reg, value)   (DRV_WriteReg32(reg, DRV_Reg32(reg) | (value))) 
-+//#define NFI_SET_REG16(reg, value)   (DRV_WriteReg16(reg, DRV_Reg16(reg) | (value)))
-+//#define NFI_CLN_REG32(reg, value)   (DRV_WriteReg32(reg, DRV_Reg32(reg) & (~(value))))
-+//#define NFI_CLN_REG16(reg, value)   (DRV_WriteReg16(reg, DRV_Reg16(reg) & (~(value))))
-+
-+#if defined (__KERNEL_NAND__)
-+#define NFI_SET_REG32(reg, value) \
-+do {	\
-+	g_value = (DRV_Reg32(reg) | (value));\
-+	DRV_WriteReg32(reg, g_value); \
-+} while(0)
-+
-+#define NFI_SET_REG16(reg, value) \
-+do {	\
-+	g_value = (DRV_Reg16(reg) | (value));\
-+	DRV_WriteReg16(reg, g_value); \
-+} while(0)
-+
-+#define NFI_CLN_REG32(reg, value) \
-+do {	\
-+	g_value = (DRV_Reg32(reg) & (~(value)));\
-+	DRV_WriteReg32(reg, g_value); \
-+} while(0)
-+
-+#define NFI_CLN_REG16(reg, value) \
-+do {	\
-+	g_value = (DRV_Reg16(reg) & (~(value)));\
-+	DRV_WriteReg16(reg, g_value); \
-+} while(0)
-+#endif
-+
-+#define NFI_WAIT_STATE_DONE(state) do{;}while (__raw_readl(NFI_STA_REG32) & state)
-+#define NFI_WAIT_TO_READY()  do{;}while (!(__raw_readl(NFI_STA_REG32) & STA_BUSY2READY))
-+
-+
-+#define NAND_SECTOR_SIZE (512)
-+#define OOB_PER_SECTOR      (16)
-+#define OOB_AVAI_PER_SECTOR (8)
-+
-+#ifndef PART_SIZE_BMTPOOL
-+#define BMT_POOL_SIZE       (80)
-+#else
-+#define BMT_POOL_SIZE (PART_SIZE_BMTPOOL)
-+#endif
-+
-+#define PMT_POOL_SIZE	(2)
-+
-+#define TIMEOUT_1   0x1fff
-+#define TIMEOUT_2   0x8ff
-+#define TIMEOUT_3   0xffff
-+#define TIMEOUT_4   0xffff//5000   //PIO
-+
-+
-+/* temporarity definiation */
-+#if !defined (__KERNEL_NAND__) 
-+#define KERN_INFO
-+#define KERN_WARNING
-+#define KERN_ERR
-+#define PAGE_SIZE	(4096)
-+#endif
-+#define AddStorageTrace				//AddStorageTrace
-+#define STORAGE_LOGGER_MSG_NAND		0
-+#define NFI_BASE 					RALINK_NAND_CTRL_BASE
-+#define NFIECC_BASE 				RALINK_NANDECC_CTRL_BASE
-+
-+#ifdef __INTERNAL_USE_AHB_MODE__
-+#define MT65xx_POLARITY_LOW   0
-+#define MT65XX_PDN_PERI_NFI   0
-+#define MT65xx_EDGE_SENSITIVE 0
-+#define MT6575_NFI_IRQ_ID                    (58)
-+#endif
-+
-+#if defined (__KERNEL_NAND__)
-+#define RALINK_REG(x)		(*((volatile u32 *)(x)))	
-+#define __virt_to_phys(x)	virt_to_phys((volatile void*)x)
-+#else
-+#define CONFIG_MTD_NAND_VERIFY_WRITE	(1)
-+#define printk	printf
-+#define ra_dbg printf
-+#define BUG()							//BUG()
-+#define BUG_ON(x)						//BUG_ON()
-+#define NUM_PARTITIONS 				1
-+#endif
-+
-+#define NFI_DEFAULT_ACCESS_TIMING        (0x30C77fff)	//(0x44333)
-+
-+//uboot only support 1 cs
-+#define NFI_CS_NUM                  (1)
-+#define NFI_DEFAULT_CS              (0)
-+
-+#include "mt6575_typedefs.h"
-+
-+#endif /* __NAND_DEF_H__ */
---- /dev/null
-+++ b/drivers/mtd/nand/nand_device_list.h
-@@ -0,0 +1,59 @@
-+/* Copyright Statement:
-+ *
-+ * This software/firmware and related documentation ("MediaTek Software") are
-+ * protected under relevant copyright laws. The information contained herein
-+ * is confidential and proprietary to MediaTek Inc. and/or its licensors.
-+ * Without the prior written permission of MediaTek inc. and/or its licensors,
-+ * any reproduction, modification, use or disclosure of MediaTek Software,
-+ * and information contained herein, in whole or in part, shall be strictly prohibited.
-+ */
-+/* MediaTek Inc. (C) 2010. All rights reserved.
-+ *
-+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
-+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
-+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
-+ * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
-+ * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
-+ * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
-+ * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
-+ * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
-+ * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
-+ * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
-+ * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
-+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
-+ * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
-+ * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
-+ * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
-+ * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
-+ *
-+ * The following software/firmware and/or related documentation ("MediaTek Software")
-+ * have been modified by MediaTek Inc. All revisions are subject to any receiver's
-+ * applicable license agreements with MediaTek Inc.
-+ */
-+
-+#ifndef __NAND_DEVICE_LIST_H__
-+#define __NAND_DEVICE_LIST_H__
-+
-+static const flashdev_info gen_FlashTable[]={
-+	{0x20BC, 0x105554, 5, 16, 512, 128, 2048, 64, 0x1123, "EHD013151MA_5", 0},
-+	{0xECBC, 0x005554, 5, 16, 512, 128, 2048, 64, 0x1123, "K524G2GACB_A0", 0},
-+	{0x2CBC, 0x905556, 5, 16, 512, 128, 2048, 64, 0x21044333, "MT29C4G96MAZA", 0},
-+	{0x2CDA, 0x909506, 5, 8,  256, 128, 2048, 64, 0x30C77fff, "MT29F2G08ABAE", 0},
-+	{0xADBC, 0x905554, 5, 16, 512, 128, 2048, 64, 0x10801011, "H9DA4GH4JJAMC", 0},
-+    {0x01F1, 0x801D01, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "S34ML01G100TF", 0},
-+    {0x92F1, 0x8095FF, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81A", 0},
-+	{0xC8D1, 0x809540, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81MA", 0},
-+	{0xC8DA, 0x909544, 5, 8, 256, 128, 2048, 64, 0x30C77fff, "F59L2G81A", 0},
-+	{0xC8DC, 0x909554, 5, 8, 512, 128, 2048, 64, 0x30C77fff, "F59L4G81A", 0},
-+	{0xECD3, 0x519558, 5, 8, 1024, 128, 2048, 64, 0x44333, "K9K8G8000", 0},
-+    {0xC2F1, 0x801DC2, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "MX30LF1G08AA", 0},
-+    {0x98D3, 0x902676, 5, 8, 1024, 256, 4096, 224, 0x00C25332, "TC58NVG3S0F", 0},
-+    {0x01DA, 0x909546, 5, 8, 256, 128, 2048, 128, 0x30C77fff, "S34ML02G200TF", 0},
-+    {0x01DC, 0x909556, 5, 8, 512, 128, 2048, 128, 0x30C77fff, "S34ML04G200TF", 0},
-+	{0x0000, 0x000000, 0, 0, 0, 0, 0, 0, 0, "xxxxxxxxxx", 0},
-+};
-+
-+
-+#endif
---- /dev/null
-+++ b/drivers/mtd/nand/partition.h
-@@ -0,0 +1,115 @@
-+/* Copyright Statement:
-+ *
-+ * This software/firmware and related documentation ("MediaTek Software") are
-+ * protected under relevant copyright laws. The information contained herein
-+ * is confidential and proprietary to MediaTek Inc. and/or its licensors.
-+ * Without the prior written permission of MediaTek inc. and/or its licensors,
-+ * any reproduction, modification, use or disclosure of MediaTek Software,
-+ * and information contained herein, in whole or in part, shall be strictly prohibited.
-+ */
-+/* MediaTek Inc. (C) 2010. All rights reserved.
-+ *
-+ * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
-+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
-+ * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
-+ * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
-+ * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
-+ * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
-+ * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
-+ * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
-+ * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
-+ * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
-+ * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
-+ * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
-+ * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
-+ * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
-+ * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
-+ * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
-+ *
-+ * The following software/firmware and/or related documentation ("MediaTek Software")
-+ * have been modified by MediaTek Inc. All revisions are subject to any receiver's
-+ * applicable license agreements with MediaTek Inc.
-+ */
-+
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/rawnand.h>
-+#include <linux/mtd/partitions.h>
-+
-+#define RECONFIG_PARTITION_SIZE 1
-+
-+#define MTD_BOOT_PART_SIZE  0x80000
-+#define MTD_CONFIG_PART_SIZE    0x20000
-+#define MTD_FACTORY_PART_SIZE   0x20000
-+
-+extern unsigned int  CFG_BLOCKSIZE;
-+#define LARGE_MTD_BOOT_PART_SIZE       (CFG_BLOCKSIZE<<2)
-+#define LARGE_MTD_CONFIG_PART_SIZE     (CFG_BLOCKSIZE<<2)
-+#define LARGE_MTD_FACTORY_PART_SIZE    (CFG_BLOCKSIZE<<1)
-+
-+/*=======================================================================*/
-+/* NAND PARTITION Mapping                                                  */
-+/*=======================================================================*/
-+//#ifdef CONFIG_MTD_PARTITIONS
-+static struct mtd_partition g_pasStatic_Partition[] = {
-+	{
-+                name:           "ALL",
-+                size:           MTDPART_SIZ_FULL,
-+                offset:         0,
-+        },
-+        /* Put your own partition definitions here */
-+        {
-+                name:           "Bootloader",
-+                size:           MTD_BOOT_PART_SIZE,
-+                offset:         0,
-+        }, {
-+                name:           "Config",
-+                size:           MTD_CONFIG_PART_SIZE,
-+                offset:         MTDPART_OFS_APPEND
-+        }, {
-+                name:           "Factory",
-+                size:           MTD_FACTORY_PART_SIZE,
-+                offset:         MTDPART_OFS_APPEND
-+#ifdef CONFIG_RT2880_ROOTFS_IN_FLASH
-+        }, {
-+                name:           "Kernel",
-+                size:           MTD_KERN_PART_SIZE,
-+                offset:         MTDPART_OFS_APPEND,
-+        }, {
-+                name:           "RootFS",
-+                size:           MTD_ROOTFS_PART_SIZE,
-+                offset:         MTDPART_OFS_APPEND,
-+#ifdef CONFIG_ROOTFS_IN_FLASH_NO_PADDING
-+        }, {
-+                name:           "Kernel_RootFS",
-+                size:           MTD_KERN_PART_SIZE + MTD_ROOTFS_PART_SIZE,
-+                offset:         MTD_BOOT_PART_SIZE + MTD_CONFIG_PART_SIZE + MTD_FACTORY_PART_SIZE,
-+#endif
-+#else //CONFIG_RT2880_ROOTFS_IN_RAM
-+        }, {
-+                name:           "Kernel",
-+                size:           0x10000,
-+                offset:         MTDPART_OFS_APPEND,
-+#endif
-+#ifdef CONFIG_DUAL_IMAGE
-+        }, {
-+                name:           "Kernel2",
-+                size:           MTD_KERN2_PART_SIZE,
-+                offset:         MTD_KERN2_PART_OFFSET,
-+#ifdef CONFIG_RT2880_ROOTFS_IN_FLASH
-+        }, {
-+                name:           "RootFS2",
-+                size:           MTD_ROOTFS2_PART_SIZE,
-+                offset:         MTD_ROOTFS2_PART_OFFSET,
-+#endif
-+#endif
-+        }
-+
-+};
-+
-+#define NUM_PARTITIONS ARRAY_SIZE(g_pasStatic_Partition)
-+extern int part_num;	// = NUM_PARTITIONS;
-+//#endif
-+#undef RECONFIG_PARTITION_SIZE
-+
diff --git a/iopsys-ramips/patches-4.14/0040-nand-hack.patch b/iopsys-ramips/patches-4.14/0040-nand-hack.patch
deleted file mode 100644
index b708b3b9cb00573b82f0db98780c452d549fbc03..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0040-nand-hack.patch
+++ /dev/null
@@ -1,32 +0,0 @@
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -1908,6 +1908,9 @@ static int nand_do_read_ops(struct mtd_i
- 						 __func__, buf);
- 
- read_retry:
-+#ifdef CONFIG_MTK_MTD_NAND
-+			ret = chip->read_page(mtd, chip, bufpoi, page);
-+#else
- 			if (nand_standard_page_accessors(&chip->ecc))
- 				chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
- 
-@@ -1927,6 +1930,7 @@ read_retry:
- 			else
- 				ret = chip->ecc.read_page(mtd, chip, bufpoi,
- 							  oob_required, page);
-+#endif
- 			if (ret < 0) {
- 				if (use_bufpoi)
- 					/* Invalidate page cache */
---- a/include/linux/mtd/rawnand.h
-+++ b/include/linux/mtd/rawnand.h
-@@ -895,6 +895,9 @@ struct nand_chip {
- 	int (*setup_data_interface)(struct mtd_info *mtd, int chipnr,
- 				    const struct nand_data_interface *conf);
- 
-+#ifdef CONFIG_MTK_MTD_NAND
-+	int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, u8 *buf, int page);
-+#endif /* CONFIG_MTK_MTD_NAND */
- 
- 	int chip_delay;
- 	unsigned int options;
diff --git a/iopsys-ramips/patches-4.14/0043-spi-add-mt7621-support.patch b/iopsys-ramips/patches-4.14/0043-spi-add-mt7621-support.patch
deleted file mode 100644
index b607f2bdf42af87a342a79b893692825cb021169..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0043-spi-add-mt7621-support.patch
+++ /dev/null
@@ -1,487 +0,0 @@
-From cbd66c626e16743b05af807ad48012c0a097b9fb Mon Sep 17 00:00:00 2001
-From: Stefan Roese <sr@denx.de>
-Date: Mon, 25 Mar 2019 09:29:25 +0100
-Subject: [PATCH] spi: mt7621: Move SPI driver out of staging
-
-This patch moves the MT7621 SPI driver, which is used on some Ralink /
-MediaTek MT76xx MIPS SoC's, out of the staging directory. No changes to
-the source code are done in this patch.
-
-This driver version was tested successfully on an MT7688 based platform
-with an SPI NOR on CS0 and an SPI NAND on CS1 without any issues (so
-far).
-
-This patch also documents the devicetree bindings for the MT7621 SPI
-device driver.
-
-Signed-off-by: Stefan Roese <sr@denx.de>
-Cc: Rob Herring <robh@kernel.org>
-Cc: Mark Brown <broonie@kernel.org>
-Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Cc: NeilBrown <neil@brown.name>
-Cc: Sankalp Negi <sankalpnegi2310@gmail.com>
-Cc: Chuanhong Guo <gch981213@gmail.com>
-Cc: John Crispin <john@phrozen.org>
-Cc: Armando Miraglia <arma2ff0@gmail.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- .../devicetree/bindings/spi/spi-mt7621.txt    | 26 ++++++
- drivers/spi/Kconfig                           |  6 ++
- drivers/spi/Makefile                          |  1 +
- .../{staging/mt7621-spi => spi}/spi-mt7621.c  | 83 +++++++++----------
- drivers/staging/Kconfig                       |  2 -
- drivers/staging/Makefile                      |  1 -
- drivers/staging/mt7621-spi/Kconfig            |  6 --
- drivers/staging/mt7621-spi/Makefile           |  1 -
- drivers/staging/mt7621-spi/TODO               |  5 --
- 9 files changed, 74 insertions(+), 57 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/spi/spi-mt7621.txt
- rename drivers/{staging/mt7621-spi => spi}/spi-mt7621.c (88%)
- delete mode 100644 drivers/staging/mt7621-spi/Kconfig
- delete mode 100644 drivers/staging/mt7621-spi/Makefile
- delete mode 100644 drivers/staging/mt7621-spi/TODO
-
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -569,6 +569,12 @@ config SPI_RT2880
- 	help
- 	  This selects a driver for the Ralink RT288x/RT305x SPI Controller.
- 
-+config SPI_MT7621
-+	tristate "MediaTek MT7621 SPI Controller"
-+	depends on RALINK
-+	help
-+	  This selects a driver for the MediaTek MT7621 SPI Controller.
-+
- config SPI_S3C24XX
- 	tristate "Samsung S3C24XX series SPI"
- 	depends on ARCH_S3C24XX
---- a/drivers/spi/Makefile
-+++ b/drivers/spi/Makefile
-@@ -60,6 +60,7 @@ obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mp
- obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o
- obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o
- obj-$(CONFIG_SPI_MT65XX)                += spi-mt65xx.o
-+obj-$(CONFIG_SPI_MT7621)		+= spi-mt7621.o
- obj-$(CONFIG_SPI_MXS)			+= spi-mxs.o
- obj-$(CONFIG_SPI_NUC900)		+= spi-nuc900.o
- obj-$(CONFIG_SPI_OC_TINY)		+= spi-oc-tiny.o
---- /dev/null
-+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,416 @@
-+// SPDX-License-Identifier: GPL-2.0
-+//
-+// spi-mt7621.c -- MediaTek MT7621 SPI controller driver
-+//
-+// Copyright (C) 2011 Sergiy <piratfm@gmail.com>
-+// Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
-+// Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
-+//
-+// Some parts are based on spi-orion.c:
-+//   Author: Shadi Ammouri <shadi@marvell.com>
-+//   Copyright (C) 2007-2008 Marvell Ltd.
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of_device.h>
-+#include <linux/reset.h>
-+#include <linux/spi/spi.h>
-+
-+#define DRIVER_NAME		"spi-mt7621"
-+
-+/* in usec */
-+#define RALINK_SPI_WAIT_MAX_LOOP 2000
-+
-+/* SPISTAT register bit field */
-+#define SPISTAT_BUSY		BIT(0)
-+
-+#define MT7621_SPI_TRANS	0x00
-+#define SPITRANS_BUSY		BIT(16)
-+
-+#define MT7621_SPI_OPCODE	0x04
-+#define MT7621_SPI_DATA0	0x08
-+#define MT7621_SPI_DATA4	0x18
-+#define SPI_CTL_TX_RX_CNT_MASK	0xff
-+#define SPI_CTL_START		BIT(8)
-+
-+#define MT7621_SPI_MASTER	0x28
-+#define MASTER_MORE_BUFMODE	BIT(2)
-+#define MASTER_FULL_DUPLEX	BIT(10)
-+#define MASTER_RS_CLK_SEL	GENMASK(27, 16)
-+#define MASTER_RS_CLK_SEL_SHIFT	16
-+#define MASTER_RS_SLAVE_SEL	GENMASK(31, 29)
-+
-+#define MT7621_SPI_MOREBUF	0x2c
-+#define MT7621_SPI_POLAR	0x38
-+#define MT7621_SPI_SPACE	0x3c
-+
-+#define MT7621_CPHA		BIT(5)
-+#define MT7621_CPOL		BIT(4)
-+#define MT7621_LSB_FIRST	BIT(3)
-+
-+struct mt7621_spi {
-+	struct spi_controller	*master;
-+	void __iomem		*base;
-+	unsigned int		sys_freq;
-+	unsigned int		speed;
-+	struct clk		*clk;
-+	int			pending_write;
-+};
-+
-+static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)
-+{
-+	return spi_controller_get_devdata(spi->master);
-+}
-+
-+static inline u32 mt7621_spi_read(struct mt7621_spi *rs, u32 reg)
-+{
-+	return ioread32(rs->base + reg);
-+}
-+
-+static inline void mt7621_spi_write(struct mt7621_spi *rs, u32 reg, u32 val)
-+{
-+	iowrite32(val, rs->base + reg);
-+}
-+
-+static void mt7621_spi_set_cs(struct spi_device *spi, int enable)
-+{
-+	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+	int cs = spi->chip_select;
-+	u32 polar = 0;
-+	u32 master;
-+
-+	/*
-+	 * Select SPI device 7, enable "more buffer mode" and disable
-+	 * full-duplex (only half-duplex really works on this chip
-+	 * reliably)
-+	 */
-+	master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+	master |= MASTER_RS_SLAVE_SEL | MASTER_MORE_BUFMODE;
-+	master &= ~MASTER_FULL_DUPLEX;
-+	mt7621_spi_write(rs, MT7621_SPI_MASTER, master);
-+
-+	rs->pending_write = 0;
-+
-+	if (enable)
-+		polar = BIT(cs);
-+	mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
-+}
-+
-+static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)
-+{
-+	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+	u32 rate;
-+	u32 reg;
-+
-+	dev_dbg(&spi->dev, "speed:%u\n", speed);
-+
-+	rate = DIV_ROUND_UP(rs->sys_freq, speed);
-+	dev_dbg(&spi->dev, "rate-1:%u\n", rate);
-+
-+	if (rate > 4097)
-+		return -EINVAL;
-+
-+	if (rate < 2)
-+		rate = 2;
-+
-+	reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+	reg &= ~MASTER_RS_CLK_SEL;
-+	reg |= (rate - 2) << MASTER_RS_CLK_SEL_SHIFT;
-+	rs->speed = speed;
-+
-+	reg &= ~MT7621_LSB_FIRST;
-+	if (spi->mode & SPI_LSB_FIRST)
-+		reg |= MT7621_LSB_FIRST;
-+
-+	/*
-+	 * This SPI controller seems to be tested on SPI flash only and some
-+	 * bits are swizzled under other SPI modes probably due to incorrect
-+	 * wiring inside the silicon. Only mode 0 works correctly.
-+	 */
-+	reg &= ~(MT7621_CPHA | MT7621_CPOL);
-+
-+	mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
-+
-+	return 0;
-+}
-+
-+static inline int mt7621_spi_wait_till_ready(struct mt7621_spi *rs)
-+{
-+	int i;
-+
-+	for (i = 0; i < RALINK_SPI_WAIT_MAX_LOOP; i++) {
-+		u32 status;
-+
-+		status = mt7621_spi_read(rs, MT7621_SPI_TRANS);
-+		if ((status & SPITRANS_BUSY) == 0)
-+			return 0;
-+		cpu_relax();
-+		udelay(1);
-+	}
-+
-+	return -ETIMEDOUT;
-+}
-+
-+static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs,
-+					int rx_len, u8 *buf)
-+{
-+	int tx_len;
-+
-+	/*
-+	 * Combine with any pending write, and perform one or more half-duplex
-+	 * transactions reading 'len' bytes. Data to be written is already in
-+	 * MT7621_SPI_DATA.
-+	 */
-+	tx_len = rs->pending_write;
-+	rs->pending_write = 0;
-+
-+	while (rx_len || tx_len) {
-+		int i;
-+		u32 val = (min(tx_len, 4) * 8) << 24;
-+		int rx = min(rx_len, 32);
-+
-+		if (tx_len > 4)
-+			val |= (tx_len - 4) * 8;
-+		val |= (rx * 8) << 12;
-+		mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
-+
-+		tx_len = 0;
-+
-+		val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
-+		val |= SPI_CTL_START;
-+		mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
-+
-+		mt7621_spi_wait_till_ready(rs);
-+
-+		for (i = 0; i < rx; i++) {
-+			if ((i % 4) == 0)
-+				val = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);
-+			*buf++ = val & 0xff;
-+			val >>= 8;
-+		}
-+
-+		rx_len -= i;
-+	}
-+}
-+
-+static inline void mt7621_spi_flush(struct mt7621_spi *rs)
-+{
-+	mt7621_spi_read_half_duplex(rs, 0, NULL);
-+}
-+
-+static void mt7621_spi_write_half_duplex(struct mt7621_spi *rs,
-+					 int tx_len, const u8 *buf)
-+{
-+	int len = rs->pending_write;
-+	int val = 0;
-+
-+	if (len & 3) {
-+		val = mt7621_spi_read(rs, MT7621_SPI_OPCODE + (len & ~3));
-+		if (len < 4) {
-+			val <<= (4 - len) * 8;
-+			val = swab32(val);
-+		}
-+	}
-+
-+	while (tx_len > 0) {
-+		if (len >= 36) {
-+			rs->pending_write = len;
-+			mt7621_spi_flush(rs);
-+			len = 0;
-+		}
-+
-+		val |= *buf++ << (8 * (len & 3));
-+		len++;
-+		if ((len & 3) == 0) {
-+			if (len == 4)
-+				/* The byte-order of the opcode is weird! */
-+				val = swab32(val);
-+			mt7621_spi_write(rs, MT7621_SPI_OPCODE + len - 4, val);
-+			val = 0;
-+		}
-+		tx_len -= 1;
-+	}
-+
-+	if (len & 3) {
-+		if (len < 4) {
-+			val = swab32(val);
-+			val >>= (4 - len) * 8;
-+		}
-+		mt7621_spi_write(rs, MT7621_SPI_OPCODE + (len & ~3), val);
-+	}
-+
-+	rs->pending_write = len;
-+}
-+
-+static int mt7621_spi_transfer_one_message(struct spi_controller *master,
-+					   struct spi_message *m)
-+{
-+	struct mt7621_spi *rs = spi_controller_get_devdata(master);
-+	struct spi_device *spi = m->spi;
-+	unsigned int speed = spi->max_speed_hz;
-+	struct spi_transfer *t = NULL;
-+	int status = 0;
-+
-+	mt7621_spi_wait_till_ready(rs);
-+
-+	list_for_each_entry(t, &m->transfers, transfer_list)
-+		if (t->speed_hz < speed)
-+			speed = t->speed_hz;
-+
-+	if (mt7621_spi_prepare(spi, speed)) {
-+		status = -EIO;
-+		goto msg_done;
-+	}
-+
-+	/* Assert CS */
-+	mt7621_spi_set_cs(spi, 1);
-+
-+	m->actual_length = 0;
-+	list_for_each_entry(t, &m->transfers, transfer_list) {
-+		if ((t->rx_buf) && (t->tx_buf)) {
-+			/*
-+			 * This controller will shift some extra data out
-+			 * of spi_opcode if (mosi_bit_cnt > 0) &&
-+			 * (cmd_bit_cnt == 0). So the claimed full-duplex
-+			 * support is broken since we have no way to read
-+			 * the MISO value during that bit.
-+			 */
-+			status = -EIO;
-+			goto msg_done;
-+		} else if (t->rx_buf) {
-+			mt7621_spi_read_half_duplex(rs, t->len, t->rx_buf);
-+		} else if (t->tx_buf) {
-+			mt7621_spi_write_half_duplex(rs, t->len, t->tx_buf);
-+		}
-+		m->actual_length += t->len;
-+	}
-+
-+	/* Flush data and deassert CS */
-+	mt7621_spi_flush(rs);
-+	mt7621_spi_set_cs(spi, 0);
-+
-+msg_done:
-+	m->status = status;
-+	spi_finalize_current_message(master);
-+
-+	return 0;
-+}
-+
-+static int mt7621_spi_setup(struct spi_device *spi)
-+{
-+	struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+
-+	if ((spi->max_speed_hz == 0) ||
-+	    (spi->max_speed_hz > (rs->sys_freq / 2)))
-+		spi->max_speed_hz = (rs->sys_freq / 2);
-+
-+	if (spi->max_speed_hz < (rs->sys_freq / 4097)) {
-+		dev_err(&spi->dev, "setup: requested speed is too low %d Hz\n",
-+			spi->max_speed_hz);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id mt7621_spi_match[] = {
-+	{ .compatible = "ralink,mt7621-spi" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, mt7621_spi_match);
-+
-+static int mt7621_spi_probe(struct platform_device *pdev)
-+{
-+	const struct of_device_id *match;
-+	struct spi_controller *master;
-+	struct mt7621_spi *rs;
-+	void __iomem *base;
-+	struct resource *r;
-+	int status = 0;
-+	struct clk *clk;
-+	int ret;
-+
-+	match = of_match_device(mt7621_spi_match, &pdev->dev);
-+	if (!match)
-+		return -EINVAL;
-+
-+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	base = devm_ioremap_resource(&pdev->dev, r);
-+	if (IS_ERR(base))
-+		return PTR_ERR(base);
-+
-+	clk = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(clk)) {
-+		dev_err(&pdev->dev, "unable to get SYS clock, err=%d\n",
-+			status);
-+		return PTR_ERR(clk);
-+	}
-+
-+	status = clk_prepare_enable(clk);
-+	if (status)
-+		return status;
-+
-+	master = spi_alloc_master(&pdev->dev, sizeof(*rs));
-+	if (!master) {
-+		dev_info(&pdev->dev, "master allocation failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	master->mode_bits = SPI_LSB_FIRST;
-+	master->flags = SPI_CONTROLLER_HALF_DUPLEX;
-+	master->setup = mt7621_spi_setup;
-+	master->transfer_one_message = mt7621_spi_transfer_one_message;
-+	master->bits_per_word_mask = SPI_BPW_MASK(8);
-+	master->dev.of_node = pdev->dev.of_node;
-+	master->num_chipselect = 2;
-+
-+	dev_set_drvdata(&pdev->dev, master);
-+
-+	rs = spi_controller_get_devdata(master);
-+	rs->base = base;
-+	rs->clk = clk;
-+	rs->master = master;
-+	rs->sys_freq = clk_get_rate(rs->clk);
-+	rs->pending_write = 0;
-+	dev_info(&pdev->dev, "sys_freq: %u\n", rs->sys_freq);
-+
-+	ret = device_reset(&pdev->dev);
-+	if (ret) {
-+		dev_err(&pdev->dev, "SPI reset failed!\n");
-+		return ret;
-+	}
-+
-+	return devm_spi_register_controller(&pdev->dev, master);
-+}
-+
-+static int mt7621_spi_remove(struct platform_device *pdev)
-+{
-+	struct spi_controller *master;
-+	struct mt7621_spi *rs;
-+
-+	master = dev_get_drvdata(&pdev->dev);
-+	rs = spi_controller_get_devdata(master);
-+
-+	clk_disable_unprepare(rs->clk);
-+
-+	return 0;
-+}
-+
-+MODULE_ALIAS("platform:" DRIVER_NAME);
-+
-+static struct platform_driver mt7621_spi_driver = {
-+	.driver = {
-+		.name = DRIVER_NAME,
-+		.of_match_table = mt7621_spi_match,
-+	},
-+	.probe = mt7621_spi_probe,
-+	.remove = mt7621_spi_remove,
-+};
-+
-+module_platform_driver(mt7621_spi_driver);
-+
-+MODULE_DESCRIPTION("MT7621 SPI driver");
-+MODULE_AUTHOR("Felix Fietkau <nbd@nbd.name>");
-+MODULE_LICENSE("GPL");
diff --git a/iopsys-ramips/patches-4.14/0045-i2c-add-mt7621-driver.patch b/iopsys-ramips/patches-4.14/0045-i2c-add-mt7621-driver.patch
deleted file mode 100644
index a848085520f96be0510b7bfc4b379e3ad206e958..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0045-i2c-add-mt7621-driver.patch
+++ /dev/null
@@ -1,473 +0,0 @@
-From d5c54ff3d1db0a4348fa04d8e78f3bf6063e3afc Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Mon, 7 Dec 2015 17:21:27 +0100
-Subject: [PATCH 45/53] i2c: add mt7621 driver
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/i2c/busses/Kconfig      |    4 +
- drivers/i2c/busses/Makefile     |    1 +
- drivers/i2c/busses/i2c-mt7621.c |  303 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 308 insertions(+)
- create mode 100644 drivers/i2c/busses/i2c-mt7621.c
-
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -869,6 +869,11 @@ config I2C_RALINK
- 	depends on RALINK && !SOC_MT7621
- 	select OF_I2C
- 
-+config I2C_MT7621
-+	tristate "MT7621/MT7628 I2C Controller"
-+	depends on RALINK && (SOC_MT7620 || SOC_MT7621)
-+	select OF_I2C
-+
- config HAVE_S3C2410_I2C
- 	bool
- 	help
---- a/drivers/i2c/busses/Makefile
-+++ b/drivers/i2c/busses/Makefile
-@@ -85,6 +85,7 @@ obj-$(CONFIG_I2C_PUV3)		+= i2c-puv3.o
- obj-$(CONFIG_I2C_PXA)		+= i2c-pxa.o
- obj-$(CONFIG_I2C_PXA_PCI)	+= i2c-pxa-pci.o
- obj-$(CONFIG_I2C_RALINK)	+= i2c-ralink.o
-+obj-$(CONFIG_I2C_MT7621)	+= i2c-mt7621.o
- obj-$(CONFIG_I2C_QUP)		+= i2c-qup.o
- obj-$(CONFIG_I2C_RIIC)		+= i2c-riic.o
- obj-$(CONFIG_I2C_RK3X)		+= i2c-rk3x.o
---- /dev/null
-+++ b/drivers/i2c/busses/i2c-mt7621.c
-@@ -0,0 +1,433 @@
-+/*
-+ * drivers/i2c/busses/i2c-mt7621.c
-+ *
-+ * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
-+ * Copyright (C) 2016 Michael Lee <igvtee@gmail.com>
-+ *
-+ * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
-+ * (C) 2014 Sittisak <sittisaks@hotmail.com>
-+ *
-+ * This software is licensed under the terms of the GNU General Public
-+ * License version 2, as published by the Free Software Foundation, and
-+ * may be copied, distributed, and modified under those terms.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ */
-+
-+#include <linux/interrupt.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/reset.h>
-+#include <linux/delay.h>
-+#include <linux/slab.h>
-+#include <linux/init.h>
-+#include <linux/errno.h>
-+#include <linux/platform_device.h>
-+#include <linux/of_platform.h>
-+#include <linux/i2c.h>
-+#include <linux/io.h>
-+#include <linux/err.h>
-+#include <linux/clk.h>
-+
-+#define REG_SM0CFG0		0x08
-+#define REG_SM0DOUT		0x10
-+#define REG_SM0DIN		0x14
-+#define REG_SM0ST		0x18
-+#define REG_SM0AUTO		0x1C
-+#define REG_SM0CFG1		0x20
-+#define REG_SM0CFG2		0x28
-+#define REG_SM0CTL0		0x40
-+#define REG_SM0CTL1		0x44
-+#define REG_SM0D0		0x50
-+#define REG_SM0D1		0x54
-+#define REG_PINTEN		0x5C
-+#define REG_PINTST		0x60
-+#define REG_PINTCL		0x64
-+
-+/* REG_SM0CFG0 */
-+#define I2C_DEVADDR_MASK	0x7f
-+
-+/* REG_SM0ST */
-+#define I2C_DATARDY		BIT(2)
-+#define I2C_SDOEMPTY		BIT(1)
-+#define I2C_BUSY		BIT(0)
-+
-+/* REG_SM0AUTO */
-+#define READ_CMD		BIT(0)
-+
-+/* REG_SM0CFG1 */
-+#define BYTECNT_MAX		64
-+#define SET_BYTECNT(x)		(x - 1)
-+
-+/* REG_SM0CFG2 */
-+#define AUTOMODE_EN		BIT(0)
-+
-+/* REG_SM0CTL0 */
-+#define ODRAIN_HIGH_SM0		BIT(31)
-+#define VSYNC_SHIFT		28
-+#define VSYNC_MASK		0x3
-+#define VSYNC_PULSE		(0x1 << VSYNC_SHIFT)
-+#define VSYNC_RISING		(0x2 << VSYNC_SHIFT)
-+#define CLK_DIV_SHIFT		16
-+#define CLK_DIV_MASK		0xfff
-+#define DEG_CNT_SHIFT		8
-+#define DEG_CNT_MASK		0xff
-+#define WAIT_HIGH		BIT(6)
-+#define DEG_EN			BIT(5)
-+#define CS_STATUA		BIT(4)
-+#define SCL_STATUS		BIT(3)
-+#define SDA_STATUS		BIT(2)
-+#define SM0_EN			BIT(1)
-+#define SCL_STRECH		BIT(0)
-+
-+/* REG_SM0CTL1 */
-+#define ACK_SHIFT		16
-+#define ACK_MASK		0xff
-+#define PGLEN_SHIFT		8
-+#define PGLEN_MASK		0x7
-+#define SM0_MODE_SHIFT		4
-+#define SM0_MODE_MASK		0x7
-+#define SM0_MODE_START		0x1
-+#define SM0_MODE_WRITE		0x2
-+#define SM0_MODE_STOP		0x3
-+#define SM0_MODE_READ_NACK	0x4
-+#define SM0_MODE_READ_ACK	0x5
-+#define SM0_TRI_BUSY		BIT(0)
-+
-+/* timeout waiting for I2C devices to respond (clock streching) */
-+#define TIMEOUT_MS              1000
-+#define DELAY_INTERVAL_US       100
-+
-+struct mtk_i2c {
-+	void __iomem *base;
-+	struct clk *clk;
-+	struct device *dev;
-+	struct i2c_adapter adap;
-+	u32 cur_clk;
-+	u32 clk_div;
-+	u32 flags;
-+};
-+
-+static void mtk_i2c_w32(struct mtk_i2c *i2c, u32 val, unsigned reg)
-+{
-+	iowrite32(val, i2c->base + reg);
-+}
-+
-+static u32 mtk_i2c_r32(struct mtk_i2c *i2c, unsigned reg)
-+{
-+	return ioread32(i2c->base + reg);
-+}
-+
-+static int poll_down_timeout(void __iomem *addr, u32 mask)
-+{
-+	unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS);
-+
-+	do {
-+		if (!(readl_relaxed(addr) & mask))
-+			return 0;
-+
-+		usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50);
-+	} while (time_before(jiffies, timeout));
-+
-+	return (readl_relaxed(addr) & mask) ? -EAGAIN : 0;
-+}
-+
-+static int mtk_i2c_wait_idle(struct mtk_i2c *i2c)
-+{
-+	int ret;
-+
-+	ret = poll_down_timeout(i2c->base + REG_SM0ST, I2C_BUSY);
-+	if (ret < 0)
-+		dev_dbg(i2c->dev, "idle err(%d)\n", ret);
-+
-+	return ret;
-+}
-+
-+static int poll_up_timeout(void __iomem *addr, u32 mask)
-+{
-+	unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS);
-+	u32 status;
-+
-+	do {
-+		status = readl_relaxed(addr);
-+		if (status & mask)
-+			return 0;
-+		usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50);
-+	} while (time_before(jiffies, timeout));
-+
-+	return -ETIMEDOUT;
-+}
-+
-+static int mtk_i2c_wait_rx_done(struct mtk_i2c *i2c)
-+{
-+	int ret;
-+
-+	ret = poll_up_timeout(i2c->base + REG_SM0ST, I2C_DATARDY);
-+	if (ret < 0)
-+		dev_dbg(i2c->dev, "rx err(%d)\n", ret);
-+
-+	return ret;
-+}
-+
-+static int mtk_i2c_wait_tx_done(struct mtk_i2c *i2c)
-+{
-+	int ret;
-+
-+	ret = poll_up_timeout(i2c->base + REG_SM0ST, I2C_SDOEMPTY);
-+	if (ret < 0)
-+		dev_dbg(i2c->dev, "tx err(%d)\n", ret);
-+
-+	return ret;
-+}
-+
-+static void mtk_i2c_reset(struct mtk_i2c *i2c)
-+{
-+	u32 reg;
-+	device_reset(i2c->adap.dev.parent);
-+	barrier();
-+
-+	/* ctrl0 */
-+	reg = ODRAIN_HIGH_SM0 | VSYNC_PULSE | (i2c->clk_div << CLK_DIV_SHIFT) |
-+		WAIT_HIGH | SM0_EN;
-+	mtk_i2c_w32(i2c, reg, REG_SM0CTL0);
-+
-+	/* auto mode */
-+	mtk_i2c_w32(i2c, AUTOMODE_EN, REG_SM0CFG2);
-+}
-+
-+static void mtk_i2c_dump_reg(struct mtk_i2c *i2c)
-+{
-+	dev_dbg(i2c->dev, "cfg0 %08x, dout %08x, din %08x, " \
-+			"status %08x, auto %08x, cfg1 %08x, " \
-+			"cfg2 %08x, ctl0 %08x, ctl1 %08x\n",
-+			mtk_i2c_r32(i2c, REG_SM0CFG0),
-+			mtk_i2c_r32(i2c, REG_SM0DOUT),
-+			mtk_i2c_r32(i2c, REG_SM0DIN),
-+			mtk_i2c_r32(i2c, REG_SM0ST),
-+			mtk_i2c_r32(i2c, REG_SM0AUTO),
-+			mtk_i2c_r32(i2c, REG_SM0CFG1),
-+			mtk_i2c_r32(i2c, REG_SM0CFG2),
-+			mtk_i2c_r32(i2c, REG_SM0CTL0),
-+			mtk_i2c_r32(i2c, REG_SM0CTL1));
-+}
-+
-+static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
-+		int num)
-+{
-+	struct mtk_i2c *i2c;
-+	struct i2c_msg *pmsg;
-+	int i, j, ret;
-+	u32 cmd;
-+
-+	i2c = i2c_get_adapdata(adap);
-+
-+	for (i = 0; i < num; i++) {
-+		pmsg = &msgs[i];
-+		cmd = 0;
-+
-+		dev_dbg(i2c->dev, "addr: 0x%x, len: %d, flags: 0x%x\n",
-+				pmsg->addr, pmsg->len, pmsg->flags);
-+
-+		/* wait hardware idle */
-+		if ((ret = mtk_i2c_wait_idle(i2c)))
-+			goto err_timeout;
-+
-+		if (pmsg->flags & I2C_M_TEN) {
-+			dev_dbg(i2c->dev, "10 bits addr not supported\n");
-+			return -EINVAL;
-+		} else {
-+			/* 7 bits address */
-+			mtk_i2c_w32(i2c, pmsg->addr & I2C_DEVADDR_MASK,
-+					REG_SM0CFG0);
-+		}
-+
-+		/* buffer length */
-+		if (pmsg->len == 0) {
-+			dev_dbg(i2c->dev, "length is 0\n");
-+			return -EINVAL;
-+		} else
-+			mtk_i2c_w32(i2c, SET_BYTECNT(pmsg->len),
-+					REG_SM0CFG1);
-+
-+		j = 0;
-+		if (pmsg->flags & I2C_M_RD) {
-+			cmd |= READ_CMD;
-+			/* start transfer */
-+			barrier();
-+			mtk_i2c_w32(i2c, cmd, REG_SM0AUTO);
-+			do {
-+				/* wait */
-+				if ((ret = mtk_i2c_wait_rx_done(i2c)))
-+					goto err_timeout;
-+				/* read data */
-+				if (pmsg->len)
-+					pmsg->buf[j] = mtk_i2c_r32(i2c,
-+							REG_SM0DIN);
-+				j++;
-+			} while (j < pmsg->len);
-+		} else {
-+			do {
-+				/* write data */
-+				if (pmsg->len)
-+					mtk_i2c_w32(i2c, pmsg->buf[j],
-+							REG_SM0DOUT);
-+				/* start transfer */
-+				if (j == 0) {
-+					barrier();
-+					mtk_i2c_w32(i2c, cmd, REG_SM0AUTO);
-+				}
-+				/* wait */
-+				if ((ret = mtk_i2c_wait_tx_done(i2c)))
-+					goto err_timeout;
-+				j++;
-+			} while (j < pmsg->len);
-+		}
-+	}
-+	/* the return value is number of executed messages */
-+	ret = i;
-+
-+	return ret;
-+
-+err_timeout:
-+	mtk_i2c_dump_reg(i2c);
-+	mtk_i2c_reset(i2c);
-+	return ret;
-+}
-+
-+static u32 mtk_i2c_func(struct i2c_adapter *a)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+static const struct i2c_algorithm mtk_i2c_algo = {
-+	.master_xfer	= mtk_i2c_master_xfer,
-+	.functionality	= mtk_i2c_func,
-+};
-+
-+static const struct of_device_id i2c_mtk_dt_ids[] = {
-+	{ .compatible = "mediatek,mt7621-i2c" },
-+	{ /* sentinel */ }
-+};
-+
-+MODULE_DEVICE_TABLE(of, i2c_mtk_dt_ids);
-+
-+static struct i2c_adapter_quirks mtk_i2c_quirks = {
-+        .max_write_len = BYTECNT_MAX,
-+        .max_read_len = BYTECNT_MAX,
-+};
-+
-+static void mtk_i2c_init(struct mtk_i2c *i2c)
-+{
-+	i2c->clk_div = clk_get_rate(i2c->clk) / i2c->cur_clk;
-+	if (i2c->clk_div > CLK_DIV_MASK)
-+		i2c->clk_div = CLK_DIV_MASK;
-+
-+	mtk_i2c_reset(i2c);
-+}
-+
-+static int mtk_i2c_probe(struct platform_device *pdev)
-+{
-+	struct resource *res;
-+	struct mtk_i2c *i2c;
-+	struct i2c_adapter *adap;
-+	const struct of_device_id *match;
-+	int ret;
-+
-+	match = of_match_device(i2c_mtk_dt_ids, &pdev->dev);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res) {
-+		dev_err(&pdev->dev, "no memory resource found\n");
-+		return -ENODEV;
-+	}
-+
-+	i2c = devm_kzalloc(&pdev->dev, sizeof(struct mtk_i2c), GFP_KERNEL);
-+	if (!i2c) {
-+		dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
-+		return -ENOMEM;
-+	}
-+
-+	i2c->base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(i2c->base))
-+		return PTR_ERR(i2c->base);
-+
-+	i2c->clk = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(i2c->clk)) {
-+		dev_err(&pdev->dev, "no clock defined\n");
-+		return -ENODEV;
-+	}
-+	clk_prepare_enable(i2c->clk);
-+	i2c->dev = &pdev->dev;
-+
-+	if (of_property_read_u32(pdev->dev.of_node,
-+				"clock-frequency", &i2c->cur_clk))
-+		i2c->cur_clk = 100000;
-+
-+	adap = &i2c->adap;
-+	adap->owner = THIS_MODULE;
-+	adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-+	adap->algo = &mtk_i2c_algo;
-+	adap->retries = 3;
-+	adap->dev.parent = &pdev->dev;
-+	i2c_set_adapdata(adap, i2c);
-+	adap->dev.of_node = pdev->dev.of_node;
-+	strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
-+	adap->quirks = &mtk_i2c_quirks;
-+
-+	platform_set_drvdata(pdev, i2c);
-+
-+	mtk_i2c_init(i2c);
-+
-+	ret = i2c_add_adapter(adap);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to add adapter\n");
-+		clk_disable_unprepare(i2c->clk);
-+		return ret;
-+	}
-+
-+	dev_info(&pdev->dev, "clock %uKHz, re-start not support\n",
-+			i2c->cur_clk/1000);
-+
-+	return ret;
-+}
-+
-+static int mtk_i2c_remove(struct platform_device *pdev)
-+{
-+	struct mtk_i2c *i2c = platform_get_drvdata(pdev);
-+
-+	i2c_del_adapter(&i2c->adap);
-+	clk_disable_unprepare(i2c->clk);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver mtk_i2c_driver = {
-+	.probe		= mtk_i2c_probe,
-+	.remove		= mtk_i2c_remove,
-+	.driver		= {
-+		.owner	= THIS_MODULE,
-+		.name	= "i2c-mt7621",
-+		.of_match_table = i2c_mtk_dt_ids,
-+	},
-+};
-+
-+static int __init i2c_mtk_init (void)
-+{
-+	return platform_driver_register(&mtk_i2c_driver);
-+}
-+subsys_initcall(i2c_mtk_init);
-+
-+static void __exit i2c_mtk_exit (void)
-+{
-+	platform_driver_unregister(&mtk_i2c_driver);
-+}
-+module_exit(i2c_mtk_exit);
-+
-+MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
-+MODULE_DESCRIPTION("MT7621 I2c host driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:MT7621-I2C");
diff --git a/iopsys-ramips/patches-4.14/0047-DMA-ralink-add-rt2880-dma-engine.patch b/iopsys-ramips/patches-4.14/0047-DMA-ralink-add-rt2880-dma-engine.patch
deleted file mode 100644
index b74a48a2209c4a1f6d3b895c41db4601393ab0e4..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0047-DMA-ralink-add-rt2880-dma-engine.patch
+++ /dev/null
@@ -1,1757 +0,0 @@
-From f1c4d9e622c800e1f38b3818f933ec7597d1ccfb Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 27 Jul 2014 09:29:51 +0100
-Subject: [PATCH 47/53] DMA: ralink: add rt2880 dma engine
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/dma/Kconfig       |    6 +
- drivers/dma/Makefile      |    1 +
- drivers/dma/ralink-gdma.c |  577 +++++++++++++++++++++++++++++++++++++++++++++
- include/linux/dmaengine.h |    1 +
- 4 files changed, 585 insertions(+)
- create mode 100644 drivers/dma/ralink-gdma.c
-
---- a/drivers/dma/Kconfig
-+++ b/drivers/dma/Kconfig
-@@ -40,6 +40,18 @@ config ASYNC_TX_ENABLE_CHANNEL_SWITCH
- config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
- 	bool
- 
-+config DMA_RALINK
-+	tristate "RALINK DMA support"
-+	depends on RALINK && !SOC_RT288X
-+	select DMA_ENGINE
-+	select DMA_VIRTUAL_CHANNELS
-+
-+config MTK_HSDMA
-+	tristate "MTK HSDMA support"
-+	depends on RALINK && SOC_MT7621
-+	select DMA_ENGINE
-+	select DMA_VIRTUAL_CHANNELS
-+
- config DMA_ENGINE
- 	bool
- 
---- a/drivers/dma/Makefile
-+++ b/drivers/dma/Makefile
-@@ -71,6 +71,8 @@ obj-$(CONFIG_TI_EDMA) += edma.o
- obj-$(CONFIG_XGENE_DMA) += xgene-dma.o
- obj-$(CONFIG_ZX_DMA) += zx_dma.o
- obj-$(CONFIG_ST_FDMA) += st_fdma.o
-+obj-$(CONFIG_DMA_RALINK) += ralink-gdma.o
-+obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o
- 
- obj-y += qcom/
- obj-y += xilinx/
---- /dev/null
-+++ b/drivers/dma/ralink-gdma.c
-@@ -0,0 +1,928 @@
-+/*
-+ *  Copyright (C) 2013, Lars-Peter Clausen <lars@metafoo.de>
-+ *  GDMA4740 DMAC support
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under  the terms of the GNU General	 Public License as published by the
-+ *  Free Software Foundation;  either version 2 of the License, or (at your
-+ *  option) any later version.
-+ *
-+ */
-+
-+#include <linux/dmaengine.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+#include <linux/list.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/irq.h>
-+#include <linux/of_dma.h>
-+#include <linux/reset.h>
-+#include <linux/of_device.h>
-+
-+#include "virt-dma.h"
-+
-+#define GDMA_REG_SRC_ADDR(x)		(0x00 + (x) * 0x10)
-+#define GDMA_REG_DST_ADDR(x)		(0x04 + (x) * 0x10)
-+
-+#define GDMA_REG_CTRL0(x)		(0x08 + (x) * 0x10)
-+#define GDMA_REG_CTRL0_TX_MASK		0xffff
-+#define GDMA_REG_CTRL0_TX_SHIFT		16
-+#define GDMA_REG_CTRL0_CURR_MASK	0xff
-+#define GDMA_REG_CTRL0_CURR_SHIFT	8
-+#define	GDMA_REG_CTRL0_SRC_ADDR_FIXED	BIT(7)
-+#define GDMA_REG_CTRL0_DST_ADDR_FIXED	BIT(6)
-+#define GDMA_REG_CTRL0_BURST_MASK	0x7
-+#define GDMA_REG_CTRL0_BURST_SHIFT	3
-+#define	GDMA_REG_CTRL0_DONE_INT		BIT(2)
-+#define	GDMA_REG_CTRL0_ENABLE		BIT(1)
-+#define GDMA_REG_CTRL0_SW_MODE          BIT(0)
-+
-+#define GDMA_REG_CTRL1(x)		(0x0c + (x) * 0x10)
-+#define GDMA_REG_CTRL1_SEG_MASK		0xf
-+#define GDMA_REG_CTRL1_SEG_SHIFT	22
-+#define GDMA_REG_CTRL1_REQ_MASK		0x3f
-+#define GDMA_REG_CTRL1_SRC_REQ_SHIFT	16
-+#define GDMA_REG_CTRL1_DST_REQ_SHIFT	8
-+#define GDMA_REG_CTRL1_CONTINOUS	BIT(14)
-+#define GDMA_REG_CTRL1_NEXT_MASK	0x1f
-+#define GDMA_REG_CTRL1_NEXT_SHIFT	3
-+#define GDMA_REG_CTRL1_COHERENT		BIT(2)
-+#define GDMA_REG_CTRL1_FAIL		BIT(1)
-+#define GDMA_REG_CTRL1_MASK		BIT(0)
-+
-+#define GDMA_REG_UNMASK_INT		0x200
-+#define GDMA_REG_DONE_INT		0x204
-+
-+#define GDMA_REG_GCT			0x220
-+#define GDMA_REG_GCT_CHAN_MASK		0x3
-+#define GDMA_REG_GCT_CHAN_SHIFT		3
-+#define GDMA_REG_GCT_VER_MASK		0x3
-+#define GDMA_REG_GCT_VER_SHIFT		1
-+#define GDMA_REG_GCT_ARBIT_RR		BIT(0)
-+
-+#define GDMA_REG_REQSTS			0x2a0
-+#define GDMA_REG_ACKSTS			0x2a4
-+#define GDMA_REG_FINSTS			0x2a8
-+
-+/* for RT305X gdma registers */
-+#define GDMA_RT305X_CTRL0_REQ_MASK	0xf
-+#define GDMA_RT305X_CTRL0_SRC_REQ_SHIFT	12
-+#define GDMA_RT305X_CTRL0_DST_REQ_SHIFT	8
-+
-+#define GDMA_RT305X_CTRL1_FAIL		BIT(4)
-+#define GDMA_RT305X_CTRL1_NEXT_MASK	0x7
-+#define GDMA_RT305X_CTRL1_NEXT_SHIFT	1
-+
-+#define GDMA_RT305X_STATUS_INT		0x80
-+#define GDMA_RT305X_STATUS_SIGNAL	0x84
-+#define GDMA_RT305X_GCT			0x88
-+
-+/* for MT7621 gdma registers */
-+#define GDMA_REG_PERF_START(x)		(0x230 + (x) * 0x8)
-+#define GDMA_REG_PERF_END(x)		(0x234 + (x) * 0x8)
-+
-+enum gdma_dma_transfer_size {
-+	GDMA_TRANSFER_SIZE_4BYTE	= 0,
-+	GDMA_TRANSFER_SIZE_8BYTE	= 1,
-+	GDMA_TRANSFER_SIZE_16BYTE	= 2,
-+	GDMA_TRANSFER_SIZE_32BYTE	= 3,
-+	GDMA_TRANSFER_SIZE_64BYTE	= 4,
-+};
-+
-+struct gdma_dma_sg {
-+	dma_addr_t src_addr;
-+	dma_addr_t dst_addr;
-+	u32 len;
-+};
-+
-+struct gdma_dma_desc {
-+	struct virt_dma_desc vdesc;
-+
-+	enum dma_transfer_direction direction;
-+	bool cyclic;
-+
-+	u32 residue;
-+	unsigned int num_sgs;
-+	struct gdma_dma_sg sg[];
-+};
-+
-+struct gdma_dmaengine_chan {
-+	struct virt_dma_chan vchan;
-+	unsigned int id;
-+	unsigned int slave_id;
-+
-+	dma_addr_t fifo_addr;
-+	enum gdma_dma_transfer_size burst_size;
-+
-+	struct gdma_dma_desc *desc;
-+	unsigned int next_sg;
-+};
-+
-+struct gdma_dma_dev {
-+	struct dma_device ddev;
-+	struct device_dma_parameters dma_parms;
-+	struct gdma_data *data;
-+	void __iomem *base;
-+	struct tasklet_struct task;
-+	volatile unsigned long chan_issued;
-+	atomic_t cnt;
-+
-+	struct gdma_dmaengine_chan chan[];
-+};
-+
-+struct gdma_data
-+{
-+	int chancnt;
-+	u32 done_int_reg;
-+	void (*init)(struct gdma_dma_dev *dma_dev);
-+	int (*start_transfer)(struct gdma_dmaengine_chan *chan);
-+};
-+
-+static struct gdma_dma_dev *gdma_dma_chan_get_dev(
-+	struct gdma_dmaengine_chan *chan)
-+{
-+	return container_of(chan->vchan.chan.device, struct gdma_dma_dev,
-+		ddev);
-+}
-+
-+static struct gdma_dmaengine_chan *to_gdma_dma_chan(struct dma_chan *c)
-+{
-+	return container_of(c, struct gdma_dmaengine_chan, vchan.chan);
-+}
-+
-+static struct gdma_dma_desc *to_gdma_dma_desc(struct virt_dma_desc *vdesc)
-+{
-+	return container_of(vdesc, struct gdma_dma_desc, vdesc);
-+}
-+
-+static inline uint32_t gdma_dma_read(struct gdma_dma_dev *dma_dev,
-+	unsigned int reg)
-+{
-+	return readl(dma_dev->base + reg);
-+}
-+
-+static inline void gdma_dma_write(struct gdma_dma_dev *dma_dev,
-+	unsigned reg, uint32_t val)
-+{
-+	writel(val, dma_dev->base + reg);
-+}
-+
-+static struct gdma_dma_desc *gdma_dma_alloc_desc(unsigned int num_sgs)
-+{
-+	return kzalloc(sizeof(struct gdma_dma_desc) +
-+		sizeof(struct gdma_dma_sg) * num_sgs, GFP_ATOMIC);
-+}
-+
-+static enum gdma_dma_transfer_size gdma_dma_maxburst(u32 maxburst)
-+{
-+	if (maxburst < 2)
-+		return GDMA_TRANSFER_SIZE_4BYTE;
-+	else if (maxburst < 4)
-+		return GDMA_TRANSFER_SIZE_8BYTE;
-+	else if (maxburst < 8)
-+		return GDMA_TRANSFER_SIZE_16BYTE;
-+	else if (maxburst < 16)
-+		return GDMA_TRANSFER_SIZE_32BYTE;
-+	else
-+		return GDMA_TRANSFER_SIZE_64BYTE;
-+}
-+
-+static int gdma_dma_config(struct dma_chan *c,
-+		struct dma_slave_config *config)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
-+
-+	if (config->device_fc) {
-+		dev_err(dma_dev->ddev.dev, "not support flow controller\n");
-+		return -EINVAL;
-+	}
-+
-+	switch (config->direction) {
-+	case DMA_MEM_TO_DEV:
-+		if (config->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) {
-+			dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n");
-+			return -EINVAL;
-+		}
-+		chan->slave_id = config->slave_id;
-+		chan->fifo_addr = config->dst_addr;
-+		chan->burst_size = gdma_dma_maxburst(config->dst_maxburst);
-+		break;
-+	case DMA_DEV_TO_MEM:
-+		if (config->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) {
-+			dev_err(dma_dev->ddev.dev, "only support 4 byte buswidth\n");
-+			return -EINVAL;
-+		}
-+		chan->slave_id = config->slave_id;
-+		chan->fifo_addr = config->src_addr;
-+		chan->burst_size = gdma_dma_maxburst(config->src_maxburst);
-+		break;
-+	default:
-+		dev_err(dma_dev->ddev.dev, "direction type %d error\n",
-+				config->direction);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static int gdma_dma_terminate_all(struct dma_chan *c)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
-+	unsigned long flags, timeout;
-+	LIST_HEAD(head);
-+	int i = 0;
-+
-+	spin_lock_irqsave(&chan->vchan.lock, flags);
-+	chan->desc = NULL;
-+	clear_bit(chan->id, &dma_dev->chan_issued);
-+	vchan_get_all_descriptors(&chan->vchan, &head);
-+	spin_unlock_irqrestore(&chan->vchan.lock, flags);
-+
-+	vchan_dma_desc_free_list(&chan->vchan, &head);
-+
-+	/* wait dma transfer complete */
-+	timeout = jiffies + msecs_to_jiffies(5000);
-+	while (gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id)) &
-+			GDMA_REG_CTRL0_ENABLE) {
-+		if (time_after_eq(jiffies, timeout)) {
-+			dev_err(dma_dev->ddev.dev, "chan %d wait timeout\n",
-+					chan->id);
-+			/* restore to init value */
-+			gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), 0);
-+			break;
-+		}
-+		cpu_relax();
-+		i++;
-+	}
-+
-+	if (i)
-+		dev_dbg(dma_dev->ddev.dev, "terminate chan %d loops %d\n",
-+				chan->id, i);
-+
-+	return 0;
-+}
-+
-+static void rt305x_dump_reg(struct gdma_dma_dev *dma_dev, int id)
-+{
-+	dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, " \
-+			"ctr1 %08x, intr %08x, signal %08x\n", id,
-+			gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
-+			gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_INT),
-+			gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_SIGNAL));
-+}
-+
-+static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
-+{
-+	struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
-+	dma_addr_t src_addr, dst_addr;
-+	struct gdma_dma_sg *sg;
-+	uint32_t ctrl0, ctrl1;
-+
-+	/* verify chan is already stopped */
-+	ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id));
-+	if (unlikely(ctrl0 & GDMA_REG_CTRL0_ENABLE)) {
-+		dev_err(dma_dev->ddev.dev, "chan %d is start(%08x).\n",
-+				chan->id, ctrl0);
-+		rt305x_dump_reg(dma_dev, chan->id);
-+		return -EINVAL;
-+	}
-+
-+	sg = &chan->desc->sg[chan->next_sg];
-+	if (chan->desc->direction == DMA_MEM_TO_DEV) {
-+		src_addr = sg->src_addr;
-+		dst_addr = chan->fifo_addr;
-+		ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED | \
-+			(8 << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | \
-+			(chan->slave_id << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
-+	} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
-+		src_addr = chan->fifo_addr;
-+		dst_addr = sg->dst_addr;
-+		ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED | \
-+			(chan->slave_id << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | \
-+			(8 << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
-+	} else if (chan->desc->direction == DMA_MEM_TO_MEM) {
-+		/*
-+		 * TODO: memcpy function have bugs. sometime it will copy
-+		 * more 8 bytes data when using dmatest verify.
-+		 */
-+		src_addr = sg->src_addr;
-+		dst_addr = sg->dst_addr;
-+		ctrl0 = GDMA_REG_CTRL0_SW_MODE | \
-+			(8 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
-+			(8 << GDMA_REG_CTRL1_DST_REQ_SHIFT);
-+	} else {
-+		dev_err(dma_dev->ddev.dev, "direction type %d error\n",
-+				chan->desc->direction);
-+		return -EINVAL;
-+	}
-+
-+	ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | \
-+		 (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | \
-+		 GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE;
-+	ctrl1 = chan->id << GDMA_REG_CTRL1_NEXT_SHIFT;
-+
-+	chan->next_sg++;
-+	gdma_dma_write(dma_dev, GDMA_REG_SRC_ADDR(chan->id), src_addr);
-+	gdma_dma_write(dma_dev, GDMA_REG_DST_ADDR(chan->id), dst_addr);
-+	gdma_dma_write(dma_dev, GDMA_REG_CTRL1(chan->id), ctrl1);
-+
-+	/* make sure next_sg is update */
-+	wmb();
-+	gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), ctrl0);
-+
-+	return 0;
-+}
-+
-+static void rt3883_dump_reg(struct gdma_dma_dev *dma_dev, int id)
-+{
-+	dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, " \
-+			"ctr1 %08x, unmask %08x, done %08x, " \
-+			"req %08x, ack %08x, fin %08x\n", id,
-+			gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
-+			gdma_dma_read(dma_dev, GDMA_REG_UNMASK_INT),
-+			gdma_dma_read(dma_dev, GDMA_REG_DONE_INT),
-+			gdma_dma_read(dma_dev, GDMA_REG_REQSTS),
-+			gdma_dma_read(dma_dev, GDMA_REG_ACKSTS),
-+			gdma_dma_read(dma_dev, GDMA_REG_FINSTS));
-+}
-+
-+static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
-+{
-+	struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
-+	dma_addr_t src_addr, dst_addr;
-+	struct gdma_dma_sg *sg;
-+	uint32_t ctrl0, ctrl1;
-+
-+	/* verify chan is already stopped */
-+	ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id));
-+	if (unlikely(ctrl0 & GDMA_REG_CTRL0_ENABLE)) {
-+		dev_err(dma_dev->ddev.dev, "chan %d is start(%08x).\n",
-+				chan->id, ctrl0);
-+		rt3883_dump_reg(dma_dev, chan->id);
-+		return -EINVAL;
-+	}
-+
-+	sg = &chan->desc->sg[chan->next_sg];
-+	if (chan->desc->direction == DMA_MEM_TO_DEV) {
-+		src_addr = sg->src_addr;
-+		dst_addr = chan->fifo_addr;
-+		ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED;
-+		ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
-+			(chan->slave_id << GDMA_REG_CTRL1_DST_REQ_SHIFT);
-+	} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
-+		src_addr = chan->fifo_addr;
-+		dst_addr = sg->dst_addr;
-+		ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED;
-+		ctrl1 = (chan->slave_id << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
-+			(32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | \
-+			GDMA_REG_CTRL1_COHERENT;
-+	} else if (chan->desc->direction == DMA_MEM_TO_MEM) {
-+		src_addr = sg->src_addr;
-+		dst_addr = sg->dst_addr;
-+		ctrl0 = GDMA_REG_CTRL0_SW_MODE;
-+		ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
-+			(32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | \
-+			GDMA_REG_CTRL1_COHERENT;
-+	} else {
-+		dev_err(dma_dev->ddev.dev, "direction type %d error\n",
-+				chan->desc->direction);
-+		return -EINVAL;
-+	}
-+
-+	ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | \
-+		 (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | \
-+		 GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE;
-+	ctrl1 |= chan->id << GDMA_REG_CTRL1_NEXT_SHIFT;
-+
-+	chan->next_sg++;
-+	gdma_dma_write(dma_dev, GDMA_REG_SRC_ADDR(chan->id), src_addr);
-+	gdma_dma_write(dma_dev, GDMA_REG_DST_ADDR(chan->id), dst_addr);
-+	gdma_dma_write(dma_dev, GDMA_REG_CTRL1(chan->id), ctrl1);
-+
-+	/* make sure next_sg is update */
-+	wmb();
-+	gdma_dma_write(dma_dev, GDMA_REG_CTRL0(chan->id), ctrl0);
-+
-+	return 0;
-+}
-+
-+static inline int gdma_start_transfer(struct gdma_dma_dev *dma_dev,
-+		struct gdma_dmaengine_chan *chan)
-+{
-+	return dma_dev->data->start_transfer(chan);
-+}
-+
-+static int gdma_next_desc(struct gdma_dmaengine_chan *chan)
-+{
-+	struct virt_dma_desc *vdesc;
-+
-+	vdesc = vchan_next_desc(&chan->vchan);
-+	if (!vdesc) {
-+		chan->desc = NULL;
-+		return 0;
-+	}
-+	chan->desc = to_gdma_dma_desc(vdesc);
-+	chan->next_sg = 0;
-+
-+	return 1;
-+}
-+
-+static void gdma_dma_chan_irq(struct gdma_dma_dev *dma_dev,
-+		struct gdma_dmaengine_chan *chan)
-+{
-+	struct gdma_dma_desc *desc;
-+	unsigned long flags;
-+	int chan_issued;
-+
-+	chan_issued = 0;
-+	spin_lock_irqsave(&chan->vchan.lock, flags);
-+	desc = chan->desc;
-+	if (desc) {
-+		if (desc->cyclic) {
-+			vchan_cyclic_callback(&desc->vdesc);
-+			if (chan->next_sg == desc->num_sgs)
-+				chan->next_sg = 0;
-+			chan_issued = 1;
-+		} else {
-+			desc->residue -= desc->sg[chan->next_sg - 1].len;
-+			if (chan->next_sg == desc->num_sgs) {
-+				list_del(&desc->vdesc.node);
-+				vchan_cookie_complete(&desc->vdesc);
-+				chan_issued = gdma_next_desc(chan);
-+			} else
-+				chan_issued = 1;
-+		}
-+	} else
-+		dev_dbg(dma_dev->ddev.dev, "chan %d no desc to complete\n",
-+				chan->id);
-+	if (chan_issued)
-+		set_bit(chan->id, &dma_dev->chan_issued);
-+	spin_unlock_irqrestore(&chan->vchan.lock, flags);
-+}
-+
-+static irqreturn_t gdma_dma_irq(int irq, void *devid)
-+{
-+	struct gdma_dma_dev *dma_dev = devid;
-+	u32 done, done_reg;
-+	unsigned int i;
-+
-+	done_reg = dma_dev->data->done_int_reg;
-+	done = gdma_dma_read(dma_dev, done_reg);
-+	if (unlikely(!done))
-+		return IRQ_NONE;
-+
-+	/* clean done bits */
-+	gdma_dma_write(dma_dev, done_reg, done);
-+
-+	i = 0;
-+	while (done) {
-+		if (done & 0x1) {
-+			gdma_dma_chan_irq(dma_dev, &dma_dev->chan[i]);
-+			atomic_dec(&dma_dev->cnt);
-+		}
-+		done >>= 1;
-+		i++;
-+	}
-+
-+	/* start only have work to do */
-+	if (dma_dev->chan_issued)
-+		tasklet_schedule(&dma_dev->task);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static void gdma_dma_issue_pending(struct dma_chan *c)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&chan->vchan.lock, flags);
-+	if (vchan_issue_pending(&chan->vchan) && !chan->desc) {
-+		if (gdma_next_desc(chan)) {
-+			set_bit(chan->id, &dma_dev->chan_issued);
-+			tasklet_schedule(&dma_dev->task);
-+		} else
-+			dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n",
-+					chan->id);
-+	}
-+	spin_unlock_irqrestore(&chan->vchan.lock, flags);
-+}
-+
-+static struct dma_async_tx_descriptor *gdma_dma_prep_slave_sg(
-+		struct dma_chan *c, struct scatterlist *sgl,
-+		unsigned int sg_len, enum dma_transfer_direction direction,
-+		unsigned long flags, void *context)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_desc *desc;
-+	struct scatterlist *sg;
-+	unsigned int i;
-+
-+	desc = gdma_dma_alloc_desc(sg_len);
-+	if (!desc) {
-+		dev_err(c->device->dev, "alloc sg decs error\n");
-+		return NULL;
-+	}
-+	desc->residue = 0;
-+
-+	for_each_sg(sgl, sg, sg_len, i) {
-+		if (direction == DMA_MEM_TO_DEV)
-+			desc->sg[i].src_addr = sg_dma_address(sg);
-+		else if (direction == DMA_DEV_TO_MEM)
-+			desc->sg[i].dst_addr = sg_dma_address(sg);
-+		else {
-+			dev_err(c->device->dev, "direction type %d error\n",
-+					direction);
-+			goto free_desc;
-+		}
-+
-+		if (unlikely(sg_dma_len(sg) > GDMA_REG_CTRL0_TX_MASK)) {
-+			dev_err(c->device->dev, "sg len too large %d\n",
-+					sg_dma_len(sg));
-+			goto free_desc;
-+		}
-+		desc->sg[i].len = sg_dma_len(sg);
-+		desc->residue += sg_dma_len(sg);
-+	}
-+
-+	desc->num_sgs = sg_len;
-+	desc->direction = direction;
-+	desc->cyclic = false;
-+
-+	return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-+
-+free_desc:
-+	kfree(desc);
-+	return NULL;
-+}
-+
-+static struct dma_async_tx_descriptor * gdma_dma_prep_dma_memcpy(
-+		struct dma_chan *c, dma_addr_t dest, dma_addr_t src,
-+		size_t len, unsigned long flags)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_desc *desc;
-+	unsigned int num_periods, i;
-+	size_t xfer_count;
-+
-+	if (len <= 0)
-+		return NULL;
-+
-+	chan->burst_size = gdma_dma_maxburst(len >> 2);
-+
-+	xfer_count = GDMA_REG_CTRL0_TX_MASK;
-+	num_periods = DIV_ROUND_UP(len, xfer_count);
-+
-+	desc = gdma_dma_alloc_desc(num_periods);
-+	if (!desc) {
-+		dev_err(c->device->dev, "alloc memcpy decs error\n");
-+		return NULL;
-+	}
-+	desc->residue = len;
-+
-+	for (i = 0; i < num_periods; i++) {
-+		desc->sg[i].src_addr = src;
-+		desc->sg[i].dst_addr = dest;
-+		if (len > xfer_count) {
-+			desc->sg[i].len = xfer_count;
-+		} else {
-+			desc->sg[i].len = len;
-+		}
-+		src += desc->sg[i].len;
-+		dest += desc->sg[i].len;
-+		len -= desc->sg[i].len;
-+	}
-+
-+	desc->num_sgs = num_periods;
-+	desc->direction = DMA_MEM_TO_MEM;
-+	desc->cyclic = false;
-+
-+	return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-+}
-+
-+static struct dma_async_tx_descriptor *gdma_dma_prep_dma_cyclic(
-+	struct dma_chan *c, dma_addr_t buf_addr, size_t buf_len,
-+	size_t period_len, enum dma_transfer_direction direction,
-+	unsigned long flags)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct gdma_dma_desc *desc;
-+	unsigned int num_periods, i;
-+
-+	if (buf_len % period_len)
-+		return NULL;
-+
-+	if (period_len > GDMA_REG_CTRL0_TX_MASK) {
-+		dev_err(c->device->dev, "cyclic len too large %d\n",
-+				period_len);
-+		return NULL;
-+	}
-+
-+	num_periods = buf_len / period_len;
-+	desc = gdma_dma_alloc_desc(num_periods);
-+	if (!desc) {
-+		dev_err(c->device->dev, "alloc cyclic decs error\n");
-+		return NULL;
-+	}
-+	desc->residue = buf_len;
-+
-+	for (i = 0; i < num_periods; i++) {
-+		if (direction == DMA_MEM_TO_DEV)
-+			desc->sg[i].src_addr = buf_addr;
-+		else if (direction == DMA_DEV_TO_MEM)
-+			desc->sg[i].dst_addr = buf_addr;
-+		else {
-+			dev_err(c->device->dev, "direction type %d error\n",
-+					direction);
-+			goto free_desc;
-+		}
-+		desc->sg[i].len = period_len;
-+		buf_addr += period_len;
-+	}
-+
-+	desc->num_sgs = num_periods;
-+	desc->direction = direction;
-+	desc->cyclic = true;
-+
-+	return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-+
-+free_desc:
-+	kfree(desc);
-+	return NULL;
-+}
-+
-+static enum dma_status gdma_dma_tx_status(struct dma_chan *c,
-+	dma_cookie_t cookie, struct dma_tx_state *state)
-+{
-+	struct gdma_dmaengine_chan *chan = to_gdma_dma_chan(c);
-+	struct virt_dma_desc *vdesc;
-+	enum dma_status status;
-+	unsigned long flags;
-+	struct gdma_dma_desc *desc;
-+
-+	status = dma_cookie_status(c, cookie, state);
-+	if (status == DMA_COMPLETE || !state)
-+		return status;
-+
-+	spin_lock_irqsave(&chan->vchan.lock, flags);
-+	desc = chan->desc;
-+	if (desc && (cookie == desc->vdesc.tx.cookie)) {
-+		/*
-+		 * We never update edesc->residue in the cyclic case, so we
-+		 * can tell the remaining room to the end of the circular
-+		 * buffer.
-+		 */
-+		if (desc->cyclic)
-+			state->residue = desc->residue -
-+				((chan->next_sg - 1) * desc->sg[0].len);
-+		else
-+			state->residue = desc->residue;
-+	} else if ((vdesc = vchan_find_desc(&chan->vchan, cookie)))
-+		state->residue = to_gdma_dma_desc(vdesc)->residue;
-+	spin_unlock_irqrestore(&chan->vchan.lock, flags);
-+
-+	dev_dbg(c->device->dev, "tx residue %d bytes\n", state->residue);
-+
-+	return status;
-+}
-+
-+static void gdma_dma_free_chan_resources(struct dma_chan *c)
-+{
-+	vchan_free_chan_resources(to_virt_chan(c));
-+}
-+
-+static void gdma_dma_desc_free(struct virt_dma_desc *vdesc)
-+{
-+	kfree(container_of(vdesc, struct gdma_dma_desc, vdesc));
-+}
-+
-+static void gdma_dma_tasklet(unsigned long arg)
-+{
-+	struct gdma_dma_dev *dma_dev = (struct gdma_dma_dev *)arg;
-+	struct gdma_dmaengine_chan *chan;
-+	static unsigned int last_chan;
-+	unsigned int i, chan_mask;
-+
-+	/* record last chan to round robin all chans */
-+	i = last_chan;
-+	chan_mask = dma_dev->data->chancnt - 1;
-+	do {
-+		/*
-+		 * on mt7621. when verify with dmatest with all
-+		 * channel is enable. we need to limit only two
-+		 * channel is working at the same time. otherwise the
-+		 * data will have problem.
-+		 */
-+		if (atomic_read(&dma_dev->cnt) >= 2) {
-+			last_chan = i;
-+			break;
-+		}
-+
-+		if (test_and_clear_bit(i, &dma_dev->chan_issued)) {
-+			chan = &dma_dev->chan[i];
-+			if (chan->desc) {
-+				atomic_inc(&dma_dev->cnt);
-+				gdma_start_transfer(dma_dev, chan);
-+			} else
-+				dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n", chan->id);
-+
-+			if (!dma_dev->chan_issued)
-+				break;
-+		}
-+
-+		i = (i + 1) & chan_mask;
-+	} while (i != last_chan);
-+}
-+
-+static void rt305x_gdma_init(struct gdma_dma_dev *dma_dev)
-+{
-+	uint32_t gct;
-+
-+	/* all chans round robin */
-+	gdma_dma_write(dma_dev, GDMA_RT305X_GCT, GDMA_REG_GCT_ARBIT_RR);
-+
-+	gct = gdma_dma_read(dma_dev, GDMA_RT305X_GCT);
-+	dev_info(dma_dev->ddev.dev, "revision: %d, channels: %d\n",
-+			(gct >> GDMA_REG_GCT_VER_SHIFT) & GDMA_REG_GCT_VER_MASK,
-+			8 << ((gct >> GDMA_REG_GCT_CHAN_SHIFT) &
-+				GDMA_REG_GCT_CHAN_MASK));
-+}
-+
-+static void rt3883_gdma_init(struct gdma_dma_dev *dma_dev)
-+{
-+	uint32_t gct;
-+
-+	/* all chans round robin */
-+	gdma_dma_write(dma_dev, GDMA_REG_GCT, GDMA_REG_GCT_ARBIT_RR);
-+
-+	gct = gdma_dma_read(dma_dev, GDMA_REG_GCT);
-+	dev_info(dma_dev->ddev.dev, "revision: %d, channels: %d\n",
-+			(gct >> GDMA_REG_GCT_VER_SHIFT) & GDMA_REG_GCT_VER_MASK,
-+			8 << ((gct >> GDMA_REG_GCT_CHAN_SHIFT) &
-+				GDMA_REG_GCT_CHAN_MASK));
-+}
-+
-+static struct gdma_data rt305x_gdma_data = {
-+	.chancnt = 8,
-+	.done_int_reg = GDMA_RT305X_STATUS_INT,
-+	.init = rt305x_gdma_init,
-+	.start_transfer = rt305x_gdma_start_transfer,
-+};
-+
-+static struct gdma_data rt3883_gdma_data = {
-+	.chancnt = 16,
-+	.done_int_reg = GDMA_REG_DONE_INT,
-+	.init = rt3883_gdma_init,
-+	.start_transfer = rt3883_gdma_start_transfer,
-+};
-+
-+static const struct of_device_id gdma_of_match_table[] = {
-+	{ .compatible = "ralink,rt305x-gdma", .data = &rt305x_gdma_data },
-+	{ .compatible = "ralink,rt3883-gdma", .data = &rt3883_gdma_data },
-+	{ },
-+};
-+
-+static int gdma_dma_probe(struct platform_device *pdev)
-+{
-+	const struct of_device_id *match;
-+	struct gdma_dmaengine_chan *chan;
-+	struct gdma_dma_dev *dma_dev;
-+	struct dma_device *dd;
-+	unsigned int i;
-+	struct resource *res;
-+	int ret;
-+	int irq;
-+	void __iomem *base;
-+	struct gdma_data *data;
-+
-+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
-+	if (ret)
-+		return ret;
-+
-+	match = of_match_device(gdma_of_match_table, &pdev->dev);
-+	if (!match)
-+		return -EINVAL;
-+	data = (struct gdma_data *) match->data;
-+
-+	dma_dev = devm_kzalloc(&pdev->dev, sizeof(*dma_dev) +
-+			(sizeof(struct gdma_dmaengine_chan) * data->chancnt),
-+			GFP_KERNEL);
-+	if (!dma_dev) {
-+		dev_err(&pdev->dev, "alloc dma device failed\n");
-+		return -EINVAL;
-+	}
-+	dma_dev->data = data;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(base))
-+		return PTR_ERR(base);
-+	dma_dev->base = base;
-+	tasklet_init(&dma_dev->task, gdma_dma_tasklet, (unsigned long)dma_dev);
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_err(&pdev->dev, "failed to get irq\n");
-+		return -EINVAL;
-+	}
-+	ret = devm_request_irq(&pdev->dev, irq, gdma_dma_irq,
-+			0, dev_name(&pdev->dev), dma_dev);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to request irq\n");
-+		return ret;
-+	}
-+
-+	device_reset(&pdev->dev);
-+
-+	dd = &dma_dev->ddev;
-+	dma_cap_set(DMA_MEMCPY, dd->cap_mask);
-+	dma_cap_set(DMA_SLAVE, dd->cap_mask);
-+	dma_cap_set(DMA_CYCLIC, dd->cap_mask);
-+	dd->device_free_chan_resources = gdma_dma_free_chan_resources;
-+	dd->device_prep_dma_memcpy = gdma_dma_prep_dma_memcpy;
-+	dd->device_prep_slave_sg = gdma_dma_prep_slave_sg;
-+	dd->device_prep_dma_cyclic = gdma_dma_prep_dma_cyclic;
-+	dd->device_config = gdma_dma_config;
-+	dd->device_terminate_all = gdma_dma_terminate_all;
-+	dd->device_tx_status = gdma_dma_tx_status;
-+	dd->device_issue_pending = gdma_dma_issue_pending;
-+
-+	dd->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
-+	dd->dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
-+	dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
-+	dd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
-+
-+	dd->dev = &pdev->dev;
-+	dd->dev->dma_parms = &dma_dev->dma_parms;
-+	dma_set_max_seg_size(dd->dev, GDMA_REG_CTRL0_TX_MASK);
-+	INIT_LIST_HEAD(&dd->channels);
-+
-+	for (i = 0; i < data->chancnt; i++) {
-+		chan = &dma_dev->chan[i];
-+		chan->id = i;
-+		chan->vchan.desc_free = gdma_dma_desc_free;
-+		vchan_init(&chan->vchan, dd);
-+	}
-+
-+	/* init hardware */
-+	data->init(dma_dev);
-+
-+	ret = dma_async_device_register(dd);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to register dma device\n");
-+		return ret;
-+	}
-+
-+	ret = of_dma_controller_register(pdev->dev.of_node,
-+		of_dma_xlate_by_chan_id, dma_dev);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to register of dma controller\n");
-+		goto err_unregister;
-+	}
-+
-+	platform_set_drvdata(pdev, dma_dev);
-+
-+	return 0;
-+
-+err_unregister:
-+	dma_async_device_unregister(dd);
-+	return ret;
-+}
-+
-+static int gdma_dma_remove(struct platform_device *pdev)
-+{
-+	struct gdma_dma_dev *dma_dev = platform_get_drvdata(pdev);
-+
-+	tasklet_kill(&dma_dev->task);
-+        of_dma_controller_free(pdev->dev.of_node);
-+	dma_async_device_unregister(&dma_dev->ddev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver gdma_dma_driver = {
-+	.probe = gdma_dma_probe,
-+	.remove = gdma_dma_remove,
-+	.driver = {
-+		.name = "gdma-rt2880",
-+		.of_match_table = gdma_of_match_table,
-+	},
-+};
-+module_platform_driver(gdma_dma_driver);
-+
-+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-+MODULE_DESCRIPTION("Ralink/MTK DMA driver");
-+MODULE_LICENSE("GPL v2");
---- a/include/linux/dmaengine.h
-+++ b/include/linux/dmaengine.h
-@@ -525,6 +525,7 @@ static inline void dma_set_unmap(struct
- struct dmaengine_unmap_data *
- dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags);
- void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap);
-+struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
- #else
- static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
- 				 struct dmaengine_unmap_data *unmap)
---- /dev/null
-+++ b/drivers/dma/mtk-hsdma.c
-@@ -0,0 +1,767 @@
-+/*
-+ *  Copyright (C) 2015, Michael Lee <igvtee@gmail.com>
-+ *  MTK HSDMA support
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under  the terms of the GNU General	 Public License as published by the
-+ *  Free Software Foundation;  either version 2 of the License, or (at your
-+ *  option) any later version.
-+ *
-+ */
-+
-+#include <linux/dmaengine.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+#include <linux/list.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/irq.h>
-+#include <linux/of_dma.h>
-+#include <linux/reset.h>
-+#include <linux/of_device.h>
-+
-+#include "virt-dma.h"
-+
-+#define HSDMA_BASE_OFFSET		0x800
-+
-+#define HSDMA_REG_TX_BASE		0x00
-+#define HSDMA_REG_TX_CNT		0x04
-+#define HSDMA_REG_TX_CTX		0x08
-+#define HSDMA_REG_TX_DTX		0x0c
-+#define HSDMA_REG_RX_BASE		0x100
-+#define HSDMA_REG_RX_CNT		0x104
-+#define HSDMA_REG_RX_CRX		0x108
-+#define HSDMA_REG_RX_DRX		0x10c
-+#define HSDMA_REG_INFO			0x200
-+#define HSDMA_REG_GLO_CFG		0x204
-+#define HSDMA_REG_RST_CFG		0x208
-+#define HSDMA_REG_DELAY_INT		0x20c
-+#define HSDMA_REG_FREEQ_THRES		0x210
-+#define HSDMA_REG_INT_STATUS		0x220
-+#define HSDMA_REG_INT_MASK		0x228
-+#define HSDMA_REG_SCH_Q01		0x280
-+#define HSDMA_REG_SCH_Q23		0x284
-+
-+#define HSDMA_DESCS_MAX			0xfff
-+#define HSDMA_DESCS_NUM			8
-+#define HSDMA_DESCS_MASK		(HSDMA_DESCS_NUM - 1)
-+#define HSDMA_NEXT_DESC(x)		(((x) + 1) & HSDMA_DESCS_MASK)
-+
-+/* HSDMA_REG_INFO */
-+#define HSDMA_INFO_INDEX_MASK		0xf
-+#define HSDMA_INFO_INDEX_SHIFT		24
-+#define HSDMA_INFO_BASE_MASK		0xff
-+#define HSDMA_INFO_BASE_SHIFT		16
-+#define HSDMA_INFO_RX_MASK		0xff
-+#define HSDMA_INFO_RX_SHIFT		8
-+#define HSDMA_INFO_TX_MASK		0xff
-+#define HSDMA_INFO_TX_SHIFT		0
-+
-+/* HSDMA_REG_GLO_CFG */
-+#define HSDMA_GLO_TX_2B_OFFSET		BIT(31)
-+#define HSDMA_GLO_CLK_GATE		BIT(30)
-+#define HSDMA_GLO_BYTE_SWAP		BIT(29)
-+#define HSDMA_GLO_MULTI_DMA		BIT(10)
-+#define HSDMA_GLO_TWO_BUF		BIT(9)
-+#define HSDMA_GLO_32B_DESC		BIT(8)
-+#define HSDMA_GLO_BIG_ENDIAN		BIT(7)
-+#define HSDMA_GLO_TX_DONE		BIT(6)
-+#define HSDMA_GLO_BT_MASK		0x3
-+#define HSDMA_GLO_BT_SHIFT		4
-+#define HSDMA_GLO_RX_BUSY		BIT(3)
-+#define HSDMA_GLO_RX_DMA		BIT(2)
-+#define HSDMA_GLO_TX_BUSY		BIT(1)
-+#define HSDMA_GLO_TX_DMA		BIT(0)
-+
-+#define HSDMA_BT_SIZE_16BYTES		(0 << HSDMA_GLO_BT_SHIFT)
-+#define HSDMA_BT_SIZE_32BYTES		(1 << HSDMA_GLO_BT_SHIFT)
-+#define HSDMA_BT_SIZE_64BYTES		(2 << HSDMA_GLO_BT_SHIFT)
-+#define HSDMA_BT_SIZE_128BYTES		(3 << HSDMA_GLO_BT_SHIFT)
-+
-+#define HSDMA_GLO_DEFAULT		(HSDMA_GLO_MULTI_DMA | \
-+		HSDMA_GLO_RX_DMA | HSDMA_GLO_TX_DMA | HSDMA_BT_SIZE_32BYTES)
-+
-+/* HSDMA_REG_RST_CFG */
-+#define HSDMA_RST_RX_SHIFT		16
-+#define HSDMA_RST_TX_SHIFT		0
-+
-+/* HSDMA_REG_DELAY_INT */
-+#define HSDMA_DELAY_INT_EN		BIT(15)
-+#define HSDMA_DELAY_PEND_OFFSET		8
-+#define HSDMA_DELAY_TIME_OFFSET		0
-+#define HSDMA_DELAY_TX_OFFSET		16
-+#define HSDMA_DELAY_RX_OFFSET		0
-+
-+#define HSDMA_DELAY_INIT(x)		(HSDMA_DELAY_INT_EN | \
-+		((x) << HSDMA_DELAY_PEND_OFFSET))
-+#define HSDMA_DELAY(x)			((HSDMA_DELAY_INIT(x) << \
-+		HSDMA_DELAY_TX_OFFSET) | HSDMA_DELAY_INIT(x))
-+
-+/* HSDMA_REG_INT_STATUS */
-+#define HSDMA_INT_DELAY_RX_COH		BIT(31)
-+#define HSDMA_INT_DELAY_RX_INT		BIT(30)
-+#define HSDMA_INT_DELAY_TX_COH		BIT(29)
-+#define HSDMA_INT_DELAY_TX_INT		BIT(28)
-+#define HSDMA_INT_RX_MASK		0x3
-+#define HSDMA_INT_RX_SHIFT		16
-+#define HSDMA_INT_RX_Q0			BIT(16)
-+#define HSDMA_INT_TX_MASK		0xf
-+#define HSDMA_INT_TX_SHIFT		0
-+#define HSDMA_INT_TX_Q0			BIT(0)
-+
-+/* tx/rx dma desc flags */
-+#define HSDMA_PLEN_MASK			0x3fff
-+#define HSDMA_DESC_DONE			BIT(31)
-+#define HSDMA_DESC_LS0			BIT(30)
-+#define HSDMA_DESC_PLEN0(_x)		(((_x) & HSDMA_PLEN_MASK) << 16)
-+#define HSDMA_DESC_TAG			BIT(15)
-+#define HSDMA_DESC_LS1			BIT(14)
-+#define HSDMA_DESC_PLEN1(_x)		((_x) & HSDMA_PLEN_MASK)
-+
-+/* align 4 bytes */
-+#define HSDMA_ALIGN_SIZE		3
-+/* align size 128bytes */
-+#define HSDMA_MAX_PLEN			0x3f80
-+
-+struct hsdma_desc {
-+	u32 addr0;
-+	u32 flags;
-+	u32 addr1;
-+	u32 unused;
-+};
-+
-+struct mtk_hsdma_sg {
-+	dma_addr_t src_addr;
-+	dma_addr_t dst_addr;
-+	u32 len;
-+};
-+
-+struct mtk_hsdma_desc {
-+	struct virt_dma_desc vdesc;
-+	unsigned int num_sgs;
-+	struct mtk_hsdma_sg sg[1];
-+};
-+
-+struct mtk_hsdma_chan {
-+	struct virt_dma_chan vchan;
-+	unsigned int id;
-+	dma_addr_t desc_addr;
-+	int tx_idx;
-+	int rx_idx;
-+	struct hsdma_desc *tx_ring;
-+	struct hsdma_desc *rx_ring;
-+	struct mtk_hsdma_desc *desc;
-+	unsigned int next_sg;
-+};
-+
-+struct mtk_hsdam_engine {
-+	struct dma_device ddev;
-+	struct device_dma_parameters dma_parms;
-+	void __iomem *base;
-+	struct tasklet_struct task;
-+	volatile unsigned long chan_issued;
-+
-+	struct mtk_hsdma_chan chan[1];
-+};
-+
-+static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev(
-+		struct mtk_hsdma_chan *chan)
-+{
-+	return container_of(chan->vchan.chan.device, struct mtk_hsdam_engine,
-+			ddev);
-+}
-+
-+static inline struct mtk_hsdma_chan *to_mtk_hsdma_chan(struct dma_chan *c)
-+{
-+	return container_of(c, struct mtk_hsdma_chan, vchan.chan);
-+}
-+
-+static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc(
-+		struct virt_dma_desc *vdesc)
-+{
-+	return container_of(vdesc, struct mtk_hsdma_desc, vdesc);
-+}
-+
-+static inline u32 mtk_hsdma_read(struct mtk_hsdam_engine *hsdma, u32 reg)
-+{
-+	return readl(hsdma->base + reg);
-+}
-+
-+static inline void mtk_hsdma_write(struct mtk_hsdam_engine *hsdma,
-+		unsigned reg, u32 val)
-+{
-+	writel(val, hsdma->base + reg);
-+}
-+
-+static void mtk_hsdma_reset_chan(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	chan->tx_idx = 0;
-+	chan->rx_idx = HSDMA_DESCS_NUM - 1;
-+
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx);
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx);
-+
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG,
-+			0x1 << (chan->id + HSDMA_RST_TX_SHIFT));
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG,
-+			0x1 << (chan->id + HSDMA_RST_RX_SHIFT));
-+}
-+
-+static void hsdma_dump_reg(struct mtk_hsdam_engine *hsdma)
-+{
-+	dev_dbg(hsdma->ddev.dev, "tbase %08x, tcnt %08x, " \
-+			"tctx %08x, tdtx: %08x, rbase %08x, " \
-+			"rcnt %08x, rctx %08x, rdtx %08x\n",
-+			mtk_hsdma_read(hsdma, HSDMA_REG_TX_BASE),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_TX_CNT),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_TX_CTX),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_TX_DTX),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_RX_BASE),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_RX_CNT),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_RX_CRX),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX));
-+
-+	dev_dbg(hsdma->ddev.dev, "info %08x, glo %08x, delay %08x, " \
-+			"intr_stat %08x, intr_mask %08x\n",
-+			mtk_hsdma_read(hsdma, HSDMA_REG_INFO),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_DELAY_INT),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS),
-+			mtk_hsdma_read(hsdma, HSDMA_REG_INT_MASK));
-+}
-+
-+static void hsdma_dump_desc(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	struct hsdma_desc *tx_desc;
-+	struct hsdma_desc *rx_desc;
-+	int i;
-+
-+	dev_dbg(hsdma->ddev.dev, "tx idx: %d, rx idx: %d\n",
-+			chan->tx_idx, chan->rx_idx);
-+
-+	for (i = 0; i < HSDMA_DESCS_NUM; i++) {
-+		tx_desc = &chan->tx_ring[i];
-+		rx_desc = &chan->rx_ring[i];
-+
-+		dev_dbg(hsdma->ddev.dev, "%d tx addr0: %08x, flags %08x, " \
-+				"tx addr1: %08x, rx addr0 %08x, flags %08x\n",
-+				i, tx_desc->addr0, tx_desc->flags, \
-+				tx_desc->addr1, rx_desc->addr0, rx_desc->flags);
-+	}
-+}
-+
-+static void mtk_hsdma_reset(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	int i;
-+
-+	/* disable dma */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0);
-+
-+	/* disable intr */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0);
-+
-+	/* init desc value */
-+	for (i = 0; i < HSDMA_DESCS_NUM; i++) {
-+		chan->tx_ring[i].addr0 = 0;
-+		chan->tx_ring[i].flags = HSDMA_DESC_LS0 |
-+			HSDMA_DESC_DONE;
-+	}
-+	for (i = 0; i < HSDMA_DESCS_NUM; i++) {
-+		chan->rx_ring[i].addr0 = 0;
-+		chan->rx_ring[i].flags = 0;
-+	}
-+
-+	/* reset */
-+	mtk_hsdma_reset_chan(hsdma, chan);
-+
-+	/* enable intr */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0);
-+
-+	/* enable dma */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT);
-+}
-+
-+static int mtk_hsdma_terminate_all(struct dma_chan *c)
-+{
-+	struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c);
-+	struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan);
-+	unsigned long timeout;
-+	LIST_HEAD(head);
-+
-+	spin_lock_bh(&chan->vchan.lock);
-+	chan->desc = NULL;
-+	clear_bit(chan->id, &hsdma->chan_issued);
-+	vchan_get_all_descriptors(&chan->vchan, &head);
-+	spin_unlock_bh(&chan->vchan.lock);
-+
-+	vchan_dma_desc_free_list(&chan->vchan, &head);
-+
-+	/* wait dma transfer complete */
-+	timeout = jiffies + msecs_to_jiffies(2000);
-+	while (mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG) &
-+			(HSDMA_GLO_RX_BUSY | HSDMA_GLO_TX_BUSY)) {
-+		if (time_after_eq(jiffies, timeout)) {
-+			hsdma_dump_desc(hsdma, chan);
-+			mtk_hsdma_reset(hsdma, chan);
-+			dev_err(hsdma->ddev.dev, "timeout, reset it\n");
-+			break;
-+		}
-+		cpu_relax();
-+	}
-+
-+	return 0;
-+}
-+
-+static int mtk_hsdma_start_transfer(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	dma_addr_t src, dst;
-+	size_t len, tlen;
-+	struct hsdma_desc *tx_desc, *rx_desc;
-+	struct mtk_hsdma_sg *sg;
-+	unsigned int i;
-+	int rx_idx;
-+
-+	sg = &chan->desc->sg[0];
-+	len = sg->len;
-+	chan->desc->num_sgs = DIV_ROUND_UP(len, HSDMA_MAX_PLEN);
-+
-+	/* tx desc */
-+	src = sg->src_addr;
-+	for (i = 0; i < chan->desc->num_sgs; i++) {
-+		if (len > HSDMA_MAX_PLEN)
-+			tlen = HSDMA_MAX_PLEN;
-+		else
-+			tlen = len;
-+
-+		if (i & 0x1) {
-+			tx_desc->addr1 = src;
-+			tx_desc->flags |= HSDMA_DESC_PLEN1(tlen);
-+		} else {
-+			tx_desc = &chan->tx_ring[chan->tx_idx];
-+			tx_desc->addr0 = src;
-+			tx_desc->flags = HSDMA_DESC_PLEN0(tlen);
-+
-+			/* update index */
-+			chan->tx_idx = HSDMA_NEXT_DESC(chan->tx_idx);
-+		}
-+
-+		src += tlen;
-+		len -= tlen;
-+	}
-+	if (i & 0x1)
-+		tx_desc->flags |= HSDMA_DESC_LS0;
-+	else
-+		tx_desc->flags |= HSDMA_DESC_LS1;
-+
-+	/* rx desc */
-+	rx_idx = HSDMA_NEXT_DESC(chan->rx_idx);
-+	len = sg->len;
-+	dst = sg->dst_addr;
-+	for (i = 0; i < chan->desc->num_sgs; i++) {
-+		rx_desc = &chan->rx_ring[rx_idx];
-+		if (len > HSDMA_MAX_PLEN)
-+			tlen = HSDMA_MAX_PLEN;
-+		else
-+			tlen = len;
-+
-+		rx_desc->addr0 = dst;
-+		rx_desc->flags = HSDMA_DESC_PLEN0(tlen);
-+
-+		dst += tlen;
-+		len -= tlen;
-+
-+		/* update index */
-+		rx_idx = HSDMA_NEXT_DESC(rx_idx);
-+	}
-+
-+	/* make sure desc and index all up to date */
-+	wmb();
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx);
-+
-+	return 0;
-+}
-+
-+static int gdma_next_desc(struct mtk_hsdma_chan *chan)
-+{
-+	struct virt_dma_desc *vdesc;
-+
-+	vdesc = vchan_next_desc(&chan->vchan);
-+	if (!vdesc) {
-+		chan->desc = NULL;
-+		return 0;
-+	}
-+	chan->desc = to_mtk_hsdma_desc(vdesc);
-+	chan->next_sg = 0;
-+
-+	return 1;
-+}
-+
-+static void mtk_hsdma_chan_done(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	struct mtk_hsdma_desc *desc;
-+	int chan_issued;
-+
-+	chan_issued = 0;
-+	spin_lock_bh(&chan->vchan.lock);
-+	desc = chan->desc;
-+	if (likely(desc)) {
-+		if (chan->next_sg == desc->num_sgs) {
-+			list_del(&desc->vdesc.node);
-+			vchan_cookie_complete(&desc->vdesc);
-+			chan_issued = gdma_next_desc(chan);
-+		}
-+	} else
-+		dev_dbg(hsdma->ddev.dev, "no desc to complete\n");
-+
-+	if (chan_issued)
-+		set_bit(chan->id, &hsdma->chan_issued);
-+	spin_unlock_bh(&chan->vchan.lock);
-+}
-+
-+static irqreturn_t mtk_hsdma_irq(int irq, void *devid)
-+{
-+	struct mtk_hsdam_engine *hsdma = devid;
-+	u32 status;
-+
-+	status = mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS);
-+	if (unlikely(!status))
-+		return IRQ_NONE;
-+
-+	if (likely(status & HSDMA_INT_RX_Q0))
-+		tasklet_schedule(&hsdma->task);
-+	else
-+		dev_dbg(hsdma->ddev.dev, "unhandle irq status %08x\n",
-+				status);
-+	/* clean intr bits */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_INT_STATUS, status);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static void mtk_hsdma_issue_pending(struct dma_chan *c)
-+{
-+	struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c);
-+	struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan);
-+
-+	spin_lock_bh(&chan->vchan.lock);
-+	if (vchan_issue_pending(&chan->vchan) && !chan->desc) {
-+		if (gdma_next_desc(chan)) {
-+			set_bit(chan->id, &hsdma->chan_issued);
-+			tasklet_schedule(&hsdma->task);
-+		} else
-+			dev_dbg(hsdma->ddev.dev, "no desc to issue\n");
-+	}
-+	spin_unlock_bh(&chan->vchan.lock);
-+}
-+
-+static struct dma_async_tx_descriptor * mtk_hsdma_prep_dma_memcpy(
-+		struct dma_chan *c, dma_addr_t dest, dma_addr_t src,
-+		size_t len, unsigned long flags)
-+{
-+	struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c);
-+	struct mtk_hsdma_desc *desc;
-+
-+	if (len <= 0)
-+		return NULL;
-+
-+	desc = kzalloc(sizeof(struct mtk_hsdma_desc), GFP_ATOMIC);
-+	if (!desc) {
-+		dev_err(c->device->dev, "alloc memcpy decs error\n");
-+		return NULL;
-+	}
-+
-+	desc->sg[0].src_addr = src;
-+	desc->sg[0].dst_addr = dest;
-+	desc->sg[0].len = len;
-+
-+	return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-+}
-+
-+static enum dma_status mtk_hsdma_tx_status(struct dma_chan *c,
-+		dma_cookie_t cookie, struct dma_tx_state *state)
-+{
-+	return dma_cookie_status(c, cookie, state);
-+}
-+
-+static void mtk_hsdma_free_chan_resources(struct dma_chan *c)
-+{
-+	vchan_free_chan_resources(to_virt_chan(c));
-+}
-+
-+static void mtk_hsdma_desc_free(struct virt_dma_desc *vdesc)
-+{
-+	kfree(container_of(vdesc, struct mtk_hsdma_desc, vdesc));
-+}
-+
-+static void mtk_hsdma_tx(struct mtk_hsdam_engine *hsdma)
-+{
-+	struct mtk_hsdma_chan *chan;
-+
-+	if (test_and_clear_bit(0, &hsdma->chan_issued)) {
-+		chan = &hsdma->chan[0];
-+		if (chan->desc) {
-+			mtk_hsdma_start_transfer(hsdma, chan);
-+		} else
-+			dev_dbg(hsdma->ddev.dev,"chan 0 no desc to issue\n");
-+	}
-+}
-+
-+static void mtk_hsdma_rx(struct mtk_hsdam_engine *hsdma)
-+{
-+	struct mtk_hsdma_chan *chan;
-+	int next_idx, drx_idx, cnt;
-+
-+	chan = &hsdma->chan[0];
-+	next_idx = HSDMA_NEXT_DESC(chan->rx_idx);
-+	drx_idx = mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX);
-+
-+	cnt = (drx_idx - next_idx) & HSDMA_DESCS_MASK;
-+	if (!cnt)
-+		return;
-+
-+	chan->next_sg += cnt;
-+	chan->rx_idx = (chan->rx_idx + cnt) & HSDMA_DESCS_MASK;
-+
-+	/* update rx crx */
-+	wmb();
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx);
-+
-+	mtk_hsdma_chan_done(hsdma, chan);
-+}
-+
-+static void mtk_hsdma_tasklet(unsigned long arg)
-+{
-+	struct mtk_hsdam_engine *hsdma = (struct mtk_hsdam_engine *)arg;
-+
-+	mtk_hsdma_rx(hsdma);
-+	mtk_hsdma_tx(hsdma);
-+}
-+
-+static int mtk_hsdam_alloc_desc(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	int i;
-+
-+	chan->tx_ring = dma_alloc_coherent(hsdma->ddev.dev,
-+			2 * HSDMA_DESCS_NUM * sizeof(*chan->tx_ring),
-+			&chan->desc_addr, GFP_ATOMIC | __GFP_ZERO);
-+	if (!chan->tx_ring)
-+		goto no_mem;
-+
-+	chan->rx_ring = &chan->tx_ring[HSDMA_DESCS_NUM];
-+
-+	/* init tx ring value */
-+	for (i = 0; i < HSDMA_DESCS_NUM; i++)
-+		chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE;
-+
-+	return 0;
-+no_mem:
-+	return -ENOMEM;
-+}
-+
-+static void mtk_hsdam_free_desc(struct mtk_hsdam_engine *hsdma,
-+		struct mtk_hsdma_chan *chan)
-+{
-+	if (chan->tx_ring) {
-+		dma_free_coherent(hsdma->ddev.dev,
-+				2 * HSDMA_DESCS_NUM * sizeof(*chan->tx_ring),
-+				chan->tx_ring, chan->desc_addr);
-+		chan->tx_ring = NULL;
-+		chan->rx_ring = NULL;
-+	}
-+}
-+
-+static int mtk_hsdma_init(struct mtk_hsdam_engine *hsdma)
-+{
-+	struct mtk_hsdma_chan *chan;
-+	int ret;
-+	u32 reg;
-+
-+	/* init desc */
-+	chan = &hsdma->chan[0];
-+	ret = mtk_hsdam_alloc_desc(hsdma, chan);
-+	if (ret)
-+		return ret;
-+
-+	/* tx */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, chan->desc_addr);
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, HSDMA_DESCS_NUM);
-+	/* rx */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, chan->desc_addr +
-+			(sizeof(struct hsdma_desc) * HSDMA_DESCS_NUM));
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, HSDMA_DESCS_NUM);
-+	/* reset */
-+	mtk_hsdma_reset_chan(hsdma, chan);
-+
-+	/* enable rx intr */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0);
-+
-+	/* enable dma */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT);
-+
-+	/* hardware info */
-+	reg = mtk_hsdma_read(hsdma, HSDMA_REG_INFO);
-+	dev_info(hsdma->ddev.dev, "rx: %d, tx: %d\n",
-+			(reg >> HSDMA_INFO_RX_SHIFT) & HSDMA_INFO_RX_MASK,
-+			(reg >> HSDMA_INFO_TX_SHIFT) & HSDMA_INFO_TX_MASK);
-+
-+	hsdma_dump_reg(hsdma);
-+
-+	return ret;
-+}
-+
-+static void mtk_hsdma_uninit(struct mtk_hsdam_engine *hsdma)
-+{
-+	struct mtk_hsdma_chan *chan;
-+
-+	/* disable dma */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0);
-+
-+	/* disable intr */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0);
-+
-+	/* free desc */
-+	chan = &hsdma->chan[0];
-+	mtk_hsdam_free_desc(hsdma, chan);
-+
-+	/* tx */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, 0);
-+	mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, 0);
-+	/* rx */
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, 0);
-+	mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, 0);
-+	/* reset */
-+	mtk_hsdma_reset_chan(hsdma, chan);
-+}
-+
-+static const struct of_device_id mtk_hsdma_of_match[] = {
-+	{ .compatible = "mediatek,mt7621-hsdma" },
-+	{ },
-+};
-+
-+static int mtk_hsdma_probe(struct platform_device *pdev)
-+{
-+	const struct of_device_id *match;
-+	struct mtk_hsdma_chan *chan;
-+	struct mtk_hsdam_engine *hsdma;
-+	struct dma_device *dd;
-+	struct resource *res;
-+	int ret;
-+	int irq;
-+	void __iomem *base;
-+
-+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
-+	if (ret)
-+		return ret;
-+
-+	match = of_match_device(mtk_hsdma_of_match, &pdev->dev);
-+	if (!match)
-+		return -EINVAL;
-+
-+	hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL);
-+	if (!hsdma) {
-+		dev_err(&pdev->dev, "alloc dma device failed\n");
-+		return -EINVAL;
-+	}
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(base))
-+		return PTR_ERR(base);
-+	hsdma->base = base + HSDMA_BASE_OFFSET;
-+	tasklet_init(&hsdma->task, mtk_hsdma_tasklet, (unsigned long)hsdma);
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_err(&pdev->dev, "failed to get irq\n");
-+		return -EINVAL;
-+	}
-+	ret = devm_request_irq(&pdev->dev, irq, mtk_hsdma_irq,
-+			0, dev_name(&pdev->dev), hsdma);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to request irq\n");
-+		return ret;
-+	}
-+
-+	device_reset(&pdev->dev);
-+
-+	dd = &hsdma->ddev;
-+	dma_cap_set(DMA_MEMCPY, dd->cap_mask);
-+	dd->copy_align = HSDMA_ALIGN_SIZE;
-+	dd->device_free_chan_resources = mtk_hsdma_free_chan_resources;
-+	dd->device_prep_dma_memcpy = mtk_hsdma_prep_dma_memcpy;
-+	dd->device_terminate_all = mtk_hsdma_terminate_all;
-+	dd->device_tx_status = mtk_hsdma_tx_status;
-+	dd->device_issue_pending = mtk_hsdma_issue_pending;
-+	dd->dev = &pdev->dev;
-+	dd->dev->dma_parms = &hsdma->dma_parms;
-+	dma_set_max_seg_size(dd->dev, HSDMA_MAX_PLEN);
-+	INIT_LIST_HEAD(&dd->channels);
-+
-+	chan = &hsdma->chan[0];
-+	chan->id = 0;
-+	chan->vchan.desc_free = mtk_hsdma_desc_free;
-+	vchan_init(&chan->vchan, dd);
-+
-+	/* init hardware */
-+	ret = mtk_hsdma_init(hsdma);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to alloc ring descs\n");
-+		return ret;
-+	}
-+
-+	ret = dma_async_device_register(dd);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to register dma device\n");
-+		return ret;
-+	}
-+
-+	ret = of_dma_controller_register(pdev->dev.of_node,
-+			of_dma_xlate_by_chan_id, hsdma);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed to register of dma controller\n");
-+		goto err_unregister;
-+	}
-+
-+	platform_set_drvdata(pdev, hsdma);
-+
-+	return 0;
-+
-+err_unregister:
-+	dma_async_device_unregister(dd);
-+	return ret;
-+}
-+
-+static int mtk_hsdma_remove(struct platform_device *pdev)
-+{
-+	struct mtk_hsdam_engine *hsdma = platform_get_drvdata(pdev);
-+
-+	mtk_hsdma_uninit(hsdma);
-+
-+	of_dma_controller_free(pdev->dev.of_node);
-+	dma_async_device_unregister(&hsdma->ddev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver mtk_hsdma_driver = {
-+	.probe = mtk_hsdma_probe,
-+	.remove = mtk_hsdma_remove,
-+	.driver = {
-+		.name = "hsdma-mt7621",
-+		.of_match_table = mtk_hsdma_of_match,
-+	},
-+};
-+module_platform_driver(mtk_hsdma_driver);
-+
-+MODULE_AUTHOR("Michael Lee <igvtee@gmail.com>");
-+MODULE_DESCRIPTION("MTK HSDMA driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/iopsys-ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch b/iopsys-ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch
deleted file mode 100644
index 0da49b0ff20d9a65c25937c25e1f1429c466b8e8..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-mtd: spi-nor: add support for switching between 3-byte and 4-byte addressing on w25q256 flash
-
-On some devices the flash chip needs to be in 3-byte addressing mode during
-reboot, otherwise the boot loader will fail to start.
-This mode however does not allow regular reads/writes onto the upper 16M
-half. W25Q256 has separate read commands for reading from >16M, however
-it does not have any separate write commands.
-This patch changes the code to leave the chip in 3-byte mode most of the
-time and only switch during erase/write cycles that go to >16M
-addresses.
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -89,6 +89,10 @@ struct flash_info {
- #define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
- #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
- #define USE_CLSR		BIT(14)	/* use CLSR command */
-+#define SPI_NOR_4B_READ_OP	BIT(15)	/*
-+					 * Like SPI_NOR_4B_OPCODES, but for read
-+					 * op code only.
-+					 */
- 
- 	int	(*quad_enable)(struct spi_nor *nor);
- };
-@@ -242,6 +246,15 @@ static inline u8 spi_nor_convert_3to4_er
- 				      ARRAY_SIZE(spi_nor_3to4_erase));
- }
- 
-+static void spi_nor_set_4byte_read(struct spi_nor *nor,
-+				   const struct flash_info *info)
-+{
-+	nor->addr_width = 3;
-+	nor->ext_addr = 0;
-+	nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode);
-+	nor->flags |= SNOR_F_4B_EXT_ADDR;
-+}
-+
- static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
- 				      const struct flash_info *info)
- {
-@@ -469,6 +482,36 @@ static int spi_nor_erase_sector(struct s
- 	return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width);
- }
- 
-+static int spi_nor_check_ext_addr(struct spi_nor *nor, u32 addr)
-+{
-+	bool ext_addr;
-+	int ret;
-+	u8 cmd;
-+
-+	if (!(nor->flags & SNOR_F_4B_EXT_ADDR))
-+		return 0;
-+
-+	ext_addr = !!(addr & 0xff000000);
-+	if (nor->ext_addr == ext_addr)
-+		return 0;
-+
-+	cmd = ext_addr ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
-+	write_enable(nor);
-+	ret = nor->write_reg(nor, cmd, NULL, 0);
-+	if (ret)
-+		return ret;
-+
-+	cmd = 0;
-+	ret = nor->write_reg(nor, SPINOR_OP_WREAR, &cmd, 1);
-+	if (ret)
-+		return ret;
-+
-+	nor->addr_width = 3 + ext_addr;
-+	nor->ext_addr = ext_addr;
-+	write_disable(nor);
-+	return 0;
-+}
-+
- /*
-  * Erase an address range on the nor chip.  The address range may extend
-  * one or more erase sectors.  Return an error is there is a problem erasing.
-@@ -494,6 +537,10 @@ static int spi_nor_erase(struct mtd_info
- 	if (ret)
- 		return ret;
- 
-+	ret = spi_nor_check_ext_addr(nor, addr + len);
-+	if (ret)
-+		return ret;
-+
- 	/* whole-chip erase? */
- 	if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
- 		unsigned long timeout;
-@@ -544,6 +591,7 @@ static int spi_nor_erase(struct mtd_info
- 	write_disable(nor);
- 
- erase_err:
-+	spi_nor_check_ext_addr(nor, 0);
- 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
- 
- 	instr->state = ret ? MTD_ERASE_FAILED : MTD_ERASE_DONE;
-@@ -836,7 +884,9 @@ static int spi_nor_lock(struct mtd_info
- 	if (ret)
- 		return ret;
- 
-+	spi_nor_check_ext_addr(nor, ofs + len);
- 	ret = nor->flash_lock(nor, ofs, len);
-+	spi_nor_check_ext_addr(nor, 0);
- 
- 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK);
- 	return ret;
-@@ -851,7 +901,9 @@ static int spi_nor_unlock(struct mtd_inf
- 	if (ret)
- 		return ret;
- 
-+	spi_nor_check_ext_addr(nor, ofs + len);
- 	ret = nor->flash_unlock(nor, ofs, len);
-+	spi_nor_check_ext_addr(nor, 0);
- 
- 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
- 	return ret;
-@@ -1192,7 +1244,7 @@ static const struct flash_info spi_nor_i
- 	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
- 	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
- 	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
--	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-+	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_READ_OP) },
- 	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
- 			SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
- 
-@@ -1252,6 +1304,9 @@ static int spi_nor_read(struct mtd_info
- 	if (ret)
- 		return ret;
- 
-+	if (nor->flags & SNOR_F_4B_EXT_ADDR)
-+		nor->addr_width = 4;
-+
- 	while (len) {
- 		loff_t addr = from;
- 
-@@ -1276,6 +1331,18 @@ static int spi_nor_read(struct mtd_info
- 	ret = 0;
- 
- read_err:
-+	if (nor->flags & SNOR_F_4B_EXT_ADDR) {
-+		u8 val = 0;
-+
-+		if ((from + len) & 0xff000000) {
-+			write_enable(nor);
-+			nor->write_reg(nor, SPINOR_OP_WREAR, &val, 1);
-+			write_disable(nor);
-+		}
-+
-+		nor->addr_width = 3;
-+	}
-+
- 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
- 	return ret;
- }
-@@ -1377,6 +1444,10 @@ static int spi_nor_write(struct mtd_info
- 	if (ret)
- 		return ret;
- 
-+	ret = spi_nor_check_ext_addr(nor, to + len);
-+	if (ret < 0)
-+		return ret;
-+
- 	for (i = 0; i < len; ) {
- 		ssize_t written;
- 		loff_t addr = to + i;
-@@ -1417,6 +1488,7 @@ static int spi_nor_write(struct mtd_info
- 	}
- 
- write_err:
-+	spi_nor_check_ext_addr(nor, 0);
- 	spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
- 	return ret;
- }
-@@ -2842,8 +2914,10 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	} else if (mtd->size > 0x1000000) {
- 		/* enable 4-byte addressing if the device exceeds 16MiB */
- 		nor->addr_width = 4;
--		if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
--		    info->flags & SPI_NOR_4B_OPCODES)
-+		if (info->flags & SPI_NOR_4B_READ_OP)
-+			spi_nor_set_4byte_read(nor, info);
-+		else if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
-+			 info->flags & SPI_NOR_4B_OPCODES)
- 			spi_nor_set_4byte_opcodes(nor, info);
- 		else
- 			set_4byte(nor, info, 1);
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -102,6 +102,7 @@
- /* Used for Macronix and Winbond flashes. */
- #define SPINOR_OP_EN4B		0xb7	/* Enter 4-byte mode */
- #define SPINOR_OP_EX4B		0xe9	/* Exit 4-byte mode */
-+#define SPINOR_OP_WREAR		0xc5	/* Write extended address register */
- 
- /* Used for Spansion flashes only. */
- #define SPINOR_OP_BRWR		0x17	/* Bank register write */
-@@ -229,6 +230,7 @@ enum spi_nor_option_flags {
- 	SNOR_F_S3AN_ADDR_DEFAULT = BIT(3),
- 	SNOR_F_READY_XSR_RDY	= BIT(4),
- 	SNOR_F_USE_CLSR		= BIT(5),
-+	SNOR_F_4B_EXT_ADDR	= BIT(6),
- };
- 
- /**
-@@ -280,6 +282,7 @@ struct spi_nor {
- 	enum spi_nor_protocol	reg_proto;
- 	bool			sst_write_second;
- 	u32			flags;
-+	u8			ext_addr;
- 	u8			cmd_buf[SPI_NOR_MAX_CMD_SIZE];
- 
- 	int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
diff --git a/iopsys-ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch b/iopsys-ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch
deleted file mode 100644
index 419a9719b5b49a6f161cbaee0a22a3282f5a66e0..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch
+++ /dev/null
@@ -1,73 +0,0 @@
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -144,20 +144,29 @@ static int read_fsr(struct spi_nor *nor)
-  * location. Return the configuration register value.
-  * Returns negative if error occurred.
-  */
--static int read_cr(struct spi_nor *nor)
-+static int _read_cr(struct spi_nor *nor, u8 reg)
- {
- 	int ret;
- 	u8 val;
- 
--	ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1);
-+	ret = nor->read_reg(nor, reg, &val, 1);
- 	if (ret < 0) {
--		dev_err(nor->dev, "error %d reading CR\n", ret);
-+		dev_err(nor->dev, "error %d reading %s\n", ret,
-+			(reg==SPINOR_OP_RDCR)?"CR":"XCR");
- 		return ret;
- 	}
- 
- 	return val;
- }
- 
-+static inline int read_cr(struct spi_nor *nor) {
-+	return _read_cr(nor, SPINOR_OP_RDCR);
-+}
-+
-+static inline int read_xcr(struct spi_nor *nor) {
-+	return _read_cr(nor, SPINOR_OP_RDXCR);
-+}
-+
- /*
-  * Write status register 1 byte
-  * Returns negative if error occurred.
-@@ -2914,9 +2923,16 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	} else if (mtd->size > 0x1000000) {
- 		/* enable 4-byte addressing if the device exceeds 16MiB */
- 		nor->addr_width = 4;
--		if (info->flags & SPI_NOR_4B_READ_OP)
--			spi_nor_set_4byte_read(nor, info);
--		else if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
-+		if (info->flags & SPI_NOR_4B_READ_OP) {
-+			if (JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
-+				ret = read_xcr(nor);
-+				if (!(ret > 0 && (ret & XCR_DEF_4B_ADDR_MODE)))
-+					spi_nor_set_4byte_read(nor, info);
-+				else
-+					set_4byte(nor, info, 1);
-+			} else
-+				spi_nor_set_4byte_read(nor, info);
-+		} else if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
- 			 info->flags & SPI_NOR_4B_OPCODES)
- 			spi_nor_set_4byte_opcodes(nor, info);
- 		else
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -103,6 +103,7 @@
- #define SPINOR_OP_EN4B		0xb7	/* Enter 4-byte mode */
- #define SPINOR_OP_EX4B		0xe9	/* Exit 4-byte mode */
- #define SPINOR_OP_WREAR		0xc5	/* Write extended address register */
-+#define SPINOR_OP_RDXCR		0x15	/* Read extended configuration register */
- 
- /* Used for Spansion flashes only. */
- #define SPINOR_OP_BRWR		0x17	/* Bank register write */
-@@ -135,6 +136,7 @@
- 
- /* Configuration Register bits. */
- #define CR_QUAD_EN_SPAN		BIT(1)	/* Spansion Quad I/O */
-+#define XCR_DEF_4B_ADDR_MODE	BIT(1)	/* Winbond 4B mode default */
- 
- /* Status Register 2 bits. */
- #define SR2_QUAD_EN_BIT7	BIT(7)
diff --git a/iopsys-ramips/patches-4.14/0099-pci-mt7620.patch b/iopsys-ramips/patches-4.14/0099-pci-mt7620.patch
deleted file mode 100644
index 997fb6a2b3b8aabde442e7009c8c62aeb26e62ba..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0099-pci-mt7620.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/arch/mips/pci/pci-mt7620.c
-+++ b/arch/mips/pci/pci-mt7620.c
-@@ -33,7 +33,6 @@
- #define RALINK_GPIOMODE			0x60
- 
- #define PPLL_CFG1			0x9c
--#define PDRV_SW_SET			BIT(23)
- 
- #define PPLL_DRV			0xa0
- #define PDRV_SW_SET			(1<<31)
diff --git a/iopsys-ramips/patches-4.14/0100-init-banner-add-timestamp.patch b/iopsys-ramips/patches-4.14/0100-init-banner-add-timestamp.patch
deleted file mode 100644
index d7fecab184ee00512cd75113f59e6cd74bbd6fa8..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0100-init-banner-add-timestamp.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-diff --git a/init/version.c b/init/version.c
-index 5606341..db07a6f 100644
---- a/init/version.c
-+++ b/init/version.c
-@@ -43,7 +43,7 @@ EXPORT_SYMBOL_GPL(init_uts_ns);
- /* FIXED STRINGS! Don't touch! */
- const char linux_banner[] =
- 	"Linux version " UTS_RELEASE " (" LINUX_COMPILE_BY "@"
--	LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION "\n";
-+	LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " LINUX_COMPILE_TIME "\n";
- 
- const char linux_proc_banner[] =
- 	"%s version %s"
-diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h
-index 959199c..6c85273 100755
---- a/scripts/mkcompile_h
-+++ b/scripts/mkcompile_h
-@@ -76,6 +76,7 @@ UTS_TRUNCATE="cut -b -$UTS_LEN"
- 
-   echo \#define LINUX_COMPILE_BY \"`echo $LINUX_COMPILE_BY | $UTS_TRUNCATE`\"
-   echo \#define LINUX_COMPILE_HOST \"`echo $LINUX_COMPILE_HOST | $UTS_TRUNCATE`\"
-+  echo \#define LINUX_COMPILE_TIME \"`date`\"
- 
-   echo \#define LINUX_COMPILER \"`$CC -v 2>&1 | grep ' version ' | sed 's/[[:space:]]*$//'`\"
- ) > .tmpcompile
diff --git a/iopsys-ramips/patches-4.14/0110-Add-IRQ-COND-SUSPEND-to-gsw-int-req.patch b/iopsys-ramips/patches-4.14/0110-Add-IRQ-COND-SUSPEND-to-gsw-int-req.patch
deleted file mode 100644
index 2a2fb58fa8381b915966df78adc9ec2b517f86a8..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/0110-Add-IRQ-COND-SUSPEND-to-gsw-int-req.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/drivers/net/ethernet/mediatek/gsw_mt7621.c b/drivers/net/ethernet/mediatek/gsw_mt7621.c
-index 89be239..55a7a37 100644
---- a/drivers/net/ethernet/mediatek/gsw_mt7621.c
-+++ b/drivers/net/ethernet/mediatek/gsw_mt7621.c
-@@ -222,7 +222,7 @@ int mtk_gsw_init(struct fe_priv *priv)
- 	priv->soc->swpriv = gsw;
- 
- 	if (gsw->irq) {
--		request_irq(gsw->irq, gsw_interrupt_mt7621, 0,
-+		request_irq(gsw->irq, gsw_interrupt_mt7621, IRQF_COND_SUSPEND,
- 			    "gsw", priv);
- 		disable_irq(gsw->irq);
- 	}
diff --git a/iopsys-ramips/patches-4.14/304-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch b/iopsys-ramips/patches-4.14/304-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
deleted file mode 100644
index bfa25c77e865d832229f79f8e14330031b7a7be6..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/304-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-This hack can be dropped after the next stable release from
-v5.x-tree.
-
-The problem was fixed upstream by
-
-commit 2bffa65da43e ("mtd: spi-nor: Add a post BFPT fixup for MX25L25635E")
-
-For reference see:
-<https://github.com/openwrt/openwrt/pull/1743>
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1113,6 +1113,7 @@ static const struct flash_info spi_nor_i
- 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
- 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
- 	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-+	{ "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
- 	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
- 	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
- 	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-@@ -1282,11 +1283,12 @@ static const struct flash_info spi_nor_i
- 	{ },
- };
- 
--static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
-+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor,
-+						const char *name)
- {
- 	int			tmp;
- 	u8			id[SPI_NOR_MAX_ID_LEN];
--	const struct flash_info	*info;
-+	const struct flash_info	*info, *first_match = NULL;
- 
- 	tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
- 	if (tmp < 0) {
-@@ -1297,10 +1299,16 @@ static const struct flash_info *spi_nor_
- 	for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
- 		info = &spi_nor_ids[tmp];
- 		if (info->id_len) {
--			if (!memcmp(info->id, id, info->id_len))
--				return &spi_nor_ids[tmp];
-+			if (!memcmp(info->id, id, info->id_len)) {
-+				if (!name || !strcmp(name, info->name))
-+					return info;
-+				if (!first_match)
-+					first_match = info;
-+			}
- 		}
- 	}
-+	if (first_match)
-+		return first_match;
- 	dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
- 		id[0], id[1], id[2]);
- 	return ERR_PTR(-ENODEV);
-@@ -2789,7 +2797,7 @@ int spi_nor_scan(struct spi_nor *nor, co
- 		info = spi_nor_match_id(name);
- 	/* Try to auto-detect if chip name wasn't specified or not found */
- 	if (!info)
--		info = spi_nor_read_id(nor);
-+		info = spi_nor_read_id(nor, NULL);
- 	if (IS_ERR_OR_NULL(info))
- 		return -ENOENT;
- 
-@@ -2800,7 +2808,7 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	if (name && info->id_len) {
- 		const struct flash_info *jinfo;
- 
--		jinfo = spi_nor_read_id(nor);
-+		jinfo = spi_nor_read_id(nor, name);
- 		if (IS_ERR(jinfo)) {
- 			return PTR_ERR(jinfo);
- 		} else if (jinfo != info) {
diff --git a/iopsys-ramips/patches-4.14/400-ramips-ex400-allow-two-cores.patch b/iopsys-ramips/patches-4.14/400-ramips-ex400-allow-two-cores.patch
deleted file mode 100644
index 32248bb02b52136208c38a30e8b1124815e8001c..0000000000000000000000000000000000000000
--- a/iopsys-ramips/patches-4.14/400-ramips-ex400-allow-two-cores.patch
+++ /dev/null
@@ -1,16 +0,0 @@
-diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
-index 070eaaa7f..99e9ca83c 100644
---- a/arch/mips/ralink/mt7621.c
-+++ b/arch/mips/ralink/mt7621.c
-@@ -236,6 +236,11 @@ bool plat_cpu_core_present(int core)
- 
- 	if (!core)
- 		return true;
-+
-+	/* TODO check what is wrong here, today allow also core 1 */
-+	if (core == 1)
-+		return true;
-+
- 	launch += core * 2; /* 2 VPEs per core */
- 	if (!(launch->flags & LAUNCH_FREADY))
- 		return false;
diff --git a/iopsys-ramips/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch b/iopsys-ramips/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch
new file mode 100644
index 0000000000000000000000000000000000000000..eedc7498be64e4a6f9dd61dad49fe81aa827dee2
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch
@@ -0,0 +1,192 @@
+From: Paul Burton <paul.burton@mips.com>
+Date: Wed, 9 Oct 2019 23:09:45 +0000
+Subject: MIPS: cmdline: Clean up boot_command_line initialization
+
+Our current code to initialize boot_command_line is a mess. Some of this
+is due to the addition of too many options over the years, and some of
+this is due to workarounds for early_init_dt_scan_chosen() performing
+actions specific to options from other architectures that probably
+shouldn't be in generic code.
+
+Clean this up by introducing a new bootcmdline_init() function that
+simplifies the initialization somewhat. The major changes are:
+
+- Because bootcmdline_init() is a function it can return early in the
+  CONFIG_CMDLINE_OVERRIDE case.
+
+- We clear boot_command_line rather than inheriting whatever
+  early_init_dt_scan_chosen() may have left us. This means we no longer
+  need to set boot_command_line to a space character in an attempt to
+  prevent early_init_dt_scan_chosen() from copying CONFIG_CMDLINE into
+  boot_command_line without us knowing about it.
+
+- Indirection via USE_PROM_CMDLINE, USE_DTB_CMDLINE, EXTEND_WITH_PROM &
+  BUILTIN_EXTEND_WITH_PROM macros is removed; they seemingly served only
+  to obfuscate the code.
+
+- The logic is cleaner, clearer & commented.
+
+Two minor drawbacks of this approach are:
+
+1) We call of_scan_flat_dt(), which means we scan through the DT again.
+   The overhead is fairly minimal & shouldn't be noticeable.
+
+2) cmdline_scan_chosen() duplicates a small amount of the logic from
+   early_init_dt_scan_chosen(). Alternatives might be to allow the
+   generic FDT code to keep & expose a copy of the arguments taken from
+   the /chosen node's bootargs property, or to introduce a function like
+   early_init_dt_scan_chosen() that retrieves them without modification
+   to handle CONFIG_CMDLINE. Neither of these sounds particularly
+   cleaner though, and this way we at least keep the extra work in
+   arch/mips.
+
+Origin: upstream, https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7784cac697351f0cc0a4bb619594c0c99348c5aa
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Cc: linux-mips@vger.kernel.org
+
+--- a/arch/mips/kernel/setup.c
++++ b/arch/mips/kernel/setup.c
+@@ -538,11 +538,88 @@ static void __init check_kernel_sections
+ 	}
+ }
+ 
+-#define USE_PROM_CMDLINE	IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER)
+-#define USE_DTB_CMDLINE		IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB)
+-#define EXTEND_WITH_PROM	IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND)
+-#define BUILTIN_EXTEND_WITH_PROM	\
+-	IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND)
++static void __init bootcmdline_append(const char *s, size_t max)
++{
++	if (!s[0] || !max)
++		return;
++
++	if (boot_command_line[0])
++		strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
++
++	strlcat(boot_command_line, s, max);
++}
++
++static int __init bootcmdline_scan_chosen(unsigned long node, const char *uname,
++					  int depth, void *data)
++{
++	bool *dt_bootargs = data;
++	const char *p;
++	int l;
++
++	if (depth != 1 || !data ||
++	    (strcmp(uname, "chosen") != 0 && strcmp(uname, "chosen@0") != 0))
++		return 0;
++
++	p = of_get_flat_dt_prop(node, "bootargs", &l);
++	if (p != NULL && l > 0) {
++		bootcmdline_append(p, min(l, COMMAND_LINE_SIZE));
++		*dt_bootargs = true;
++	}
++
++	return 1;
++}
++
++static void __init bootcmdline_init(char **cmdline_p)
++{
++	bool dt_bootargs = false;
++
++	/*
++	 * If CMDLINE_OVERRIDE is enabled then initializing the command line is
++	 * trivial - we simply use the built-in command line unconditionally &
++	 * unmodified.
++	 */
++	if (IS_ENABLED(CONFIG_CMDLINE_OVERRIDE)) {
++		strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
++		return;
++	}
++
++	/*
++	 * If the user specified a built-in command line &
++	 * MIPS_CMDLINE_BUILTIN_EXTEND, then the built-in command line is
++	 * prepended to arguments from the bootloader or DT so we'll copy them
++	 * to the start of boot_command_line here. Otherwise, empty
++	 * boot_command_line to undo anything early_init_dt_scan_chosen() did.
++	 */
++	if (IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND))
++		strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
++	else
++		boot_command_line[0] = 0;
++
++	/*
++	 * If we're configured to take boot arguments from DT, look for those
++	 * now.
++	 */
++	if (IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB))
++		of_scan_flat_dt(bootcmdline_scan_chosen, &dt_bootargs);
++
++	/*
++	 * If we didn't get any arguments from DT (regardless of whether that's
++	 * because we weren't configured to look for them, or because we looked
++	 * & found none) then we'll take arguments from the bootloader.
++	 * plat_mem_setup() should have filled arcs_cmdline with arguments from
++	 * the bootloader.
++	 */
++	if (IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND) || !dt_bootargs)
++		bootcmdline_append(arcs_cmdline, COMMAND_LINE_SIZE);
++
++	/*
++	 * If the user specified a built-in command line & we didn't already
++	 * prepend it, we append it to boot_command_line here.
++	 */
++	if (IS_ENABLED(CONFIG_CMDLINE_BOOL) &&
++	    !IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND))
++		bootcmdline_append(builtin_cmdline, COMMAND_LINE_SIZE);
++}
+ 
+ /*
+  * arch_mem_init - initialize memory management subsystem
+@@ -570,48 +647,12 @@ static void __init arch_mem_init(char **
+ {
+ 	extern void plat_mem_setup(void);
+ 
+-	/*
+-	 * Initialize boot_command_line to an innocuous but non-empty string in
+-	 * order to prevent early_init_dt_scan_chosen() from copying
+-	 * CONFIG_CMDLINE into it without our knowledge. We handle
+-	 * CONFIG_CMDLINE ourselves below & don't want to duplicate its
+-	 * content because repeating arguments can be problematic.
+-	 */
+-	strlcpy(boot_command_line, " ", COMMAND_LINE_SIZE);
+-
+ 	/* call board setup routine */
+ 	plat_mem_setup();
+ 	memblock_set_bottom_up(true);
+ 
+-#if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE)
+-	strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
+-#else
+-	if ((USE_PROM_CMDLINE && arcs_cmdline[0]) ||
+-	    (USE_DTB_CMDLINE && !boot_command_line[0]))
+-		strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
+-
+-	if (EXTEND_WITH_PROM && arcs_cmdline[0]) {
+-		if (boot_command_line[0])
+-			strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
+-		strlcat(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
+-	}
+-
+-#if defined(CONFIG_CMDLINE_BOOL)
+-	if (builtin_cmdline[0]) {
+-		if (boot_command_line[0])
+-			strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
+-		strlcat(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
+-	}
+-
+-	if (BUILTIN_EXTEND_WITH_PROM && arcs_cmdline[0]) {
+-		if (boot_command_line[0])
+-			strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
+-		strlcat(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
+-	}
+-#endif
+-#endif
++	bootcmdline_init(cmdline_p);
+ 	strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
+-
+ 	*cmdline_p = command_line;
+ 
+ 	parse_early_param();
diff --git a/iopsys-ramips/patches-5.4/0002-MIPS-Always-define-builtin_cmdline.patch b/iopsys-ramips/patches-5.4/0002-MIPS-Always-define-builtin_cmdline.patch
new file mode 100644
index 0000000000000000000000000000000000000000..03124d07d1904150a97032ea331a3a1cc9d6603d
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0002-MIPS-Always-define-builtin_cmdline.patch
@@ -0,0 +1,44 @@
+From b7340422cc16c5deff100812f38114bb5ec81203 Mon Sep 17 00:00:00 2001
+From: Paul Burton <paul.burton@mips.com>
+Date: Sat, 12 Oct 2019 20:43:36 +0000
+Subject: [PATCH] MIPS: Always define builtin_cmdline
+
+Commit 7784cac69735 ("MIPS: cmdline: Clean up boot_command_line
+initialization") made use of builtin_cmdline conditional upon plain C if
+statements rather than preprocessor #ifdef's. This caused build failures
+for configurations with CONFIG_CMDLINE_BOOL=n where builtin_cmdline
+wasn't defined, for example:
+
+   arch/mips/kernel/setup.c: In function 'bootcmdline_init':
+>> arch/mips/kernel/setup.c:582:30: error: 'builtin_cmdline' undeclared
+    (first use in this function); did you mean 'builtin_driver'?
+      strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
+                                 ^~~~~~~~~~~~~~~
+                                 builtin_driver
+   arch/mips/kernel/setup.c:582:30: note: each undeclared identifier is
+    reported only once for each function it appears in
+
+Fix this by defining builtin_cmdline as an empty string in the affected
+configurations. All of the paths that use it should be optimized out
+anyway so the data itself gets optimized away too.
+
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Fixes: 7784cac69735 ("MIPS: cmdline: Clean up boot_command_line initialization")
+Reported-by: kbuild test robot <lkp@intel.com>
+Reported-by: Nathan Chancellor <natechancellor@gmail.com>
+Cc: linux-mips@vger.kernel.org
+---
+ arch/mips/kernel/setup.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/kernel/setup.c
++++ b/arch/mips/kernel/setup.c
+@@ -68,6 +68,8 @@ char __initdata arcs_cmdline[COMMAND_LIN
+ 
+ #ifdef CONFIG_CMDLINE_BOOL
+ static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
++#else
++static const char builtin_cmdline[] __initconst = "";
+ #endif
+ 
+ /*
diff --git a/iopsys-ramips/patches-4.14/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch b/iopsys-ramips/patches-5.4/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch
similarity index 67%
rename from iopsys-ramips/patches-4.14/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch
rename to iopsys-ramips/patches-5.4/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch
index 77f2622b9d2b4c18d50354545c94e71dc585e0db..63429f49b0ba70bce30132ee96ca18a1a5509a29 100644
--- a/iopsys-ramips/patches-4.14/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch
+++ b/iopsys-ramips/patches-5.4/0003-MIPS-Fix-memory-reservation-in-bootmem_init-for-cert.patch
@@ -16,27 +16,27 @@ Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
 
 --- a/arch/mips/kernel/setup.c
 +++ b/arch/mips/kernel/setup.c
-@@ -369,6 +369,8 @@ static unsigned long __init bootmap_byte
- 	return ALIGN(bytes, sizeof(long));
- }
- 
+@@ -287,6 +287,8 @@ static unsigned long __init init_initrd(
+  * Initialize the bootmem allocator. It also setup initrd related data
+  * if needed.
+  */
 +static int usermem __initdata;
 +
+ #if defined(CONFIG_SGI_IP27) || (defined(CONFIG_CPU_LOONGSON3) && defined(CONFIG_NUMA))
+ 
  static void __init bootmem_init(void)
- {
- 	unsigned long reserved_end;
-@@ -442,7 +444,7 @@ static void __init bootmem_init(void)
+@@ -325,7 +327,7 @@ static void __init bootmem_init(void)
  	/*
  	 * Reserve any memory between the start of RAM and PHYS_OFFSET
  	 */
 -	if (ramstart > PHYS_OFFSET)
 +	if (usermem && ramstart > PHYS_OFFSET)
- 		add_memory_region(PHYS_OFFSET, ramstart - PHYS_OFFSET,
- 				  BOOT_MEM_RESERVED);
+ 		memblock_reserve(PHYS_OFFSET, ramstart - PHYS_OFFSET);
  
-@@ -652,8 +654,6 @@ static void __init bootmem_init(void)
-  * initialization hook for anything else was introduced.
-  */
+ 	if (PFN_UP(ramstart) > ARCH_PFN_OFFSET) {
+@@ -386,8 +388,6 @@ static void __init bootmem_init(void)
+ 
+ #endif	/* CONFIG_SGI_IP27 */
  
 -static int usermem __initdata;
 -
diff --git a/iopsys-ramips/patches-4.14/0005-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/iopsys-ramips/patches-5.4/0005-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
similarity index 100%
rename from iopsys-ramips/patches-4.14/0005-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
rename to iopsys-ramips/patches-5.4/0005-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
diff --git a/iopsys-ramips/patches-4.14/0006-MIPS-ralink-add-cpu-frequency-scaling.patch b/iopsys-ramips/patches-5.4/0006-MIPS-ralink-add-cpu-frequency-scaling.patch
similarity index 97%
rename from iopsys-ramips/patches-4.14/0006-MIPS-ralink-add-cpu-frequency-scaling.patch
rename to iopsys-ramips/patches-5.4/0006-MIPS-ralink-add-cpu-frequency-scaling.patch
index 90215fbf86de10db580b82b2f22bcd61f2d4f4cf..a3b8e4d250f0a1a0d4011227fe45ae11fb773ffb 100644
--- a/iopsys-ramips/patches-4.14/0006-MIPS-ralink-add-cpu-frequency-scaling.patch
+++ b/iopsys-ramips/patches-5.4/0006-MIPS-ralink-add-cpu-frequency-scaling.patch
@@ -179,7 +179,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	/* register clock event */
  	systick.dev.irq = irq_of_parse_and_map(np, 0);
  	if (!systick.dev.irq) {
- 		pr_err("%s: request_irq failed", np->name);
+ 		pr_err("%pOFn: request_irq failed", np);
  		return -EINVAL;
  	}
  
@@ -196,5 +196,5 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	systick.dev.cpumask = cpumask_of(0);
 +	clockevents_config_and_register(&systick.dev, SYSTICK_FREQ, 0x3, 0x7fff);
  
- 	pr_info("%s: running - mult: %d, shift: %d\n",
- 			np->name, systick.dev.mult, systick.dev.shift);
+ 	pr_info("%pOFn: running - mult: %d, shift: %d\n",
+ 			np, systick.dev.mult, systick.dev.shift);
diff --git a/iopsys-ramips/patches-4.14/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch b/iopsys-ramips/patches-5.4/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch
similarity index 92%
rename from iopsys-ramips/patches-4.14/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch
rename to iopsys-ramips/patches-5.4/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch
index c05ee8018d313d1e1a40ddcdd4f375af573331a1..54af571d85d217fe76cee216dc6ec83b318cfe47 100644
--- a/iopsys-ramips/patches-4.14/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch
+++ b/iopsys-ramips/patches-5.4/0007-MIPS-ralink-copy-the-commandline-from-the-devicetree.patch
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/arch/mips/ralink/of.c
 +++ b/arch/mips/ralink/of.c
-@@ -82,6 +82,8 @@ void __init plat_mem_setup(void)
+@@ -80,6 +80,8 @@ void __init plat_mem_setup(void)
  
  	__dt_setup_arch(dtb);
  
diff --git a/iopsys-ramips/patches-5.4/0010-MIPS-add-bootargs-override-property.patch b/iopsys-ramips/patches-5.4/0010-MIPS-add-bootargs-override-property.patch
new file mode 100644
index 0000000000000000000000000000000000000000..c19a0fb4809f8603d42ebf343f4454dd478cd183
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0010-MIPS-add-bootargs-override-property.patch
@@ -0,0 +1,63 @@
+From f15d27f9c90ede4b16eb37f9ae573ef81c2b6996 Mon Sep 17 00:00:00 2001
+From: David Bauer <mail@david-bauer.net>
+Date: Thu, 31 Dec 2020 18:49:12 +0100
+Subject: [PATCH] MIPS: add bootargs-override property
+
+Add support for the bootargs-override property to the chosen node
+similar to the one used on ipq806x or mpc85xx.
+
+This is necessary, as the U-Boot used on some boards, notably the
+Ubiquiti UniFi 6 Lite, overwrite the bootargs property of the chosen
+node leading to a kernel panic when loading OpenWrt.
+
+Signed-off-by: David Bauer <mail@david-bauer.net>
+---
+ arch/mips/kernel/setup.c | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+--- a/arch/mips/kernel/setup.c
++++ b/arch/mips/kernel/setup.c
+@@ -571,8 +571,28 @@ static int __init bootcmdline_scan_chose
+ 	return 1;
+ }
+ 
++static int __init bootcmdline_scan_chosen_override(unsigned long node, const char *uname,
++						   int depth, void *data)
++{
++	bool *dt_bootargs = data;
++	const char *p;
++	int l;
++
++	if (depth != 1 || !data || strcmp(uname, "chosen") != 0)
++		return 0;
++
++	p = of_get_flat_dt_prop(node, "bootargs-override", &l);
++	if (p != NULL && l > 0) {
++		strlcpy(boot_command_line, p, COMMAND_LINE_SIZE);
++		*dt_bootargs = true;
++	}
++
++	return 1;
++}
++
+ static void __init bootcmdline_init(char **cmdline_p)
+ {
++	bool dt_bootargs_override = false;
+ 	bool dt_bootargs = false;
+ 
+ 	/*
+@@ -586,6 +606,14 @@ static void __init bootcmdline_init(char
+ 	}
+ 
+ 	/*
++	 * If bootargs-override in the chosen node is set, use this as the
++	 * command line
++	 */
++	of_scan_flat_dt(bootcmdline_scan_chosen_override, &dt_bootargs_override);
++	if (dt_bootargs_override)
++		return;
++
++	/*
+ 	 * If the user specified a built-in command line &
+ 	 * MIPS_CMDLINE_BUILTIN_EXTEND, then the built-in command line is
+ 	 * prepended to arguments from the bootloader or DT so we'll copy them
diff --git a/iopsys-ramips/patches-4.14/0013-owrt-hack-fix-mt7688-cache-issue.patch b/iopsys-ramips/patches-5.4/0013-owrt-hack-fix-mt7688-cache-issue.patch
similarity index 68%
rename from iopsys-ramips/patches-4.14/0013-owrt-hack-fix-mt7688-cache-issue.patch
rename to iopsys-ramips/patches-5.4/0013-owrt-hack-fix-mt7688-cache-issue.patch
index 47de8a5f17966c789735a8fcb401295e0d7eea0b..bedea145061fa92220c63ff772d6c5e765874b38 100644
--- a/iopsys-ramips/patches-4.14/0013-owrt-hack-fix-mt7688-cache-issue.patch
+++ b/iopsys-ramips/patches-5.4/0013-owrt-hack-fix-mt7688-cache-issue.patch
@@ -10,15 +10,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/arch/mips/kernel/setup.c
 +++ b/arch/mips/kernel/setup.c
-@@ -910,7 +910,6 @@ static void __init arch_mem_init(char **
- 				crashk_res.end - crashk_res.start + 1,
- 				BOOTMEM_DEFAULT);
+@@ -723,8 +723,6 @@ static void __init arch_mem_init(char **
+ 		memblock_reserve(crashk_res.start,
+ 				 crashk_res.end - crashk_res.start + 1);
  #endif
 -	device_tree_init();
- 
+-
  	/*
  	 * In order to reduce the possibility of kernel panic when failed to
-@@ -1036,6 +1035,7 @@ void __init setup_arch(char **cmdline_p)
+ 	 * get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
+@@ -841,6 +839,7 @@ void __init setup_arch(char **cmdline_p)
  
  	cpu_cache_init();
  	paging_init();
diff --git a/iopsys-ramips/patches-4.14/0015-arch-mips-do-not-select-illegal-access-driver-by-def.patch b/iopsys-ramips/patches-5.4/0015-arch-mips-do-not-select-illegal-access-driver-by-def.patch
similarity index 100%
rename from iopsys-ramips/patches-4.14/0015-arch-mips-do-not-select-illegal-access-driver-by-def.patch
rename to iopsys-ramips/patches-5.4/0015-arch-mips-do-not-select-illegal-access-driver-by-def.patch
diff --git a/iopsys-ramips/patches-4.14/0024-GPIO-add-named-gpio-exports.patch b/iopsys-ramips/patches-5.4/0024-GPIO-add-named-gpio-exports.patch
similarity index 92%
rename from iopsys-ramips/patches-4.14/0024-GPIO-add-named-gpio-exports.patch
rename to iopsys-ramips/patches-5.4/0024-GPIO-add-named-gpio-exports.patch
index 61ed9ea784e79f53104702d288fa915c8cee2421..d4ea379159260064a5898a3c2f2765154baf7b5d 100644
--- a/iopsys-ramips/patches-4.14/0024-GPIO-add-named-gpio-exports.patch
+++ b/iopsys-ramips/patches-5.4/0024-GPIO-add-named-gpio-exports.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/gpio/gpiolib-of.c
 +++ b/drivers/gpio/gpiolib-of.c
-@@ -23,6 +23,8 @@
+@@ -19,6 +19,8 @@
  #include <linux/pinctrl/pinctrl.h>
  #include <linux/slab.h>
  #include <linux/gpio/machine.h>
@@ -21,9 +21,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +#include <linux/platform_device.h>
  
  #include "gpiolib.h"
- 
-@@ -513,3 +515,68 @@ void of_gpiochip_remove(struct gpio_chip
- 	gpiochip_remove_pin_ranges(chip);
+ #include "gpiolib-of.h"
+@@ -915,3 +917,68 @@ void of_gpiochip_remove(struct gpio_chip
+ {
  	of_node_put(chip->of_node);
  }
 +
@@ -93,7 +93,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +module_platform_driver(gpio_export_driver);
 --- a/drivers/gpio/gpiolib-sysfs.c
 +++ b/drivers/gpio/gpiolib-sysfs.c
-@@ -553,7 +553,7 @@ static struct class gpio_class = {
+@@ -563,7 +563,7 @@ static struct class gpio_class = {
   *
   * Returns zero on success, else an error.
   */
@@ -102,7 +102,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  {
  	struct gpio_chip	*chip;
  	struct gpio_device	*gdev;
-@@ -615,6 +615,8 @@ int gpiod_export(struct gpio_desc *desc,
+@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc,
  	offset = gpio_chip_hwgpio(desc);
  	if (chip->names && chip->names[offset])
  		ioname = chip->names[offset];
@@ -111,7 +111,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	dev = device_create_with_groups(&gpio_class, &gdev->dev,
  					MKDEV(0, 0), data, gpio_groups,
-@@ -636,6 +638,12 @@ err_unlock:
+@@ -646,6 +648,12 @@ err_unlock:
  	gpiod_dbg(desc, "%s: status %d\n", __func__, status);
  	return status;
  }
@@ -141,7 +141,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  {
 --- a/include/linux/gpio/consumer.h
 +++ b/include/linux/gpio/consumer.h
-@@ -451,6 +451,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_
+@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_
  
  #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
  
@@ -149,7 +149,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
  int gpiod_export_link(struct device *dev, const char *name,
  		      struct gpio_desc *desc);
-@@ -458,6 +459,13 @@ void gpiod_unexport(struct gpio_desc *de
+@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de
  
  #else  /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
  
diff --git a/iopsys-ramips/patches-4.14/0026-DT-Add-documentation-for-gpio-ralink.patch b/iopsys-ramips/patches-5.4/0026-DT-Add-documentation-for-gpio-ralink.patch
similarity index 95%
rename from iopsys-ramips/patches-4.14/0026-DT-Add-documentation-for-gpio-ralink.patch
rename to iopsys-ramips/patches-5.4/0026-DT-Add-documentation-for-gpio-ralink.patch
index 0bce0b433a92a214cceeb05ac99ea51d919300e6..7d5f98f64722d07f8b9d5927881d0e972617ae29 100644
--- a/iopsys-ramips/patches-4.14/0026-DT-Add-documentation-for-gpio-ralink.patch
+++ b/iopsys-ramips/patches-5.4/0026-DT-Add-documentation-for-gpio-ralink.patch
@@ -29,7 +29,7 @@ Cc: linux-gpio@vger.kernel.org
 +- reg : Physical base address and length of the controller's registers
 +- interrupt-parent: phandle to the INTC device node
 +- interrupts : Specify the INTC interrupt number
-+- ralink,nr-gpio : Specify the number of GPIOs
++- ralink,num-gpios : Specify the number of GPIOs
 +- ralink,register-map : The register layout depends on the GPIO bank and actual
 +		SoC type. Register offsets need to be in this order.
 +		[ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]
@@ -51,7 +51,7 @@ Cc: linux-gpio@vger.kernel.org
 +		interrupts = <6>;
 +
 +		ralink,gpio-base = <0>;
-+		ralink,nr-gpio = <24>;
++		ralink,num-gpios = <24>;
 +		ralink,register-map = [ 00 04 08 0c
 +				20 24 28 2c
 +				30 34 ];
diff --git a/iopsys-ramips/patches-4.14/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch b/iopsys-ramips/patches-5.4/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch
similarity index 91%
rename from iopsys-ramips/patches-4.14/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch
rename to iopsys-ramips/patches-5.4/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch
index eaae0d3d02f70a9cac69c50d13e4a8dba2b7a956..eae507bcd7b608cb2dd90b0b14acd67ef57e10cf 100644
--- a/iopsys-ramips/patches-4.14/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch
+++ b/iopsys-ramips/patches-5.4/0027-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch
@@ -47,9 +47,9 @@ Cc: linux-gpio@vger.kernel.org
 +#endif /* __ASM_MACH_RALINK_GPIO_H */
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
-@@ -398,6 +398,12 @@ config GPIO_REG
- 	  A 32-bit single register GPIO fixed in/out implementation.  This
- 	  can be used to represent any register as a set of GPIO signals.
+@@ -471,6 +471,12 @@ config GPIO_SNPS_CREG
+ 	  where only several fields in register belong to GPIO lines and
+ 	  each GPIO line owns a field with different length and on/off value.
  
 +config GPIO_RALINK
 +	bool "Ralink GPIO Support"
@@ -62,17 +62,17 @@ Cc: linux-gpio@vger.kernel.org
  	depends on PLAT_SPEAR
 --- a/drivers/gpio/Makefile
 +++ b/drivers/gpio/Makefile
-@@ -98,6 +98,7 @@ obj-$(CONFIG_GPIO_PCI_IDIO_16)	+= gpio-p
- obj-$(CONFIG_GPIO_PISOSR)	+= gpio-pisosr.o
- obj-$(CONFIG_GPIO_PL061)	+= gpio-pl061.o
- obj-$(CONFIG_GPIO_PXA)		+= gpio-pxa.o
-+obj-$(CONFIG_GPIO_RALINK)	+= gpio-ralink.o
- obj-$(CONFIG_GPIO_RC5T583)	+= gpio-rc5t583.o
- obj-$(CONFIG_GPIO_RDC321X)	+= gpio-rdc321x.o
- obj-$(CONFIG_GPIO_RCAR)		+= gpio-rcar.o
+@@ -112,6 +112,7 @@ obj-$(CONFIG_GPIO_PISOSR)		+= gpio-pisos
+ obj-$(CONFIG_GPIO_PL061)		+= gpio-pl061.o
+ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD)	+= gpio-pmic-eic-sprd.o
+ obj-$(CONFIG_GPIO_PXA)			+= gpio-pxa.o
++obj-$(CONFIG_GPIO_RALINK)		+= gpio-ralink.o
+ obj-$(CONFIG_GPIO_RASPBERRYPI_EXP)	+= gpio-raspberrypi-exp.o
+ obj-$(CONFIG_GPIO_RC5T583)		+= gpio-rc5t583.o
+ obj-$(CONFIG_GPIO_RCAR)			+= gpio-rcar.o
 --- /dev/null
 +++ b/drivers/gpio/gpio-ralink.c
-@@ -0,0 +1,355 @@
+@@ -0,0 +1,341 @@
 +/*
 + * This program is free software; you can redistribute it and/or modify it
 + * under the terms of the GNU General Public License version 2 as published
@@ -328,20 +328,6 @@ Cc: linux-gpio@vger.kernel.org
 +	dev_info(rg->chip.parent, "registering %d irq handlers\n", rg->chip.ngpio);
 +}
 +
-+static int ralink_gpio_request(struct gpio_chip *chip, unsigned offset)
-+{
-+	int gpio = chip->base + offset;
-+
-+	return pinctrl_request_gpio(gpio);
-+}
-+
-+static void ralink_gpio_free(struct gpio_chip *chip, unsigned offset)
-+{
-+	int gpio = chip->base + offset;
-+
-+	pinctrl_free_gpio(gpio);
-+}
-+
 +static int ralink_gpio_probe(struct platform_device *pdev)
 +{
 +	struct device_node *np = pdev->dev.of_node;
@@ -371,7 +357,7 @@ Cc: linux-gpio@vger.kernel.org
 +		return -EINVAL;
 +	}
 +
-+	ngpio = of_get_property(np, "ralink,nr-gpio", NULL);
++	ngpio = of_get_property(np, "ralink,num-gpios", NULL);
 +	if (!ngpio) {
 +		dev_err(&pdev->dev, "failed to read number of pins\n");
 +		return -EINVAL;
@@ -393,9 +379,9 @@ Cc: linux-gpio@vger.kernel.org
 +	rg->chip.direction_output = ralink_gpio_direction_output;
 +	rg->chip.get = ralink_gpio_get;
 +	rg->chip.set = ralink_gpio_set;
-+	rg->chip.request = ralink_gpio_request;
++	rg->chip.request = gpiochip_generic_request;
 +	rg->chip.to_irq = ralink_gpio_to_irq;
-+	rg->chip.free = ralink_gpio_free;
++	rg->chip.free = gpiochip_generic_free;
 +
 +	/* set polarity to low for all lines */
 +	rt_gpio_w32(rg, GPIO_REG_POL, 0);
diff --git a/iopsys-ramips/patches-4.14/0029-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch b/iopsys-ramips/patches-5.4/0029-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch
similarity index 100%
rename from iopsys-ramips/patches-4.14/0029-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch
rename to iopsys-ramips/patches-5.4/0029-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch
diff --git a/iopsys-ramips/patches-4.14/0031-uvc-add-iPassion-iP2970-support.patch b/iopsys-ramips/patches-5.4/0031-uvc-add-iPassion-iP2970-support.patch
similarity index 87%
rename from iopsys-ramips/patches-4.14/0031-uvc-add-iPassion-iP2970-support.patch
rename to iopsys-ramips/patches-5.4/0031-uvc-add-iPassion-iP2970-support.patch
index 7ed1a616f617e5f1fb67b3d1173bd73129096423..dbeee8a78b6fbfd8210ceeda72f39f998db505ca 100644
--- a/iopsys-ramips/patches-4.14/0031-uvc-add-iPassion-iP2970-support.patch
+++ b/iopsys-ramips/patches-5.4/0031-uvc-add-iPassion-iP2970-support.patch
@@ -13,10 +13,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/media/usb/uvc/uvc_driver.c
 +++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -2749,6 +2749,18 @@ static const struct usb_device_id uvc_id
+@@ -2911,6 +2911,18 @@ static const struct usb_device_id uvc_id
  	  .bInterfaceSubClass	= 1,
  	  .bInterfaceProtocol	= 0,
- 	  .driver_info		= UVC_QUIRK_FORCE_Y8 },
+ 	  .driver_info		= UVC_INFO_META(V4L2_META_FMT_D4XX) },
 +	/* iPassion iP2970 */
 +	{ .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
 +				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -34,15 +34,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	{ USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) },
 --- a/drivers/media/usb/uvc/uvc_status.c
 +++ b/drivers/media/usb/uvc/uvc_status.c
-@@ -139,6 +139,7 @@ static void uvc_status_complete(struct u
- 		switch (dev->status[0] & 0x0f) {
- 		case UVC_STATUS_TYPE_CONTROL:
- 			uvc_event_control(dev, dev->status, len);
+@@ -223,6 +223,7 @@ static void uvc_status_complete(struct u
+ 			if (uvc_event_control(urb, status, len))
+ 				/* The URB will be resubmitted in work context. */
+ 				return;
 +			dev->motion = 1;
  			break;
+ 		}
  
- 		case UVC_STATUS_TYPE_STREAMING:
-@@ -182,6 +183,7 @@ int uvc_status_init(struct uvc_device *d
+@@ -271,6 +272,7 @@ int uvc_status_init(struct uvc_device *d
  	}
  
  	pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress);
@@ -52,7 +52,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	 * an exponent of two. Some developers forgot about it.
 --- a/drivers/media/usb/uvc/uvc_video.c
 +++ b/drivers/media/usb/uvc/uvc_video.c
-@@ -21,6 +21,11 @@
+@@ -16,6 +16,11 @@
  #include <linux/wait.h>
  #include <linux/atomic.h>
  #include <asm/unaligned.h>
@@ -64,8 +64,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  #include <media/v4l2-common.h>
  
-@@ -1101,9 +1106,149 @@ static void uvc_video_decode_data(struct
- 	}
+@@ -1156,9 +1161,149 @@ static void uvc_video_decode_data(struct
+ 	uvc_urb->async_operations++;
  }
  
 +struct bh_priv {
@@ -196,7 +196,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +
 +#define MOTION_FLAG_OFFSET	4
  static void uvc_video_decode_end(struct uvc_streaming *stream,
- 		struct uvc_buffer *buf, const __u8 *data, int len)
+ 		struct uvc_buffer *buf, const u8 *data, int len)
  {
 +	if ((stream->dev->quirks & UVC_QUIRK_MOTION) &&
 +			(data[len - 2] == 0xff) && (data[len - 1] == 0xd9)) {
@@ -214,7 +214,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	/* Mark the buffer as done if the EOF marker is set. */
  	if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
  		uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n");
-@@ -1518,6 +1663,8 @@ static int uvc_init_video_isoc(struct uv
+@@ -1715,6 +1860,8 @@ static int uvc_init_video_isoc(struct uv
  	if (npackets == 0)
  		return -ENOMEM;
  
@@ -222,13 +222,13 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +		npackets = 1;
  	size = npackets * psize;
  
- 	for (i = 0; i < UVC_URBS; ++i) {
+ 	for_each_uvc_urb(uvc_urb, stream) {
 --- a/drivers/media/usb/uvc/uvcvideo.h
 +++ b/drivers/media/usb/uvc/uvcvideo.h
-@@ -186,7 +186,9 @@
- #define UVC_QUIRK_RESTRICT_FRAME_RATE	0x00000200
+@@ -199,7 +199,9 @@
  #define UVC_QUIRK_RESTORE_CTRLS_ON_INIT	0x00000400
  #define UVC_QUIRK_FORCE_Y8		0x00000800
+ #define UVC_QUIRK_FORCE_BPP		0x00001000
 -
 +#define UVC_QUIRK_MOTION		0x00001000
 +#define UVC_QUIRK_SINGLE_ISO		0x00002000
@@ -236,11 +236,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  /* Format flags */
  #define UVC_FMT_FLAG_COMPRESSED		0x00000001
  #define UVC_FMT_FLAG_STREAM		0x00000002
-@@ -584,6 +586,7 @@ struct uvc_device {
- 	__u8 *status;
+@@ -666,6 +668,7 @@ struct uvc_device {
+ 	u8 *status;
  	struct input_dev *input;
  	char input_phys[64];
 +	int motion;
- };
  
- enum uvc_handle_state {
+ 	struct uvc_ctrl_work {
+ 		struct work_struct work;
diff --git a/iopsys-ramips/patches-5.4/0037-mtd-cfi-cmdset-0002-force-word-write.patch b/iopsys-ramips/patches-5.4/0037-mtd-cfi-cmdset-0002-force-word-write.patch
new file mode 100644
index 0000000000000000000000000000000000000000..7011bbe50b2d4ab441da2420a7c4cc4987aac15b
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0037-mtd-cfi-cmdset-0002-force-word-write.patch
@@ -0,0 +1,20 @@
+From ee9081b2726a5ca8cde5497afdc5425e21ff8f8b Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Mon, 15 Jul 2013 00:39:21 +0200
+Subject: [PATCH 37/53] mtd: cfi cmdset 0002 force word write
+
+---
+ drivers/mtd/chips/cfi_cmdset_0002.c |    9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -40,7 +40,7 @@
+ #include <linux/mtd/xip.h>
+ 
+ #define AMD_BOOTLOC_BUG
+-#define FORCE_WORD_WRITE 0
++#define FORCE_WORD_WRITE 1
+ 
+ #define MAX_RETRIES 3
+ 
diff --git a/iopsys-ramips/patches-4.14/0041-DT-Add-documentation-for-spi-rt2880.patch b/iopsys-ramips/patches-5.4/0041-DT-Add-documentation-for-spi-rt2880.patch
similarity index 100%
rename from iopsys-ramips/patches-4.14/0041-DT-Add-documentation-for-spi-rt2880.patch
rename to iopsys-ramips/patches-5.4/0041-DT-Add-documentation-for-spi-rt2880.patch
diff --git a/iopsys-ramips/patches-4.14/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/iopsys-ramips/patches-5.4/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch
similarity index 99%
rename from iopsys-ramips/patches-4.14/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch
rename to iopsys-ramips/patches-5.4/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index 1dd9f40c39c7d9bd25630f01edfff5a91797f22b..652371617a92393d2d1880c27e60aaf725bfe6fc 100644
--- a/iopsys-ramips/patches-4.14/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++ b/iopsys-ramips/patches-5.4/0042-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -16,9 +16,9 @@ Acked-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -563,6 +563,12 @@ config SPI_QUP
+@@ -605,6 +605,12 @@ config SPI_QCOM_GENI
  	  This driver can also be built as a module.  If so, the module
- 	  will be called spi_qup.
+ 	  will be called spi-geni-qcom.
  
 +config SPI_RT2880
 +	tristate "Ralink RT288x SPI Controller"
@@ -31,7 +31,7 @@ Acked-by: John Crispin <blogic@openwrt.org>
  	depends on ARCH_S3C24XX
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
-@@ -81,6 +81,7 @@ obj-$(CONFIG_SPI_QUP)			+= spi-qup.o
+@@ -87,6 +87,7 @@ obj-$(CONFIG_SPI_QUP)			+= spi-qup.o
  obj-$(CONFIG_SPI_ROCKCHIP)		+= spi-rockchip.o
  obj-$(CONFIG_SPI_RB4XX)			+= spi-rb4xx.o
  obj-$(CONFIG_SPI_RSPI)			+= spi-rspi.o
diff --git a/iopsys-ramips/patches-4.14/0044-i2c-MIPS-adds-ralink-I2C-driver.patch b/iopsys-ramips/patches-5.4/0044-i2c-MIPS-adds-ralink-I2C-driver.patch
similarity index 98%
rename from iopsys-ramips/patches-4.14/0044-i2c-MIPS-adds-ralink-I2C-driver.patch
rename to iopsys-ramips/patches-5.4/0044-i2c-MIPS-adds-ralink-I2C-driver.patch
index 4905aba046c5856dfdb1a7586c62610fbc307135..e3bb7f24881ef8f1ddcd930f24352a33dc676c71 100644
--- a/iopsys-ramips/patches-4.14/0044-i2c-MIPS-adds-ralink-I2C-driver.patch
+++ b/iopsys-ramips/patches-5.4/0044-i2c-MIPS-adds-ralink-I2C-driver.patch
@@ -45,7 +45,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +};
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -864,6 +864,11 @@ config I2C_RK3X
+@@ -922,6 +922,11 @@ config I2C_RK3X
  	  This driver can also be built as a module. If so, the module will
  	  be called i2c-rk3x.
  
@@ -59,14 +59,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	help
 --- a/drivers/i2c/busses/Makefile
 +++ b/drivers/i2c/busses/Makefile
-@@ -84,6 +84,7 @@ obj-$(CONFIG_I2C_PNX)		+= i2c-pnx.o
+@@ -91,6 +91,7 @@ obj-$(CONFIG_I2C_PNX)		+= i2c-pnx.o
  obj-$(CONFIG_I2C_PUV3)		+= i2c-puv3.o
  obj-$(CONFIG_I2C_PXA)		+= i2c-pxa.o
  obj-$(CONFIG_I2C_PXA_PCI)	+= i2c-pxa-pci.o
 +obj-$(CONFIG_I2C_RALINK)	+= i2c-ralink.o
+ obj-$(CONFIG_I2C_QCOM_GENI)	+= i2c-qcom-geni.o
  obj-$(CONFIG_I2C_QUP)		+= i2c-qup.o
  obj-$(CONFIG_I2C_RIIC)		+= i2c-riic.o
- obj-$(CONFIG_I2C_RK3X)		+= i2c-rk3x.o
 --- /dev/null
 +++ b/drivers/i2c/busses/i2c-ralink.c
 @@ -0,0 +1,435 @@
diff --git a/iopsys-ramips/patches-4.14/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/iopsys-ramips/patches-5.4/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch
similarity index 94%
rename from iopsys-ramips/patches-4.14/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch
rename to iopsys-ramips/patches-5.4/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch
index 0535811ea3127d10fc5f91507a4652b39509c45b..f3912a1054eec50a0f81e921a1e41922d04d7c21 100644
--- a/iopsys-ramips/patches-4.14/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch
+++ b/iopsys-ramips/patches-5.4/0046-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch
@@ -25,9 +25,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/mmc/host/Kconfig
 +++ b/drivers/mmc/host/Kconfig
-@@ -901,3 +901,5 @@ config MMC_SDHCI_XENON
- 	  This selects Marvell Xenon eMMC/SD/SDIO SDHCI.
+@@ -1019,3 +1019,5 @@ config MMC_SDHCI_AM654
  	  If you have a controller with this interface, say Y or M here.
+ 
  	  If unsure, say N.
 +
 +source "drivers/mmc/host/mtk-mmc/Kconfig"
diff --git a/iopsys-ramips/patches-4.14/0048-asoc-add-mt7620-support.patch b/iopsys-ramips/patches-5.4/0048-asoc-add-mt7620-support.patch
similarity index 99%
rename from iopsys-ramips/patches-4.14/0048-asoc-add-mt7620-support.patch
rename to iopsys-ramips/patches-5.4/0048-asoc-add-mt7620-support.patch
index 1834e88538f47c1f5916a5853e8e29130c1b918b..d0d4141a8d036b6cd919622a9d9936d795a5b490 100644
--- a/iopsys-ramips/patches-4.14/0048-asoc-add-mt7620-support.patch
+++ b/iopsys-ramips/patches-5.4/0048-asoc-add-mt7620-support.patch
@@ -20,15 +20,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/arch/mips/ralink/of.c
 +++ b/arch/mips/ralink/of.c
-@@ -15,6 +15,7 @@
+@@ -13,6 +13,7 @@
  #include <linux/of_fdt.h>
  #include <linux/kernel.h>
- #include <linux/bootmem.h>
+ #include <linux/memblock.h>
 +#include <linux/module.h>
  #include <linux/of_platform.h>
  #include <linux/of_address.h>
  
-@@ -26,6 +27,7 @@
+@@ -24,6 +25,7 @@
  #include "common.h"
  
  __iomem void *rt_sysc_membase;
@@ -38,7 +38,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  __iomem void *plat_of_remap_node(const char *node)
 --- a/sound/soc/Kconfig
 +++ b/sound/soc/Kconfig
-@@ -59,6 +59,7 @@ source "sound/soc/mxs/Kconfig"
+@@ -60,6 +60,7 @@ source "sound/soc/mxs/Kconfig"
  source "sound/soc/pxa/Kconfig"
  source "sound/soc/qcom/Kconfig"
  source "sound/soc/rockchip/Kconfig"
@@ -48,7 +48,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  source "sound/soc/sirf/Kconfig"
 --- a/sound/soc/Makefile
 +++ b/sound/soc/Makefile
-@@ -40,6 +40,7 @@ obj-$(CONFIG_SND_SOC)	+= kirkwood/
+@@ -43,6 +43,7 @@ obj-$(CONFIG_SND_SOC)	+= kirkwood/
  obj-$(CONFIG_SND_SOC)	+= pxa/
  obj-$(CONFIG_SND_SOC)	+= qcom/
  obj-$(CONFIG_SND_SOC)	+= rockchip/
diff --git a/iopsys-ramips/patches-4.14/0051-serial-add-ugly-custom-baud-rate-hack.patch b/iopsys-ramips/patches-5.4/0051-serial-add-ugly-custom-baud-rate-hack.patch
similarity index 90%
rename from iopsys-ramips/patches-4.14/0051-serial-add-ugly-custom-baud-rate-hack.patch
rename to iopsys-ramips/patches-5.4/0051-serial-add-ugly-custom-baud-rate-hack.patch
index 2ad1f6f9f8c5c022226b12afd4e752a0fad8908e..48222266108f227a1ad8593ea97a9ca876fdfe9b 100644
--- a/iopsys-ramips/patches-4.14/0051-serial-add-ugly-custom-baud-rate-hack.patch
+++ b/iopsys-ramips/patches-5.4/0051-serial-add-ugly-custom-baud-rate-hack.patch
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/tty/serial/serial_core.c
 +++ b/drivers/tty/serial/serial_core.c
-@@ -428,6 +428,9 @@ uart_get_baud_rate(struct uart_port *por
+@@ -416,6 +416,9 @@ uart_get_baud_rate(struct uart_port *por
  		break;
  	}
  
diff --git a/iopsys-ramips/patches-4.14/0052-pwm-add-mediatek-support.patch b/iopsys-ramips/patches-5.4/0052-pwm-add-mediatek-support.patch
similarity index 98%
rename from iopsys-ramips/patches-4.14/0052-pwm-add-mediatek-support.patch
rename to iopsys-ramips/patches-5.4/0052-pwm-add-mediatek-support.patch
index 6eb7f16b9db48c6575028b00d00173efb58f4d26..d2c5724c060161ef617bea611aa53394aac3edbf 100644
--- a/iopsys-ramips/patches-4.14/0052-pwm-add-mediatek-support.patch
+++ b/iopsys-ramips/patches-5.4/0052-pwm-add-mediatek-support.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/pwm/Kconfig
 +++ b/drivers/pwm/Kconfig
-@@ -302,6 +302,15 @@ config PWM_MEDIATEK
+@@ -316,6 +316,15 @@ config PWM_MEDIATEK
  	  To compile this driver as a module, choose M here: the module
  	  will be called pwm-mediatek.
  
@@ -31,7 +31,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	depends on ARCH_MXS && OF
 --- a/drivers/pwm/Makefile
 +++ b/drivers/pwm/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_PWM_LPSS_PCI)	+= pwm-lpss-p
+@@ -29,6 +29,7 @@ obj-$(CONFIG_PWM_LPSS_PCI)	+= pwm-lpss-p
  obj-$(CONFIG_PWM_LPSS_PLATFORM)	+= pwm-lpss-platform.o
  obj-$(CONFIG_PWM_MESON)		+= pwm-meson.o
  obj-$(CONFIG_PWM_MEDIATEK)	+= pwm-mediatek.o
diff --git a/iopsys-ramips/patches-4.14/0069-awake-rt305x-dwc2-controller.patch b/iopsys-ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
similarity index 54%
rename from iopsys-ramips/patches-4.14/0069-awake-rt305x-dwc2-controller.patch
rename to iopsys-ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
index e75d19dfce8c0c4aa8f6035177d398a620efa865..7110a5b8080aba57e74206e874d26cb5544ec1a9 100644
--- a/iopsys-ramips/patches-4.14/0069-awake-rt305x-dwc2-controller.patch
+++ b/iopsys-ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
@@ -1,15 +1,15 @@
 --- a/drivers/usb/dwc2/platform.c
 +++ b/drivers/usb/dwc2/platform.c
-@@ -407,6 +407,12 @@ static int dwc2_driver_probe(struct plat
+@@ -431,6 +431,12 @@ static int dwc2_driver_probe(struct plat
  	if (retval)
  		return retval;
  
 +	/* Enable USB port before any regs access */
-+	if (dwc2_readl(hsotg->regs + PCGCTL) & 0x0f) {
-+		dwc2_writel(0x00, hsotg->regs + PCGCTL);
++	if (readl(hsotg->regs + PCGCTL) & 0x0f) {
++		writel(0x00, hsotg->regs + PCGCTL);
 +		/* TODO: mdelay(25) here? vendor driver don't use it */
 +	}
 +
+ 	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
+ 
  	retval = dwc2_get_dr_mode(hsotg);
- 	if (retval)
- 		goto error;
diff --git a/iopsys-ramips/patches-4.14/0070-weak_reordering.patch b/iopsys-ramips/patches-5.4/0070-weak_reordering.patch
similarity index 74%
rename from iopsys-ramips/patches-4.14/0070-weak_reordering.patch
rename to iopsys-ramips/patches-5.4/0070-weak_reordering.patch
index 52e6641324ffcf5cf3527d58e24e7bdeaacf5e72..fe3fdec289e39a52b315f7b0188fa87342aa5d1d 100644
--- a/iopsys-ramips/patches-4.14/0070-weak_reordering.patch
+++ b/iopsys-ramips/patches-5.4/0070-weak_reordering.patch
@@ -1,9 +1,9 @@
 --- a/arch/mips/ralink/Kconfig
 +++ b/arch/mips/ralink/Kconfig
-@@ -58,6 +58,7 @@ choice
+@@ -57,6 +57,7 @@ choice
  		select COMMON_CLK
  		select CLKSRC_MIPS_GIC
- 		select HW_HAS_PCI
+ 		select HAVE_PCI if PCI_MT7621
 +		select WEAK_REORDERING_BEYOND_LLSC
  endchoice
  
diff --git a/iopsys-ramips/patches-4.14/0098-disable_cm.patch b/iopsys-ramips/patches-5.4/0098-disable_cm.patch
similarity index 85%
rename from iopsys-ramips/patches-4.14/0098-disable_cm.patch
rename to iopsys-ramips/patches-5.4/0098-disable_cm.patch
index bc00619dff008aaeb46ff8456f1d4bd7e2e67af0..9b280aef99542b456f7a1c0c8e453272fa78fda5 100644
--- a/iopsys-ramips/patches-4.14/0098-disable_cm.patch
+++ b/iopsys-ramips/patches-5.4/0098-disable_cm.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/kernel/mips-cm.c
 +++ b/arch/mips/kernel/mips-cm.c
-@@ -237,6 +237,7 @@ int mips_cm_probe(void)
+@@ -233,6 +233,7 @@ int mips_cm_probe(void)
  
  	/* disable CM regions */
  	write_gcr_reg0_base(CM_GCR_REGn_BASE_BASEADDR);
@@ -8,7 +8,7 @@
  	write_gcr_reg0_mask(CM_GCR_REGn_MASK_ADDRMASK);
  	write_gcr_reg1_base(CM_GCR_REGn_BASE_BASEADDR);
  	write_gcr_reg1_mask(CM_GCR_REGn_MASK_ADDRMASK);
-@@ -244,7 +245,7 @@ int mips_cm_probe(void)
+@@ -240,7 +241,7 @@ int mips_cm_probe(void)
  	write_gcr_reg2_mask(CM_GCR_REGn_MASK_ADDRMASK);
  	write_gcr_reg3_base(CM_GCR_REGn_BASE_BASEADDR);
  	write_gcr_reg3_mask(CM_GCR_REGn_MASK_ADDRMASK);
diff --git a/iopsys-ramips/patches-5.4/0100-staging-mt7621-pci-simplify-mt7621_pcie_init_virtual.patch b/iopsys-ramips/patches-5.4/0100-staging-mt7621-pci-simplify-mt7621_pcie_init_virtual.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b9bcd63488d369b98ad0a292a5ea7cb86a5bd48e
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0100-staging-mt7621-pci-simplify-mt7621_pcie_init_virtual.patch
@@ -0,0 +1,133 @@
+From b327cd58c3fec1c6382128e929eab9bc0d68e912 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sun, 8 Mar 2020 10:19:27 +0100
+Subject: [PATCH] staging: mt7621-pci: simplify
+ 'mt7621_pcie_init_virtual_bridges' function
+
+Function 'mt7621_pcie_init_virtual_bridges' is a bit mess and can be
+refactorized properly in a cleaner way. Introduce new 'pcie_rmw' inline
+function helper to do clear and set the correct bits this function needs
+to work.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200308091928.17177-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 85 +++++++++++++--------------------
+ 1 file changed, 33 insertions(+), 52 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -57,13 +57,13 @@
+ #define RALINK_PCI_IOBASE		0x002C
+ 
+ /* PCICFG virtual bridges */
+-#define MT7621_BR0_MASK			GENMASK(19, 16)
+-#define MT7621_BR1_MASK			GENMASK(23, 20)
+-#define MT7621_BR2_MASK			GENMASK(27, 24)
+-#define MT7621_BR_ALL_MASK		GENMASK(27, 16)
+-#define MT7621_BR0_SHIFT		16
+-#define MT7621_BR1_SHIFT		20
+-#define MT7621_BR2_SHIFT		24
++#define PCIE_P2P_MAX			3
++#define PCIE_P2P_BR_DEVNUM_SHIFT(p)	(16 + (p) * 4)
++#define PCIE_P2P_BR_DEVNUM0_SHIFT	PCIE_P2P_BR_DEVNUM_SHIFT(0)
++#define PCIE_P2P_BR_DEVNUM1_SHIFT	PCIE_P2P_BR_DEVNUM_SHIFT(1)
++#define PCIE_P2P_BR_DEVNUM2_SHIFT	PCIE_P2P_BR_DEVNUM_SHIFT(2)
++#define PCIE_P2P_BR_DEVNUM_MASK		0xf
++#define PCIE_P2P_BR_DEVNUM_MASK_FULL	(0xfff << PCIE_P2P_BR_DEVNUM0_SHIFT)
+ 
+ /* PCIe RC control registers */
+ #define MT7621_PCIE_OFFSET		0x2000
+@@ -154,6 +154,15 @@ static inline void pcie_write(struct mt7
+ 	writel(val, pcie->base + reg);
+ }
+ 
++static inline void pcie_rmw(struct mt7621_pcie *pcie, u32 reg, u32 clr, u32 set)
++{
++	u32 val = readl(pcie->base + reg);
++
++	val &= ~clr;
++	val |= set;
++	writel(val, pcie->base + reg);
++}
++
+ static inline u32 pcie_port_read(struct mt7621_pcie_port *port, u32 reg)
+ {
+ 	return readl(port->base + reg);
+@@ -554,7 +563,9 @@ static void mt7621_pcie_enable_ports(str
+ static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie)
+ {
+ 	u32 pcie_link_status = 0;
+-	u32 val = 0;
++	u32 n;
++	int i;
++	u32 p2p_br_devnum[PCIE_P2P_MAX];
+ 	struct mt7621_pcie_port *port;
+ 
+ 	list_for_each_entry(port, &pcie->ports, list) {
+@@ -567,50 +578,20 @@ static int mt7621_pcie_init_virtual_brid
+ 	if (pcie_link_status == 0)
+ 		return -1;
+ 
+-	/*
+-	 * pcie(2/1/0) link status	pcie2_num	pcie1_num	pcie0_num
+-	 * 3'b000			x		x		x
+-	 * 3'b001			x		x		0
+-	 * 3'b010			x		0		x
+-	 * 3'b011			x		1		0
+-	 * 3'b100			0		x		x
+-	 * 3'b101			1		x		0
+-	 * 3'b110			1		0		x
+-	 * 3'b111			2		1		0
+-	 */
+-	switch (pcie_link_status) {
+-	case 2:
+-		val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR);
+-		val &= ~(MT7621_BR0_MASK | MT7621_BR1_MASK);
+-		val |= 0x1 << MT7621_BR0_SHIFT;
+-		val |= 0x0 << MT7621_BR1_SHIFT;
+-		pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR);
+-		break;
+-	case 4:
+-		val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR);
+-		val &= ~MT7621_BR_ALL_MASK;
+-		val |= 0x1 << MT7621_BR0_SHIFT;
+-		val |= 0x2 << MT7621_BR1_SHIFT;
+-		val |= 0x0 << MT7621_BR2_SHIFT;
+-		pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR);
+-		break;
+-	case 5:
+-		val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR);
+-		val &= ~MT7621_BR_ALL_MASK;
+-		val |= 0x0 << MT7621_BR0_SHIFT;
+-		val |= 0x2 << MT7621_BR1_SHIFT;
+-		val |= 0x1 << MT7621_BR2_SHIFT;
+-		pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR);
+-		break;
+-	case 6:
+-		val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR);
+-		val &= ~MT7621_BR_ALL_MASK;
+-		val |= 0x2 << MT7621_BR0_SHIFT;
+-		val |= 0x0 << MT7621_BR1_SHIFT;
+-		val |= 0x1 << MT7621_BR2_SHIFT;
+-		pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR);
+-		break;
+-	}
++	n = 0;
++	for (i = 0; i < PCIE_P2P_MAX; i++)
++		if (pcie_link_status & BIT(i))
++			p2p_br_devnum[i] = n++;
++
++	for (i = 0; i < PCIE_P2P_MAX; i++)
++		if ((pcie_link_status & BIT(i)) == 0)
++			p2p_br_devnum[i] = n++;
++
++	pcie_rmw(pcie, RALINK_PCI_CONFIG_ADDR,
++		 PCIE_P2P_BR_DEVNUM_MASK_FULL,
++		 (p2p_br_devnum[0] << PCIE_P2P_BR_DEVNUM0_SHIFT) |
++		 (p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) |
++		 (p2p_br_devnum[2] << PCIE_P2P_BR_DEVNUM2_SHIFT));
+ 
+ 	return 0;
+ }
diff --git a/iopsys-ramips/patches-5.4/0101-staging-mt7621-pci-enable-clock-bit-for-each-port.patch b/iopsys-ramips/patches-5.4/0101-staging-mt7621-pci-enable-clock-bit-for-each-port.patch
new file mode 100644
index 0000000000000000000000000000000000000000..3939280a16a2604f583a67d170ac842ee3df370e
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0101-staging-mt7621-pci-enable-clock-bit-for-each-port.patch
@@ -0,0 +1,74 @@
+From 550fabd71d7fcdfe099bbf41e00e28719737161e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Tue, 10 Mar 2020 12:34:59 +0100
+Subject: [PATCH] staging: mt7621-pci: enable clock bit for each port
+
+The clock related code concerns me from the very beginning because
+there are some set ups got from legacy driver that are not documented
+anywhere. According to the programming guide 0x7c is 'CPE_ROSC_SEL1'
+register and 0x80 is 'CPU_CPE_CN'. I do think this set up is not needed
+at all and the proper thing to do is just enable the clock bit for each
+pcie port. Hence remove useless code and do the right thing which is
+setting up the clock bit for each port enabled.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200310113459.30539-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 17 ++++++-----------
+ 1 file changed, 6 insertions(+), 11 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -45,8 +45,6 @@
+ 
+ /* rt_sysc_membase relative registers */
+ #define RALINK_CLKCFG1			0x30
+-#define RALINK_PCIE_CLK_GEN		0x7c
+-#define RALINK_PCIE_CLK_GEN1		0x80
+ 
+ /* Host-PCI bridge registers */
+ #define RALINK_PCI_PCICFG_ADDR		0x0000
+@@ -85,10 +83,6 @@
+ #define PCIE_PORT_CLK_EN(x)		BIT(24 + (x))
+ #define PCIE_PORT_LINKUP		BIT(0)
+ 
+-#define PCIE_CLK_GEN_EN			BIT(31)
+-#define PCIE_CLK_GEN_DIS		0
+-#define PCIE_CLK_GEN1_DIS		GENMASK(30, 24)
+-#define PCIE_CLK_GEN1_EN		(BIT(27) | BIT(25))
+ #define MEMORY_BASE			0x0
+ #define PERST_MODE_MASK			GENMASK(11, 10)
+ #define PERST_MODE_GPIO			BIT(10)
+@@ -233,6 +227,11 @@ static inline bool mt7621_pcie_port_is_l
+ 	return (pcie_port_read(port, RALINK_PCI_STATUS) & PCIE_PORT_LINKUP) != 0;
+ }
+ 
++static inline void mt7621_pcie_port_clk_enable(struct mt7621_pcie_port *port)
++{
++	rt_sysc_m32(0, PCIE_PORT_CLK_EN(port->slot), RALINK_CLKCFG1);
++}
++
+ static inline void mt7621_pcie_port_clk_disable(struct mt7621_pcie_port *port)
+ {
+ 	rt_sysc_m32(PCIE_PORT_CLK_EN(port->slot), 0, RALINK_CLKCFG1);
+@@ -501,11 +500,6 @@ static void mt7621_pcie_init_ports(struc
+ 		}
+ 	}
+ 
+-	rt_sysc_m32(0x30, 2 << 4, SYSC_REG_SYSTEM_CONFIG1);
+-	rt_sysc_m32(PCIE_CLK_GEN_EN, PCIE_CLK_GEN_DIS, RALINK_PCIE_CLK_GEN);
+-	rt_sysc_m32(PCIE_CLK_GEN1_DIS, PCIE_CLK_GEN1_EN, RALINK_PCIE_CLK_GEN1);
+-	rt_sysc_m32(PCIE_CLK_GEN_DIS, PCIE_CLK_GEN_EN, RALINK_PCIE_CLK_GEN);
+-	msleep(50);
+ 	reset_control_deassert(pcie->rst);
+ }
+ 
+@@ -542,6 +536,7 @@ static void mt7621_pcie_enable_ports(str
+ 
+ 	list_for_each_entry(port, &pcie->ports, list) {
+ 		if (port->enabled) {
++			mt7621_pcie_port_clk_enable(port);
+ 			mt7621_pcie_enable_port(port);
+ 			dev_info(dev, "PCIE%d enabled\n", num_slots_enabled);
+ 			num_slots_enabled++;
diff --git a/iopsys-ramips/patches-5.4/0102-staging-mt7621-pci-use-gpios-for-properly-reset.patch b/iopsys-ramips/patches-5.4/0102-staging-mt7621-pci-use-gpios-for-properly-reset.patch
new file mode 100644
index 0000000000000000000000000000000000000000..1b7828f1e6e1ebc1e72bfc81f4642a45808e124f
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0102-staging-mt7621-pci-use-gpios-for-properly-reset.patch
@@ -0,0 +1,222 @@
+From 227a8bf421ff8b085444e51e471ef06a87228cfd Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 13 Mar 2020 21:09:08 +0100
+Subject: [PATCH] staging: mt7621-pci: use gpios for properly reset
+
+Original driver code was using three gpio's for reset
+asserts and deasserts the pcis. Instead of using that
+a general reset control with a perst gpio was introduced
+and it seems it is partially working but sometimes there
+are some unexpected hangs on boot. This commit make use of
+the three original gpios using 'reset-gpios' property of
+the device tree and removes the reset line and perst gpio.
+According to the mediatek aplication note v0.1 there are
+three gpios used for pcie ports reset control: gpio#19,
+gpio#8 and gpio#7 for slots 0, 1 and 2 respectively.
+This schema can be used separately for mt7621A but in some
+boards due to pin share issue, if the PCM and I2S function
+are enable at the same time, there are no enough GPIO to
+control per-port PCIe reset. In those cases gpio#19 is enought
+for reset the three ports together. Because of this we just
+try to get the three gpios but if some of them fail we are not
+failing in boot process, just prints a kernel notice and take
+after into account if the descriptor is or not valid in order
+to use it. All of them are set as GPIO output low configuration.
+The gpio descriptor's API takes device tree property into account
+and invert value if the pin is configured as active low.
+So we also have to properly request pins from device tree
+and set values correct in assert and deassert functions.
+After this changes the order to make all assert and
+deassert in the 'probe' process makes more sense:
+* Parse device tree.
+* make assert of the RC's and EP's before doing anything else.
+* make deassert of the RC's before initializing the phy.
+* Init the phy.
+* make deassert of the EP's before initialize pci ports.
+* Normal PCI initialization.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200313200913.24321-2-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 84 ++++++++++++++++++++-------------
+ 1 file changed, 51 insertions(+), 33 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -95,6 +95,7 @@
+  * @pcie: pointer to PCIe host info
+  * @phy: pointer to PHY control block
+  * @pcie_rst: pointer to port reset control
++ * @gpio_rst: gpio reset
+  * @slot: port slot
+  * @enabled: indicates if port is enabled
+  */
+@@ -104,6 +105,7 @@ struct mt7621_pcie_port {
+ 	struct mt7621_pcie *pcie;
+ 	struct phy *phy;
+ 	struct reset_control *pcie_rst;
++	struct gpio_desc *gpio_rst;
+ 	u32 slot;
+ 	bool enabled;
+ };
+@@ -117,8 +119,6 @@ struct mt7621_pcie_port {
+  * @offset: IO / Memory offset
+  * @dev: Pointer to PCIe device
+  * @ports: pointer to PCIe port information
+- * @perst: gpio reset
+- * @rst: pointer to pcie reset
+  * @resets_inverted: depends on chip revision
+  * reset lines are inverted.
+  */
+@@ -133,8 +133,6 @@ struct mt7621_pcie {
+ 		resource_size_t io;
+ 	} offset;
+ 	struct list_head ports;
+-	struct gpio_desc *perst;
+-	struct reset_control *rst;
+ 	bool resets_inverted;
+ };
+ 
+@@ -210,16 +208,16 @@ static void write_config(struct mt7621_p
+ 	pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
+ }
+ 
+-static inline void mt7621_perst_gpio_pcie_assert(struct mt7621_pcie *pcie)
++static inline void mt7621_rst_gpio_pcie_assert(struct mt7621_pcie_port *port)
+ {
+-	gpiod_set_value(pcie->perst, 0);
+-	mdelay(PERST_DELAY_US);
++	if (port->gpio_rst)
++		gpiod_set_value(port->gpio_rst, 1);
+ }
+ 
+-static inline void mt7621_perst_gpio_pcie_deassert(struct mt7621_pcie *pcie)
++static inline void mt7621_rst_gpio_pcie_deassert(struct mt7621_pcie_port *port)
+ {
+-	gpiod_set_value(pcie->perst, 1);
+-	mdelay(PERST_DELAY_US);
++	if (port->gpio_rst)
++		gpiod_set_value(port->gpio_rst, 0);
+ }
+ 
+ static inline bool mt7621_pcie_port_is_linkup(struct mt7621_pcie_port *port)
+@@ -367,6 +365,13 @@ static int mt7621_pcie_parse_port(struct
+ 	if (IS_ERR(port->phy))
+ 		return PTR_ERR(port->phy);
+ 
++	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
++						       GPIOD_OUT_LOW);
++	if (IS_ERR(port->gpio_rst)) {
++		dev_err(dev, "Failed to get GPIO for PCIe%d\n", slot);
++		return PTR_ERR(port->gpio_rst);
++	}
++
+ 	port->slot = slot;
+ 	port->pcie = pcie;
+ 
+@@ -383,12 +388,6 @@ static int mt7621_pcie_parse_dt(struct m
+ 	struct resource regs;
+ 	int err;
+ 
+-	pcie->perst = devm_gpiod_get(dev, "perst", GPIOD_OUT_HIGH);
+-	if (IS_ERR(pcie->perst)) {
+-		dev_err(dev, "failed to get gpio perst\n");
+-		return PTR_ERR(pcie->perst);
+-	}
+-
+ 	err = of_address_to_resource(node, 0, &regs);
+ 	if (err) {
+ 		dev_err(dev, "missing \"reg\" property\n");
+@@ -399,12 +398,6 @@ static int mt7621_pcie_parse_dt(struct m
+ 	if (IS_ERR(pcie->base))
+ 		return PTR_ERR(pcie->base);
+ 
+-	pcie->rst = devm_reset_control_get_exclusive(dev, "pcie");
+-	if (PTR_ERR(pcie->rst) == -EPROBE_DEFER) {
+-		dev_err(dev, "failed to get pcie reset control\n");
+-		return PTR_ERR(pcie->rst);
+-	}
+-
+ 	for_each_available_child_of_node(node, child) {
+ 		int slot;
+ 
+@@ -458,16 +451,49 @@ static int mt7621_pcie_init_port(struct
+ 	return 0;
+ }
+ 
++static void mt7621_pcie_reset_assert(struct mt7621_pcie *pcie)
++{
++	struct mt7621_pcie_port *port;
++
++	list_for_each_entry(port, &pcie->ports, list) {
++		/* PCIe RC reset assert */
++		mt7621_control_assert(port);
++
++		/* PCIe EP reset assert */
++		mt7621_rst_gpio_pcie_assert(port);
++	}
++
++	mdelay(PERST_DELAY_US);
++}
++
++static void mt7621_pcie_reset_rc_deassert(struct mt7621_pcie *pcie)
++{
++	struct mt7621_pcie_port *port;
++
++	list_for_each_entry(port, &pcie->ports, list)
++		mt7621_control_deassert(port);
++}
++
++static void mt7621_pcie_reset_ep_deassert(struct mt7621_pcie *pcie)
++{
++	struct mt7621_pcie_port *port;
++
++	list_for_each_entry(port, &pcie->ports, list)
++		mt7621_rst_gpio_pcie_deassert(port);
++
++	mdelay(PERST_DELAY_US);
++}
++
+ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+ 	struct mt7621_pcie_port *port, *tmp;
+-	u32 val = 0;
+ 	int err;
+ 
+ 	rt_sysc_m32(PERST_MODE_MASK, PERST_MODE_GPIO, MT7621_GPIO_MODE);
+ 
+-	mt7621_perst_gpio_pcie_assert(pcie);
++	mt7621_pcie_reset_assert(pcie);
++	mt7621_pcie_reset_rc_deassert(pcie);
+ 
+ 	list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
+ 		u32 slot = port->slot;
+@@ -476,16 +502,10 @@ static void mt7621_pcie_init_ports(struc
+ 		if (err) {
+ 			dev_err(dev, "Initiating port %d failed\n", slot);
+ 			list_del(&port->list);
+-		} else {
+-			val = read_config(pcie, slot, PCIE_FTS_NUM);
+-			dev_info(dev, "Port %d N_FTS = %x\n", slot,
+-				 (unsigned int)val);
+ 		}
+ 	}
+ 
+-	reset_control_assert(pcie->rst);
+-
+-	mt7621_perst_gpio_pcie_deassert(pcie);
++	mt7621_pcie_reset_ep_deassert(pcie);
+ 
+ 	list_for_each_entry(port, &pcie->ports, list) {
+ 		u32 slot = port->slot;
+@@ -499,8 +519,6 @@ static void mt7621_pcie_init_ports(struc
+ 			port->enabled = false;
+ 		}
+ 	}
+-
+-	reset_control_deassert(pcie->rst);
+ }
+ 
+ static void mt7621_pcie_enable_port(struct mt7621_pcie_port *port)
diff --git a/iopsys-ramips/patches-5.4/0103-staging-mt7621-pci-change-value-for-PERST_DELAY_MS.patch b/iopsys-ramips/patches-5.4/0103-staging-mt7621-pci-change-value-for-PERST_DELAY_MS.patch
new file mode 100644
index 0000000000000000000000000000000000000000..3d86355b29b02839ac9ff4d3656eae3818bedb9c
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0103-staging-mt7621-pci-change-value-for-PERST_DELAY_MS.patch
@@ -0,0 +1,45 @@
+From e462e7d3211479df42357a620fa788a2257556b7 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 13 Mar 2020 21:09:09 +0100
+Subject: [PATCH] staging: mt7621-pci: change value for 'PERST_DELAY_MS'
+
+Value of 'PERST_DELAY_MS' is too high and it is ok just
+to set up to 100 ms. Update also define name from
+'PERST_DELAY_US' into 'PERST_DELAY_MS'
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200313200913.24321-3-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -86,7 +86,7 @@
+ #define MEMORY_BASE			0x0
+ #define PERST_MODE_MASK			GENMASK(11, 10)
+ #define PERST_MODE_GPIO			BIT(10)
+-#define PERST_DELAY_US			1000
++#define PERST_DELAY_MS			100
+ 
+ /**
+  * struct mt7621_pcie_port - PCIe port information
+@@ -463,7 +463,7 @@ static void mt7621_pcie_reset_assert(str
+ 		mt7621_rst_gpio_pcie_assert(port);
+ 	}
+ 
+-	mdelay(PERST_DELAY_US);
++	mdelay(PERST_DELAY_MS);
+ }
+ 
+ static void mt7621_pcie_reset_rc_deassert(struct mt7621_pcie *pcie)
+@@ -481,7 +481,7 @@ static void mt7621_pcie_reset_ep_deasser
+ 	list_for_each_entry(port, &pcie->ports, list)
+ 		mt7621_rst_gpio_pcie_deassert(port);
+ 
+-	mdelay(PERST_DELAY_US);
++	mdelay(PERST_DELAY_MS);
+ }
+ 
+ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
diff --git a/iopsys-ramips/patches-5.4/0104-staging-mt7621-pci-release-gpios-after-pci-initializ.patch b/iopsys-ramips/patches-5.4/0104-staging-mt7621-pci-release-gpios-after-pci-initializ.patch
new file mode 100644
index 0000000000000000000000000000000000000000..f24bf833c9ffd40038d555090f94bbea160846db
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0104-staging-mt7621-pci-release-gpios-after-pci-initializ.patch
@@ -0,0 +1,76 @@
+From 4d6a758f2cd2122a7d895f913854c13da62ba6df Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 13 Mar 2020 21:09:12 +0100
+Subject: [PATCH] staging: mt7621-pci: release gpios after pci initialization
+
+R3G's LEDs fail to initialize because one of them uses GPIO8
+Hence, release the GPIO resources after PCIe initialization
+and properly release also in driver error path.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200313200913.24321-6-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 23 ++++++++++++++++++-----
+ 1 file changed, 18 insertions(+), 5 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -484,6 +484,15 @@ static void mt7621_pcie_reset_ep_deasser
+ 	mdelay(PERST_DELAY_MS);
+ }
+ 
++static void mt7621_pcie_release_gpios(struct mt7621_pcie *pcie)
++{
++	struct mt7621_pcie_port *port;
++
++	list_for_each_entry(port, &pcie->ports, list)
++		if (port->gpio_rst)
++			gpiod_put(port->gpio_rst);
++}
++
+ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+@@ -683,7 +692,8 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pcie_init_virtual_bridges(pcie);
+ 	if (err) {
+ 		dev_err(dev, "Nothing is connected in virtual bridges. Exiting...");
+-		return 0;
++		err = 0;
++		goto out_release_gpios;
+ 	}
+ 
+ 	mt7621_pcie_enable_ports(pcie);
+@@ -691,7 +701,7 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pci_parse_request_of_pci_ranges(pcie);
+ 	if (err) {
+ 		dev_err(dev, "Error requesting pci resources from ranges");
+-		return err;
++		goto out_release_gpios;
+ 	}
+ 
+ 	setup_cm_memory_region(pcie);
+@@ -699,16 +709,19 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pcie_request_resources(pcie, &res);
+ 	if (err) {
+ 		dev_err(dev, "Error requesting resources\n");
+-		return err;
++		goto out_release_gpios;
+ 	}
+ 
+ 	err = mt7621_pcie_register_host(bridge, &res);
+ 	if (err) {
+ 		dev_err(dev, "Error registering host\n");
+-		return err;
++		goto out_release_gpios;
+ 	}
+ 
+-	return 0;
++out_release_gpios:
++	mt7621_pcie_release_gpios(pcie);
++
++	return err;
+ }
+ 
+ static const struct of_device_id mt7621_pci_ids[] = {
diff --git a/iopsys-ramips/patches-5.4/0105-staging-mt7621-pci-delete-no-more-needed-mt7621_rese.patch b/iopsys-ramips/patches-5.4/0105-staging-mt7621-pci-delete-no-more-needed-mt7621_rese.patch
new file mode 100644
index 0000000000000000000000000000000000000000..fc509e945b8eca4298564838b708c2db059c5ee4
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0105-staging-mt7621-pci-delete-no-more-needed-mt7621_rese.patch
@@ -0,0 +1,46 @@
+From 4be54c3a495f08c05a8e485566e5b88cd3537f16 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 13 Mar 2020 21:09:13 +0100
+Subject: [PATCH] staging: mt7621-pci: delete no more needed
+ 'mt7621_reset_port'
+
+After review all the resets at the beggining the function
+'mt7621_reset_port' is not needed anymore. Hence delete it
+and its uses.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200313200913.24321-7-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 13 -------------
+ 1 file changed, 13 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -255,13 +255,6 @@ static inline void mt7621_control_deasse
+ 		reset_control_assert(port->pcie_rst);
+ }
+ 
+-static void mt7621_reset_port(struct mt7621_pcie_port *port)
+-{
+-	mt7621_control_assert(port);
+-	msleep(100);
+-	mt7621_control_deassert(port);
+-}
+-
+ static void setup_cm_memory_region(struct mt7621_pcie *pcie)
+ {
+ 	struct resource *mem_resource = &pcie->mem;
+@@ -427,12 +420,6 @@ static int mt7621_pcie_init_port(struct
+ 	u32 slot = port->slot;
+ 	int err;
+ 
+-	/*
+-	 * Any MT7621 Ralink pcie controller that doesn't have 0x0101 at
+-	 * the end of the chip_id has inverted PCI resets.
+-	 */
+-	mt7621_reset_port(port);
+-
+ 	err = phy_init(port->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize port%d phy\n", slot);
diff --git a/iopsys-ramips/patches-5.4/0106-staging-mt7621-pci-phy-add-mt7621_phy_rmw-to-simplif.patch b/iopsys-ramips/patches-5.4/0106-staging-mt7621-pci-phy-add-mt7621_phy_rmw-to-simplif.patch
new file mode 100644
index 0000000000000000000000000000000000000000..234af32308cf3ad138af34c0f6aa0cc301ce1fd1
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0106-staging-mt7621-pci-phy-add-mt7621_phy_rmw-to-simplif.patch
@@ -0,0 +1,234 @@
+From bf0c6782e5b9a6deee4e223655325dc004fae8dd Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sun, 15 Mar 2020 17:01:54 +0100
+Subject: [PATCH] staging: mt7621-pci-phy: add 'mt7621_phy_rmw' to simplify
+ code
+
+In order to simplify driver code and decrease a bit LOC add new
+function 'mt7621_phy_rmw' where clear and set bits are passed as
+arguments.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200315160154.10292-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c | 158 +++++++++++-------------
+ 1 file changed, 71 insertions(+), 87 deletions(-)
+
+--- a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
++++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
+@@ -120,17 +120,25 @@ static inline void phy_write(struct mt76
+ 	regmap_write(phy->regmap, reg, val);
+ }
+ 
++static inline void mt7621_phy_rmw(struct mt7621_pci_phy *phy,
++				  u32 reg, u32 clr, u32 set)
++{
++	u32 val = phy_read(phy, reg);
++
++	val &= ~clr;
++	val |= set;
++	phy_write(phy, val, reg);
++}
++
+ static void mt7621_bypass_pipe_rst(struct mt7621_pci_phy *phy,
+ 				   struct mt7621_pci_phy_instance *instance)
+ {
+ 	u32 offset = (instance->index != 1) ?
+ 		RG_PE1_PIPE_REG : RG_PE1_PIPE_REG + RG_P0_TO_P1_WIDTH;
+-	u32 reg;
+ 
+-	reg = phy_read(phy, offset);
+-	reg &= ~(RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC);
+-	reg |= (RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC);
+-	phy_write(phy, reg, offset);
++	mt7621_phy_rmw(phy, offset,
++		       RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC,
++		       RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC);
+ }
+ 
+ static void mt7621_set_phy_for_ssc(struct mt7621_pci_phy *phy,
+@@ -139,97 +147,77 @@ static void mt7621_set_phy_for_ssc(struc
+ 	struct device *dev = phy->dev;
+ 	u32 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0);
+ 	u32 offset;
+-	u32 val;
+ 
+ 	reg = (reg >> 6) & 0x7;
+ 	/* Set PCIe Port PHY to disable SSC */
+ 	/* Debug Xtal Type */
+-	val = phy_read(phy, RG_PE1_FRC_H_XTAL_REG);
+-	val &= ~(RG_PE1_FRC_H_XTAL_TYPE | RG_PE1_H_XTAL_TYPE);
+-	val |= RG_PE1_FRC_H_XTAL_TYPE;
+-	val |= RG_PE1_H_XTAL_TYPE_VAL(0x00);
+-	phy_write(phy, val, RG_PE1_FRC_H_XTAL_REG);
++	mt7621_phy_rmw(phy, RG_PE1_FRC_H_XTAL_REG,
++		       RG_PE1_FRC_H_XTAL_TYPE | RG_PE1_H_XTAL_TYPE,
++		       RG_PE1_FRC_H_XTAL_TYPE | RG_PE1_H_XTAL_TYPE_VAL(0x00));
+ 
+ 	/* disable port */
+ 	offset = (instance->index != 1) ?
+ 		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
+-	val = phy_read(phy, offset);
+-	val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
+-	val |= RG_PE1_FRC_PHY_EN;
+-	phy_write(phy, val, offset);
+-
+-	/* Set Pre-divider ratio (for host mode) */
+-	val = phy_read(phy, RG_PE1_H_PLL_REG);
+-	val &= ~(RG_PE1_H_PLL_PREDIV);
++	mt7621_phy_rmw(phy, offset,
++		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
+ 
+ 	if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */
+-		val |= RG_PE1_H_PLL_PREDIV_VAL(0x01);
+-		phy_write(phy, val, RG_PE1_H_PLL_REG);
++		/* Set Pre-divider ratio (for host mode) */
++		mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
++			       RG_PE1_H_PLL_PREDIV,
++			       RG_PE1_H_PLL_PREDIV_VAL(0x01));
+ 		dev_info(dev, "Xtal is 40MHz\n");
+-	} else { /* 25MHz | 20MHz Xtal */
+-		val |= RG_PE1_H_PLL_PREDIV_VAL(0x00);
+-		phy_write(phy, val, RG_PE1_H_PLL_REG);
+-		if (reg >= 6) {
+-			dev_info(dev, "Xtal is 25MHz\n");
+-
+-			/* Select feedback clock */
+-			val = phy_read(phy, RG_PE1_H_PLL_FBKSEL_REG);
+-			val &= ~(RG_PE1_H_PLL_FBKSEL);
+-			val |= RG_PE1_H_PLL_FBKSEL_VAL(0x01);
+-			phy_write(phy, val, RG_PE1_H_PLL_FBKSEL_REG);
+-
+-			/* DDS NCPO PCW (for host mode) */
+-			val = phy_read(phy, RG_PE1_H_LCDDS_SSC_PRD_REG);
+-			val &= ~(RG_PE1_H_LCDDS_SSC_PRD);
+-			val |= RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18000000);
+-			phy_write(phy, val, RG_PE1_H_LCDDS_SSC_PRD_REG);
+-
+-			/* DDS SSC dither period control */
+-			val = phy_read(phy, RG_PE1_H_LCDDS_SSC_PRD_REG);
+-			val &= ~(RG_PE1_H_LCDDS_SSC_PRD);
+-			val |= RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18d);
+-			phy_write(phy, val, RG_PE1_H_LCDDS_SSC_PRD_REG);
+-
+-			/* DDS SSC dither amplitude control */
+-			val = phy_read(phy, RG_PE1_H_LCDDS_SSC_DELTA_REG);
+-			val &= ~(RG_PE1_H_LCDDS_SSC_DELTA |
+-				 RG_PE1_H_LCDDS_SSC_DELTA1);
+-			val |= RG_PE1_H_LCDDS_SSC_DELTA_VAL(0x4a);
+-			val |= RG_PE1_H_LCDDS_SSC_DELTA1_VAL(0x4a);
+-			phy_write(phy, val, RG_PE1_H_LCDDS_SSC_DELTA_REG);
+-		} else {
+-			dev_info(dev, "Xtal is 20MHz\n");
+-		}
++	} else if (reg >= 6) { /* 25MHz Xal */
++		mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
++			       RG_PE1_H_PLL_PREDIV,
++			       RG_PE1_H_PLL_PREDIV_VAL(0x00));
++		/* Select feedback clock */
++		mt7621_phy_rmw(phy, RG_PE1_H_PLL_FBKSEL_REG,
++			       RG_PE1_H_PLL_FBKSEL,
++			       RG_PE1_H_PLL_FBKSEL_VAL(0x01));
++		/* DDS NCPO PCW (for host mode) */
++		mt7621_phy_rmw(phy, RG_PE1_H_LCDDS_SSC_PRD_REG,
++			       RG_PE1_H_LCDDS_SSC_PRD,
++			       RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18000000));
++		/* DDS SSC dither period control */
++		mt7621_phy_rmw(phy, RG_PE1_H_LCDDS_SSC_PRD_REG,
++			       RG_PE1_H_LCDDS_SSC_PRD,
++			       RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18d));
++		/* DDS SSC dither amplitude control */
++		mt7621_phy_rmw(phy, RG_PE1_H_LCDDS_SSC_DELTA_REG,
++			       RG_PE1_H_LCDDS_SSC_DELTA |
++			       RG_PE1_H_LCDDS_SSC_DELTA1,
++			       RG_PE1_H_LCDDS_SSC_DELTA_VAL(0x4a) |
++			       RG_PE1_H_LCDDS_SSC_DELTA1_VAL(0x4a));
++		dev_info(dev, "Xtal is 25MHz\n");
++	} else { /* 20MHz Xtal */
++		mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
++			       RG_PE1_H_PLL_PREDIV,
++			       RG_PE1_H_PLL_PREDIV_VAL(0x00));
++
++		dev_info(dev, "Xtal is 20MHz\n");
+ 	}
+ 
+ 	/* DDS clock inversion */
+-	val = phy_read(phy, RG_PE1_LCDDS_CLK_PH_INV_REG);
+-	val &= ~(RG_PE1_LCDDS_CLK_PH_INV);
+-	val |= RG_PE1_LCDDS_CLK_PH_INV;
+-	phy_write(phy, val, RG_PE1_LCDDS_CLK_PH_INV_REG);
++	mt7621_phy_rmw(phy, RG_PE1_LCDDS_CLK_PH_INV_REG,
++		       RG_PE1_LCDDS_CLK_PH_INV, RG_PE1_LCDDS_CLK_PH_INV);
+ 
+ 	/* Set PLL bits */
+-	val = phy_read(phy, RG_PE1_H_PLL_REG);
+-	val &= ~(RG_PE1_H_PLL_BC | RG_PE1_H_PLL_BP | RG_PE1_H_PLL_IR |
+-		 RG_PE1_H_PLL_IC | RG_PE1_PLL_DIVEN);
+-	val |= RG_PE1_H_PLL_BC_VAL(0x02);
+-	val |= RG_PE1_H_PLL_BP_VAL(0x06);
+-	val |= RG_PE1_H_PLL_IR_VAL(0x02);
+-	val |= RG_PE1_H_PLL_IC_VAL(0x01);
+-	val |= RG_PE1_PLL_DIVEN_VAL(0x02);
+-	phy_write(phy, val, RG_PE1_H_PLL_REG);
+-
+-	val = phy_read(phy, RG_PE1_H_PLL_BR_REG);
+-	val &= ~(RG_PE1_H_PLL_BR);
+-	val |= RG_PE1_H_PLL_BR_VAL(0x00);
+-	phy_write(phy, val, RG_PE1_H_PLL_BR_REG);
++	mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
++		       RG_PE1_H_PLL_BC | RG_PE1_H_PLL_BP | RG_PE1_H_PLL_IR |
++		       RG_PE1_H_PLL_IC | RG_PE1_PLL_DIVEN,
++		       RG_PE1_H_PLL_BC_VAL(0x02) | RG_PE1_H_PLL_BP_VAL(0x06) |
++		       RG_PE1_H_PLL_IR_VAL(0x02) | RG_PE1_H_PLL_IC_VAL(0x01) |
++		       RG_PE1_PLL_DIVEN_VAL(0x02));
++
++	mt7621_phy_rmw(phy, RG_PE1_H_PLL_BR_REG,
++		       RG_PE1_H_PLL_BR, RG_PE1_H_PLL_BR_VAL(0x00));
+ 
+ 	if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */
+ 		/* set force mode enable of da_pe1_mstckdiv */
+-		val = phy_read(phy, RG_PE1_MSTCKDIV_REG);
+-		val &= ~(RG_PE1_MSTCKDIV | RG_PE1_FRC_MSTCKDIV);
+-		val |= (RG_PE1_MSTCKDIV_VAL(0x01) | RG_PE1_FRC_MSTCKDIV);
+-		phy_write(phy, val, RG_PE1_MSTCKDIV_REG);
++		mt7621_phy_rmw(phy, RG_PE1_MSTCKDIV_REG,
++			       RG_PE1_MSTCKDIV | RG_PE1_FRC_MSTCKDIV,
++			       RG_PE1_MSTCKDIV_VAL(0x01) | RG_PE1_FRC_MSTCKDIV);
+ 	}
+ }
+ 
+@@ -252,13 +240,11 @@ static int mt7621_pci_phy_power_on(struc
+ 	struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent);
+ 	u32 offset = (instance->index != 1) ?
+ 		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
+-	u32 val;
+ 
+ 	/* Enable PHY and disable force mode */
+-	val = phy_read(mphy, offset);
+-	val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
+-	val |= (RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
+-	phy_write(mphy, val, offset);
++	mt7621_phy_rmw(mphy, offset,
++		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN,
++		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
+ 
+ 	return 0;
+ }
+@@ -269,13 +255,11 @@ static int mt7621_pci_phy_power_off(stru
+ 	struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent);
+ 	u32 offset = (instance->index != 1) ?
+ 		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
+-	u32 val;
+ 
+ 	/* Disable PHY */
+-	val = phy_read(mphy, offset);
+-	val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
+-	val |= RG_PE1_FRC_PHY_EN;
+-	phy_write(mphy, val, offset);
++	mt7621_phy_rmw(mphy, offset,
++		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN,
++		       RG_PE1_FRC_PHY_EN);
+ 
+ 	return 0;
+ }
diff --git a/iopsys-ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch b/iopsys-ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch
new file mode 100644
index 0000000000000000000000000000000000000000..393fd4d5dd6276c9418fa0caaaf972cad19729cd
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch
@@ -0,0 +1,131 @@
+From 3faf4e1c537de86058fc22a851cd979489b9185e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Wed, 18 Mar 2020 10:44:45 +0100
+Subject: [PATCH] staging: mt7621-pci: fix io space and properly set resource
+ limits
+
+Function 'mt7621_pci_parse_request_of_pci_ranges' is using
+'of_pci_range_to_resource' to get both mem and io resources.
+Internally this function calls to 'pci_address_to_pio' which
+returns -1 if io space address is an address > IO_SPACE_LIMIT
+which is 0xFFFF for mips. This mt7621 soc has io space in physical
+address 0x1e160000. In order to fix this, overwrite invalid io
+0xffffffff  with properly values from the device tree and set
+mapped address of this resource as io port base memory address
+calling 'set_io_port_base' function. There is also need to properly
+setup resource limits and io and memory windows with properly
+parsed values instead of set them as 'no limit' which it is wrong.
+For any reason I don't really know legacy driver sets up mem window
+as 0xFFFFFFFF and any other value seems to does not work as expected,
+so set up also here with same values.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200318094445.19669-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 43 +++++++++++++++++++--------------
+ 1 file changed, 25 insertions(+), 18 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -118,6 +118,7 @@ struct mt7621_pcie_port {
+  * @busn: bus range
+  * @offset: IO / Memory offset
+  * @dev: Pointer to PCIe device
++ * @io_map_base: virtual memory base address for io
+  * @ports: pointer to PCIe port information
+  * @resets_inverted: depends on chip revision
+  * reset lines are inverted.
+@@ -132,6 +133,7 @@ struct mt7621_pcie {
+ 		resource_size_t mem;
+ 		resource_size_t io;
+ 	} offset;
++	unsigned long io_map_base;
+ 	struct list_head ports;
+ 	bool resets_inverted;
+ };
+@@ -291,22 +293,21 @@ static int mt7621_pci_parse_request_of_p
+ 	}
+ 
+ 	for_each_of_pci_range(&parser, &range) {
+-		struct resource *res = NULL;
+-
+ 		switch (range.flags & IORESOURCE_TYPE_BITS) {
+ 		case IORESOURCE_IO:
+-			ioremap(range.cpu_addr, range.size);
+-			res = &pcie->io;
++			pcie->io_map_base =
++				(unsigned long)ioremap(range.cpu_addr,
++						       range.size);
++			of_pci_range_to_resource(&range, node, &pcie->io);
++			pcie->io.start = range.cpu_addr;
++			pcie->io.end = range.cpu_addr + range.size - 1;
+ 			pcie->offset.io = 0x00000000UL;
+ 			break;
+ 		case IORESOURCE_MEM:
+-			res = &pcie->mem;
++			of_pci_range_to_resource(&range, node, &pcie->mem);
+ 			pcie->offset.mem = 0x00000000UL;
+ 			break;
+ 		}
+-
+-		if (res)
+-			of_pci_range_to_resource(&range, node, res);
+ 	}
+ 
+ 	err = of_pci_parse_bus_range(node, &pcie->busn);
+@@ -318,6 +319,8 @@ static int mt7621_pci_parse_request_of_p
+ 		pcie->busn.flags = IORESOURCE_BUS;
+ 	}
+ 
++	set_io_port_base(pcie->io_map_base);
++
+ 	return 0;
+ }
+ 
+@@ -548,6 +551,10 @@ static void mt7621_pcie_enable_ports(str
+ 	u32 slot;
+ 	u32 val;
+ 
++	/* Setup MEMWIN and IOWIN */
++	pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE);
++	pcie_write(pcie, pcie->io.start, RALINK_PCI_IOBASE);
++
+ 	list_for_each_entry(port, &pcie->ports, list) {
+ 		if (port->enabled) {
+ 			mt7621_pcie_port_clk_enable(port);
+@@ -668,11 +675,17 @@ static int mt7621_pci_probe(struct platf
+ 		return err;
+ 	}
+ 
++	err = mt7621_pci_parse_request_of_pci_ranges(pcie);
++	if (err) {
++		dev_err(dev, "Error requesting pci resources from ranges");
++		goto out_release_gpios;
++	}
++
+ 	/* set resources limits */
+-	iomem_resource.start = 0;
+-	iomem_resource.end = ~0UL; /* no limit */
+-	ioport_resource.start = 0;
+-	ioport_resource.end = ~0UL; /* no limit */
++	iomem_resource.start = pcie->mem.start;
++	iomem_resource.end = pcie->mem.end;
++	ioport_resource.start = pcie->io.start;
++	ioport_resource.end = pcie->io.end;
+ 
+ 	mt7621_pcie_init_ports(pcie);
+ 
+@@ -685,12 +698,6 @@ static int mt7621_pci_probe(struct platf
+ 
+ 	mt7621_pcie_enable_ports(pcie);
+ 
+-	err = mt7621_pci_parse_request_of_pci_ranges(pcie);
+-	if (err) {
+-		dev_err(dev, "Error requesting pci resources from ranges");
+-		goto out_release_gpios;
+-	}
+-
+ 	setup_cm_memory_region(pcie);
+ 
+ 	err = mt7621_pcie_request_resources(pcie, &res);
diff --git a/iopsys-ramips/patches-5.4/0108-staging-mt7621-pci-fix-register-to-set-up-virtual-br.patch b/iopsys-ramips/patches-5.4/0108-staging-mt7621-pci-fix-register-to-set-up-virtual-br.patch
new file mode 100644
index 0000000000000000000000000000000000000000..5b4c461b2f9689575bb757c600f14a6b0dd00f03
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0108-staging-mt7621-pci-fix-register-to-set-up-virtual-br.patch
@@ -0,0 +1,28 @@
+From 0a3085ae142d8f5cf905b104bc66db3721a2fa33 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Thu, 19 Mar 2020 10:57:33 +0100
+Subject: [PATCH] staging: mt7621-pci: fix register to set up virtual bridges
+
+Instead of being using PCI Configuration and Status Register to
+set up virtual bridges we are using CONFIG_ADDR Register which is
+wrong. Hence, set the correct value.
+
+Fixes: 9a5e71a68d20 ("staging: mt7621-pci: simplify 'mt7621_pcie_init_virtual_bridges' function")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200319095733.1557-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -603,7 +603,7 @@ static int mt7621_pcie_init_virtual_brid
+ 		if ((pcie_link_status & BIT(i)) == 0)
+ 			p2p_br_devnum[i] = n++;
+ 
+-	pcie_rmw(pcie, RALINK_PCI_CONFIG_ADDR,
++	pcie_rmw(pcie, RALINK_PCI_PCICFG_ADDR,
+ 		 PCIE_P2P_BR_DEVNUM_MASK_FULL,
+ 		 (p2p_br_devnum[0] << PCIE_P2P_BR_DEVNUM0_SHIFT) |
+ 		 (p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) |
diff --git a/iopsys-ramips/patches-5.4/0109-staging-mt7621-pci-don-t-return-if-get-gpio-fails.patch b/iopsys-ramips/patches-5.4/0109-staging-mt7621-pci-don-t-return-if-get-gpio-fails.patch
new file mode 100644
index 0000000000000000000000000000000000000000..55abb8999fb5713ad6cd14476a94eddd2ac81918
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0109-staging-mt7621-pci-don-t-return-if-get-gpio-fails.patch
@@ -0,0 +1,34 @@
+From 23a788c23ed10e0d79092fcb693dcf0e357e1f7e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Thu, 19 Mar 2020 17:14:16 +0100
+Subject: [PATCH] staging: mt7621-pci: don't return if get gpio fails
+
+In some platforms gpio's are not used for reset but
+for other purposes. Because of that when we try to
+get them are valid gpio's but are already assigned
+to do other function. To avoid those kind of problems
+in those platforms just notice the fail in the kernel
+but continue doing normal boot.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200319161416.19033-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -363,10 +363,8 @@ static int mt7621_pcie_parse_port(struct
+ 
+ 	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
+ 						       GPIOD_OUT_LOW);
+-	if (IS_ERR(port->gpio_rst)) {
+-		dev_err(dev, "Failed to get GPIO for PCIe%d\n", slot);
+-		return PTR_ERR(port->gpio_rst);
+-	}
++	if (IS_ERR(port->gpio_rst))
++		dev_notice(dev, "Failed to get GPIO for PCIe%d\n", slot);
+ 
+ 	port->slot = slot;
+ 	port->pcie = pcie;
diff --git a/iopsys-ramips/patches-5.4/0110-staging-mt7621-pci-phy-avoid-to-create-to-different-.patch b/iopsys-ramips/patches-5.4/0110-staging-mt7621-pci-phy-avoid-to-create-to-different-.patch
new file mode 100644
index 0000000000000000000000000000000000000000..6d84bfdd5b24730d38d1a3a6b60e060d482746ef
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0110-staging-mt7621-pci-phy-avoid-to-create-to-different-.patch
@@ -0,0 +1,272 @@
+From 91eb47531421f0e8c9bc4594b4a7caa0e59dc83e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 20 Mar 2020 12:01:19 +0100
+Subject: [PATCH] staging: mt7621-pci-phy: avoid to create to different phys
+ for a dual port one
+
+This soc has two phy's for the pcie one of them using just a different
+register for settig it up but sharing all the rest of the config. Until
+now we was presenting this schema as three different phy's in the device
+tree using the 'phy-cells' node property to discriminate an index and
+setting up a complete phy for the dual port index. This sometimes worked
+properly but reconfiguring the same registers twice presents sometimes
+some unstable pcie links and the ports was not properly being detected.
+The problems only appears on hard resets and soft resets was properly
+working. Instead of having this schema just set two phy's in the device
+ree and use the 'phy-cells' property to say if the port has or not a dual
+port. Doing this configuration and set up becomes easier, LOC is decreased
+and the behaviour also gets deterministic with properly and stable pcie
+links in both hard and soft resets.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200320110123.9907-2-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c | 144 ++++++++++--------------
+ 1 file changed, 59 insertions(+), 85 deletions(-)
+
+--- a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
++++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
+@@ -78,31 +78,21 @@
+ #define MAX_PHYS	2
+ 
+ /**
+- * struct mt7621_pci_phy_instance - Mt7621 Pcie PHY device
+- * @phy: pointer to the kernel PHY device
+- * @port_base: base register
+- * @index: internal ID to identify the Mt7621 PCIe PHY
+- */
+-struct mt7621_pci_phy_instance {
+-	struct phy *phy;
+-	void __iomem *port_base;
+-	u32 index;
+-};
+-
+-/**
+  * struct mt7621_pci_phy - Mt7621 Pcie PHY core
+  * @dev: pointer to device
+  * @regmap: kernel regmap pointer
+- * @phys: pointer to Mt7621 PHY device
+- * @nphys: number of PHY devices for this core
++ * @phy: pointer to the kernel PHY device
++ * @port_base: base register
++ * @has_dual_port: if the phy has dual ports.
+  * @bypass_pipe_rst: mark if 'mt7621_bypass_pipe_rst'
+  * needs to be executed. Depends on chip revision.
+  */
+ struct mt7621_pci_phy {
+ 	struct device *dev;
+ 	struct regmap *regmap;
+-	struct mt7621_pci_phy_instance **phys;
+-	int nphys;
++	struct phy *phy;
++	void __iomem *port_base;
++	bool has_dual_port;
+ 	bool bypass_pipe_rst;
+ };
+ 
+@@ -130,23 +120,23 @@ static inline void mt7621_phy_rmw(struct
+ 	phy_write(phy, val, reg);
+ }
+ 
+-static void mt7621_bypass_pipe_rst(struct mt7621_pci_phy *phy,
+-				   struct mt7621_pci_phy_instance *instance)
++static void mt7621_bypass_pipe_rst(struct mt7621_pci_phy *phy)
+ {
+-	u32 offset = (instance->index != 1) ?
+-		RG_PE1_PIPE_REG : RG_PE1_PIPE_REG + RG_P0_TO_P1_WIDTH;
++	mt7621_phy_rmw(phy, RG_PE1_PIPE_REG, 0, RG_PE1_PIPE_RST);
++	mt7621_phy_rmw(phy, RG_PE1_PIPE_REG, 0, RG_PE1_PIPE_CMD_FRC);
+ 
+-	mt7621_phy_rmw(phy, offset,
+-		       RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC,
+-		       RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC);
++	if (phy->has_dual_port) {
++		mt7621_phy_rmw(phy, RG_PE1_PIPE_REG + RG_P0_TO_P1_WIDTH,
++			       0, RG_PE1_PIPE_RST);
++		mt7621_phy_rmw(phy, RG_PE1_PIPE_REG + RG_P0_TO_P1_WIDTH,
++			       0, RG_PE1_PIPE_CMD_FRC);
++	}
+ }
+ 
+-static void mt7621_set_phy_for_ssc(struct mt7621_pci_phy *phy,
+-				   struct mt7621_pci_phy_instance *instance)
++static void mt7621_set_phy_for_ssc(struct mt7621_pci_phy *phy)
+ {
+ 	struct device *dev = phy->dev;
+ 	u32 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0);
+-	u32 offset;
+ 
+ 	reg = (reg >> 6) & 0x7;
+ 	/* Set PCIe Port PHY to disable SSC */
+@@ -156,10 +146,13 @@ static void mt7621_set_phy_for_ssc(struc
+ 		       RG_PE1_FRC_H_XTAL_TYPE | RG_PE1_H_XTAL_TYPE_VAL(0x00));
+ 
+ 	/* disable port */
+-	offset = (instance->index != 1) ?
+-		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
+-	mt7621_phy_rmw(phy, offset,
+-		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
++	mt7621_phy_rmw(phy, RG_PE1_FRC_PHY_REG,
++		       RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
++
++	if (phy->has_dual_port) {
++		mt7621_phy_rmw(phy, RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH,
++			       RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
++	}
+ 
+ 	if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */
+ 		/* Set Pre-divider ratio (for host mode) */
+@@ -223,43 +216,44 @@ static void mt7621_set_phy_for_ssc(struc
+ 
+ static int mt7621_pci_phy_init(struct phy *phy)
+ {
+-	struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy);
+-	struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent);
++	struct mt7621_pci_phy *mphy = phy_get_drvdata(phy);
+ 
+ 	if (mphy->bypass_pipe_rst)
+-		mt7621_bypass_pipe_rst(mphy, instance);
++		mt7621_bypass_pipe_rst(mphy);
+ 
+-	mt7621_set_phy_for_ssc(mphy, instance);
++	mt7621_set_phy_for_ssc(mphy);
+ 
+ 	return 0;
+ }
+ 
+ static int mt7621_pci_phy_power_on(struct phy *phy)
+ {
+-	struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy);
+-	struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent);
+-	u32 offset = (instance->index != 1) ?
+-		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
++	struct mt7621_pci_phy *mphy = phy_get_drvdata(phy);
+ 
+ 	/* Enable PHY and disable force mode */
+-	mt7621_phy_rmw(mphy, offset,
+-		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN,
+-		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN);
++	mt7621_phy_rmw(mphy, RG_PE1_FRC_PHY_REG,
++		       RG_PE1_FRC_PHY_EN, RG_PE1_PHY_EN);
++
++	if (mphy->has_dual_port) {
++		mt7621_phy_rmw(mphy, RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH,
++			       RG_PE1_FRC_PHY_EN, RG_PE1_PHY_EN);
++	}
+ 
+ 	return 0;
+ }
+ 
+ static int mt7621_pci_phy_power_off(struct phy *phy)
+ {
+-	struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy);
+-	struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent);
+-	u32 offset = (instance->index != 1) ?
+-		RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH;
++	struct mt7621_pci_phy *mphy = phy_get_drvdata(phy);
+ 
+ 	/* Disable PHY */
+-	mt7621_phy_rmw(mphy, offset,
+-		       RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN,
+-		       RG_PE1_FRC_PHY_EN);
++	mt7621_phy_rmw(mphy, RG_PE1_FRC_PHY_REG,
++		       RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
++
++	if (mphy->has_dual_port) {
++		mt7621_phy_rmw(mphy, RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH,
++			       RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
++	}
+ 
+ 	return 0;
+ }
+@@ -282,13 +276,15 @@ static struct phy *mt7621_pcie_phy_of_xl
+ {
+ 	struct mt7621_pci_phy *mt7621_phy = dev_get_drvdata(dev);
+ 
+-	if (args->args_count == 0)
+-		return mt7621_phy->phys[0]->phy;
+-
+ 	if (WARN_ON(args->args[0] >= MAX_PHYS))
+ 		return ERR_PTR(-ENODEV);
+ 
+-	return mt7621_phy->phys[args->args[0]]->phy;
++	mt7621_phy->has_dual_port = args->args[0];
++
++	dev_info(dev, "PHY for 0x%08x (dual port = %d)\n",
++		 (unsigned int)mt7621_phy->port_base, mt7621_phy->has_dual_port);
++
++	return mt7621_phy->phy;
+ }
+ 
+ static const struct soc_device_attribute mt7621_pci_quirks_match[] = {
+@@ -309,19 +305,11 @@ static int mt7621_pci_phy_probe(struct p
+ 	struct phy_provider *provider;
+ 	struct mt7621_pci_phy *phy;
+ 	struct resource *res;
+-	int port;
+-	void __iomem *port_base;
+ 
+ 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+ 	if (!phy)
+ 		return -ENOMEM;
+ 
+-	phy->nphys = MAX_PHYS;
+-	phy->phys = devm_kcalloc(dev, phy->nphys,
+-				 sizeof(*phy->phys), GFP_KERNEL);
+-	if (!phy->phys)
+-		return -ENOMEM;
+-
+ 	attr = soc_device_match(mt7621_pci_quirks_match);
+ 	if (attr)
+ 		phy->bypass_pipe_rst = true;
+@@ -335,39 +323,25 @@ static int mt7621_pci_phy_probe(struct p
+ 		return -ENXIO;
+ 	}
+ 
+-	port_base = devm_ioremap_resource(dev, res);
+-	if (IS_ERR(port_base)) {
++	phy->port_base = devm_ioremap_resource(dev, res);
++	if (IS_ERR(phy->port_base)) {
+ 		dev_err(dev, "failed to remap phy regs\n");
+-		return PTR_ERR(port_base);
++		return PTR_ERR(phy->port_base);
+ 	}
+ 
+-	phy->regmap = devm_regmap_init_mmio(phy->dev, port_base,
++	phy->regmap = devm_regmap_init_mmio(phy->dev, phy->port_base,
+ 					    &mt7621_pci_phy_regmap_config);
+ 	if (IS_ERR(phy->regmap))
+ 		return PTR_ERR(phy->regmap);
+ 
+-	for (port = 0; port < MAX_PHYS; port++) {
+-		struct mt7621_pci_phy_instance *instance;
+-		struct phy *pphy;
+-
+-		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);
+-		if (!instance)
+-			return -ENOMEM;
+-
+-		phy->phys[port] = instance;
+-
+-		pphy = devm_phy_create(dev, dev->of_node, &mt7621_pci_phy_ops);
+-		if (IS_ERR(phy)) {
+-			dev_err(dev, "failed to create phy\n");
+-			return PTR_ERR(phy);
+-		}
+-
+-		instance->port_base = port_base;
+-		instance->phy = pphy;
+-		instance->index = port;
+-		phy_set_drvdata(pphy, instance);
++	phy->phy = devm_phy_create(dev, dev->of_node, &mt7621_pci_phy_ops);
++	if (IS_ERR(phy)) {
++		dev_err(dev, "failed to create phy\n");
++		return PTR_ERR(phy);
+ 	}
+ 
++	phy_set_drvdata(phy->phy, phy);
++
+ 	provider = devm_of_phy_provider_register(dev, mt7621_pcie_phy_of_xlate);
+ 
+ 	return PTR_ERR_OR_ZERO(provider);
diff --git a/iopsys-ramips/patches-5.4/0111-staging-mt7621-pci-use-only-two-phys-from-device-tre.patch b/iopsys-ramips/patches-5.4/0111-staging-mt7621-pci-use-only-two-phys-from-device-tre.patch
new file mode 100644
index 0000000000000000000000000000000000000000..61aa80eb76f5267d8bc8613b17e6ebde853822c5
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0111-staging-mt7621-pci-use-only-two-phys-from-device-tre.patch
@@ -0,0 +1,42 @@
+From c752b54bda4d772426c5eeb56978d2e41bd525b4 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 20 Mar 2020 12:01:21 +0100
+Subject: [PATCH] staging: mt7621-pci: use only two phys from device tree
+
+In order to align work with the mt7621-pci-phy part of
+the driver and device tree which is now using only two
+real phys one of them dual ported properly parse the
+device tree and don't call phy initialization for the
+slot 1 because is being taking into account when the
+phy for the slot 0 is instantiated.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200320110123.9907-4-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -358,7 +358,7 @@ static int mt7621_pcie_parse_port(struct
+ 
+ 	snprintf(name, sizeof(name), "pcie-phy%d", slot);
+ 	port->phy = devm_phy_get(dev, name);
+-	if (IS_ERR(port->phy))
++	if (IS_ERR(port->phy) && slot != 1)
+ 		return PTR_ERR(port->phy);
+ 
+ 	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
+@@ -495,6 +495,11 @@ static void mt7621_pcie_init_ports(struc
+ 	list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
+ 		u32 slot = port->slot;
+ 
++		if (slot == 1) {
++			port->enabled = true;
++			continue;
++		}
++
+ 		err = mt7621_pcie_init_port(port);
+ 		if (err) {
+ 			dev_err(dev, "Initiating port %d failed\n", slot);
diff --git a/iopsys-ramips/patches-5.4/0112-staging-mt7621-pci-change-variable-to-print-for-slot.patch b/iopsys-ramips/patches-5.4/0112-staging-mt7621-pci-change-variable-to-print-for-slot.patch
new file mode 100644
index 0000000000000000000000000000000000000000..383c896a3ef99db22a66ec53b8ed3801142bbb9b
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0112-staging-mt7621-pci-change-variable-to-print-for-slot.patch
@@ -0,0 +1,26 @@
+From b59343b7de448c30e5b098484a7c7c5cb300df2f Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 20 Mar 2020 12:01:22 +0100
+Subject: [PATCH] staging: mt7621-pci: change variable to print for slot
+
+We are using the counter to print the slot which has been
+enabled. Use the correct associated slot for the port instead.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200320110123.9907-5-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -562,7 +562,7 @@ static void mt7621_pcie_enable_ports(str
+ 		if (port->enabled) {
+ 			mt7621_pcie_port_clk_enable(port);
+ 			mt7621_pcie_enable_port(port);
+-			dev_info(dev, "PCIE%d enabled\n", num_slots_enabled);
++			dev_info(dev, "PCIE%d enabled\n", port->slot);
+ 			num_slots_enabled++;
+ 		}
+ 	}
diff --git a/iopsys-ramips/patches-5.4/0113-staging-mt7621-pci-be-sure-gpio-descriptor-is-null-o.patch b/iopsys-ramips/patches-5.4/0113-staging-mt7621-pci-be-sure-gpio-descriptor-is-null-o.patch
new file mode 100644
index 0000000000000000000000000000000000000000..bf6fdf1d496d079da954a1064e1aefede1452dc0
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0113-staging-mt7621-pci-be-sure-gpio-descriptor-is-null-o.patch
@@ -0,0 +1,33 @@
+From 87068309300c707d659ce79232eae827604804a4 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 20 Mar 2020 12:01:23 +0100
+Subject: [PATCH] staging: mt7621-pci: be sure gpio descriptor is null on fails
+
+Function 'devm_gpiod_get_index_optional' returns NULL if the
+descriptor is invalid and the error associated for the error
+pointer is ENOENT. Sometimes if the pin is just assigned the
+error associated for the pointer might not be ENOENT but other.
+In order to avoid weirds behaviours if this happen set descriptor
+to NULL in the driver port structure.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200320110123.9907-6-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -363,8 +363,10 @@ static int mt7621_pcie_parse_port(struct
+ 
+ 	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
+ 						       GPIOD_OUT_LOW);
+-	if (IS_ERR(port->gpio_rst))
++	if (IS_ERR(port->gpio_rst)) {
+ 		dev_notice(dev, "Failed to get GPIO for PCIe%d\n", slot);
++		port->gpio_rst = NULL;
++	}
+ 
+ 	port->slot = slot;
+ 	port->pcie = pcie;
diff --git a/iopsys-ramips/patches-5.4/0114-staging-mt7621-pci-avoid-to-poweroff-the-phy-for-slo.patch b/iopsys-ramips/patches-5.4/0114-staging-mt7621-pci-avoid-to-poweroff-the-phy-for-slo.patch
new file mode 100644
index 0000000000000000000000000000000000000000..d733e58537b3ca6c1ff28430ca0f51e1d1cd1328
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0114-staging-mt7621-pci-avoid-to-poweroff-the-phy-for-slo.patch
@@ -0,0 +1,79 @@
+From d81fe3c13aa6f4ab1ec318212d2007175e6d05aa Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Fri, 20 Mar 2020 16:38:37 +0100
+Subject: [PATCH] staging: mt7621-pci: avoid to poweroff the phy for slot one
+
+Phy for slot 0 and 1 is shared and handled properly in slot 0.
+If there is only one port in use,(slot 0) we shall not call the
+'phy_power_off' function with an invalid slot because kernel
+will crash with an unaligned access fault like the following:
+
+mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
+mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
+mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
+mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
+mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
+mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
+Unhandled kernel unaligned access[#1]:
+CPU: 3 PID: 111 Comm: kworker/3:2 Not tainted 5.6.0-rc3-00347-g825c6f470c62-dirty #9
+Workqueue: events deferred_probe_work_func
+$ 0   : 00000000 00000001 5f60d043 8fe1ba80
+$ 4   : 0000010d 01eb9000 00000000 00000000
+$ 8   : 294b4c00 80940000 00000008 000000ce
+$12   : 2e303030 00000000 00000000 65696370
+$16   : ffffffed 0000010d 8e373cd0 8214c1e0
+$20   : 00000000 82144c80 82144680 8214c250
+$24   : 00000018 803ef8f4
+$28   : 8e372000 8e373c60 8214c080 803940e8
+Hi    : 00000125
+Lo    : 122f2000
+epc   : 807b3328 mutex_lock+0x8/0x44
+ra    : 803940e8 phy_power_off+0x28/0xb0
+Status: 1100fc03        KERNEL EXL IE
+Cause : 00800010 (ExcCode 04)
+BadVA : 0000010d
+PrId  : 0001992f (MIPS 1004Kc)
+Modules linked in:
+Process kworker/3:2 (pid: 111, threadinfo=(ptrval), task=(ptrval), tls=00000000)
+Stack : 8e373cd0 803fe4f4 8e372000 8e373c90 8214c080 804fde1c 8e373c98 808d62f4
+         8e373c78 00000000 8214c254 804fe648 1e160000 804f27b8 00000001 808d62f4
+         00000000 00000001 8214c228 808d62f4 80930000 809a0000 8fd47e10 808d63d4
+         808d62d4 8fd47e10 808d0000 808d0000 8e373cd0 8e373cd0 809e2a74 809db510
+         809db510 00000006 00000001 00000000 00000000 00000000 01000000 1e1440ff
+         ...
+Call Trace:
+[<807b3328>] mutex_lock+0x8/0x44
+[<803940e8>] phy_power_off+0x28/0xb0
+[<804fe648>] mt7621_pci_probe+0xc20/0xd18
+[<80402ab8>] platform_drv_probe+0x40/0x94
+[<80400a74>] really_probe+0x104/0x364
+[<803feb74>] bus_for_each_drv+0x84/0xdc
+[<80400924>] __device_attach+0xdc/0x120
+[<803ffb5c>] bus_probe_device+0xa0/0xbc
+[<80400124>] deferred_probe_work_func+0x7c/0xbc
+[<800420e8>] process_one_work+0x230/0x450
+[<80042638>] worker_thread+0x330/0x5fc
+[<80048eb0>] kthread+0x12c/0x134
+[<80007438>] ret_from_kernel_thread+0x14/0x1c
+Code: 24050002  27bdfff8  8f830000 <c0850000> 14a00005  00000000  00600825  e0810000  1020fffa
+
+Fixes: bf516f413f4e ("staging: mt7621-pci: use only two phys from device tree")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200320153837.20415-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -517,7 +517,8 @@ static void mt7621_pcie_init_ports(struc
+ 		if (!mt7621_pcie_port_is_linkup(port)) {
+ 			dev_err(dev, "pcie%d no card, disable it (RST & CLK)\n",
+ 				slot);
+-			phy_power_off(port->phy);
++			if (slot != 1)
++				phy_power_off(port->phy);
+ 			mt7621_control_assert(port);
+ 			mt7621_pcie_port_clk_disable(port);
+ 			port->enabled = false;
diff --git a/iopsys-ramips/patches-5.4/0115-staging-mt7621-pci-delete-release-gpios-related-code.patch b/iopsys-ramips/patches-5.4/0115-staging-mt7621-pci-delete-release-gpios-related-code.patch
new file mode 100644
index 0000000000000000000000000000000000000000..5bfd205691103b834dd9ef622060997f1f4a099e
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0115-staging-mt7621-pci-delete-release-gpios-related-code.patch
@@ -0,0 +1,91 @@
+From 9d789a7728c37e8730b6a9cca60cf155f18537ea Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sat, 21 Mar 2020 08:26:50 +0100
+Subject: [PATCH] staging: mt7621-pci: delete release gpios related code
+
+Making gpio8 and gpio9 vendor specific and putting them
+into the specific dts file makes not needed to release
+gpios anymore because we are not occupying those pins
+in the first place if it is not necessary. When the
+device tree is parsed we can also check and return for
+the error because we rely in the fact that the related
+device for the board is correct.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200321072650.7784-3-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 27 +++++++--------------------
+ 1 file changed, 7 insertions(+), 20 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -364,8 +364,8 @@ static int mt7621_pcie_parse_port(struct
+ 	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
+ 						       GPIOD_OUT_LOW);
+ 	if (IS_ERR(port->gpio_rst)) {
+-		dev_notice(dev, "Failed to get GPIO for PCIe%d\n", slot);
+-		port->gpio_rst = NULL;
++		dev_err(dev, "Failed to get GPIO for PCIe%d\n", slot);
++		return PTR_ERR(port->gpio_rst);
+ 	}
+ 
+ 	port->slot = slot;
+@@ -474,15 +474,6 @@ static void mt7621_pcie_reset_ep_deasser
+ 	mdelay(PERST_DELAY_MS);
+ }
+ 
+-static void mt7621_pcie_release_gpios(struct mt7621_pcie *pcie)
+-{
+-	struct mt7621_pcie_port *port;
+-
+-	list_for_each_entry(port, &pcie->ports, list)
+-		if (port->gpio_rst)
+-			gpiod_put(port->gpio_rst);
+-}
+-
+ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+@@ -684,7 +675,7 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pci_parse_request_of_pci_ranges(pcie);
+ 	if (err) {
+ 		dev_err(dev, "Error requesting pci resources from ranges");
+-		goto out_release_gpios;
++		return err;
+ 	}
+ 
+ 	/* set resources limits */
+@@ -698,8 +689,7 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pcie_init_virtual_bridges(pcie);
+ 	if (err) {
+ 		dev_err(dev, "Nothing is connected in virtual bridges. Exiting...");
+-		err = 0;
+-		goto out_release_gpios;
++		return 0;
+ 	}
+ 
+ 	mt7621_pcie_enable_ports(pcie);
+@@ -709,19 +699,16 @@ static int mt7621_pci_probe(struct platf
+ 	err = mt7621_pcie_request_resources(pcie, &res);
+ 	if (err) {
+ 		dev_err(dev, "Error requesting resources\n");
+-		goto out_release_gpios;
++		return err;
+ 	}
+ 
+ 	err = mt7621_pcie_register_host(bridge, &res);
+ 	if (err) {
+ 		dev_err(dev, "Error registering host\n");
+-		goto out_release_gpios;
++		return err;
+ 	}
+ 
+-out_release_gpios:
+-	mt7621_pcie_release_gpios(pcie);
+-
+-	return err;
++	return 0;
+ }
+ 
+ static const struct of_device_id mt7621_pci_ids[] = {
diff --git a/iopsys-ramips/patches-5.4/0116-staging-mt7621-pci-use-builtin_platform_driver.patch b/iopsys-ramips/patches-5.4/0116-staging-mt7621-pci-use-builtin_platform_driver.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b333bb326baa575fea7c71aa57675fd845a928de
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0116-staging-mt7621-pci-use-builtin_platform_driver.patch
@@ -0,0 +1,29 @@
+From 60a15339ceab9fc2a6cdc85fd54b66b2c947ab4e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sat, 21 Mar 2020 14:36:21 +0100
+Subject: [PATCH] staging: mt7621-pci: use builtin_platform_driver()
+
+Macro builtin_platform_driver can be used for builtin drivers
+that don't do anything in driver init. So, use the macro
+builtin_platform_driver and remove some boilerplate code.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200321133624.31388-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -725,9 +725,4 @@ static struct platform_driver mt7621_pci
+ 	},
+ };
+ 
+-static int __init mt7621_pci_init(void)
+-{
+-	return platform_driver_register(&mt7621_pci_driver);
+-}
+-
+-module_init(mt7621_pci_init);
++builtin_platform_driver(mt7621_pci_driver);
diff --git a/iopsys-ramips/patches-5.4/0117-staging-mt7621-pci-phy-use-builtin_platform_driver.patch b/iopsys-ramips/patches-5.4/0117-staging-mt7621-pci-phy-use-builtin_platform_driver.patch
new file mode 100644
index 0000000000000000000000000000000000000000..e55def40f5b784da8968b62a2adf90d8179cb675
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0117-staging-mt7621-pci-phy-use-builtin_platform_driver.patch
@@ -0,0 +1,32 @@
+From ffe3dee4081055b4f58bc50dd3f5c97de42cf126 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sat, 21 Mar 2020 14:36:23 +0100
+Subject: [PATCH] staging: mt7621-pci-phy: use builtin_platform_driver()
+
+Macro builtin_platform_driver can be used for builtin drivers
+that don't do anything in driver init. So, use the macro
+builtin_platform_driver and remove some boilerplate code.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200321133624.31388-3-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+--- a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
++++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
+@@ -361,12 +361,7 @@ static struct platform_driver mt7621_pci
+ 	},
+ };
+ 
+-static int __init mt7621_pci_phy_drv_init(void)
+-{
+-	return platform_driver_register(&mt7621_pci_phy_driver);
+-}
+-
+-module_init(mt7621_pci_phy_drv_init);
++builtin_platform_driver(mt7621_pci_phy_driver);
+ 
+ MODULE_AUTHOR("Sergio Paracuellos <sergio.paracuellos@gmail.com>");
+ MODULE_DESCRIPTION("MediaTek MT7621 PCIe PHY driver");
diff --git a/iopsys-ramips/patches-5.4/0118-staging-mt7621-pci-phy-re-do-xtal_mode-detection.patch b/iopsys-ramips/patches-5.4/0118-staging-mt7621-pci-phy-re-do-xtal_mode-detection.patch
new file mode 100644
index 0000000000000000000000000000000000000000..9eb834514423f7d0a9d5387c74a0dfe24794fee9
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0118-staging-mt7621-pci-phy-re-do-xtal_mode-detection.patch
@@ -0,0 +1,68 @@
+From ff83e3023cb8fc3b5dfc12e0c91bf1eb9dc4c4c6 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sat, 21 Mar 2020 14:36:24 +0100
+Subject: [PATCH] staging: mt7621-pci-phy: re-do 'xtal_mode' detection
+
+Detection of the Xtal mode is using magic numbers that
+can be avoided using properly some definitions and a more
+accurate variable name from 'reg' into 'xtal_mode'. This
+increase readability.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200321133624.31388-4-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
++++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
+@@ -75,6 +75,9 @@
+ 
+ #define RG_PE1_FRC_MSTCKDIV			BIT(5)
+ 
++#define XTAL_MODE_SEL_SHIFT			6
++#define XTAL_MODE_SEL_MASK			0x7
++
+ #define MAX_PHYS	2
+ 
+ /**
+@@ -136,9 +139,11 @@ static void mt7621_bypass_pipe_rst(struc
+ static void mt7621_set_phy_for_ssc(struct mt7621_pci_phy *phy)
+ {
+ 	struct device *dev = phy->dev;
+-	u32 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0);
++	u32 xtal_mode;
++
++	xtal_mode = (rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0)
++		     >> XTAL_MODE_SEL_SHIFT) & XTAL_MODE_SEL_MASK;
+ 
+-	reg = (reg >> 6) & 0x7;
+ 	/* Set PCIe Port PHY to disable SSC */
+ 	/* Debug Xtal Type */
+ 	mt7621_phy_rmw(phy, RG_PE1_FRC_H_XTAL_REG,
+@@ -154,13 +159,13 @@ static void mt7621_set_phy_for_ssc(struc
+ 			       RG_PE1_PHY_EN, RG_PE1_FRC_PHY_EN);
+ 	}
+ 
+-	if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */
++	if (xtal_mode <= 5 && xtal_mode >= 3) { /* 40MHz Xtal */
+ 		/* Set Pre-divider ratio (for host mode) */
+ 		mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
+ 			       RG_PE1_H_PLL_PREDIV,
+ 			       RG_PE1_H_PLL_PREDIV_VAL(0x01));
+ 		dev_info(dev, "Xtal is 40MHz\n");
+-	} else if (reg >= 6) { /* 25MHz Xal */
++	} else if (xtal_mode >= 6) { /* 25MHz Xal */
+ 		mt7621_phy_rmw(phy, RG_PE1_H_PLL_REG,
+ 			       RG_PE1_H_PLL_PREDIV,
+ 			       RG_PE1_H_PLL_PREDIV_VAL(0x00));
+@@ -206,7 +211,7 @@ static void mt7621_set_phy_for_ssc(struc
+ 	mt7621_phy_rmw(phy, RG_PE1_H_PLL_BR_REG,
+ 		       RG_PE1_H_PLL_BR, RG_PE1_H_PLL_BR_VAL(0x00));
+ 
+-	if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */
++	if (xtal_mode <= 5 && xtal_mode >= 3) { /* 40MHz Xtal */
+ 		/* set force mode enable of da_pe1_mstckdiv */
+ 		mt7621_phy_rmw(phy, RG_PE1_MSTCKDIV_REG,
+ 			       RG_PE1_MSTCKDIV | RG_PE1_FRC_MSTCKDIV,
diff --git a/iopsys-ramips/patches-5.4/0119-staging-mt7621-pci-avoid-to-set-iomem_resource-addre.patch b/iopsys-ramips/patches-5.4/0119-staging-mt7621-pci-avoid-to-set-iomem_resource-addre.patch
new file mode 100644
index 0000000000000000000000000000000000000000..9af46f419698d9db4713869c0b4886f3c80da6e0
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0119-staging-mt7621-pci-avoid-to-set-iomem_resource-addre.patch
@@ -0,0 +1,35 @@
+From 4f0f36b67564311a4ce4441510ef94848febbab2 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Sun, 22 Mar 2020 08:21:28 +0100
+Subject: [PATCH] staging: mt7621-pci: avoid to set 'iomem_resource' addresses
+
+Setting up kernel resource 'iomem_resource' for PCI with
+addresses parsed from device tree gots into a conflict within
+the usb xhci driver:
+
+xhci-mtk 1e1c0000.xhci: can't request region for resource [mem 0x1e1c0000-0x1e1c0fff]
+xhci-mtk: probe of 1e1c0000.xhci failed with error -16
+
+Don't assign it and maintain the default addresses for this
+resource seems to fix the problem. Checking legacy driver it
+is being only  setting the 'ioport_resource'.
+
+Fixes: 09dd629eeabb ("staging: mt7621-pci: fix io space and properly set resource limits")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200322072128.4454-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -679,8 +679,6 @@ static int mt7621_pci_probe(struct platf
+ 	}
+ 
+ 	/* set resources limits */
+-	iomem_resource.start = pcie->mem.start;
+-	iomem_resource.end = pcie->mem.end;
+ 	ioport_resource.start = pcie->io.start;
+ 	ioport_resource.end = pcie->io.end;
+ 
diff --git a/iopsys-ramips/patches-5.4/0120-staging-mt7621-pci-properly-power-off-dual-ported-pc.patch b/iopsys-ramips/patches-5.4/0120-staging-mt7621-pci-properly-power-off-dual-ported-pc.patch
new file mode 100644
index 0000000000000000000000000000000000000000..9efcb8011ad037b48717488a691bf933d2ceee6f
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0120-staging-mt7621-pci-properly-power-off-dual-ported-pc.patch
@@ -0,0 +1,65 @@
+From 5fcded5e857cf66c9592e4be28c4dab4520c9177 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Thu, 9 Apr 2020 13:16:52 +0200
+Subject: [PATCH] staging: mt7621-pci: properly power off dual-ported pcie phy
+
+Pcie phy for pcie0 and pcie1 is shared using a dual ported
+one. Current code was assuming that if nothing is connected
+in pcie0 it won't be also nothing connected in pcie1. This
+assumtion is wrong for some devices such us 'Mikrotik rbm33g'
+and 'ZyXEL LTE3301-PLUS' where only connecting a card to the
+second bus on the phy is possible. For such devices kernel
+hangs in the same point because of the wrong poweroff of the
+phy getting the following trace:
+
+mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
+mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
+mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
+mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
+mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
+[hangs]
+
+The wrong assumption is located in the 'mt7621_pcie_init_ports'
+function where we are just making a power off of the phy for
+slots 0 and 2 if nothing is connected in them. Hence, only
+poweroff the phy if nothing is connected in both slot 0 and
+slot 1 avoiding the kernel to hang.
+
+Fixes: 5737cfe87a9c ("staging: mt7621-pci: avoid to poweroff the phy for slot one")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200409111652.30964-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -502,17 +502,25 @@ static void mt7621_pcie_init_ports(struc
+ 
+ 	mt7621_pcie_reset_ep_deassert(pcie);
+ 
++	tmp = NULL;
+ 	list_for_each_entry(port, &pcie->ports, list) {
+ 		u32 slot = port->slot;
+ 
+ 		if (!mt7621_pcie_port_is_linkup(port)) {
+ 			dev_err(dev, "pcie%d no card, disable it (RST & CLK)\n",
+ 				slot);
+-			if (slot != 1)
+-				phy_power_off(port->phy);
+ 			mt7621_control_assert(port);
+ 			mt7621_pcie_port_clk_disable(port);
+ 			port->enabled = false;
++
++			if (slot == 0) {
++				tmp = port;
++				continue;
++			}
++
++			if (slot == 1 && tmp && !tmp->enabled)
++				phy_power_off(tmp->phy);
++
+ 		}
+ 	}
+ }
diff --git a/iopsys-ramips/patches-5.4/0121-staging-mt7621-pci-fix-PCIe-interrupt-mapping.patch b/iopsys-ramips/patches-5.4/0121-staging-mt7621-pci-fix-PCIe-interrupt-mapping.patch
new file mode 100644
index 0000000000000000000000000000000000000000..68de6df2dbf327c64072fb4d677b1b9c230a52b6
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0121-staging-mt7621-pci-fix-PCIe-interrupt-mapping.patch
@@ -0,0 +1,157 @@
+From fab6710e4c51f4eb622f95a08322ab5fdbe3f295 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Mon, 13 Apr 2020 07:59:42 +0200
+Subject: [PATCH] staging: mt7621-pci: fix PCIe interrupt mapping
+
+MT7621 has three assigned interrupts for the pcie. This
+interrupts should properly being mapped taking into account
+which devices are finally connected in which bus according
+to link status. So the irq mappings should be as follows
+according to link status (three bits indicating which devices
+are link up):
+
+* For PCIe Bus 1 slot 0:
+  - status = 0x2 || status = 0x6 => IRQ = pcie1_irq (24).
+  - status = 0x4 => IRQ = pcie2_irq (25).
+  - default => IRQ = pcie0_irq (23).
+* For PCIe Bus 2 slot 0:
+  - status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
+  - default => IRQ = pcie1_irq (24).
+* For PCIe Bus 2 slot 1:
+  - status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
+  - default => IRQ = pcie1_irq (24).
+* For PCIe Bus 3 any slot:
+  - default => IRQ = pcie2_irq (25).
+
+Because of this, the function 'of_irq_parse_and_map_pci' cannot
+be used and we need to change device tree information from using
+the 'interrupt-map' and 'interrupt-map-mask' properties into an
+'interrupts' property to be able to get irq information from the
+ports using the 'platform_get_irq' and storing an 'irq-map' into
+the pcie driver data node to properly map correct irq using a
+new 'mt7621_map_irq' function where this map will be read and the
+correct irq returned.
+
+Fixes: 46d093124df4 ("staging: mt7621-pci: improve interrupt mapping")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200413055942.2714-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-dts/mt7621.dtsi  |  9 +++----
+ drivers/staging/mt7621-pci/pci-mt7621.c | 36 +++++++++++++++++++++++--
+ 2 files changed, 38 insertions(+), 7 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -97,6 +97,7 @@
+  * @pcie_rst: pointer to port reset control
+  * @gpio_rst: gpio reset
+  * @slot: port slot
++ * @irq: GIC irq
+  * @enabled: indicates if port is enabled
+  */
+ struct mt7621_pcie_port {
+@@ -107,6 +108,7 @@ struct mt7621_pcie_port {
+ 	struct reset_control *pcie_rst;
+ 	struct gpio_desc *gpio_rst;
+ 	u32 slot;
++	int irq;
+ 	bool enabled;
+ };
+ 
+@@ -120,6 +122,7 @@ struct mt7621_pcie_port {
+  * @dev: Pointer to PCIe device
+  * @io_map_base: virtual memory base address for io
+  * @ports: pointer to PCIe port information
++ * @irq_map: irq mapping info according pcie link status
+  * @resets_inverted: depends on chip revision
+  * reset lines are inverted.
+  */
+@@ -135,6 +138,7 @@ struct mt7621_pcie {
+ 	} offset;
+ 	unsigned long io_map_base;
+ 	struct list_head ports;
++	int irq_map[PCIE_P2P_MAX];
+ 	bool resets_inverted;
+ };
+ 
+@@ -279,6 +283,16 @@ static void setup_cm_memory_region(struc
+ 	}
+ }
+ 
++static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
++{
++	struct mt7621_pcie *pcie = pdev->bus->sysdata;
++	struct device *dev = pcie->dev;
++	int irq = pcie->irq_map[slot];
++
++	dev_info(dev, "bus=%d slot=%d irq=%d\n", pdev->bus->number, slot, irq);
++	return irq;
++}
++
+ static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+@@ -330,6 +344,7 @@ static int mt7621_pcie_parse_port(struct
+ {
+ 	struct mt7621_pcie_port *port;
+ 	struct device *dev = pcie->dev;
++	struct platform_device *pdev = to_platform_device(dev);
+ 	struct device_node *pnode = dev->of_node;
+ 	struct resource regs;
+ 	char name[10];
+@@ -371,6 +386,12 @@ static int mt7621_pcie_parse_port(struct
+ 	port->slot = slot;
+ 	port->pcie = pcie;
+ 
++	port->irq = platform_get_irq(pdev, slot);
++	if (port->irq < 0) {
++		dev_err(dev, "Failed to get IRQ for PCIe%d\n", slot);
++		return -ENXIO;
++	}
++
+ 	INIT_LIST_HEAD(&port->list);
+ 	list_add_tail(&port->list, &pcie->ports);
+ 
+@@ -585,13 +606,15 @@ static int mt7621_pcie_init_virtual_brid
+ {
+ 	u32 pcie_link_status = 0;
+ 	u32 n;
+-	int i;
++	int i = 0;
+ 	u32 p2p_br_devnum[PCIE_P2P_MAX];
++	int irqs[PCIE_P2P_MAX];
+ 	struct mt7621_pcie_port *port;
+ 
+ 	list_for_each_entry(port, &pcie->ports, list) {
+ 		u32 slot = port->slot;
+ 
++		irqs[i++] = port->irq;
+ 		if (port->enabled)
+ 			pcie_link_status |= BIT(slot);
+ 	}
+@@ -614,6 +637,15 @@ static int mt7621_pcie_init_virtual_brid
+ 		 (p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) |
+ 		 (p2p_br_devnum[2] << PCIE_P2P_BR_DEVNUM2_SHIFT));
+ 
++	/* Assign IRQs */
++	n = 0;
++	for (i = 0; i < PCIE_P2P_MAX; i++)
++		if (pcie_link_status & BIT(i))
++			pcie->irq_map[n++] = irqs[i];
++
++	for (i = n; i < PCIE_P2P_MAX; i++)
++		pcie->irq_map[i] = -1;
++
+ 	return 0;
+ }
+ 
+@@ -638,7 +670,7 @@ static int mt7621_pcie_register_host(str
+ 	host->busnr = pcie->busn.start;
+ 	host->dev.parent = pcie->dev;
+ 	host->ops = &mt7621_pci_ops;
+-	host->map_irq = of_irq_parse_and_map_pci;
++	host->map_irq = mt7621_map_irq;
+ 	host->swizzle_irq = pci_common_swizzle;
+ 	host->sysdata = pcie;
+ 
diff --git a/iopsys-ramips/patches-5.4/0122-mips-ralink-enable-zboot-support.patch b/iopsys-ramips/patches-5.4/0122-mips-ralink-enable-zboot-support.patch
new file mode 100644
index 0000000000000000000000000000000000000000..76615ed4915fee31c6f23352d05364eadd4df277
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0122-mips-ralink-enable-zboot-support.patch
@@ -0,0 +1,26 @@
+From 1f0400d0e2c410b04f246aefb2e9b5155eb4b0bf Mon Sep 17 00:00:00 2001
+From: Chuanhong Guo <gch981213@gmail.com>
+Date: Tue, 13 Oct 2020 10:05:47 +0800
+Subject: mips: ralink: enable zboot support
+
+Some of these ralink devices come with an ancient u-boot which can't
+extract LZMA properly when image gets too big.
+Enable zboot support to get a self-extracting kernel instead of relying
+on broken u-boot support.
+
+Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ arch/mips/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -625,6 +625,7 @@ config RALINK
+ 	select SYS_SUPPORTS_32BIT_KERNEL
+ 	select SYS_SUPPORTS_LITTLE_ENDIAN
+ 	select SYS_SUPPORTS_MIPS16
++	select SYS_SUPPORTS_ZBOOT
+ 	select SYS_HAS_EARLY_PRINTK
+ 	select CLKDEV_LOOKUP
+ 	select ARCH_HAS_RESET_CONTROLLER
diff --git a/iopsys-ramips/patches-5.4/0123-mips-ralink-manage-low-reset-lines.patch b/iopsys-ramips/patches-5.4/0123-mips-ralink-manage-low-reset-lines.patch
new file mode 100644
index 0000000000000000000000000000000000000000..bdf98f223cbfcb99abcf25d48530a72c598d2ac3
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0123-mips-ralink-manage-low-reset-lines.patch
@@ -0,0 +1,45 @@
+From 3f9ef7785a9cd69cb75f5e2ea4ca79a24752e496 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander@svanheule.net>
+Date: Wed, 3 Feb 2021 10:21:41 +0100
+Subject: MIPS: ralink: manage low reset lines
+
+Reset lines with indices smaller than 8 are currently considered invalid
+by the rt2880-reset reset controller.
+
+The MT7621 SoC uses a number of these low reset lines. The DTS defines
+reset lines "hsdma", "fe", and "mcm" with respective values 5, 6, and 2.
+As a result of the above restriction, these resets cannot be asserted or
+de-asserted by the reset controller. In cases where the bootloader does
+not de-assert these lines, this results in e.g. the MT7621's internal
+switch staying in reset.
+
+Change the reset controller to only ignore the system reset, so all
+reset lines with index greater than 0 are considered valid.
+
+Signed-off-by: Sander Vanheule <sander@svanheule.net>
+Acked-by: John Crispin <john@phrozen.org>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ arch/mips/ralink/reset.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/ralink/reset.c
++++ b/arch/mips/ralink/reset.c
+@@ -27,7 +27,7 @@ static int ralink_assert_device(struct r
+ {
+ 	u32 val;
+ 
+-	if (id < 8)
++	if (id == 0)
+ 		return -1;
+ 
+ 	val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
+@@ -42,7 +42,7 @@ static int ralink_deassert_device(struct
+ {
+ 	u32 val;
+ 
+-	if (id < 8)
++	if (id == 0)
+ 		return -1;
+ 
+ 	val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
diff --git a/iopsys-ramips/patches-4.14/0200-linkit_bootstrap.patch b/iopsys-ramips/patches-5.4/0200-linkit_bootstrap.patch
similarity index 89%
rename from iopsys-ramips/patches-4.14/0200-linkit_bootstrap.patch
rename to iopsys-ramips/patches-5.4/0200-linkit_bootstrap.patch
index 865ae79f43e93d12b1256fd3a94b72e4d43d7a23..9142faaf438d5c9a1efda1704767b51967cbc82a 100644
--- a/iopsys-ramips/patches-4.14/0200-linkit_bootstrap.patch
+++ b/iopsys-ramips/patches-5.4/0200-linkit_bootstrap.patch
@@ -1,13 +1,13 @@
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
-@@ -57,6 +57,7 @@ obj-$(CONFIG_CXL_BASE)		+= cxl/
- obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
- obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
+@@ -52,6 +52,7 @@ obj-$(CONFIG_ECHO)		+= echo/
+ obj-$(CONFIG_VEXPRESS_SYSCFG)	+= vexpress-syscfg.o
+ obj-$(CONFIG_CXL_BASE)		+= cxl/
  obj-$(CONFIG_PCI_ENDPOINT_TEST)	+= pci_endpoint_test.o
 +obj-$(CONFIG_SOC_MT7620)	+= linkit.o
- 
- lkdtm-$(CONFIG_LKDTM)		+= lkdtm_core.o
- lkdtm-$(CONFIG_LKDTM)		+= lkdtm_bugs.o
+ obj-$(CONFIG_OCXL)		+= ocxl/
+ obj-y				+= cardreader/
+ obj-$(CONFIG_PVPANIC)   	+= pvpanic.o
 --- /dev/null
 +++ b/drivers/misc/linkit.c
 @@ -0,0 +1,84 @@
diff --git a/iopsys-ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/iopsys-ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
new file mode 100644
index 0000000000000000000000000000000000000000..ba844fed0f0e752e79c83c9d306082fc30a7b94b
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0300-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
@@ -0,0 +1,1400 @@
+From e84e2430ee0e483842b4ff013ae8a6e7e2fa2734 Mon Sep 17 00:00:00 2001
+From: Weijie Gao <weijie.gao@mediatek.com>
+Date: Wed, 1 Apr 2020 02:07:58 +0800
+Subject: [PATCH 1/2] mtd: rawnand: add driver support for MT7621 nand
+ flash controller
+
+This patch adds NAND flash controller driver for MediaTek MT7621 SoC.
+
+The NAND flash controller is similar with controllers described in
+mtk_nand.c, except that the controller from MT7621 doesn't support DMA
+transmission, and some registers' offset and fields are different.
+
+Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+---
+ drivers/mtd/nand/raw/Kconfig       |    8 +
+ drivers/mtd/nand/raw/Makefile      |    1 +
+ drivers/mtd/nand/raw/mt7621_nand.c | 1348 ++++++++++++++++++++++++++++++++++++
+ 3 files changed, 1357 insertions(+)
+ create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c
+
+--- a/drivers/mtd/nand/raw/Kconfig
++++ b/drivers/mtd/nand/raw/Kconfig
+@@ -391,6 +391,14 @@ config MTD_NAND_QCOM
+ 	  Enables support for NAND flash chips on SoCs containing the EBI2 NAND
+ 	  controller. This controller is found on IPQ806x SoC.
+ 
++config MTD_NAND_MT7621
++	tristate "MT7621 NAND controller"
++	depends on SOC_MT7621 || COMPILE_TEST
++	depends on HAS_IOMEM
++	help
++	  Enables support for NAND controller on MT7621 SoC.
++	  This driver uses PIO mode for data transmission instead of DMA mode.
++
+ config MTD_NAND_MTK
+ 	tristate "MTK NAND controller"
+ 	depends on ARCH_MEDIATEK || COMPILE_TEST
+--- a/drivers/mtd/nand/raw/Makefile
++++ b/drivers/mtd/nand/raw/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI)		+= sunxi_n
+ obj-$(CONFIG_MTD_NAND_HISI504)	        += hisi504_nand.o
+ obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand/
+ obj-$(CONFIG_MTD_NAND_QCOM)		+= qcom_nandc.o
++obj-$(CONFIG_MTD_NAND_MT7621)		+= mt7621_nand.o
+ obj-$(CONFIG_MTD_NAND_MTK)		+= mtk_ecc.o mtk_nand.o
+ obj-$(CONFIG_MTD_NAND_MXIC)		+= mxic_nand.o
+ obj-$(CONFIG_MTD_NAND_TEGRA)		+= tegra_nand.o
+--- /dev/null
++++ b/drivers/mtd/nand/raw/mt7621_nand.c
+@@ -0,0 +1,1350 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * MediaTek MT7621 NAND Flash Controller driver
++ *
++ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
++ *
++ * Author: Weijie Gao <weijie.gao@mediatek.com>
++ */
++
++#include <linux/io.h>
++#include <linux/clk.h>
++#include <linux/init.h>
++#include <linux/errno.h>
++#include <linux/sizes.h>
++#include <linux/iopoll.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/rawnand.h>
++#include <linux/mtd/partitions.h>
++#include <linux/platform_device.h>
++#include <asm/addrspace.h>
++
++/* NFI core registers */
++#define NFI_CNFG			0x000
++#define   CNFG_OP_MODE_S		12
++#define   CNFG_OP_MODE_M		GENMASK(14, 12)
++#define     CNFG_OP_CUSTOM		6
++#define   CNFG_AUTO_FMT_EN		BIT(9)
++#define   CNFG_HW_ECC_EN		BIT(8)
++#define   CNFG_BYTE_RW			BIT(6)
++#define   CNFG_READ_MODE		BIT(1)
++
++#define NFI_PAGEFMT			0x004
++#define   PAGEFMT_FDM_ECC_S		12
++#define   PAGEFMT_FDM_ECC_M		GENMASK(15, 12)
++#define   PAGEFMT_FDM_S			8
++#define   PAGEFMT_FDM_M			GENMASK(11, 8)
++#define   PAGEFMT_SPARE_S		4
++#define   PAGEFMT_SPARE_M		GENMASK(5, 4)
++#define   PAGEFMT_PAGE_S		0
++#define   PAGEFMT_PAGE_M		GENMASK(1, 0)
++
++#define NFI_CON				0x008
++#define   CON_NFI_SEC_S			12
++#define   CON_NFI_SEC_M			GENMASK(15, 12)
++#define   CON_NFI_BWR			BIT(9)
++#define   CON_NFI_BRD			BIT(8)
++#define   CON_NFI_RST			BIT(1)
++#define   CON_FIFO_FLUSH		BIT(0)
++
++#define NFI_ACCCON			0x00c
++#define   ACCCON_POECS_S		28
++#define   ACCCON_POECS_MAX		0x0f
++#define   ACCCON_POECS_DEF		3
++#define   ACCCON_PRECS_S		22
++#define   ACCCON_PRECS_MAX		0x3f
++#define   ACCCON_PRECS_DEF		3
++#define   ACCCON_C2R_S			16
++#define   ACCCON_C2R_MAX		0x3f
++#define   ACCCON_C2R_DEF		7
++#define   ACCCON_W2R_S			12
++#define   ACCCON_W2R_MAX		0x0f
++#define   ACCCON_W2R_DEF		7
++#define   ACCCON_WH_S			8
++#define   ACCCON_WH_MAX			0x0f
++#define   ACCCON_WH_DEF			15
++#define   ACCCON_WST_S			4
++#define   ACCCON_WST_MAX		0x0f
++#define   ACCCON_WST_DEF		15
++#define   ACCCON_WST_MIN		3
++#define   ACCCON_RLT_S			0
++#define   ACCCON_RLT_MAX		0x0f
++#define   ACCCON_RLT_DEF		15
++#define   ACCCON_RLT_MIN		3
++
++#define NFI_CMD				0x020
++
++#define NFI_ADDRNOB			0x030
++#define   ADDR_ROW_NOB_S		4
++#define   ADDR_ROW_NOB_M		GENMASK(6, 4)
++#define   ADDR_COL_NOB_S		0
++#define   ADDR_COL_NOB_M		GENMASK(2, 0)
++
++#define NFI_COLADDR			0x034
++#define NFI_ROWADDR			0x038
++
++#define NFI_STRDATA			0x040
++#define   STR_DATA			BIT(0)
++
++#define NFI_CNRNB			0x044
++#define   CB2R_TIME_S			4
++#define   CB2R_TIME_M			GENMASK(7, 4)
++#define   STR_CNRNB			BIT(0)
++
++#define NFI_DATAW			0x050
++#define NFI_DATAR			0x054
++
++#define NFI_PIO_DIRDY			0x058
++#define   PIO_DIRDY			BIT(0)
++
++#define NFI_STA				0x060
++#define   STA_NFI_FSM_S			16
++#define   STA_NFI_FSM_M			GENMASK(19, 16)
++#define     STA_FSM_CUSTOM_DATA		14
++#define   STA_BUSY			BIT(8)
++#define   STA_ADDR			BIT(1)
++#define   STA_CMD			BIT(0)
++
++#define NFI_ADDRCNTR			0x070
++#define   SEC_CNTR_S			12
++#define   SEC_CNTR_M			GENMASK(15, 12)
++#define   SEC_ADDR_S			0
++#define   SEC_ADDR_M			GENMASK(9, 0)
++
++#define NFI_CSEL			0x090
++#define   CSEL_S			0
++#define   CSEL_M			GENMASK(1, 0)
++
++#define NFI_FDM0L			0x0a0
++#define NFI_FDML(n)			(0x0a0 + ((n) << 3))
++
++#define NFI_FDM0M			0x0a4
++#define NFI_FDMM(n)			(0x0a4 + ((n) << 3))
++
++#define NFI_MASTER_STA			0x210
++#define   MAS_ADDR			GENMASK(11, 9)
++#define   MAS_RD			GENMASK(8, 6)
++#define   MAS_WR			GENMASK(5, 3)
++#define   MAS_RDDLY			GENMASK(2, 0)
++
++/* ECC engine registers */
++#define ECC_ENCCON			0x000
++#define   ENC_EN			BIT(0)
++
++#define ECC_ENCCNFG			0x004
++#define   ENC_CNFG_MSG_S		16
++#define   ENC_CNFG_MSG_M		GENMASK(28, 16)
++#define   ENC_MODE_S			4
++#define   ENC_MODE_M			GENMASK(5, 4)
++#define     ENC_MODE_NFI		1
++#define   ENC_TNUM_S			0
++#define   ENC_TNUM_M			GENMASK(2, 0)
++
++#define ECC_ENCIDLE			0x00c
++#define   ENC_IDLE			BIT(0)
++
++#define ECC_DECCON			0x100
++#define   DEC_EN			BIT(0)
++
++#define ECC_DECCNFG			0x104
++#define   DEC_EMPTY_EN			BIT(31)
++#define   DEC_CS_S			16
++#define   DEC_CS_M			GENMASK(28, 16)
++#define   DEC_CON_S			12
++#define   DEC_CON_M			GENMASK(13, 12)
++#define     DEC_CON_EL			2
++#define   DEC_MODE_S			4
++#define   DEC_MODE_M			GENMASK(5, 4)
++#define     DEC_MODE_NFI		1
++#define   DEC_TNUM_S			0
++#define   DEC_TNUM_M			GENMASK(2, 0)
++
++#define ECC_DECIDLE			0x10c
++#define   DEC_IDLE			BIT(1)
++
++#define ECC_DECENUM			0x114
++#define   ERRNUM_S			2
++#define   ERRNUM_M			GENMASK(3, 0)
++
++#define ECC_DECDONE			0x118
++#define   DEC_DONE7			BIT(7)
++#define   DEC_DONE6			BIT(6)
++#define   DEC_DONE5			BIT(5)
++#define   DEC_DONE4			BIT(4)
++#define   DEC_DONE3			BIT(3)
++#define   DEC_DONE2			BIT(2)
++#define   DEC_DONE1			BIT(1)
++#define   DEC_DONE0			BIT(0)
++
++#define ECC_DECEL(n)			(0x11c + (n) * 4)
++#define   DEC_EL_ODD_S			16
++#define   DEC_EL_EVEN_S			0
++#define   DEC_EL_M			0x1fff
++#define   DEC_EL_BYTE_POS_S		3
++#define   DEC_EL_BIT_POS_M		GENMASK(3, 0)
++
++#define ECC_FDMADDR			0x13c
++
++/* ENCIDLE and DECIDLE */
++#define   ECC_IDLE			BIT(0)
++
++#define ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt) \
++	((tpoecs) << ACCCON_POECS_S | (tprecs) << ACCCON_PRECS_S | \
++	(tc2r) << ACCCON_C2R_S | (tw2r) << ACCCON_W2R_S | \
++	(twh) << ACCCON_WH_S | (twst) << ACCCON_WST_S | (trlt))
++
++#define MASTER_STA_MASK			(MAS_ADDR | MAS_RD | MAS_WR | \
++					 MAS_RDDLY)
++#define NFI_RESET_TIMEOUT		1000000
++#define NFI_CORE_TIMEOUT		500000
++#define ECC_ENGINE_TIMEOUT		500000
++
++#define ECC_SECTOR_SIZE			512
++#define ECC_PARITY_BITS			13
++
++#define NFI_FDM_SIZE		8
++
++#define MT7621_NFC_NAME			"mt7621-nand"
++
++struct mt7621_nfc {
++	struct nand_controller controller;
++	struct nand_chip nand;
++	struct clk *nfi_clk;
++	struct device *dev;
++
++	void __iomem *nfi_regs;
++	void __iomem *ecc_regs;
++
++	u32 spare_per_sector;
++};
++
++static const u16 mt7621_nfi_page_size[] = { SZ_512, SZ_2K, SZ_4K };
++static const u8 mt7621_nfi_spare_size[] = { 16, 26, 27, 28 };
++static const u8 mt7621_ecc_strength[] = { 4, 6, 8, 10, 12 };
++
++static inline u32 nfi_read32(struct mt7621_nfc *nfc, u32 reg)
++{
++	return readl(nfc->nfi_regs + reg);
++}
++
++static inline void nfi_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
++{
++	writel(val, nfc->nfi_regs + reg);
++}
++
++static inline u16 nfi_read16(struct mt7621_nfc *nfc, u32 reg)
++{
++	return readw(nfc->nfi_regs + reg);
++}
++
++static inline void nfi_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
++{
++	writew(val, nfc->nfi_regs + reg);
++}
++
++static inline void ecc_write16(struct mt7621_nfc *nfc, u32 reg, u16 val)
++{
++	writew(val, nfc->ecc_regs + reg);
++}
++
++static inline u32 ecc_read32(struct mt7621_nfc *nfc, u32 reg)
++{
++	return readl(nfc->ecc_regs + reg);
++}
++
++static inline void ecc_write32(struct mt7621_nfc *nfc, u32 reg, u32 val)
++{
++	return writel(val, nfc->ecc_regs + reg);
++}
++
++static inline u8 *oob_fdm_ptr(struct nand_chip *nand, int sect)
++{
++	return nand->oob_poi + sect * NFI_FDM_SIZE;
++}
++
++static inline u8 *oob_ecc_ptr(struct mt7621_nfc *nfc, int sect)
++{
++	struct nand_chip *nand = &nfc->nand;
++
++	return nand->oob_poi + nand->ecc.steps * NFI_FDM_SIZE +
++		sect * (nfc->spare_per_sector - NFI_FDM_SIZE);
++}
++
++static inline u8 *page_data_ptr(struct nand_chip *nand, const u8 *buf,
++				int sect)
++{
++	return (u8 *)buf + sect * nand->ecc.size;
++}
++
++static int mt7621_ecc_wait_idle(struct mt7621_nfc *nfc, u32 reg)
++{
++	struct device *dev = nfc->dev;
++	u32 val;
++	int ret;
++
++	ret = readw_poll_timeout_atomic(nfc->ecc_regs + reg, val,
++					val & ECC_IDLE, 10,
++					ECC_ENGINE_TIMEOUT);
++	if (ret) {
++		dev_warn(dev, "ECC engine timed out entering idle mode\n");
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int mt7621_ecc_decoder_wait_done(struct mt7621_nfc *nfc, u32 sect)
++{
++	struct device *dev = nfc->dev;
++	u32 val;
++	int ret;
++
++	ret = readw_poll_timeout_atomic(nfc->ecc_regs + ECC_DECDONE, val,
++					val & (1 << sect), 10,
++					ECC_ENGINE_TIMEOUT);
++
++	if (ret) {
++		dev_warn(dev, "ECC decoder for sector %d timed out\n",
++			 sect);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static void mt7621_ecc_encoder_op(struct mt7621_nfc *nfc, bool enable)
++{
++	mt7621_ecc_wait_idle(nfc, ECC_ENCIDLE);
++	ecc_write16(nfc, ECC_ENCCON, enable ? ENC_EN : 0);
++}
++
++static void mt7621_ecc_decoder_op(struct mt7621_nfc *nfc, bool enable)
++{
++	mt7621_ecc_wait_idle(nfc, ECC_DECIDLE);
++	ecc_write16(nfc, ECC_DECCON, enable ? DEC_EN : 0);
++}
++
++static int mt7621_ecc_correct_check(struct mt7621_nfc *nfc, u8 *sector_buf,
++				   u8 *fdm_buf, u32 sect)
++{
++	struct nand_chip *nand = &nfc->nand;
++	u32 decnum, num_error_bits, fdm_end_bits;
++	u32 error_locations, error_bit_loc;
++	u32 error_byte_pos, error_bit_pos;
++	int bitflips = 0;
++	u32 i;
++
++	decnum = ecc_read32(nfc, ECC_DECENUM);
++	num_error_bits = (decnum >> (sect << ERRNUM_S)) & ERRNUM_M;
++	fdm_end_bits = (nand->ecc.size + NFI_FDM_SIZE) << 3;
++
++	if (!num_error_bits)
++		return 0;
++
++	if (num_error_bits == ERRNUM_M)
++		return -1;
++
++	for (i = 0; i < num_error_bits; i++) {
++		error_locations = ecc_read32(nfc, ECC_DECEL(i / 2));
++		error_bit_loc = (error_locations >> ((i % 2) * DEC_EL_ODD_S)) &
++				DEC_EL_M;
++		error_byte_pos = error_bit_loc >> DEC_EL_BYTE_POS_S;
++		error_bit_pos = error_bit_loc & DEC_EL_BIT_POS_M;
++
++		if (error_bit_loc < (nand->ecc.size << 3)) {
++			if (sector_buf) {
++				sector_buf[error_byte_pos] ^=
++					(1 << error_bit_pos);
++			}
++		} else if (error_bit_loc < fdm_end_bits) {
++			if (fdm_buf) {
++				fdm_buf[error_byte_pos - nand->ecc.size] ^=
++					(1 << error_bit_pos);
++			}
++		}
++
++		bitflips++;
++	}
++
++	return bitflips;
++}
++
++static int mt7621_nfc_wait_write_completion(struct mt7621_nfc *nfc,
++					    struct nand_chip *nand)
++{
++	struct device *dev = nfc->dev;
++	u16 val;
++	int ret;
++
++	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_ADDRCNTR, val,
++		((val & SEC_CNTR_M) >> SEC_CNTR_S) >= nand->ecc.steps, 10,
++		NFI_CORE_TIMEOUT);
++
++	if (ret) {
++		dev_warn(dev, "NFI core write operation timed out\n");
++		return -ETIMEDOUT;
++	}
++
++	return ret;
++}
++
++static void mt7621_nfc_hw_reset(struct mt7621_nfc *nfc)
++{
++	u32 val;
++	int ret;
++
++	/* reset all registers and force the NFI master to terminate */
++	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
++
++	/* wait for the master to finish the last transaction */
++	ret = readw_poll_timeout(nfc->nfi_regs + NFI_MASTER_STA, val,
++				 !(val & MASTER_STA_MASK), 50,
++				 NFI_RESET_TIMEOUT);
++	if (ret) {
++		dev_warn(nfc->dev, "Failed to reset NFI master in %dms\n",
++			 NFI_RESET_TIMEOUT);
++	}
++
++	/* ensure any status register affected by the NFI master is reset */
++	nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST);
++	nfi_write16(nfc, NFI_STRDATA, 0);
++}
++
++static inline void mt7621_nfc_hw_init(struct mt7621_nfc *nfc)
++{
++	u32 acccon;
++
++	/*
++	 * CNRNB: nand ready/busy register
++	 * -------------------------------
++	 * 7:4: timeout register for polling the NAND busy/ready signal
++	 * 0  : poll the status of the busy/ready signal after [7:4]*16 cycles.
++	 */
++	nfi_write16(nfc, NFI_CNRNB, CB2R_TIME_M | STR_CNRNB);
++
++	mt7621_nfc_hw_reset(nfc);
++
++	/* Apply default access timing */
++	acccon = ACCTIMING(ACCCON_POECS_DEF, ACCCON_PRECS_DEF, ACCCON_C2R_DEF,
++			   ACCCON_W2R_DEF, ACCCON_WH_DEF, ACCCON_WST_DEF,
++			   ACCCON_RLT_DEF);
++
++	nfi_write32(nfc, NFI_ACCCON, acccon);
++}
++
++static int mt7621_nfc_send_command(struct mt7621_nfc *nfc, u8 command)
++{
++	struct device *dev = nfc->dev;
++	u32 val;
++	int ret;
++
++	nfi_write32(nfc, NFI_CMD, command);
++
++	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
++					!(val & STA_CMD), 10,
++					NFI_CORE_TIMEOUT);
++	if (ret) {
++		dev_warn(dev, "NFI core timed out entering command mode\n");
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int mt7621_nfc_send_address_byte(struct mt7621_nfc *nfc, int addr)
++{
++	struct device *dev = nfc->dev;
++	u32 val;
++	int ret;
++
++	nfi_write32(nfc, NFI_COLADDR, addr);
++	nfi_write32(nfc, NFI_ROWADDR, 0);
++	nfi_write16(nfc, NFI_ADDRNOB, 1);
++
++	ret = readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
++					!(val & STA_ADDR), 10,
++					NFI_CORE_TIMEOUT);
++	if (ret) {
++		dev_warn(dev, "NFI core timed out entering address mode\n");
++		return -EIO;
++	}
++
++	return 0;
++}
++
++static int mt7621_nfc_send_address(struct mt7621_nfc *nfc, const u8 *addr,
++				   unsigned int naddrs)
++{
++	int ret;
++
++	while (naddrs) {
++		ret = mt7621_nfc_send_address_byte(nfc, *addr);
++		if (ret)
++			return ret;
++
++		addr++;
++		naddrs--;
++	}
++
++	return 0;
++}
++
++static void mt7621_nfc_wait_pio_ready(struct mt7621_nfc *nfc)
++{
++	struct device *dev = nfc->dev;
++	int ret;
++	u16 val;
++
++	ret = readw_poll_timeout_atomic(nfc->nfi_regs + NFI_PIO_DIRDY, val,
++					val & PIO_DIRDY, 10,
++					NFI_CORE_TIMEOUT);
++	if (ret < 0)
++		dev_err(dev, "NFI core PIO mode not ready\n");
++}
++
++static u32 mt7621_nfc_pio_read(struct mt7621_nfc *nfc, bool br)
++{
++	u32 reg;
++
++	/* after each byte read, the NFI_STA reg is reset by the hardware */
++	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
++	if (reg != STA_FSM_CUSTOM_DATA) {
++		reg = nfi_read16(nfc, NFI_CNFG);
++		reg |= CNFG_READ_MODE | CNFG_BYTE_RW;
++		if (!br)
++			reg &= ~CNFG_BYTE_RW;
++		nfi_write16(nfc, NFI_CNFG, reg);
++
++		/*
++		 * set to max sector to allow the HW to continue reading over
++		 * unaligned accesses
++		 */
++		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BRD);
++
++		/* trigger to fetch data */
++		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
++	}
++
++	mt7621_nfc_wait_pio_ready(nfc);
++
++	return nfi_read32(nfc, NFI_DATAR);
++}
++
++static void mt7621_nfc_read_data(struct mt7621_nfc *nfc, u8 *buf, u32 len)
++{
++	while (((uintptr_t)buf & 3) && len) {
++		*buf = mt7621_nfc_pio_read(nfc, true);
++		buf++;
++		len--;
++	}
++
++	while (len >= 4) {
++		*(u32 *)buf = mt7621_nfc_pio_read(nfc, false);
++		buf += 4;
++		len -= 4;
++	}
++
++	while (len) {
++		*buf = mt7621_nfc_pio_read(nfc, true);
++		buf++;
++		len--;
++	}
++}
++
++static void mt7621_nfc_read_data_discard(struct mt7621_nfc *nfc, u32 len)
++{
++	while (len >= 4) {
++		mt7621_nfc_pio_read(nfc, false);
++		len -= 4;
++	}
++
++	while (len) {
++		mt7621_nfc_pio_read(nfc, true);
++		len--;
++	}
++}
++
++static void mt7621_nfc_pio_write(struct mt7621_nfc *nfc, u32 val, bool bw)
++{
++	u32 reg;
++
++	reg = (nfi_read32(nfc, NFI_STA) & STA_NFI_FSM_M) >> STA_NFI_FSM_S;
++	if (reg != STA_FSM_CUSTOM_DATA) {
++		reg = nfi_read16(nfc, NFI_CNFG);
++		reg &= ~(CNFG_READ_MODE | CNFG_BYTE_RW);
++		if (bw)
++			reg |= CNFG_BYTE_RW;
++		nfi_write16(nfc, NFI_CNFG, reg);
++
++		nfi_write16(nfc, NFI_CON, CON_NFI_SEC_M | CON_NFI_BWR);
++		nfi_write16(nfc, NFI_STRDATA, STR_DATA);
++	}
++
++	mt7621_nfc_wait_pio_ready(nfc);
++	nfi_write32(nfc, NFI_DATAW, val);
++}
++
++static void mt7621_nfc_write_data(struct mt7621_nfc *nfc, const u8 *buf,
++				  u32 len)
++{
++	while (((uintptr_t)buf & 3) && len) {
++		mt7621_nfc_pio_write(nfc, *buf, true);
++		buf++;
++		len--;
++	}
++
++	while (len >= 4) {
++		mt7621_nfc_pio_write(nfc, *(const u32 *)buf, false);
++		buf += 4;
++		len -= 4;
++	}
++
++	while (len) {
++		mt7621_nfc_pio_write(nfc, *buf, true);
++		buf++;
++		len--;
++	}
++}
++
++static void mt7621_nfc_write_data_empty(struct mt7621_nfc *nfc, u32 len)
++{
++	while (len >= 4) {
++		mt7621_nfc_pio_write(nfc, 0xffffffff, false);
++		len -= 4;
++	}
++
++	while (len) {
++		mt7621_nfc_pio_write(nfc, 0xff, true);
++		len--;
++	}
++}
++
++static int mt7621_nfc_dev_ready(struct mt7621_nfc *nfc,
++				unsigned int timeout_ms)
++{
++	u32 val;
++
++	return readl_poll_timeout_atomic(nfc->nfi_regs + NFI_STA, val,
++					 !(val & STA_BUSY), 10,
++					 timeout_ms * 1000);
++}
++
++static int mt7621_nfc_exec_instr(struct nand_chip *nand,
++				 const struct nand_op_instr *instr)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++
++	switch (instr->type) {
++	case NAND_OP_CMD_INSTR:
++		mt7621_nfc_hw_reset(nfc);
++		nfi_write16(nfc, NFI_CNFG, CNFG_OP_CUSTOM << CNFG_OP_MODE_S);
++		return mt7621_nfc_send_command(nfc, instr->ctx.cmd.opcode);
++	case NAND_OP_ADDR_INSTR:
++		return mt7621_nfc_send_address(nfc, instr->ctx.addr.addrs,
++					       instr->ctx.addr.naddrs);
++	case NAND_OP_DATA_IN_INSTR:
++		mt7621_nfc_read_data(nfc, instr->ctx.data.buf.in,
++				     instr->ctx.data.len);
++		return 0;
++	case NAND_OP_DATA_OUT_INSTR:
++		mt7621_nfc_write_data(nfc, instr->ctx.data.buf.out,
++				      instr->ctx.data.len);
++		return 0;
++	case NAND_OP_WAITRDY_INSTR:
++		return mt7621_nfc_dev_ready(nfc,
++					    instr->ctx.waitrdy.timeout_ms);
++	default:
++		WARN_ONCE(1, "unsupported NAND instruction type: %d\n",
++			  instr->type);
++
++		return -EINVAL;
++	}
++}
++
++static int mt7621_nfc_exec_op(struct nand_chip *nand,
++			      const struct nand_operation *op, bool check_only)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	int i, ret;
++
++	if (check_only)
++		return 0;
++
++	/* Only CS0 available */
++	nfi_write16(nfc, NFI_CSEL, 0);
++
++	for (i = 0; i < op->ninstrs; i++) {
++		ret = mt7621_nfc_exec_instr(nand, &op->instrs[i]);
++		if (ret)
++			return ret;
++	}
++
++	return 0;
++}
++
++static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
++					   const struct nand_data_interface *conf)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	const struct nand_sdr_timings *timings;
++	u32 acccon, temp, rate, tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt;
++
++	if (!nfc->nfi_clk)
++		return -ENOTSUPP;
++
++	timings = nand_get_sdr_timings(conf);
++	if (IS_ERR(timings))
++		return -ENOTSUPP;
++
++	rate = clk_get_rate(nfc->nfi_clk);
++
++	/* turn clock rate into KHZ */
++	rate /= 1000;
++
++	tpoecs = max(timings->tALH_min, timings->tCLH_min) / 1000;
++	tpoecs = DIV_ROUND_UP(tpoecs * rate, 1000000);
++	tpoecs = min_t(u32, tpoecs, ACCCON_POECS_MAX);
++
++	tprecs = max(timings->tCLS_min, timings->tALS_min) / 1000;
++	tprecs = DIV_ROUND_UP(tprecs * rate, 1000000);
++	tprecs = min_t(u32, tprecs, ACCCON_PRECS_MAX);
++
++	/* sdr interface has no tCR which means CE# low to RE# low */
++	tc2r = 0;
++
++	tw2r = timings->tWHR_min / 1000;
++	tw2r = DIV_ROUND_UP(tw2r * rate, 1000000);
++	tw2r = DIV_ROUND_UP(tw2r - 1, 2);
++	tw2r = min_t(u32, tw2r, ACCCON_W2R_MAX);
++
++	twh = max(timings->tREH_min, timings->tWH_min) / 1000;
++	twh = DIV_ROUND_UP(twh * rate, 1000000) - 1;
++	twh = min_t(u32, twh, ACCCON_WH_MAX);
++
++	/* Calculate real WE#/RE# hold time in nanosecond */
++	temp = (twh + 1) * 1000000 / rate;
++	/* nanosecond to picosecond */
++	temp *= 1000;
++
++	/*
++	 * WE# low level time should be expaned to meet WE# pulse time
++	 * and WE# cycle time at the same time.
++	 */
++	if (temp < timings->tWC_min)
++		twst = timings->tWC_min - temp;
++	else
++		twst = 0;
++	twst = max(timings->tWP_min, twst) / 1000;
++	twst = DIV_ROUND_UP(twst * rate, 1000000) - 1;
++	twst = min_t(u32, twst, ACCCON_WST_MAX);
++
++	/*
++	 * RE# low level time should be expaned to meet RE# pulse time
++	 * and RE# cycle time at the same time.
++	 */
++	if (temp < timings->tRC_min)
++		trlt = timings->tRC_min - temp;
++	else
++		trlt = 0;
++	trlt = max(trlt, timings->tRP_min) / 1000;
++	trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1;
++	trlt = min_t(u32, trlt, ACCCON_RLT_MAX);
++
++	if (csline == NAND_DATA_IFACE_CHECK_ONLY) {
++		if (twst < ACCCON_WST_MIN || trlt < ACCCON_RLT_MIN)
++			return -ENOTSUPP;
++	}
++
++	acccon = ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt);
++
++	dev_info(nfc->dev, "Using programmed access timing: %08x\n", acccon);
++
++	nfi_write32(nfc, NFI_ACCCON, acccon);
++
++	return 0;
++}
++
++static int mt7621_nfc_calc_ecc_strength(struct mt7621_nfc *nfc,
++					u32 avail_ecc_bytes)
++{
++	struct nand_chip *nand = &nfc->nand;
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	u32 strength;
++	int i;
++
++	strength = avail_ecc_bytes * 8 / ECC_PARITY_BITS;
++
++	/* Find the closest supported ecc strength */
++	for (i = ARRAY_SIZE(mt7621_ecc_strength) - 1; i >= 0; i--) {
++		if (mt7621_ecc_strength[i] <= strength)
++			break;
++	}
++
++	if (unlikely(i < 0)) {
++		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
++			mtd->oobsize);
++		return -EINVAL;
++	}
++
++	nand->ecc.strength = mt7621_ecc_strength[i];
++	nand->ecc.bytes =
++		DIV_ROUND_UP(nand->ecc.strength * ECC_PARITY_BITS, 8);
++
++	dev_info(nfc->dev, "ECC strength adjusted to %u bits\n",
++		 nand->ecc.strength);
++
++	return i;
++}
++
++static int mt7621_nfc_set_spare_per_sector(struct mt7621_nfc *nfc)
++{
++	struct nand_chip *nand = &nfc->nand;
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	u32 size;
++	int i;
++
++	size = nand->ecc.bytes + NFI_FDM_SIZE;
++
++	/* Find the closest supported spare size */
++	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_spare_size); i++) {
++		if (mt7621_nfi_spare_size[i] >= size)
++			break;
++	}
++
++	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_spare_size))) {
++		dev_err(nfc->dev, "OOB size (%u) is not supported\n",
++			mtd->oobsize);
++		return -EINVAL;
++	}
++
++	nfc->spare_per_sector = mt7621_nfi_spare_size[i];
++
++	return i;
++}
++
++static int mt7621_nfc_ecc_init(struct mt7621_nfc *nfc)
++{
++	struct nand_chip *nand = &nfc->nand;
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	u32 spare_per_sector, encode_block_size, decode_block_size;
++	u32 ecc_enccfg, ecc_deccfg;
++	int ecc_cap;
++
++	/* Only hardware ECC mode is supported */
++	if (nand->ecc.mode != NAND_ECC_HW_SYNDROME) {
++		dev_err(nfc->dev, "Only hardware ECC mode is supported\n");
++		return -EINVAL;
++	}
++
++	nand->ecc.size = ECC_SECTOR_SIZE;
++	nand->ecc.steps = mtd->writesize / nand->ecc.size;
++
++	spare_per_sector = mtd->oobsize / nand->ecc.steps;
++
++	ecc_cap = mt7621_nfc_calc_ecc_strength(nfc,
++		spare_per_sector - NFI_FDM_SIZE);
++	if (ecc_cap < 0)
++		return ecc_cap;
++
++	/* Sector + FDM */
++	encode_block_size = (nand->ecc.size + NFI_FDM_SIZE) * 8;
++	ecc_enccfg = ecc_cap | (ENC_MODE_NFI << ENC_MODE_S) |
++		     (encode_block_size << ENC_CNFG_MSG_S);
++
++	/* Sector + FDM + ECC parity bits */
++	decode_block_size = ((nand->ecc.size + NFI_FDM_SIZE) * 8) +
++			    nand->ecc.strength * ECC_PARITY_BITS;
++	ecc_deccfg = ecc_cap | (DEC_MODE_NFI << DEC_MODE_S) |
++		     (decode_block_size << DEC_CS_S) |
++		     (DEC_CON_EL << DEC_CON_S) | DEC_EMPTY_EN;
++
++	mt7621_ecc_encoder_op(nfc, false);
++	ecc_write32(nfc, ECC_ENCCNFG, ecc_enccfg);
++
++	mt7621_ecc_decoder_op(nfc, false);
++	ecc_write32(nfc, ECC_DECCNFG, ecc_deccfg);
++
++	return 0;
++}
++
++static int mt7621_nfc_set_page_format(struct mt7621_nfc *nfc)
++{
++	struct nand_chip *nand = &nfc->nand;
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	int i, spare_size;
++	u32 pagefmt;
++
++	spare_size = mt7621_nfc_set_spare_per_sector(nfc);
++	if (spare_size < 0)
++		return spare_size;
++
++	for (i = 0; i < ARRAY_SIZE(mt7621_nfi_page_size); i++) {
++		if (mt7621_nfi_page_size[i] == mtd->writesize)
++			break;
++	}
++
++	if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_page_size))) {
++		dev_err(nfc->dev, "Page size (%u) is not supported\n",
++			mtd->writesize);
++		return -EINVAL;
++	}
++
++	pagefmt = i | (spare_size << PAGEFMT_SPARE_S) |
++		  (NFI_FDM_SIZE << PAGEFMT_FDM_S) |
++		  (NFI_FDM_SIZE << PAGEFMT_FDM_ECC_S);
++
++	nfi_write16(nfc, NFI_PAGEFMT, pagefmt);
++
++	return 0;
++}
++
++static int mt7621_nfc_attach_chip(struct nand_chip *nand)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	int ret;
++
++	if (nand->options & NAND_BUSWIDTH_16) {
++		dev_err(nfc->dev, "16-bit buswidth is not supported");
++		return -EINVAL;
++	}
++
++	ret = mt7621_nfc_ecc_init(nfc);
++	if (ret)
++		return ret;
++
++	return mt7621_nfc_set_page_format(nfc);
++}
++
++static const struct nand_controller_ops mt7621_nfc_controller_ops = {
++	.attach_chip = mt7621_nfc_attach_chip,
++	.exec_op = mt7621_nfc_exec_op,
++	.setup_data_interface = mt7621_nfc_setup_data_interface,
++};
++
++static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section,
++				     struct mtd_oob_region *oob_region)
++{
++	struct nand_chip *nand = mtd_to_nand(mtd);
++
++	if (section >= nand->ecc.steps)
++		return -ERANGE;
++
++	oob_region->length = NFI_FDM_SIZE - 1;
++	oob_region->offset = section * NFI_FDM_SIZE + 1;
++
++	return 0;
++}
++
++static int mt7621_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
++				    struct mtd_oob_region *oob_region)
++{
++	struct nand_chip *nand = mtd_to_nand(mtd);
++
++	if (section)
++		return -ERANGE;
++
++	oob_region->offset = NFI_FDM_SIZE * nand->ecc.steps;
++	oob_region->length = mtd->oobsize - oob_region->offset;
++
++	return 0;
++}
++
++static const struct mtd_ooblayout_ops mt7621_nfc_ooblayout_ops = {
++	.free = mt7621_nfc_ooblayout_free,
++	.ecc = mt7621_nfc_ooblayout_ecc,
++};
++
++static void mt7621_nfc_write_fdm(struct mt7621_nfc *nfc)
++{
++	struct nand_chip *nand = &nfc->nand;
++	u32 vall, valm;
++	u8 *oobptr;
++	int i, j;
++
++	for (i = 0; i < nand->ecc.steps; i++) {
++		vall = 0;
++		valm = 0;
++		oobptr = oob_fdm_ptr(nand, i);
++
++		for (j = 0; j < 4; j++)
++			vall |= (u32)oobptr[j] << (j * 8);
++
++		for (j = 0; j < 4; j++)
++			valm |= (u32)oobptr[j + 4] << ((j - 4) * 8);
++
++		nfi_write32(nfc, NFI_FDML(i), vall);
++		nfi_write32(nfc, NFI_FDMM(i), valm);
++	}
++}
++
++static void mt7621_nfc_read_sector_fdm(struct mt7621_nfc *nfc, u32 sect)
++{
++	struct nand_chip *nand = &nfc->nand;
++	u32 vall, valm;
++	u8 *oobptr;
++	int i;
++
++	vall = nfi_read32(nfc, NFI_FDML(sect));
++	valm = nfi_read32(nfc, NFI_FDMM(sect));
++	oobptr = oob_fdm_ptr(nand, sect);
++
++	for (i = 0; i < 4; i++)
++		oobptr[i] = (vall >> (i * 8)) & 0xff;
++
++	for (i = 0; i < 4; i++)
++		oobptr[i + 4] = (valm >> (i * 8)) & 0xff;
++}
++
++static int mt7621_nfc_read_page_hwecc(struct nand_chip *nand, uint8_t *buf,
++				      int oob_required, int page)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	int bitflips = 0;
++	int rc, i;
++
++	nand_read_page_op(nand, page, 0, NULL, 0);
++
++	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
++		    CNFG_READ_MODE | CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
++
++	mt7621_ecc_decoder_op(nfc, true);
++
++	nfi_write16(nfc, NFI_CON,
++		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
++
++	for (i = 0; i < nand->ecc.steps; i++) {
++		if (buf)
++			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
++					     nand->ecc.size);
++		else
++			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
++
++		rc = mt7621_ecc_decoder_wait_done(nfc, i);
++
++		mt7621_nfc_read_sector_fdm(nfc, i);
++
++		if (rc < 0) {
++			bitflips = -EIO;
++			continue;
++		}
++
++		rc = mt7621_ecc_correct_check(nfc,
++			buf ? page_data_ptr(nand, buf, i) : NULL,
++			oob_fdm_ptr(nand, i), i);
++
++		if (rc < 0) {
++			dev_warn(nfc->dev,
++				 "Uncorrectable ECC error at page %d.%d\n",
++				 page, i);
++			bitflips = -EBADMSG;
++			mtd->ecc_stats.failed++;
++		} else if (bitflips >= 0) {
++			bitflips += rc;
++			mtd->ecc_stats.corrected += rc;
++		}
++	}
++
++	mt7621_ecc_decoder_op(nfc, false);
++
++	nfi_write16(nfc, NFI_CON, 0);
++
++	return bitflips;
++}
++
++static int mt7621_nfc_read_page_raw(struct nand_chip *nand, uint8_t *buf,
++				    int oob_required, int page)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	int i;
++
++	nand_read_page_op(nand, page, 0, NULL, 0);
++
++	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
++		    CNFG_READ_MODE);
++
++	nfi_write16(nfc, NFI_CON,
++		    CON_NFI_BRD | (nand->ecc.steps << CON_NFI_SEC_S));
++
++	for (i = 0; i < nand->ecc.steps; i++) {
++		/* Read data */
++		if (buf)
++			mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i),
++					     nand->ecc.size);
++		else
++			mt7621_nfc_read_data_discard(nfc, nand->ecc.size);
++
++		/* Read FDM */
++		mt7621_nfc_read_data(nfc, oob_fdm_ptr(nand, i), NFI_FDM_SIZE);
++
++		/* Read ECC parity data */
++		mt7621_nfc_read_data(nfc, oob_ecc_ptr(nfc, i),
++				     nfc->spare_per_sector - NFI_FDM_SIZE);
++	}
++
++	nfi_write16(nfc, NFI_CON, 0);
++
++	return 0;
++}
++
++static int mt7621_nfc_read_oob_hwecc(struct nand_chip *nand, int page)
++{
++	return mt7621_nfc_read_page_hwecc(nand, NULL, 1, page);
++}
++
++static int mt7621_nfc_read_oob_raw(struct nand_chip *nand, int page)
++{
++	return mt7621_nfc_read_page_raw(nand, NULL, 1, page);
++}
++
++static int mt7621_nfc_check_empty_page(struct nand_chip *nand, const u8 *buf)
++{
++	struct mtd_info *mtd = nand_to_mtd(nand);
++	uint32_t i, j;
++	u8 *oobptr;
++
++	if (buf) {
++		for (i = 0; i < mtd->writesize; i++)
++			if (buf[i] != 0xff)
++				return 0;
++	}
++
++	for (i = 0; i < nand->ecc.steps; i++) {
++		oobptr = oob_fdm_ptr(nand, i);
++		for (j = 0; j < NFI_FDM_SIZE; j++)
++			if (oobptr[j] != 0xff)
++				return 0;
++	}
++
++	return 1;
++}
++
++static int mt7621_nfc_write_page_hwecc(struct nand_chip *nand,
++				       const uint8_t *buf, int oob_required,
++				       int page)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	struct mtd_info *mtd = nand_to_mtd(nand);
++
++	if (mt7621_nfc_check_empty_page(nand, buf)) {
++		/*
++		 * MT7621 ECC engine always generates parity code for input
++		 * pages, even for empty pages. Doing so will write back ECC
++		 * parity code to the oob region, which means such pages will
++		 * no longer be empty pages.
++		 *
++		 * To avoid this, stop write operation if current page is an
++		 * empty page.
++		 */
++		return 0;
++	}
++
++	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
++
++	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S) |
++		   CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN);
++
++	mt7621_ecc_encoder_op(nfc, true);
++
++	mt7621_nfc_write_fdm(nfc);
++
++	nfi_write16(nfc, NFI_CON,
++		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
++
++	if (buf)
++		mt7621_nfc_write_data(nfc, buf, mtd->writesize);
++	else
++		mt7621_nfc_write_data_empty(nfc, mtd->writesize);
++
++	mt7621_nfc_wait_write_completion(nfc, nand);
++
++	mt7621_ecc_encoder_op(nfc, false);
++
++	nfi_write16(nfc, NFI_CON, 0);
++
++	return nand_prog_page_end_op(nand);
++}
++
++static int mt7621_nfc_write_page_raw(struct nand_chip *nand,
++				     const uint8_t *buf, int oob_required,
++				     int page)
++{
++	struct mt7621_nfc *nfc = nand_get_controller_data(nand);
++	int i;
++
++	nand_prog_page_begin_op(nand, page, 0, NULL, 0);
++
++	nfi_write16(nfc, NFI_CNFG, (CNFG_OP_CUSTOM << CNFG_OP_MODE_S));
++
++	nfi_write16(nfc, NFI_CON,
++		    CON_NFI_BWR | (nand->ecc.steps << CON_NFI_SEC_S));
++
++	for (i = 0; i < nand->ecc.steps; i++) {
++		/* Write data */
++		if (buf)
++			mt7621_nfc_write_data(nfc, page_data_ptr(nand, buf, i),
++					      nand->ecc.size);
++		else
++			mt7621_nfc_write_data_empty(nfc, nand->ecc.size);
++
++		/* Write FDM */
++		mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
++				      NFI_FDM_SIZE);
++
++		/* Write dummy ECC parity data */
++		mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
++					    NFI_FDM_SIZE);
++	}
++
++	mt7621_nfc_wait_write_completion(nfc, nand);
++
++	nfi_write16(nfc, NFI_CON, 0);
++
++	return nand_prog_page_end_op(nand);
++}
++
++static int mt7621_nfc_write_oob_hwecc(struct nand_chip *nand, int page)
++{
++	return mt7621_nfc_write_page_hwecc(nand, NULL, 1, page);
++}
++
++static int mt7621_nfc_write_oob_raw(struct nand_chip *nand, int page)
++{
++	return mt7621_nfc_write_page_raw(nand, NULL, 1, page);
++}
++
++static int mt7621_nfc_init_chip(struct mt7621_nfc *nfc)
++{
++	struct nand_chip *nand = &nfc->nand;
++	struct mtd_info *mtd;
++	int ret;
++
++	nand->controller = &nfc->controller;
++	nand_set_controller_data(nand, (void *)nfc);
++	nand_set_flash_node(nand, nfc->dev->of_node);
++
++	nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
++	if (!nfc->nfi_clk)
++		nand->options |= NAND_KEEP_TIMINGS;
++
++	nand->ecc.mode = NAND_ECC_HW_SYNDROME;
++	nand->ecc.read_page = mt7621_nfc_read_page_hwecc;
++	nand->ecc.read_page_raw = mt7621_nfc_read_page_raw;
++	nand->ecc.write_page = mt7621_nfc_write_page_hwecc;
++	nand->ecc.write_page_raw = mt7621_nfc_write_page_raw;
++	nand->ecc.read_oob = mt7621_nfc_read_oob_hwecc;
++	nand->ecc.read_oob_raw = mt7621_nfc_read_oob_raw;
++	nand->ecc.write_oob = mt7621_nfc_write_oob_hwecc;
++	nand->ecc.write_oob_raw = mt7621_nfc_write_oob_raw;
++
++	mtd = nand_to_mtd(nand);
++	mtd->owner = THIS_MODULE;
++	mtd->dev.parent = nfc->dev;
++	mtd->name = MT7621_NFC_NAME;
++	mtd_set_ooblayout(mtd, &mt7621_nfc_ooblayout_ops);
++
++	mt7621_nfc_hw_init(nfc);
++
++	ret = nand_scan(nand, 1);
++	if (ret)
++		return ret;
++
++	ret = mtd_device_register(mtd, NULL, 0);
++	if (ret) {
++		dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
++		nand_release(nand);
++		return ret;
++	}
++
++	return 0;
++}
++
++static int mt7621_nfc_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct mt7621_nfc *nfc;
++	struct resource *res;
++	int ret;
++
++	nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
++	if (!nfc)
++		return -ENOMEM;
++
++	nand_controller_init(&nfc->controller);
++	nfc->controller.ops = &mt7621_nfc_controller_ops;
++	nfc->dev = dev;
++
++	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
++	nfc->nfi_regs = devm_ioremap_resource(dev, res);
++	if (IS_ERR(nfc->nfi_regs)) {
++		ret = PTR_ERR(nfc->nfi_regs);
++		return ret;
++	}
++
++	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ecc");
++	nfc->ecc_regs = devm_ioremap_resource(dev, res);
++	if (IS_ERR(nfc->ecc_regs)) {
++		ret = PTR_ERR(nfc->ecc_regs);
++		return ret;
++	}
++
++	nfc->nfi_clk = devm_clk_get(dev, "nfi_clk");
++	if (IS_ERR(nfc->nfi_clk)) {
++		dev_warn(dev, "nfi clk not provided\n");
++		nfc->nfi_clk = NULL;
++	} else {
++		ret = clk_prepare_enable(nfc->nfi_clk);
++		if (ret) {
++			dev_err(dev, "Failed to enable nfi core clock\n");
++			return ret;
++		}
++	}
++
++	platform_set_drvdata(pdev, nfc);
++
++	ret = mt7621_nfc_init_chip(nfc);
++	if (ret) {
++		dev_err(dev, "Failed to initialize nand chip\n");
++		goto clk_disable;
++	}
++
++	return 0;
++
++clk_disable:
++	clk_disable_unprepare(nfc->nfi_clk);
++
++	return ret;
++}
++
++static int mt7621_nfc_remove(struct platform_device *pdev)
++{
++	struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
++
++	nand_release(&nfc->nand);
++	clk_disable_unprepare(nfc->nfi_clk);
++
++	return 0;
++}
++
++static const struct of_device_id mt7621_nfc_id_table[] = {
++	{ .compatible = "mediatek,mt7621-nfc" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, match);
++
++static struct platform_driver mt7621_nfc_driver = {
++	.probe = mt7621_nfc_probe,
++	.remove = mt7621_nfc_remove,
++	.driver = {
++		.name = MT7621_NFC_NAME,
++		.owner = THIS_MODULE,
++		.of_match_table = mt7621_nfc_id_table,
++	},
++};
++module_platform_driver(mt7621_nfc_driver);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
++MODULE_DESCRIPTION("MediaTek MT7621 NAND Flash Controller driver");
diff --git a/iopsys-ramips/patches-5.4/0301-dt-bindings-add-documentation-for-mt7621-nand-driver.patch b/iopsys-ramips/patches-5.4/0301-dt-bindings-add-documentation-for-mt7621-nand-driver.patch
new file mode 100644
index 0000000000000000000000000000000000000000..3d122c10c04314d6bf7f68b169cb7870293330dc
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/0301-dt-bindings-add-documentation-for-mt7621-nand-driver.patch
@@ -0,0 +1,85 @@
+From 3d5f4da8296b23eb3abf8b13122b0d06a215e79c Mon Sep 17 00:00:00 2001
+From: Weijie Gao <weijie.gao@mediatek.com>
+Date: Wed, 1 Apr 2020 02:07:59 +0800
+Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver
+
+This patch adds documentation for MediaTek MT7621 NAND flash controller
+driver.
+
+Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+---
+ .../bindings/mtd/mediatek,mt7621-nfc.yaml          | 68 ++++++++++++++++++++++
+ 1 file changed, 68 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
+@@ -0,0 +1,68 @@
++# SPDX-License-Identifier: GPL-2.0
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding
++
++maintainers:
++  - Weijie Gao <weijie.gao@mediatek.com>
++
++description: |
++  This driver uses a single node to describe both NAND Flash controller
++  interface (NFI) and ECC engine for MT7621 SoC.
++  MT7621 supports only one chip select.
++
++properties:
++  "#address-cells": false
++  "#size-cells": false
++
++  compatible:
++    enum:
++      - mediatek,mt7621-nfc
++
++  reg:
++    items:
++      - description: Register base of NFI core
++      - description: Register base of ECC engine
++
++  reg-names:
++    items:
++      - const: nfi
++      - const: ecc
++
++  clocks:
++    items:
++      - description: Source clock for NFI core, fixed 125MHz
++
++  clock-names:
++    items:
++      - const: nfi_clk
++
++required:
++  - compatible
++  - reg
++  - reg-names
++  - clocks
++  - clock-names
++
++examples:
++  - |
++    nficlock: nficlock {
++    	#clock-cells = <0>;
++    	compatible = "fixed-clock";
++
++    	clock-frequency = <125000000>;
++    };
++
++    nand@1e003000 {
++    	compatible = "mediatek,mt7621-nfc";
++
++    	reg = <0x1e003000 0x800
++    	       0x1e003800 0x800>;
++    	reg-names = "nfi", "ecc";
++
++    	clocks = <&nficlock>;
++    	clock-names = "nfi_clk";
++    };
diff --git a/iopsys-ramips/patches-4.14/100-mt7621-core-detect-hack.patch b/iopsys-ramips/patches-5.4/100-mt7621-core-detect-hack.patch
similarity index 88%
rename from iopsys-ramips/patches-4.14/100-mt7621-core-detect-hack.patch
rename to iopsys-ramips/patches-5.4/100-mt7621-core-detect-hack.patch
index 991e19b6dfbb92ee1fccd3ccb80268befc53d3da..1c8b61f8effcaa8e8c7c8737cc1fac18b23b0b59 100644
--- a/iopsys-ramips/patches-4.14/100-mt7621-core-detect-hack.patch
+++ b/iopsys-ramips/patches-5.4/100-mt7621-core-detect-hack.patch
@@ -7,7 +7,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/arch/mips/kernel/smp-cps.c
 +++ b/arch/mips/kernel/smp-cps.c
-@@ -47,6 +47,11 @@ static unsigned core_vpe_count(unsigned
+@@ -43,6 +43,11 @@ static unsigned core_vpe_count(unsigned
  	return mips_cps_numvps(cluster, core);
  }
  
@@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  static void __init cps_smp_setup(void)
  {
  	unsigned int nclusters, ncores, nvpes, core_vpes;
-@@ -64,6 +69,8 @@ static void __init cps_smp_setup(void)
+@@ -60,6 +65,8 @@ static void __init cps_smp_setup(void)
  
  		ncores = mips_cps_numcores(cl);
  		for (c = 0; c < ncores; c++) {
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  			if (c > 0)
 --- a/arch/mips/ralink/mt7621.c
 +++ b/arch/mips/ralink/mt7621.c
-@@ -15,6 +15,7 @@
+@@ -13,6 +13,7 @@
  #include <asm/mips-cps.h>
  #include <asm/mach-ralink/ralink_regs.h>
  #include <asm/mach-ralink/mt7621.h>
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  #include <pinmux.h>
  
-@@ -162,6 +163,20 @@ void __init ralink_of_remap(void)
+@@ -160,6 +161,20 @@ void __init ralink_of_remap(void)
  		panic("Failed to remap core resources");
  }
  
diff --git a/iopsys-ramips/patches-4.14/101-mt7621-timer.patch b/iopsys-ramips/patches-5.4/101-mt7621-timer.patch
similarity index 92%
rename from iopsys-ramips/patches-4.14/101-mt7621-timer.patch
rename to iopsys-ramips/patches-5.4/101-mt7621-timer.patch
index 10edafd412e3c962f1e27f618fe8217740cbc0a2..8528b71c8845e05fcdbc62c4340d06e5db935df0 100644
--- a/iopsys-ramips/patches-4.14/101-mt7621-timer.patch
+++ b/iopsys-ramips/patches-5.4/101-mt7621-timer.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/ralink/mt7621.c
 +++ b/arch/mips/ralink/mt7621.c
-@@ -9,6 +9,7 @@
+@@ -7,6 +7,7 @@
  
  #include <linux/kernel.h>
  #include <linux/init.h>
@@ -8,7 +8,7 @@
  
  #include <asm/mipsregs.h>
  #include <asm/smp-ops.h>
-@@ -16,6 +17,7 @@
+@@ -14,6 +15,7 @@
  #include <asm/mach-ralink/ralink_regs.h>
  #include <asm/mach-ralink/mt7621.h>
  #include <asm/mips-boards/launch.h>
@@ -16,7 +16,7 @@
  
  #include <pinmux.h>
  
-@@ -177,6 +179,58 @@ bool plat_cpu_core_present(int core)
+@@ -175,6 +177,58 @@ bool plat_cpu_core_present(int core)
  	return true;
  }
  
@@ -77,9 +77,9 @@
  	void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
 --- a/arch/mips/ralink/Kconfig
 +++ b/arch/mips/ralink/Kconfig
-@@ -59,6 +59,7 @@ choice
+@@ -58,6 +58,7 @@ choice
  		select CLKSRC_MIPS_GIC
- 		select HW_HAS_PCI
+ 		select HAVE_PCI if PCI_MT7621
  		select WEAK_REORDERING_BEYOND_LLSC
 +		select GENERIC_CLOCKEVENTS_BROADCAST
  endchoice
diff --git a/iopsys-ramips/patches-4.14/102-mt7621-fix-cpu-clk-add-clkdev.patch b/iopsys-ramips/patches-5.4/102-mt7621-fix-cpu-clk-add-clkdev.patch
similarity index 97%
rename from iopsys-ramips/patches-4.14/102-mt7621-fix-cpu-clk-add-clkdev.patch
rename to iopsys-ramips/patches-5.4/102-mt7621-fix-cpu-clk-add-clkdev.patch
index e647a2f4c82c5cb4eda1d0bea9fe1fb1df2302b1..0c997a3f28f64f2907668f410e9fcb21b45f51aa 100644
--- a/iopsys-ramips/patches-4.14/102-mt7621-fix-cpu-clk-add-clkdev.patch
+++ b/iopsys-ramips/patches-5.4/102-mt7621-fix-cpu-clk-add-clkdev.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/include/asm/mach-ralink/mt7621.h
 +++ b/arch/mips/include/asm/mach-ralink/mt7621.h
-@@ -19,6 +19,10 @@
+@@ -17,6 +17,10 @@
  #define SYSC_REG_CHIP_REV		0x0c
  #define SYSC_REG_SYSTEM_CONFIG0		0x10
  #define SYSC_REG_SYSTEM_CONFIG1		0x14
@@ -11,7 +11,7 @@
  
  #define CHIP_REV_PKG_MASK		0x1
  #define CHIP_REV_PKG_SHIFT		16
-@@ -26,6 +30,22 @@
+@@ -24,6 +28,22 @@
  #define CHIP_REV_VER_SHIFT		8
  #define CHIP_REV_ECO_MASK		0xf
  
@@ -36,7 +36,7 @@
  #define MT7621_DDR2_SIZE_MAX		256
 --- a/arch/mips/ralink/mt7621.c
 +++ b/arch/mips/ralink/mt7621.c
-@@ -10,6 +10,10 @@
+@@ -8,6 +8,10 @@
  #include <linux/kernel.h>
  #include <linux/init.h>
  #include <linux/jiffies.h>
@@ -47,7 +47,7 @@
  
  #include <asm/mipsregs.h>
  #include <asm/smp-ops.h>
-@@ -18,16 +22,12 @@
+@@ -16,16 +20,12 @@
  #include <asm/mach-ralink/mt7621.h>
  #include <asm/mips-boards/launch.h>
  #include <asm/delay.h>
@@ -65,7 +65,7 @@
  #define MT7621_GPIO_MODE_UART1		1
  #define MT7621_GPIO_MODE_I2C		2
  #define MT7621_GPIO_MODE_UART3_MASK	0x3
-@@ -113,49 +113,89 @@ static struct rt2880_pmx_group mt7621_pi
+@@ -111,49 +111,89 @@ static struct rt2880_pmx_group mt7621_pi
  	{ 0 }
  };
  
@@ -184,7 +184,7 @@
  	rt_sysc_membase = plat_of_remap_node("mtk,mt7621-sysc");
 --- a/arch/mips/ralink/timer-gic.c
 +++ b/arch/mips/ralink/timer-gic.c
-@@ -11,14 +11,14 @@
+@@ -9,14 +9,14 @@
  
  #include <linux/of.h>
  #include <linux/clk-provider.h>
diff --git a/iopsys-ramips/patches-4.14/105-mt7621-memory-detect.patch b/iopsys-ramips/patches-5.4/105-mt7621-memory-detect.patch
similarity index 93%
rename from iopsys-ramips/patches-4.14/105-mt7621-memory-detect.patch
rename to iopsys-ramips/patches-5.4/105-mt7621-memory-detect.patch
index b19b57fd6698b073cfe9c31da04613d8d2eb1cef..08b4b0de298eb226369cb9be9d2e7fa5397cedcf 100644
--- a/iopsys-ramips/patches-4.14/105-mt7621-memory-detect.patch
+++ b/iopsys-ramips/patches-5.4/105-mt7621-memory-detect.patch
@@ -28,7 +28,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
 
 --- a/arch/mips/include/asm/mach-ralink/mt7621.h
 +++ b/arch/mips/include/asm/mach-ralink/mt7621.h
-@@ -46,9 +46,10 @@
+@@ -44,9 +44,10 @@
  #define CPU_PLL_FBDIV_MASK		0x7f
  #define CPU_PLL_FBDIV_SHIFT		4
  
@@ -44,7 +44,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  #define MT7621_CHIP_NAME1		0x20203132
 --- a/arch/mips/ralink/mt7621.c
 +++ b/arch/mips/ralink/mt7621.c
-@@ -15,6 +15,7 @@
+@@ -13,6 +13,7 @@
  #include <linux/clk-provider.h>
  #include <dt-bindings/clock/mt7621-clk.h>
  
@@ -52,7 +52,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  #include <asm/mipsregs.h>
  #include <asm/smp-ops.h>
  #include <asm/mips-cps.h>
-@@ -57,6 +58,8 @@
+@@ -55,6 +56,8 @@
  #define MT7621_GPIO_MODE_SDHCI_SHIFT	18
  #define MT7621_GPIO_MODE_SDHCI_GPIO	1
  
@@ -61,7 +61,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  static struct rt2880_pmx_func uart1_grp[] =  { FUNC("uart1", 0, 1, 2) };
  static struct rt2880_pmx_func i2c_grp[] =  { FUNC("i2c", 0, 3, 2) };
  static struct rt2880_pmx_func uart3_grp[] = {
-@@ -141,6 +144,28 @@ static struct clk *__init mt7621_add_sys
+@@ -139,6 +142,28 @@ static struct clk *__init mt7621_add_sys
  	return clk;
  }
  
@@ -90,7 +90,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  void __init ralink_clk_init(void)
  {
  	u32 syscfg, xtal_sel, clkcfg, clk_sel, curclk, ffiv, ffrac;
-@@ -319,10 +344,7 @@ void prom_soc_init(struct ralink_soc_inf
+@@ -317,10 +342,7 @@ void prom_soc_init(struct ralink_soc_inf
  		(rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
  		(rev & CHIP_REV_ECO_MASK));
  
@@ -104,7 +104,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  
 --- a/arch/mips/ralink/common.h
 +++ b/arch/mips/ralink/common.h
-@@ -19,6 +19,7 @@ struct ralink_soc_info {
+@@ -17,6 +17,7 @@ struct ralink_soc_info {
  	unsigned long mem_size;
  	unsigned long mem_size_min;
  	unsigned long mem_size_max;
@@ -114,7 +114,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
  
 --- a/arch/mips/ralink/of.c
 +++ b/arch/mips/ralink/of.c
-@@ -89,6 +89,8 @@ void __init plat_mem_setup(void)
+@@ -87,6 +87,8 @@ void __init plat_mem_setup(void)
  	of_scan_flat_dt(early_init_dt_find_memory, NULL);
  	if (memory_dtb)
  		of_scan_flat_dt(early_init_dt_scan_memory, NULL);
diff --git a/iopsys-ramips/patches-4.14/110-mt7621-perfctr-fix.patch b/iopsys-ramips/patches-5.4/110-mt7621-perfctr-fix.patch
similarity index 94%
rename from iopsys-ramips/patches-4.14/110-mt7621-perfctr-fix.patch
rename to iopsys-ramips/patches-5.4/110-mt7621-perfctr-fix.patch
index 4c40e65ab94218d2a05e068436022bbefeb04b0a..dfeac7eb993dcd1796dd1ff5847456e482f8e2a0 100644
--- a/iopsys-ramips/patches-4.14/110-mt7621-perfctr-fix.patch
+++ b/iopsys-ramips/patches-5.4/110-mt7621-perfctr-fix.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/ralink/irq-gic.c
 +++ b/arch/mips/ralink/irq-gic.c
-@@ -15,6 +15,12 @@
+@@ -13,6 +13,12 @@
  
  int get_c0_perfcount_int(void)
  {
diff --git a/iopsys-ramips/patches-5.4/111-gpio-mmio-introduce-BGPIOF_NO_SET_ON_INPUT.patch b/iopsys-ramips/patches-5.4/111-gpio-mmio-introduce-BGPIOF_NO_SET_ON_INPUT.patch
new file mode 100644
index 0000000000000000000000000000000000000000..fdb89d09028d7dcdef4c7bddab50a00e00b552b1
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/111-gpio-mmio-introduce-BGPIOF_NO_SET_ON_INPUT.patch
@@ -0,0 +1,85 @@
+From 5d7b644aad721ecca20bd8976b38fb243fdc84f9 Mon Sep 17 00:00:00 2001
+From: Chuanhong Guo <gch981213@gmail.com>
+Date: Sun, 15 Mar 2020 20:13:37 +0800
+Subject: [PATCH] gpio: mmio: introduce BGPIOF_NO_SET_ON_INPUT
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some gpio controllers ignores pin value writing when that pin is
+configured as input mode. As a result, bgpio_dir_out should set
+pin to output before configuring pin values or gpio pin values
+can't be set up properly.
+Introduce two variants of bgpio_dir_out: bgpio_dir_out_val_first
+and bgpio_dir_out_dir_first, and assign direction_output according
+to a new flag: BGPIOF_NO_SET_ON_INPUT.
+
+Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
+Tested-by: René van Dorst <opensource@vdorst.com>
+Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+---
+ drivers/gpio/gpio-mmio.c    | 23 +++++++++++++++++++----
+ include/linux/gpio/driver.h |  1 +
+ 2 files changed, 20 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpio/gpio-mmio.c
++++ b/drivers/gpio/gpio-mmio.c
+@@ -381,12 +381,10 @@ static int bgpio_get_dir(struct gpio_chi
+ 	return 1;
+ }
+ 
+-static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
++static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+ {
+ 	unsigned long flags;
+ 
+-	gc->set(gc, gpio, val);
+-
+ 	spin_lock_irqsave(&gc->bgpio_lock, flags);
+ 
+ 	gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
+@@ -397,7 +395,21 @@ static int bgpio_dir_out(struct gpio_chi
+ 		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
+ 
+ 	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
++}
+ 
++static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
++				   int val)
++{
++	bgpio_dir_out(gc, gpio, val);
++	gc->set(gc, gpio, val);
++	return 0;
++}
++
++static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio,
++				   int val)
++{
++	gc->set(gc, gpio, val);
++	bgpio_dir_out(gc, gpio, val);
+ 	return 0;
+ }
+ 
+@@ -530,7 +542,10 @@ static int bgpio_setup_direction(struct
+ 	if (dirout || dirin) {
+ 		gc->reg_dir_out = dirout;
+ 		gc->reg_dir_in = dirin;
+-		gc->direction_output = bgpio_dir_out;
++		if (flags & BGPIOF_NO_SET_ON_INPUT)
++			gc->direction_output = bgpio_dir_out_dir_first;
++		else
++			gc->direction_output = bgpio_dir_out_val_first;
+ 		gc->direction_input = bgpio_dir_in;
+ 		gc->get_direction = bgpio_get_dir;
+ 	} else {
+--- a/include/linux/gpio/driver.h
++++ b/include/linux/gpio/driver.h
+@@ -567,6 +567,7 @@ int bgpio_init(struct gpio_chip *gc, str
+ #define BGPIOF_BIG_ENDIAN_BYTE_ORDER	BIT(3)
+ #define BGPIOF_READ_OUTPUT_REG_SET	BIT(4) /* reg_set stores output value */
+ #define BGPIOF_NO_OUTPUT		BIT(5) /* only input */
++#define BGPIOF_NO_SET_ON_INPUT		BIT(6)
+ 
+ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
+ 		     irq_hw_number_t hwirq);
diff --git a/iopsys-ramips/patches-5.4/112-gpio-mt7621-add-BGPIOF_NO_SET_ON_INPUT-flag.patch b/iopsys-ramips/patches-5.4/112-gpio-mt7621-add-BGPIOF_NO_SET_ON_INPUT-flag.patch
new file mode 100644
index 0000000000000000000000000000000000000000..862f9adb475b8a1b5c731e35d7a2b9a686c596c6
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/112-gpio-mt7621-add-BGPIOF_NO_SET_ON_INPUT-flag.patch
@@ -0,0 +1,33 @@
+From ad65f02fd73e9a700f1693a4513ae923ca07beb0 Mon Sep 17 00:00:00 2001
+From: Chuanhong Guo <gch981213@gmail.com>
+Date: Sun, 15 Mar 2020 20:13:38 +0800
+Subject: [PATCH] gpio: mt7621: add BGPIOF_NO_SET_ON_INPUT flag
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+DSET/DCLR registers only works on output pins. Add corresponding
+BGPIOF_NO_SET_ON_INPUT flag to bgpio_init call to fix direction_out
+behavior.
+
+Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
+Tested-by: René van Dorst <opensource@vdorst.com>
+Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+---
+ drivers/gpio/gpio-mt7621.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpio/gpio-mt7621.c
++++ b/drivers/gpio/gpio-mt7621.c
+@@ -227,8 +227,8 @@ mediatek_gpio_bank_probe(struct device *
+ 	ctrl = mtk->base + GPIO_REG_DCLR + (rg->bank * GPIO_BANK_STRIDE);
+ 	diro = mtk->base + GPIO_REG_CTRL + (rg->bank * GPIO_BANK_STRIDE);
+ 
+-	ret = bgpio_init(&rg->chip, dev, 4,
+-			 dat, set, ctrl, diro, NULL, 0);
++	ret = bgpio_init(&rg->chip, dev, 4, dat, set, ctrl, diro, NULL,
++			 BGPIOF_NO_SET_ON_INPUT);
+ 	if (ret) {
+ 		dev_err(dev, "bgpio_init() failed\n");
+ 		return ret;
diff --git a/iopsys-ramips/patches-5.4/200-add-ralink-eth.patch b/iopsys-ramips/patches-5.4/200-add-ralink-eth.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b8fd8e511d75b98152b156d91388176bbdf786c6
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/200-add-ralink-eth.patch
@@ -0,0 +1,20 @@
+--- a/drivers/net/ethernet/Kconfig
++++ b/drivers/net/ethernet/Kconfig
+@@ -159,6 +159,7 @@ source "drivers/net/ethernet/pasemi/Kcon
+ source "drivers/net/ethernet/pensando/Kconfig"
+ source "drivers/net/ethernet/qlogic/Kconfig"
+ source "drivers/net/ethernet/qualcomm/Kconfig"
++source "drivers/net/ethernet/ralink/Kconfig"
+ source "drivers/net/ethernet/rdc/Kconfig"
+ source "drivers/net/ethernet/realtek/Kconfig"
+ source "drivers/net/ethernet/renesas/Kconfig"
+--- a/drivers/net/ethernet/Makefile
++++ b/drivers/net/ethernet/Makefile
+@@ -72,6 +72,7 @@ obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES)
+ obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/
+ obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/
+ obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/
++obj-$(CONFIG_NET_VENDOR_RALINK) += ralink/
+ obj-$(CONFIG_NET_VENDOR_REALTEK) += realtek/
+ obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/
+ obj-$(CONFIG_NET_VENDOR_RDC) += rdc/
diff --git a/iopsys-ramips/patches-4.14/300-mt7620-export-chip-version-and-pkg.patch b/iopsys-ramips/patches-5.4/300-mt7620-export-chip-version-and-pkg.patch
similarity index 88%
rename from iopsys-ramips/patches-4.14/300-mt7620-export-chip-version-and-pkg.patch
rename to iopsys-ramips/patches-5.4/300-mt7620-export-chip-version-and-pkg.patch
index 0cb1fede306ec1b844269df8fedf6ed014431468..8b4335eb03c39da6e4e675d487f41d2230e7b826 100644
--- a/iopsys-ramips/patches-4.14/300-mt7620-export-chip-version-and-pkg.patch
+++ b/iopsys-ramips/patches-5.4/300-mt7620-export-chip-version-and-pkg.patch
@@ -1,6 +1,6 @@
 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
-@@ -137,4 +137,16 @@ static inline int mt7620_get_eco(void)
+@@ -135,4 +135,16 @@ static inline int mt7620_get_eco(void)
  	return rt_sysc_r32(SYSC_REG_CHIP_REV) & CHIP_REV_ECO_MASK;
  }
  
diff --git a/iopsys-ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch b/iopsys-ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch
new file mode 100644
index 0000000000000000000000000000000000000000..dc3dd0d1eca028b8e680ee10d22a2457e7461ecd
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch
@@ -0,0 +1,89 @@
+From f798b7588bd7397bbab958281ca6c88d08714941 Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Thu, 12 Mar 2020 12:29:15 +0100
+Subject: [PATCH] MIPS: ralink: mt7621: introduce 'soc_device' initialization
+
+mt7621 SoC has its own 'ralink_soc_info' structure with some
+information about the soc itself. Pcie controller and pcie phy
+drivers for this soc which are still in staging git tree make uses
+of 'soc_device_attribute' looking for revision 'E2' in order to
+know if reset lines are or not inverted. This way of doing things
+seems to be necessary in order to make things clean and properly.
+Hence, introduce this 'soc_device' to be able to properly use those
+attributes in drivers. Also set 'data' pointer points to the struct
+'ralink_soc_info' to be able to export also current soc information
+using this mechanism.
+
+Cc: Paul Burton <paul.burton@mips.com>
+Cc: ralf@linux-mips.org
+Cc: jhogan@kernel.org
+Cc: john@phrozen.org
+Cc: NeilBrown <neil@brown.name>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: linux-mips@vger.kernel.org
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ arch/mips/ralink/mt7621.c | 32 +++++++++++++++++++++++++++++++-
+ 1 file changed, 31 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/ralink/mt7621.c
++++ b/arch/mips/ralink/mt7621.c
+@@ -7,6 +7,8 @@
+ 
+ #include <linux/kernel.h>
+ #include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/sys_soc.h>
+ #include <linux/jiffies.h>
+ #include <linux/clk.h>
+ #include <linux/clkdev.h>
+@@ -294,6 +296,33 @@ static int udelay_recal(void)
+ }
+ device_initcall(udelay_recal);
+ 
++static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
++{
++	struct soc_device *soc_dev;
++	struct soc_device_attribute *soc_dev_attr;
++
++	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
++	if (!soc_dev_attr)
++		return;
++
++	soc_dev_attr->soc_id = "mt7621";
++	soc_dev_attr->family = "Ralink";
++
++	if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 &&
++	    (rev & CHIP_REV_ECO_MASK) == 1)
++		soc_dev_attr->revision = "E2";
++	else
++		soc_dev_attr->revision = "E1";
++
++	soc_dev_attr->data = soc_info;
++
++	soc_dev = soc_device_register(soc_dev_attr);
++	if (IS_ERR(soc_dev)) {
++		kfree(soc_dev_attr);
++		return;
++	}
++}
++
+ void prom_soc_init(struct ralink_soc_info *soc_info)
+ {
+ 	void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
+@@ -345,11 +374,12 @@ void prom_soc_init(struct ralink_soc_inf
+ 	soc_info->mem_detect = mt7621_memory_detect;
+ 	rt2880_pinmux_data = mt7621_pinmux_data;
+ 
+-
+ 	if (!register_cps_smp_ops())
+ 		return;
+ 	if (!register_cmp_smp_ops())
+ 		return;
+ 	if (!register_vsmp_smp_ops())
+ 		return;
++
++	soc_dev_init(soc_info, rev);
+ }
diff --git a/iopsys-ramips/patches-4.14/302-spi-nor-add-gd25q512.patch b/iopsys-ramips/patches-5.4/302-spi-nor-add-gd25q512.patch
similarity index 79%
rename from iopsys-ramips/patches-4.14/302-spi-nor-add-gd25q512.patch
rename to iopsys-ramips/patches-5.4/302-spi-nor-add-gd25q512.patch
index 836eec4f1e88d2a5b3affea776dd645590c803a7..3fbb0bf3234bd715ac5429520d10f4c36118824d 100644
--- a/iopsys-ramips/patches-4.14/302-spi-nor-add-gd25q512.patch
+++ b/iopsys-ramips/patches-5.4/302-spi-nor-add-gd25q512.patch
@@ -1,8 +1,8 @@
 --- a/drivers/mtd/spi-nor/spi-nor.c
 +++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1076,6 +1076,11 @@ static const struct flash_info spi_nor_i
+@@ -2305,6 +2305,11 @@ static const struct flash_info spi_nor_i
  			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- 			.quad_enable = macronix_quad_enable,
+ 			.fixups = &gd25q256_fixups,
  	},
 +	{
 +		"gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024,
diff --git a/iopsys-ramips/patches-5.4/401-net-ethernet-mediatek-support-net-labels.patch b/iopsys-ramips/patches-5.4/401-net-ethernet-mediatek-support-net-labels.patch
new file mode 100644
index 0000000000000000000000000000000000000000..6583fca60b189b3901c8c4f07c6eaf91c0af1021
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/401-net-ethernet-mediatek-support-net-labels.patch
@@ -0,0 +1,34 @@
+From bd0f89de5476ca25e73fae829ba3e1dafae1d90d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
+Date: Fri, 21 Jun 2019 10:04:05 +0200
+Subject: [PATCH] net: ethernet: mediatek: support net-labels
+
+With this patch, device name can be set within dts file in the same way as dsa
+port can.
+Add: label = "wan"; to GMAC node.
+
+Signed-off-by: René van Dorst <opensource@vdorst.com>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -2922,6 +2922,7 @@ static const struct net_device_ops mtk_n
+ 
+ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
+ {
++	const char *name = of_get_property(np, "label", NULL);
+ 	const __be32 *_id = of_get_property(np, "reg", NULL);
+ 	struct phylink *phylink;
+ 	int phy_mode, id, err;
+@@ -3014,6 +3015,9 @@ static int mtk_add_mac(struct mtk_eth *e
+ 
+ 	eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
+ 
++	if (name)
++		strlcpy(eth->netdev[id]->name, name, IFNAMSIZ);
++
+ 	return 0;
+ 
+ free_netdev:
diff --git a/iopsys-ramips/patches-5.4/990-NET-no-auto-carrier-off-support.patch b/iopsys-ramips/patches-5.4/990-NET-no-auto-carrier-off-support.patch
new file mode 100644
index 0000000000000000000000000000000000000000..c19cfd322da402c44297f109756248c98e54cfd2
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/990-NET-no-auto-carrier-off-support.patch
@@ -0,0 +1,47 @@
+From 0b6eb1e68290243d439ee330ea8d0b239a5aec69 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sun, 27 Jul 2014 09:38:50 +0100
+Subject: [PATCH 34/53] NET: multi phy support
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/net/phy/phy.c |    9 ++++++---
+ include/linux/phy.h   |    1 +
+ 2 files changed, 7 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/phy.c
++++ b/drivers/net/phy/phy.c
+@@ -547,7 +547,10 @@ static int phy_check_link_status(struct
+ 		phy_link_up(phydev);
+ 	} else if (!phydev->link && phydev->state != PHY_NOLINK) {
+ 		phydev->state = PHY_NOLINK;
+-		phy_link_down(phydev, true);
++		if (!phydev->no_auto_carrier_off)
++			phy_link_down(phydev, true);
++		else
++			phy_link_down(phydev, false);
+ 	}
+ 
+ 	return 0;
+@@ -927,7 +930,10 @@ void phy_state_machine(struct work_struc
+ 	case PHY_HALTED:
+ 		if (phydev->link) {
+ 			phydev->link = 0;
+-			phy_link_down(phydev, true);
++			if (!phydev->no_auto_carrier_off)
++				phy_link_down(phydev, true);
++			else
++				phy_link_down(phydev, false);
+ 		}
+ 		do_suspend = true;
+ 		break;
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -380,6 +380,7 @@ struct phy_device {
+ 	unsigned suspended_by_mdio_bus:1;
+ 	unsigned sysfs_links:1;
+ 	unsigned loopback_enabled:1;
++	unsigned no_auto_carrier_off:1;
+ 
+ 	unsigned autoneg:1;
+ 	/* The most recently read link state */
diff --git a/iopsys-ramips/patches-5.4/991-at803x.patch b/iopsys-ramips/patches-5.4/991-at803x.patch
new file mode 100644
index 0000000000000000000000000000000000000000..af0132f8f7ed452cc205b121e9230581009175ee
--- /dev/null
+++ b/iopsys-ramips/patches-5.4/991-at803x.patch
@@ -0,0 +1,156 @@
+From 924453aa9d2324e5611f8e2b71df746d8f0c79f1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
+Date: Fri, 13 Nov 2020 16:11:32 +0100
+Subject: [PATCH] net: phy: at803x: add support for SFP module in
+ RGMII-to-x-base mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: René van Dorst <opensource@vdorst.com>
+---
+ drivers/net/phy/at803x.c | 91 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 91 insertions(+)
+
+--- a/drivers/net/phy/at803x.c
++++ b/drivers/net/phy/at803x.c
+@@ -14,6 +14,8 @@
+ #include <linux/etherdevice.h>
+ #include <linux/of_gpio.h>
+ #include <linux/gpio/consumer.h>
++#include <linux/sfp.h>
++#include <linux/phylink.h>
+ 
+ #define AT803X_SPECIFIC_STATUS			0x11
+ #define AT803X_SS_SPEED_MASK			(3 << 14)
+@@ -53,9 +55,18 @@
+ 
+ #define AT803X_MODE_CFG_MASK			0x0F
+ #define AT803X_MODE_CFG_SGMII			0x01
++#define AT803X_MODE_CFG_BX1000_RGMII_50		0x02
++#define AT803X_MODE_CFG_BX1000_RGMII_75		0x03
++#define AT803X_MODE_FIBER			0x01
++#define AT803X_MODE_COPPER			0x00
+ 
+ #define AT803X_PSSR			0x11	/*PHY-Specific Status Register*/
+ #define AT803X_PSSR_MR_AN_COMPLETE	0x0200
++#define	 PSSR_LINK			BIT(10)
++#define	 PSSR_SYNC_STATUS		BIT(8)
++#define	 PSSR_DUPLEX			BIT(13)
++#define	 PSSR_SPEED_1000		BIT(15)
++#define	 PSSR_SPEED_100			BIT(14)
+ 
+ #define AT803X_DEBUG_REG_0			0x00
+ #define AT803X_DEBUG_RX_CLK_DLY_EN		BIT(15)
+@@ -243,10 +254,72 @@ static int at803x_resume(struct phy_devi
+ 	return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0);
+ }
+ 
++static int at803x_mode(struct phy_device *phydev)
++{
++	int mode;
++
++	mode = phy_read(phydev, AT803X_REG_CHIP_CONFIG) & AT803X_MODE_CFG_MASK;
++
++	if (mode == AT803X_MODE_CFG_BX1000_RGMII_50 ||
++	    mode == AT803X_MODE_CFG_BX1000_RGMII_75)
++		return AT803X_MODE_FIBER;
++	return AT803X_MODE_COPPER;
++}
++
++static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
++{
++	__ETHTOOL_DECLARE_LINK_MODE_MASK(at803x_support) = { 0, };
++	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
++	struct phy_device *phydev = upstream;
++	phy_interface_t iface;
++
++	phylink_set(at803x_support, 1000baseX_Full);
++	/* AT803x only support 1000baseX but SGMII works fine when module runs
++	 * at 1Gbit.
++	 */
++	phylink_set(at803x_support, 1000baseT_Full);
++
++	sfp_parse_support(phydev->sfp_bus, id, support);
++
++	// Limit to interfaces that both sides support
++	linkmode_and(support, support, at803x_support);
++
++	if (linkmode_empty(support))
++		goto unsupported_mode;
++
++	iface = sfp_select_interface(phydev->sfp_bus, support);
++
++	if (iface != PHY_INTERFACE_MODE_SGMII &&
++	    iface != PHY_INTERFACE_MODE_1000BASEX)
++		goto unsupported_mode;
++
++	dev_info(&phydev->mdio.dev, "SFP interface %s", phy_modes(iface));
++
++	return 0;
++
++unsupported_mode:
++	dev_info(&phydev->mdio.dev, "incompatible SFP module inserted;"
++		 "Only SGMII at 1Gbit/1000BASEX are supported!\n");
++	return -EINVAL;
++}
++
++static const struct sfp_upstream_ops at803x_sfp_ops = {
++	.attach = phy_sfp_attach,
++	.detach = phy_sfp_detach,
++	.module_insert = at803x_sfp_insert,
++};
++
+ static int at803x_probe(struct phy_device *phydev)
+ {
+ 	struct device *dev = &phydev->mdio.dev;
+ 	struct at803x_priv *priv;
++	int ret;
++
++	if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
++		ret = phy_sfp_probe(phydev, &at803x_sfp_ops);
++		if (ret < 0)
++			return ret;
++	}
+ 
+ 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ 	if (!priv)
+@@ -394,6 +467,10 @@ static int at803x_read_status(struct phy
+ {
+ 	int ss, err, old_link = phydev->link;
+ 
++	/* Handle (Fiber) SGMII to RGMII mode */
++	if (at803x_mode(phydev) == AT803X_MODE_FIBER)
++		return genphy_c37_read_status(phydev);
++
+ 	/* Update the link, but return if there was an error */
+ 	err = genphy_update_link(phydev);
+ 	if (err)
+@@ -448,6 +525,19 @@ static int at803x_read_status(struct phy
+ 	return 0;
+ }
+ 
++static int at803x_config_aneg(struct phy_device *phydev)
++{
++	/* Handle (Fiber) SerDes to RGMII mode */
++	if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
++		pr_warn("%s: fiber\n", __func__);
++		return genphy_c37_config_aneg(phydev);
++	}
++
++	pr_warn("%s: enter\n", __func__);
++
++	return genphy_config_aneg(phydev);
++}
++
+ static struct phy_driver at803x_driver[] = {
+ {
+ 	/* ATHEROS 8035 */
+@@ -491,6 +581,7 @@ static struct phy_driver at803x_driver[]
+ 	.suspend		= at803x_suspend,
+ 	.resume			= at803x_resume,
+ 	/* PHY_GBIT_FEATURES */
++	.config_aneg		= at803x_config_aneg,
+ 	.read_status		= at803x_read_status,
+ 	.aneg_done		= at803x_aneg_done,
+ 	.ack_interrupt		= &at803x_ack_interrupt,
diff --git a/iopsys-ramips/patches-4.14/999-fix-pci-init-mt7620.patch b/iopsys-ramips/patches-5.4/999-fix-pci-init-mt7620.patch
similarity index 71%
rename from iopsys-ramips/patches-4.14/999-fix-pci-init-mt7620.patch
rename to iopsys-ramips/patches-5.4/999-fix-pci-init-mt7620.patch
index 3310a6bdbac9b98cc590ea28360dfeb362f8fa2f..7c00d4c9ae1701d20a438deffe7cadc7e10eb0b9 100644
--- a/iopsys-ramips/patches-4.14/999-fix-pci-init-mt7620.patch
+++ b/iopsys-ramips/patches-5.4/999-fix-pci-init-mt7620.patch
@@ -1,14 +1,14 @@
 --- a/arch/mips/pci/pci-mt7620.c
 +++ b/arch/mips/pci/pci-mt7620.c
-@@ -35,6 +35,7 @@
+@@ -32,6 +32,7 @@
  #define PPLL_CFG1			0x9c
  
  #define PPLL_DRV			0xa0
-+#define PPLL_LD			(1<<23)
- #define PDRV_SW_SET			(1<<31)
- #define LC_CKDRVPD			(1<<19)
- #define LC_CKDRVOHZ			(1<<18)
-@@ -242,8 +243,8 @@ static int mt7620_pci_hw_init(struct pla
++#define PPLL_LD			BIT(23)
+ #define PDRV_SW_SET			BIT(31)
+ #define LC_CKDRVPD			BIT(19)
+ #define LC_CKDRVOHZ			BIT(18)
+@@ -239,8 +240,8 @@ static int mt7620_pci_hw_init(struct pla
  	rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1);
  	mdelay(100);
  
diff --git a/iopsys-ramips/rt288x/base-files/etc/board.d/01_leds b/iopsys-ramips/rt288x/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..b62ad76110fb6f3f902934c5dfabb2284ffb99b8
--- /dev/null
+++ b/iopsys-ramips/rt288x/base-files/etc/board.d/01_leds
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+airlink101,ar670w|\
+airlink101,ar725w)
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800soc-phy0::radio" "wlan0"
+	;;
+belkin,f5d8235-v1)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wireless" "wlan0"
+	;;
+ralink,v11st-fe)
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800pci-phy0::radio" "wlan0"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt288x/base-files/etc/board.d/02_network b/iopsys-ramips/rt288x/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..134ac879cd7ce77ce4caf45ed4f8f7a207075478
--- /dev/null
+++ b/iopsys-ramips/rt288x/base-files/etc/board.d/02_network
@@ -0,0 +1,64 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	airlink101,ar670w|\
+	airlink101,ar725w)
+		ucidef_add_switch "switch0" \
+			"0:wan" "1:lan" "2:lan" "3:lan" "4:lan" "6t@eth0"
+		;;
+	asus,rt-n15)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5@eth0"
+		;;
+	belkin,f5d8235-v1|\
+	buffalo,wzr-agl300nh|\
+	ralink,v11st-fe)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "5@eth0"
+		;;
+	buffalo,wli-tx4-ag300n|\
+	dlink,dap-1522-a1)
+		ucidef_set_interface_lan "eth0"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	airlink101,ar670w)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x2004)" 1)
+		;;
+	airlink101,ar725w|\
+	asus,rt-n15|\
+	belkin,f5d8235-v1|\
+	buffalo,wzr-agl300nh)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt288x/base-files/lib/upgrade/platform.sh b/iopsys-ramips/rt288x/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..786d57fc70432f526d98734ad778f8c7ac0ab65d
--- /dev/null
+++ b/iopsys-ramips/rt288x/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/rt288x/config-4.14 b/iopsys-ramips/rt288x/config-5.4
similarity index 77%
rename from iopsys-ramips/rt288x/config-4.14
rename to iopsys-ramips/rt288x/config-5.4
index cbeca7fd1cbd2ba39a73a067076cca88fc57093d..6c0725aed996fd48fed23e01e883e89a66cc1065 100644
--- a/iopsys-ramips/rt288x/config-4.14
+++ b/iopsys-ramips/rt288x/config-5.4
@@ -1,34 +1,33 @@
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
 CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_CEVT_R4K=y
-# CONFIG_CEVT_SYSTICK_QUIRK is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
 CONFIG_CMDLINE_BOOL=y
 # CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -39,78 +38,87 @@ CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
 # CONFIG_DTB_RT2880_EVAL is not set
 CONFIG_DTB_RT_NONE=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_RALINK=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_HAVE_ARCH_COMPILER_H=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_COPY_THREAD_TLS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FAST_GUP=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
 CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
 CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
 CONFIG_HAVE_NET_DSA=y
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IP17XX_PHY=y
@@ -121,30 +129,28 @@ CONFIG_IRQ_INTC=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CBPF_JIT=y
 CONFIG_MIPS_CLOCK_VSYSCALL=y
 # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=4
 CONFIG_MIPS_L1_CACHE_SHIFT_4=y
-# CONFIG_MIPS_MACHINE is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
 CONFIG_MODULES_USE_ELF_REL=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPLIT_LZMA_FW=y
@@ -152,28 +158,27 @@ CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_MTD_SPLIT_WRGG_FW=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_MEDIATEK_MDIO=y
-CONFIG_NET_MEDIATEK_MDIO_RT2880=y
-CONFIG_NET_MEDIATEK_RT2880=y
-CONFIG_NET_MEDIATEK_SOC=y
-CONFIG_NET_VENDOR_MEDIATEK=y
+CONFIG_NET_RALINK_MDIO=y
+CONFIG_NET_RALINK_MDIO_RT2880=y
+CONFIG_NET_RALINK_RT2880=y
+CONFIG_NET_RALINK_SOC=y
+CONFIG_NET_VENDOR_RALINK=y
 CONFIG_NLS=m
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DRIVERS_LEGACY=y
+# CONFIG_PCI_MT7621 is not set
+# CONFIG_PCI_MT7621_PHY is not set
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -183,13 +188,9 @@ CONFIG_PINCTRL_RT2880=y
 # CONFIG_PINCTRL_SINGLE is not set
 CONFIG_RALINK=y
 CONFIG_RALINK_WDT=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
 CONFIG_RESET_CONTROLLER=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_RT288X=y
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_SOC_MT7620 is not set
 # CONFIG_SOC_MT7621 is not set
@@ -198,6 +199,7 @@ CONFIG_SOC_RT288X=y
 # CONFIG_SOC_RT3883 is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 # CONFIG_SPI_MT7621 is not set
 CONFIG_SPI_RT2880=y
 CONFIG_SRCU=y
@@ -211,6 +213,7 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TINY_SRCU=y
 CONFIG_USB=m
diff --git a/iopsys-ramips/rt288x/target.mk b/iopsys-ramips/rt288x/target.mk
index 11b5a0b5201de8b116f0775bbf21abf3c6c39a0a..814ac97e8953ede663d32e79d0359e20e6424fd1 100644
--- a/iopsys-ramips/rt288x/target.mk
+++ b/iopsys-ramips/rt288x/target.mk
@@ -7,7 +7,7 @@ BOARDNAME:=RT288x based boards
 FEATURES+=small_flash
 CPU_TYPE:=24kc
 
-DEFAULT_PACKAGES += kmod-rt2800-soc wpad-mini
+DEFAULT_PACKAGES += kmod-rt2800-soc wpad-basic-wolfssl swconfig
 
 define Target/Description
 	Build firmware images for Ralink RT288x based boards.
diff --git a/iopsys-ramips/rt305x/base-files/etc/board.d/01_leds b/iopsys-ramips/rt305x/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..1796ae50d85e07e429500797e3f110c8f3819c49
--- /dev/null
+++ b/iopsys-ramips/rt305x/base-files/etc/board.d/01_leds
@@ -0,0 +1,101 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+7links,px-4885-4m|\
+7links,px-4885-8m|\
+fon,fonera-20n)
+	ucidef_set_led_netdev "wifi_led" "wifi" "orange:wifi" "wlan0"
+	;;
+airlive,air3gii|\
+aximcom,mr-102n|\
+edimax,3g-6200nl|\
+netgear,wnce2001)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+alfa-network,w502u|\
+dlink,dir-300-b1|\
+dlink,dir-300-b7|\
+dlink,dir-320-b1|\
+dlink,dir-600-b1|\
+dlink,dir-610-a1|\
+dlink,dir-615-h1|\
+dlink,dir-620-a1|\
+engenius,esr-9753|\
+hilink,hlk-rm04|\
+nexx,wt1520-4m|\
+nexx,wt1520-8m|\
+skyline,sl-r7205|\
+tenda,w306r-v2|\
+zyxel,keenetic-start|\
+zyxel,keenetic|\
+zyxel,nbg-419n-v2)
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800pci-phy0::radio" "wlan0"
+	;;
+allnet,all0256n-4m|\
+allnet,all0256n-8m)
+	ucidef_set_rssimon "wlan0" "200000" "1"
+	ucidef_set_led_rssi "rssilow" "RSSILOW" "green:rssilow" "wlan0" "1" "40" "0" "6"
+	ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "green:rssimed" "wlan0" "30" "80" "-29" "5"
+	ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "green:rssihigh" "wlan0" "70" "100" "-69" "8"
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800pci-phy0::radio" "wlan0"
+	;;
+alphanetworks,asl26555-8m|\
+alphanetworks,asl26555-16m)
+	ucidef_set_led_netdev "eth" "ETH" "green:eth" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	;;
+asiarf,awapn2403)
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800soc-phy0::radio" "wlan0"
+	;;
+dlink,dcs-930l-b1)
+	ucidef_set_led_netdev "wifi" "WiFi" "blue:wps"
+	;;
+dlink,dir-615-d)
+	ucidef_set_led_netdev "wan" "WAN (green)" "green:wan" "eth0.2"
+	ucidef_set_led_netdev "wifi_led" "wifi" "rt2800soc-phy0::radio" "wlan0"
+	;;
+dlink,dir-620-d1|\
+trendnet,tew-714tru)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+edimax,3g-6200n|\
+planex,mzk-w300nh2)
+	ucidef_set_led_netdev "wifi_led" "wifi" "amber:wlan" "wlan0"
+	;;
+hauppauge,broadway)
+	ucidef_set_led_netdev "wifi_led" "wifi" "red:wps_active" "wlan0"
+	;;
+hootoo,ht-tm02)
+	ucidef_set_led_netdev "eth" "Ethernet" "green:lan" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wlan" "wlan0"
+	;;
+huawei,hg255d)
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wlan" "wlan0"
+	ucidef_set_led_netdev "internet" "internet" "green:internet" "eth0.2"
+	;;
+intenso,memory2move)
+	ucidef_set_led_netdev "wifi_led" "wifi" "blue:wifi" "wlan0"
+	ucidef_set_led_netdev "eth" "Ethernet" "green:wan" "eth0"
+	;;
+omnima,miniembplug)
+	ucidef_set_led_netdev "wifi_led" "wifi" "red:wlan" "wlan0"
+	;;
+vocore,vocore-8m|\
+vocore,vocore-16m)
+	ucidef_set_led_netdev "eth" "ETH" "orange:eth" "eth0"
+	;;
+zorlik,zl5900v2)
+	ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt305x/base-files/etc/board.d/02_network b/iopsys-ramips/rt305x/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..56c786bc95bc9679f3550a182a16e93ca0a87ec7
--- /dev/null
+++ b/iopsys-ramips/rt305x/base-files/etc/board.d/02_network
@@ -0,0 +1,304 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	7links,px-4885-4m|\
+	7links,px-4885-8m|\
+	allnet,all0256n-4m|\
+	allnet,all0256n-8m|\
+	allnet,all5002|\
+	allnet,all5003|\
+	belkin,f7c027|\
+	dlink,dcs-930l-b1|\
+	dlink,dcs-930|\
+	edimax,3g-6200nl|\
+	hame,mpr-a1|\
+	hame,mpr-a2|\
+	hauppauge,broadway|\
+	hootoo,ht-tm02|\
+	huawei,d105|\
+	intenso,memory2move|\
+	netgear,wnce2001|\
+	tenda,3g150b|\
+	tenda,3g300m|\
+	tenda,w150m|\
+	trendnet,tew-714tru|\
+	unbranded,a5-v11|\
+	wansview,ncs601w|\
+	zorlik,zl5900v2)
+		ucidef_add_switch "switch0"
+		ucidef_add_switch_attr "switch0" "enable" "false"
+		ucidef_set_interface_lan "eth0"
+		;;
+	8devices,carambola)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "6@eth0"
+		;;
+	accton,wr6202|\
+	alfa-network,w502u|\
+	argus,atp-52b|\
+	asiarf,awm002-evb-4m|\
+	asiarf,awm002-evb-8m|\
+	asus,rt-n10-plus|\
+	asus,wl-330n|\
+	asus,wl-330n3g|\
+	aztech,hw550-3g|\
+	engenius,esr-9753|\
+	jcg,jhr-n805r|\
+	jcg,jhr-n825r|\
+	jcg,jhr-n926r|\
+	petatel,psr-680w|\
+	planex,mzk-wdpr|\
+	skyline,sl-r7205|\
+	teltonika,rut5xx|\
+	tenda,w306r-v2|\
+	unbranded,xdx-rn502j|\
+	upvel,ur-326n4g)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	airlive,air3gii|\
+	asus,rt-g32-b1|\
+	asus,rt-n13u|\
+	aximcom,mr-102n|\
+	buffalo,whr-g300n|\
+	dlink,dap-1350|\
+	dlink,dir-300-b1|\
+	dlink,dir-300-b7|\
+	dlink,dir-320-b1|\
+	dlink,dir-600-b1|\
+	dlink,dir-610-a1|\
+	dlink,dir-615-d|\
+	dlink,dir-620-a1|\
+	dlink,dir-620-d1|\
+	dlink,dwr-512-b|\
+	easyacc,wizard-8800|\
+	edimax,3g-6200n|\
+	fon,fonera-20n|\
+	hilink,hlk-rm04|\
+	mofinetwork,mofi3500-3gn|\
+	netcore,nw718|\
+	nexaira,bc2|\
+	nixcore,x1-16m|\
+	nixcore,x1-8m|\
+	olimex,rt5350f-olinuxino|\
+	olimex,rt5350f-olinuxino-evb|\
+	omnima,miniembplug|\
+	omnima,miniembwifi|\
+	planex,mzk-w300nh2|\
+	poray,ip2202|\
+	poray,m3|\
+	poray,m4-4m|\
+	poray,m4-8m|\
+	poray,x5|\
+	poray,x8|\
+	prolink,pwh2004|\
+	ralink,v22rw-2x2|\
+	unbranded,wr512-3gn-4m|\
+	unbranded,wr512-3gn-8m|\
+	upvel,ur-336un|\
+	zyxel,keenetic|\
+	zyxel,nbg-419n|\
+	zyxel,nbg-419n-v2)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6@eth0"
+		;;
+	alphanetworks,asl26555-8m|\
+	alphanetworks,asl26555-16m)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "6t@eth0"
+		;;
+	arcwireless,freestation5)
+		# FIXME: Which is the actual wan port?
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:wan" "2:wan" "3:wan" "4:wan" "6@eth0"
+		;;
+	asiarf,awapn2403)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:wan" "6@eth0"
+		;;
+	aximcom,mr-102n|\
+	trendnet,tew-638apb-v2)
+		ucidef_add_switch "switch0" \
+			"4:lan" "6@eth0"
+		;;
+	belkin,f5d8235-v2)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "5@eth0"
+		;;
+	dlink,dir-615-h1)
+		ucidef_add_switch "switch0" \
+			"0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "4:wan:5" "6@eth0"
+		;;
+	huawei,hg255d)
+		ucidef_add_switch "switch0" \
+			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "6@eth0"
+		;;
+	nexx,wt1520-4m|\
+	nexx,wt1520-8m)
+		ucidef_add_switch "switch0" \
+			"0:lan" "4:wan" "6@eth0"
+		;;
+	planex,mzk-dp150n|\
+	vocore,vocore-8m|\
+	vocore,vocore-16m)
+		ucidef_add_switch "switch0" \
+			"0:lan" "4:lan" "6t@eth0"
+		;;
+	sitecom,wl-351)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5@eth0"
+		;;
+	sparklan,wcr-150gn)
+		ucidef_add_switch "switch0" \
+			"0:lan" "6t@eth0"
+		;;
+	wiznet,wizfi630a)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:wan" "6@eth0"
+		;;
+	zyxel,keenetic-lite-b|\
+	zyxel,keenetic-start)
+		ucidef_add_switch "switch0" \
+			"0:lan:3" "1:lan:2" "2:lan:1" "3:lan:0" "4:wan" "6@eth0"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	7links,px-4885-4m|\
+	7links,px-4885-8m)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary devconf 0x28)" 1)
+		;;
+	8devices,carambola|\
+	alfa-network,w502u|\
+	arcwireless,freestation5|\
+	netgear,wnce2001)
+		wan_mac=$(mtd_get_mac_binary factory 0x2e)
+		;;
+	accton,wr6202|\
+	asiarf,awm002-evb-4m|\
+	asiarf,awm002-evb-8m|\
+	asus,rt-n13u|\
+	aztech,hw550-3g|\
+	fon,fonera-20n|\
+	huawei,hg255d|\
+	omnima,miniembwifi|\
+	planex,mzk-wdpr|\
+	poray,ip2202|\
+	teltonika,rut5xx|\
+	unbranded,xdx-rn502j|\
+	zyxel,keenetic|\
+	zyxel,nbg-419n|\
+	zyxel,nbg-419n-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
+		;;
+	airlive,air3gii|\
+	argus,atp-52b|\
+	asus,wl-330n3g|\
+	dlink,dir-620-d1|\
+	edimax,3g-6200n|\
+	edimax,3g-6200nl|\
+	netcore,nw718|\
+	nexx,wt1520-4m|\
+	nexx,wt1520-8m|\
+	nixcore,x1-16m|\
+	nixcore,x1-8m|\
+	omnima,miniembplug|\
+	planex,mzk-w300nh2|\
+	sitecom,wl-351|\
+	trendnet,tew-714tru)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1)
+		;;
+	asus,rt-g32-b1|\
+	asus,rt-n10-plus)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary devconf 0x4)" 1)
+		;;
+	belkin,f5d8235-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary uboot 0x40004)" 1)
+		;;
+	dlink,dir-300-b7|\
+	dlink,dir-320-b1|\
+	dlink,dir-620-a1|\
+	engenius,esr-9753|\
+	hame,mpr-a1|\
+	hauppauge,broadway|\
+	huawei,d105|\
+	hilink,hlk-rm04|\
+	nexaira,bc2|\
+	olimex,rt5350f-olinuxino|\
+	olimex,rt5350f-olinuxino-evb|\
+	petatel,psr-680w|\
+	skyline,sl-r7205)
+		lan_mac=$(macaddr_setbit_la "$(cat /sys/class/net/eth0/address)")
+		wan_mac=$(macaddr_add "$lan_mac" 1)
+		;;
+	dlink,dap-1350)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary devdata 0x2e)" 1)
+		;;
+	dlink,dir-300-b1|\
+	dlink,dir-600-b1|\
+	dlink,dir-610-a1)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary devdata 0x4004)" 1)
+		;;
+	dlink,dir-615-d)
+		label_mac=$(mtd_get_mac_binary devdata 0x4004)
+		;;
+	dlink,dir-615-h1)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
+		label_mac=$(mtd_get_mac_binary factory 0x4)
+		;;
+	dlink,dwr-512-b)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary config 0xe07e)" 1)
+		;;
+	jcg,jhr-n805r|\
+	jcg,jhr-n825r|\
+	jcg,jhr-n926r)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x2e)" 1)
+		;;
+	poray,m3|\
+	poray,m4-4m|\
+	poray,m4-8m|\
+	poray,x5|\
+	poray,x8)
+		lan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" -2)
+		;;
+	sparklan,wcr-150gn|\
+	wiznet,wizfi630a)
+		wan_mac=$(mtd_get_mac_binary factory 0x28)
+		;;
+	tenda,w306r-v2)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 5)
+		;;
+	upvel,ur-326n4g|\
+	upvel,ur-336un)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4004)" 1)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt305x/base-files/lib/preinit/04_handle_checksumming b/iopsys-ramips/rt305x/base-files/lib/preinit/04_handle_checksumming
new file mode 100644
index 0000000000000000000000000000000000000000..e2e08937a32f4de2f80e51ec1241d356c2800f53
--- /dev/null
+++ b/iopsys-ramips/rt305x/base-files/lib/preinit/04_handle_checksumming
@@ -0,0 +1,41 @@
+# Netgear WNCE2001 has does a checksum check on boot and goes into recovery
+# tftp mode when the check fails.  Initializing the JFFS2 partition triggers
+# this, so we make sure to zero checksum and size to be checksummed before
+# that happens, so this needs to run very early during boot.
+
+do_checksumming_disable() {
+	. /lib/functions.sh
+
+	local board=$(board_name)
+
+	case "$board" in
+	netgear,wnce2001)
+		echo "Board is WNCE2001, updating checksum partition..."
+		local zeroes=/dev/zero
+		local tmpfile=/tmp/wnce2001_checksum
+		local partname=checksum
+		local mtd=$(find_mtd_part $partname)
+		dd if=$mtd of=$tmpfile bs=80 count=1 2>/dev/null
+		signature=$(dd if=$tmpfile bs=1 skip=24 count=20 2>/dev/null)
+		checksum=$(dd if=$tmpfile bs=1 count=4 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"')
+		if [ "$signature" != "RT3052-AP-WNCE2001-3" ]; then
+			echo "Signature of checksum partition is wrong, bailing."
+			return 0
+		fi
+		if [ "$checksum" != "00000000" ]; then
+			echo "Checksum is set, zeroing."
+			# zero out checksum
+			dd if=$zeroes of=$tmpfile conv=notrunc bs=1 seek=0 count=4 2>/dev/null
+			# zero out bytecount to be checksummed
+			dd if=$zeroes of=$tmpfile conv=notrunc bs=1 seek=60 count=4 2>/dev/null
+			mtd write $tmpfile $partname
+		else
+			echo "Checksum is already zero, nothing to do."
+		fi
+	;;
+	esac
+
+	return 0
+}
+
+boot_hook_add preinit_main do_checksumming_disable
diff --git a/iopsys-ramips/rt305x/base-files/lib/upgrade/platform.sh b/iopsys-ramips/rt305x/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..786d57fc70432f526d98734ad778f8c7ac0ab65d
--- /dev/null
+++ b/iopsys-ramips/rt305x/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/rt305x/config-4.14 b/iopsys-ramips/rt305x/config-5.4
similarity index 79%
rename from iopsys-ramips/rt305x/config-4.14
rename to iopsys-ramips/rt305x/config-5.4
index 76e875dbe87a23ca5428bfda7c20825f3144dc78..3f93a9db88a9aab46e9cbc5950cddf873c62ccb0 100644
--- a/iopsys-ramips/rt305x/config-4.14
+++ b/iopsys-ramips/rt305x/config-5.4
@@ -1,24 +1,22 @@
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
 CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_CEVT_R4K=y
 CONFIG_CEVT_SYSTICK_QUIRK=y
@@ -29,7 +27,9 @@ CONFIG_CLONE_BACKWARDS=y
 CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
 CONFIG_CMDLINE_BOOL=y
 # CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -40,79 +40,88 @@ CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DEBUG_PINCTRL=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
+# CONFIG_DMA_RALINK is not set
 # CONFIG_DTB_RT305X_EVAL is not set
 CONFIG_DTB_RT_NONE=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_RALINK=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_HAVE_ARCH_COMPILER_H=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_COPY_THREAD_TLS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FAST_GUP=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
 CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
 CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
 CONFIG_HAVE_NET_DSA=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IRQCHIP=y
@@ -122,30 +131,28 @@ CONFIG_IRQ_INTC=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CBPF_JIT=y
 CONFIG_MIPS_CLOCK_VSYSCALL=y
 # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
 CONFIG_MODULES_USE_ELF_REL=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
@@ -155,21 +162,23 @@ CONFIG_MTD_SPLIT_SEAMA_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_MEDIATEK_ESW_RT3050=y
-CONFIG_NET_MEDIATEK_RT3050=y
-CONFIG_NET_MEDIATEK_SOC=y
-CONFIG_NET_VENDOR_MEDIATEK=y
+CONFIG_NET_RALINK_ESW_RT3050=y
+CONFIG_NET_RALINK_RT3050=y
+CONFIG_NET_RALINK_SOC=y
+CONFIG_NET_VENDOR_RALINK=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
 CONFIG_PCI_DRIVERS_LEGACY=y
+# CONFIG_PCI_MT7621 is not set
+# CONFIG_PCI_MT7621_PHY is not set
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -180,15 +189,11 @@ CONFIG_PINCTRL_RT2880=y
 CONFIG_RALINK=y
 # CONFIG_RALINK_ILL_ACC is not set
 CONFIG_RALINK_WDT=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_RT288X=y
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_SOC_MT7620 is not set
 # CONFIG_SOC_MT7621 is not set
@@ -197,6 +202,7 @@ CONFIG_SOC_RT305X=y
 # CONFIG_SOC_RT3883 is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 # CONFIG_SPI_MT7621 is not set
 CONFIG_SPI_RT2880=y
 CONFIG_SRCU=y
@@ -210,6 +216,7 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
diff --git a/iopsys-ramips/rt305x/profiles/00-default.mk b/iopsys-ramips/rt305x/profiles/00-default.mk
deleted file mode 100644
index a8ca71610c61df6400dd6bae92dc36448b4d7386..0000000000000000000000000000000000000000
--- a/iopsys-ramips/rt305x/profiles/00-default.mk
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# Copyright (C) 2011 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
-	NAME:=Default Profile
-	PRIORITY:=1
-	PACKAGES:=\
-		kmod-usb-core kmod-usb-dwc2 \
-		kmod-usb-ledtrig-usbport
-endef
-
-define Profile/Default/Description
-	Default package set compatible with most boards.
-endef
-$(eval $(call Profile,Default))
diff --git a/iopsys-ramips/rt305x/target.mk b/iopsys-ramips/rt305x/target.mk
index e36fa637b1db0c3054ce92a7fc67e1d50fd561da..27ad670ca440a73fda4a217bb9c90c502c3a3d6f 100644
--- a/iopsys-ramips/rt305x/target.mk
+++ b/iopsys-ramips/rt305x/target.mk
@@ -7,7 +7,7 @@ BOARDNAME:=RT3x5x/RT5350 based boards
 FEATURES+=usb ramdisk small_flash
 CPU_TYPE:=24kc
 
-DEFAULT_PACKAGES += kmod-rt2800-soc wpad-mini
+DEFAULT_PACKAGES += kmod-rt2800-soc wpad-basic-wolfssl swconfig
 
 define Target/Description
 	Build firmware images for Ralink RT3x5x/RT5350 based boards.
diff --git a/iopsys-ramips/rt3883/base-files/etc/board.d/01_leds b/iopsys-ramips/rt3883/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000000000000000000000000000000000..6e8497aff6d3707586d7da1da19b2c9b9058005b
--- /dev/null
+++ b/iopsys-ramips/rt3883/base-files/etc/board.d/01_leds
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+belkin,f9k1109v1)
+	ucidef_set_led_netdev "lan" "lan" "blue:wps" "eth0"
+	;;
+edimax,br-6475nd)
+	ucidef_set_led_netdev "wifi_led" "wifi" "amber:wlan" "wlan0"
+	;;
+omnima,hpm)
+	ucidef_set_led_netdev "eth" "ETH" "green:eth" "eth0"
+	ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt3883/base-files/etc/board.d/02_network b/iopsys-ramips/rt3883/base-files/etc/board.d/02_network
new file mode 100755
index 0000000000000000000000000000000000000000..f26199611ed705a8f5b697d82e9e2752e27c66f4
--- /dev/null
+++ b/iopsys-ramips/rt3883/base-files/etc/board.d/02_network
@@ -0,0 +1,102 @@
+#!/bin/sh
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+ramips_setup_interfaces()
+{
+	local board="$1"
+
+	case $board in
+	asus,rt-n56u)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "8@eth0"
+		;;
+	belkin,f9k1109v1)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5@eth0"
+		;;
+	dlink,dir-645)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
+		;;
+	edimax,br-6475nd)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9@eth0"
+		;;
+	engenius,esr600h|\
+	sitecom,wlr-6000|\
+	trendnet,tew-691gr|\
+	trendnet,tew-692gr)
+		ucidef_add_switch "switch0" \
+			"1:lan" "2:lan" "3:lan" "4:lan" "5:wan" "0@eth0"
+		;;
+	loewe,wmdr-143n|\
+	omnima,hpm)
+		ucidef_set_interface_lan "eth0"
+		;;
+	samsung,cy-swr1100)
+		ucidef_add_switch "switch0" \
+			"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "9@eth0"
+		;;
+	esac
+}
+
+ramips_setup_macs()
+{
+	local board="$1"
+	local lan_mac=""
+	local wan_mac=""
+	local label_mac=""
+
+	case $board in
+	asus,rt-n56u)
+		lan_mac=$(macaddr_setbit_la "$(cat /sys/class/net/eth0/address)")
+		wan_mac=$(mtd_get_mac_binary factory 0x8004)
+		;;
+	belkin,f9k1109v1)
+		wan_mac=$(mtd_get_mac_ascii uboot-env HW_WAN_MAC)
+		lan_mac=$(mtd_get_mac_ascii uboot-env HW_LAN_MAC)
+		label_mac=$wan_mac
+		;;
+	dlink,dir-645)
+		lan_mac=$(mtd_get_mac_ascii nvram lanmac)
+		wan_mac=$(mtd_get_mac_ascii nvram wanmac)
+		;;
+	edimax,br-6475nd)
+		wan_mac=$(mtd_get_mac_binary devdata 0x7)
+		;;
+	engenius,esr600h)
+		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
+		lan_mac=$(macaddr_add "$wan_mac" 1)
+		label_mac=$wan_mac
+		;;
+	samsung,cy-swr1100)
+		lan_mac=$(mtd_get_mac_ascii nvram lanmac)
+		wan_mac=$(mtd_get_mac_ascii nvram wanmac)
+		label_mac=$wan_mac
+		;;
+	sitecom,wlr-6000)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x8004)" 2)
+		;;
+	trendnet,tew-691gr)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 3)
+		;;
+	trendnet,tew-692gr)
+		wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1)
+		;;
+	esac
+
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
+}
+
+board_config_update
+board=$(board_name)
+ramips_setup_interfaces $board
+ramips_setup_macs $board
+board_config_flush
+
+exit 0
diff --git a/iopsys-ramips/rt3883/base-files/lib/preinit/04_handle_checksumming b/iopsys-ramips/rt3883/base-files/lib/preinit/04_handle_checksumming
new file mode 100644
index 0000000000000000000000000000000000000000..62927ff974f754974f8c4cd36eba6b0671f620cb
--- /dev/null
+++ b/iopsys-ramips/rt3883/base-files/lib/preinit/04_handle_checksumming
@@ -0,0 +1,30 @@
+# Netgear WNCE2001 has does a checksum check on boot and goes into recovery
+# tftp mode when the check fails.  Initializing the JFFS2 partition triggers
+# this, so we make sure to zero checksum and size to be checksummed before
+# that happens, so this needs to run very early during boot.
+
+do_checksumming_disable() {
+	. /lib/functions.sh
+
+	local board=$(board_name)
+
+	case "$board" in
+	asus,rt-n56u)
+		echo "Board is ASUS RT-N56U, replacing uImage header..."
+		local firmware_mtd=$(find_mtd_part firmware)
+		local rootfs_mtd=$(find_mtd_part rootfs)
+		local rootfs_data_mtd=$(find_mtd_part rootfs_data)
+		local rootfs_len=$(grep \"rootfs\" /proc/mtd | awk -F' ' '{print "0x"$2}')
+		local rootfs_data_len=$(grep \"rootfs_data\" /proc/mtd | awk -F' ' '{print "0x"$2}')
+		local offset=$(echo "$rootfs_len $rootfs_data_len 0x40" | awk -F' ' '{printf "%i",$1-$2-$3}')
+		local signature=$(dd if=$rootfs_mtd skip=$offset bs=1 count=4 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"')
+		if [ "$signature" = "27051956" ]; then
+			dd conv=notrunc if=$rootfs_mtd skip=$offset of=$firmware_mtd bs=1 count=64 2>/dev/null
+		fi
+	;;
+	esac
+
+	return 0
+}
+
+boot_hook_add preinit_main do_checksumming_disable
diff --git a/iopsys-ramips/rt3883/base-files/lib/upgrade/platform.sh b/iopsys-ramips/rt3883/base-files/lib/upgrade/platform.sh
new file mode 100755
index 0000000000000000000000000000000000000000..786d57fc70432f526d98734ad778f8c7ac0ab65d
--- /dev/null
+++ b/iopsys-ramips/rt3883/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+
+PART_NAME=firmware
+REQUIRE_IMAGE_METADATA=1
+
+platform_check_image() {
+	return 0
+}
+
+platform_do_upgrade() {
+	local board=$(board_name)
+
+	case "$board" in
+	*)
+		default_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/iopsys-ramips/rt3883/config-4.14 b/iopsys-ramips/rt3883/config-5.4
similarity index 77%
rename from iopsys-ramips/rt3883/config-4.14
rename to iopsys-ramips/rt3883/config-5.4
index 4583ec534f564b7bbae1b07b844adce072dbf971..09d51fdbdd699a4a78a25bbb42ea330ffdde9f0c 100644
--- a/iopsys-ramips/rt3883/config-4.14
+++ b/iopsys-ramips/rt3883/config-5.4
@@ -1,35 +1,34 @@
 CONFIG_AR8216_PHY=y
-CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
 CONFIG_ARCH_MMAP_RND_BITS_MAX=15
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
 CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
 CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_CEVT_R4K=y
-# CONFIG_CEVT_SYSTICK_QUIRK is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
 CONFIG_CMDLINE_BOOL=y
 # CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_LOAD_STORE_LR=y
 CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_CPU_HAS_RIXI=y
 CONFIG_CPU_HAS_SYNC=y
@@ -40,81 +39,90 @@ CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CSRC_R4K=y
 CONFIG_DEBUG_PINCTRL=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
+# CONFIG_DMA_RALINK is not set
 # CONFIG_DTB_RT3883_EVAL is not set
 CONFIG_DTB_RT_NONE=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
+CONFIG_EFI_EARLYCON=y
 CONFIG_ETHERNET_PACKET_MANGLE=y
 CONFIG_FIXED_PHY=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_RALINK=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_HAVE_ARCH_COMPILER_H=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_COPY_THREAD_TLS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FAST_GUP=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_KVM=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
 CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
 CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
 CONFIG_HAVE_NET_DSA=y
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
+CONFIG_HZ=250
+CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IRQCHIP=y
@@ -124,30 +132,28 @@ CONFIG_IRQ_INTC=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CBPF_JIT=y
 CONFIG_MIPS_CLOCK_VSYSCALL=y
 # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 # CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
 CONFIG_MODULES_USE_ELF_REL=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
@@ -156,27 +162,26 @@ CONFIG_MTD_SPLIT_SEAMA_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_MEDIATEK_MDIO=y
-CONFIG_NET_MEDIATEK_MDIO_RT2880=y
-CONFIG_NET_MEDIATEK_RT3883=y
-CONFIG_NET_MEDIATEK_SOC=y
-CONFIG_NET_VENDOR_MEDIATEK=y
+CONFIG_NET_RALINK_MDIO=y
+CONFIG_NET_RALINK_MDIO_RT2880=y
+CONFIG_NET_RALINK_RT3883=y
+CONFIG_NET_RALINK_SOC=y
+CONFIG_NET_VENDOR_RALINK=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
 CONFIG_OF_EARLY_FLATTREE=y
 CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DRIVERS_LEGACY=y
+# CONFIG_PCI_MT7621 is not set
+# CONFIG_PCI_MT7621_PHY is not set
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -186,18 +191,14 @@ CONFIG_PINCTRL_RT2880=y
 # CONFIG_PINCTRL_SINGLE is not set
 CONFIG_RALINK=y
 CONFIG_RALINK_WDT=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RTL8366_SMI=y
 CONFIG_RTL8367B_PHY=y
 CONFIG_RTL8367_PHY=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_FSL is not set
 CONFIG_SERIAL_8250_RT288X=y
+CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_SOC_MT7620 is not set
 # CONFIG_SOC_MT7621 is not set
@@ -206,6 +207,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SOC_RT3883=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
 # CONFIG_SPI_MT7621 is not set
 CONFIG_SPI_RT2880=y
 CONFIG_SRCU=y
@@ -219,6 +221,7 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TINY_SRCU=y
 CONFIG_USB_SUPPORT=y
diff --git a/iopsys-ramips/rt3883/profiles/00-default.mk b/iopsys-ramips/rt3883/profiles/00-default.mk
deleted file mode 100644
index c99029d7b17c6ecfee33c7f293a29f28ced48dd4..0000000000000000000000000000000000000000
--- a/iopsys-ramips/rt3883/profiles/00-default.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (C) 2012 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
-	NAME:=Default Profile
-	PRIORITY:=1
-	PACKAGES:=kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
-endef
-
-define Profile/Default/Description
-	Default package set compatible with most boards.
-endef
-$(eval $(call Profile,Default))
diff --git a/iopsys-ramips/rt3883/target.mk b/iopsys-ramips/rt3883/target.mk
index 2cc19858e49a9a63405e87c8916ddbaf65dbe252..ff878a0a597bea570227f729c83e63be5d6f5db6 100644
--- a/iopsys-ramips/rt3883/target.mk
+++ b/iopsys-ramips/rt3883/target.mk
@@ -7,7 +7,7 @@ BOARDNAME:=RT3662/RT3883 based boards
 FEATURES+=usb pci small_flash
 CPU_TYPE:=74kc
 
-DEFAULT_PACKAGES += kmod-rt2800-pci kmod-rt2800-soc wpad-mini
+DEFAULT_PACKAGES += kmod-rt2800-pci kmod-rt2800-soc wpad-basic-wolfssl swconfig
 
 define Target/Description
 	Build firmware images for Ralink RT3662/RT3883 based boards.