diff --git a/drivers/spi/spi-cadence-qspi-apb.c b/drivers/spi/spi-cadence-qspi-apb.c index 46c50918bb5a3ee1576760915cf3a638f29a532f..876268ebde0d680d08342e04bcb579d0bac45a01 100644 --- a/drivers/spi/spi-cadence-qspi-apb.c +++ b/drivers/spi/spi-cadence-qspi-apb.c @@ -426,7 +426,8 @@ static int cadence_qspi_apb_command_write(void *reg_base, { unsigned int reg; unsigned int addr_value; - unsigned int data; + unsigned int data = 0; + int i; debug_print("%s txlen %d txbuf[0]=0x%x\n", __func__, txlen, txbuf[0]); #ifdef DEBUG @@ -446,7 +447,9 @@ static int cadence_qspi_apb_command_write(void *reg_base, reg |= (0x1 << CQSPI_REG_CMDCTRL_WR_EN_LSB); reg |= ((datalen - 1) & CQSPI_REG_CMDCTRL_WR_BYTES_MASK) << CQSPI_REG_CMDCTRL_WR_BYTES_LSB; - memcpy(&data, &databuf[0], datalen); + for (i = 0; i < datalen; i++) + data |= databuf[i] << (8 * i); + /* Write the data */ CQSPI_WRITEL(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER); @@ -456,12 +459,18 @@ static int cadence_qspi_apb_command_write(void *reg_base, reg |= (0x1 << CQSPI_REG_CMDCTRL_WR_EN_LSB); reg |= ((datalen - 1) & CQSPI_REG_CMDCTRL_WR_BYTES_MASK) << CQSPI_REG_CMDCTRL_WR_BYTES_LSB; - memcpy(&data, &databuf[0], 4); + for (i = 0; i < 4; i++) + data |= databuf[i] << (8 * i); + /* Write the data */ CQSPI_WRITEL(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER); debug_print("[%s] CQSPI_REG_CMDWRITEDATALOWER=0x%x\n", __func__, data); - memcpy(&data, &databuf[4], datalen - 4); + + data = 0; + for (i = 0; i < datalen - 4; i++) + data |= databuf[i + 4] << (8 * i); + /* Write the data */ CQSPI_WRITEL(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER); @@ -598,6 +607,7 @@ static int cadence_qspi_apb_indirect_read_execute( void *ahb_base = cadence_qspi->qspi_ahb_virt; int remaining = (int)rxlen; int ret = 0; + unsigned char *buf = rxbuf; debug_print("%s rxlen %d rxbuf %p\n", __func__, rxlen, rxbuf); CQSPI_WRITEL(0, reg_base + CQSPI_REG_INDIRECTRDWATERMARK); @@ -627,8 +637,9 @@ static int cadence_qspi_apb_indirect_read_execute( reg *= CQSPI_FIFO_WIDTH; reg = reg > remaining ? remaining : reg; /* Read data from FIFO. */ - cadence_qspi_apb_read_fifo_data(rxbuf, ahb_base, reg, flash_type); - rxbuf += reg; + cadence_qspi_apb_read_fifo_data(buf, ahb_base, reg, + flash_type); + buf += reg; remaining -= reg; #if 0 } else { @@ -653,8 +664,10 @@ static int cadence_qspi_apb_indirect_read_execute( reg *= CQSPI_FIFO_WIDTH; reg = reg > remaining ? remaining : reg; /* Read data from FIFO. */ - cadence_qspi_apb_read_fifo_data(rxbuf, ahb_base, reg, flash_type); - rxbuf += reg; + cadence_qspi_apb_read_fifo_data(buf, ahb_base, + reg, + flash_type); + buf += reg; remaining -= reg; } }