From f4b65517e4d7b1b4fae3f692efe5ebba24e0ed12 Mon Sep 17 00:00:00 2001
From: "Wu, Qiming" <qi-ming.wu@intel.com>
Date: Mon, 12 Feb 2018 08:40:36 +0100
Subject: [PATCH] Merge pull request #217 in SW_PON/linux from
feature/DRVLIB_SW-532-crypto-acceleration-driver-support to xrx500
* commit 'edfbe6685e9187fd437fd60ea12118bcc0026a5b':
JIRA: DRVLIB_SW-532 - Linux 4.9 EIP97 driver support for GRX500
---
drivers/crypto/Kconfig | 35 +++++++++++++
drivers/crypto/Makefile | 1 +
drivers/crypto/lantiq_eip97/Makefile | 77 ++++++++++++++++++++++++++++
3 files changed, 113 insertions(+)
create mode 100644 drivers/crypto/lantiq_eip97/Makefile
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 93df82986..cd7958c1c 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -562,4 +562,39 @@ config CRYPTO_DEV_LANTIQ_EIP123
help
Selects Hardware accelerated EIP123 crypto drivers.
+config CRYPTO_DEV_LANTIQ_EIP97
+ tristate "Support Lantiq EIP97 hardware crypto engine"
+ depends on LANTIQ && SOC_GRX500
+ select CRYPTO_AUTHENC
+ select CRYPTO_SHA1
+ select CRYPTO_SHA256
+ select CRYPTO_SHA512
+ select CRYPTO_MD5
+ select CRYPTO_AES
+ select CRYPTO_DES
+ select CRYPTO_MANAGER_DISABLE_TESTS
+ default n
+ help
+ Selects Hardware accelerated EIP97 crypto drivers.
+
+config LTQ_CRYPTO_TEST
+ tristate "Lantiq Crypto Test"
+ depends on m && CRYPTO_DEV_LANTIQ_EIP97
+ help
+ Test suites for the hw crypto algs
+
+config LTQ_MPE_IPSEC_SUPPORT
+ bool
+ depends on LTQ_PPA_MPE_IP97
+ default y
+
+config LTQ_CRYPTO_MAX_RING_USED
+ int "Maximum number of ring used in the driver"
+ depends on CRYPTO_DEV_LANTIQ_EIP97
+ default "4" if LTQ_MPE_IPSEC_SUPPORT
+ default "2"
+ help
+ Number of rings used in the driver. By default, the driver supports up to
+ two rings. However, if MPE firmware is used, we only use 1 ring in the driver
+
endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index b08f259d1..f78abb7bf 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
obj-$(CONFIG_CRYPTO_DEV_CHELSIO) += chelsio/
obj-$(CONFIG_CRYPTO_DEV_LANTIQ_EIP123) += lantiq_eip123/
+obj-$(CONFIG_CRYPTO_DEV_LANTIQ_EIP97) += lantiq_eip97/
diff --git a/drivers/crypto/lantiq_eip97/Makefile b/drivers/crypto/lantiq_eip97/Makefile
new file mode 100644
index 000000000..e19128ffb
--- /dev/null
+++ b/drivers/crypto/lantiq_eip97/Makefile
@@ -0,0 +1,77 @@
+SRC := Sources
+SRC_APP := $(SRC)/Adapter
+SRC_DRV_FWK := $(SRC)/DriverFramework
+SRC_EIP201 := $(SRC)/EIP201
+SRC_GLB_CTRL := $(SRC)/EIP97/GlobalControl
+SRC_RING_CTRL := $(SRC)/EIP97/RingControl
+SRC_LOG := $(SRC)/Log
+SRC_RINGHELPER := $(SRC)/RingHelper
+SRC_SABUILDER := $(SRC)/SABuilder
+SRC_TOKENBUILDER := $(SRC)/TokenBuilder
+INCL_FILES := $(SRC)/incl
+
+ccflags-y := -I$(src)/$(INCL_FILES)
+ccflags-y += -I$(src)/$(SRC_DRV_FWK) -I$(src)/$(SRC_EIP201) -I$(src)/$(SRC_GLB_CTRL) -I$(src)/$(SRC_RING_CTRL)
+ccflags-y += -I$(src)/$(SRC_RINGHELPER) -I$(src)/$(SRC_SABUILDER) -I$(src)/$(SRC_TOKENBUILDER) -I$(src)/$(SRC_LOG)
+
+ltq_crypto-y += $(SRC_APP)/adapter_global_control_init.o
+ltq_crypto-y += $(SRC_APP)/adapter_init.o
+ltq_crypto-y += $(SRC_APP)/adapter_dmabuf.o
+ltq_crypto-y += $(SRC_APP)/adapter_driver97_init.o
+ltq_crypto-y += $(SRC_APP)/adapter_global_eip97.o
+ltq_crypto-y += $(SRC_APP)/adapter_global_init.o
+ltq_crypto-y += $(SRC_APP)/adapter_interrupts.o
+ltq_crypto-y += $(SRC_APP)/adapter_pec_dma.o
+ltq_crypto-y += $(SRC_APP)/adapter_ring_eip202.o
+ltq_crypto-y += $(SRC_APP)/adapter_sglist.o
+ltq_crypto-y += $(SRC_APP)/adapter_sleep.o
+ltq_crypto-y += $(SRC_APP)/adapter_lock.o
+ltq_crypto-y += $(SRC_APP)/adapter_lock_internal.o
+
+ltq_crypto-y += $(SRC_DRV_FWK)/dmares_gen.o
+ltq_crypto-y += $(SRC_DRV_FWK)/dmares_lkm.o
+
+ltq_crypto-y += $(SRC_EIP201)/eip201.o
+
+ltq_crypto-y += $(SRC_GLB_CTRL)/eip97_global_event.o
+ltq_crypto-y += $(SRC_GLB_CTRL)/eip97_global_fsm.o
+ltq_crypto-y += $(SRC_GLB_CTRL)/eip97_global_init.o
+ltq_crypto-y += $(SRC_GLB_CTRL)/eip97_global_prng.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_cd_format.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_cdr_dscr.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_cdr_event.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_cdr_fsm.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_cdr_init.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_rd_format.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_rdr_dscr.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_rdr_event.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_rdr_fsm.o
+ltq_crypto-y += $(SRC_RING_CTRL)/eip202_rdr_init.o
+
+ltq_crypto-y += $(SRC_LOG)/log.o
+
+ltq_crypto-y += $(SRC_RINGHELPER)/ringhelper.o
+
+ltq_crypto-y += $(SRC_SABUILDER)/sa_builder.o
+ltq_crypto-y += $(SRC_SABUILDER)/sa_builder_basic.o
+ltq_crypto-y += $(SRC_SABUILDER)/sa_builder_ipsec.o
+ltq_crypto-y += $(SRC_SABUILDER)/sa_builder_srtp.o
+ltq_crypto-y += $(SRC_SABUILDER)/sa_builder_ssltls.o
+
+ltq_crypto-y += $(SRC_TOKENBUILDER)/token_builder_context.o
+ltq_crypto-y += $(SRC_TOKENBUILDER)/token_builder_core.o
+
+# Driver glue layer
+ltq_crypto-y += $(SRC)/device_lkm_ltq.o
+# Driver interface to crypto API
+ltq_crypto-y += $(SRC)/ltq_crypto_core.o
+ifeq ($(CONFIG_LTQ_MPE_IPSEC_SUPPORT), y)
+# Driver interface to IPsec fast-path (TPT layer acceleration)
+ltq_crypto-y += $(SRC)/ltq_ipsec_api.o
+endif
+obj-$(CONFIG_CRYPTO_DEV_LANTIQ_EIP97) += ltq_crypto.o
+obj-$(CONFIG_LTQ_CRYPTO_TEST) += $(SRC)/ltq_module_test.o
+ifeq ($(CONFIG_LTQ_MPE_IPSEC_SUPPORT), y)
+obj-$(CONFIG_LTQ_CRYPTO_TEST) += $(SRC)/ltq_ipsec_api_test.o
+obj-$(CONFIG_LTQ_CRYPTO_TEST) += $(SRC)/ltq_submit_one.o
+endif
--
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