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Commit 61162676 authored by Gabor Juhos's avatar Gabor Juhos Committed by Oussama Ghorbel
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debloat: add kernel config option to disabling common PCI quirks


Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
parent f86dc74c
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......@@ -71,6 +71,12 @@ config XEN_PCIDEV_FRONTEND
The PCI device frontend driver allows the kernel to import arbitrary
PCI devices from a PCI backend to support PCI driver domains.
config PCI_DISABLE_COMMON_QUIRKS
bool "PCI disable common quirks"
depends on PCI
help
If you don't know what to do here, say N.
config HT_IRQ
bool "Interrupts on hypertransport devices"
default y
......
......@@ -41,6 +41,7 @@ static void quirk_mmio_always_on(struct pci_dev *dev)
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
/* The Mellanox Tavor device gives false positive parity errors
* Mark this device with a broken_parity_status, to allow
* PCI scanning code to "skip" this now blacklisted device.
......@@ -3038,6 +3039,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f8, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. To
......@@ -3094,6 +3096,8 @@ static void fixup_debug_report(struct pci_dev *dev, ktime_t calltime,
}
}
#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled,
* even though no one is handling them (f.e. i915 driver is never loaded).
......@@ -3128,6 +3132,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
/*
* PCI devices which are on Intel chips can skip the 10ms delay
* before entering D3 mode.
......
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