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Commit 7957712b authored by leichuan's avatar leichuan Committed by Kenneth Johansson
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gptc checkpatch strict option parsing

parent cbcde88b
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/*******************************************************************************
*
* Copyright(c) 2017 Intel Corporation.
/*
* Copyright(C) 2017 Intel Corporation.
* Lei Chuanhua <chuanhua.lei@intel.com>
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -11,14 +10,9 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* The full GNU General Public License is included in this distribution in
* the file called "COPYING".
*
******************************************************************************/
*/
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
......@@ -101,7 +95,7 @@ struct gptc {
struct clk *freqclk;
struct clk *gateclk;
u32 fpifreq;
spinlock_t lock;
spinlock_t lock; /* Shared register access */
struct list_head parent; /* Timers belonging to itsef */
struct list_head next; /* Link to next GPTC */
struct kref ref;
......@@ -174,7 +168,7 @@ static inline u32 gptc_readl(struct gptc_timer *timer, u32 offs)
}
static inline void gptc_writel(struct gptc_timer *timer, unsigned long val,
u32 offs)
u32 offs)
{
iowrite32(val, timer->base + offs);
}
......@@ -190,7 +184,7 @@ static inline void gptc_stop_counter(struct gptc_timer *timer)
}
static inline void gptc_reload_counter(struct gptc_timer *timer,
unsigned long cycles)
unsigned long cycles)
{
gptc_writel(timer, cycles, GPTC_RLD(timer->tid));
}
......@@ -301,7 +295,7 @@ static irqreturn_t gptc_timer_interrupt(int irq, void *data)
}
static int gptc_clkevt_next_event(unsigned long cycles,
struct clock_event_device *evt)
struct clock_event_device *evt)
{
struct gptc_timer *timer = clkevt_to_gptc_timer(evt);
......@@ -368,7 +362,6 @@ static void gptc_per_timer_init(struct gptc_timer *timer)
static const char *const timer_type_to_str(u32 type)
{
switch (type) {
case TIMER_TYPE_CLK_SRC:
return "src";
......@@ -390,9 +383,9 @@ static void gptc_of_config_print(struct gptc *gptc)
pr_debug("GPTC%d timer list info\n", gptc->id);
list_for_each_entry(timer, &gptc->parent, child) {
pr_debug("timer%d base %p gptcid %d freq %d tid %d cpuid %d irq %d clk %s\n",
i, timer->base, timer->gptcid, timer->frequency,
timer->tid, timer->cpuid, timer->irq,
timer_type_to_str(timer->type));
i, timer->base, timer->gptcid, timer->frequency,
timer->tid, timer->cpuid, timer->irq,
timer_type_to_str(timer->type));
i++;
}
}
......@@ -404,15 +397,15 @@ static int gptc_clock_init(struct gptc *gptc)
gptc->gateclk = of_clk_get_by_name(np, "gptc");
if (IS_ERR_OR_NULL(gptc->gateclk)) {
pr_err("Failed to get gptc gate clk: %ld\n",
PTR_ERR(gptc->gateclk));
return gptc->gateclk ? PTR_ERR(gptc->gateclk) : -ENODEV;
PTR_ERR(gptc->gateclk));
return gptc->gateclk ? PTR_ERR(gptc->gateclk) : -ENODEV;
}
gptc->freqclk = of_clk_get_by_name(np, "freq");
if (IS_ERR_OR_NULL(gptc->freqclk)) {
pr_err("Failed to get gptc frequency clk: %ld\n",
PTR_ERR(gptc->freqclk));
return gptc->freqclk ? PTR_ERR(gptc->freqclk) : -ENODEV;
PTR_ERR(gptc->freqclk));
return gptc->freqclk ? PTR_ERR(gptc->freqclk) : -ENODEV;
}
return 0;
}
......@@ -428,7 +421,7 @@ static int gptc_clock_enable(struct gptc *gptc)
int ret;
if (IS_ERR_OR_NULL(gptc->gateclk) ||
IS_ERR_OR_NULL(gptc->freqclk)) {
IS_ERR_OR_NULL(gptc->freqclk)) {
pr_err("%s clock(s) is/are not initialized\n", __func__);
ret = -EIO;
goto out;
......@@ -497,23 +490,22 @@ static int gptc_of_parse_timer(struct gptc *gptc)
u32 cpuid;
struct device_node *np = gptc->np;
nr_timers = of_count_phandle_with_args(np, "intel,clk",
"#gptc-cells");
nr_timers = of_count_phandle_with_args(np, "intel,clk", "#gptc-cells");
if (nr_timers <= 0) {
pr_err("gptc%d: invalid value of phandler property at %s\n",
gptc->id, np->full_name);
gptc->id, np->full_name);
return -ENODEV;
}
pr_debug("%s nr_timers %d available\n", __func__, nr_timers);
for (index = 0; index < nr_timers; index++) {
ret = of_parse_phandle_with_args(np, "intel,clk",
"#gptc-cells", index, &clkspec);
ret = of_parse_phandle_with_args(np, "intel,clk", "#gptc-cells",
index, &clkspec);
if (ret < 0)
return ret;
pr_debug("%s args_count %d arg[0] %d arg[1] %d arg[2] %d\n",
__func__, clkspec.args_count, clkspec.args[0],
clkspec.args[1], clkspec.args[2]);
__func__, clkspec.args_count, clkspec.args[0],
clkspec.args[1], clkspec.args[2]);
if (clkspec.args_count != 3) {
pr_err("%s: invalid gptc clk property\n", __func__);
......@@ -527,7 +519,7 @@ static int gptc_of_parse_timer(struct gptc *gptc)
/* Ignore CPU id check */
if (type > TIMER_TYPE_MAX || tid > (TIMER_PER_GPTC - 1)) {
pr_err("%s invalid clk type %d or timer id %d\n",
__func__, type, tid);
__func__, type, tid);
return -EINVAL;
}
......@@ -556,13 +548,13 @@ static int gptc_of_parse_timer(struct gptc *gptc)
case TIMER_TYPE_CLK_EVT:
case TIMER_TYPE_WDT:
timer->irq = irq_of_parse_and_map(np, timer->tid);
WARN_ON(timer->irq < 0);
WARN_ON(timer->irq <= 0);
timer->dir = GPTC_COUNT_DOWN;
timer->cpuid = cpuid;
if (type == TIMER_TYPE_CLK_EVT) {
INIT_LIST_HEAD(&timer->clkevt);
list_add_tail(&timer->clkevt,
&gptc_clkevt_list);
&gptc_clkevt_list);
} else {
INIT_LIST_HEAD(&timer->wdt);
list_add_tail(&timer->wdt, &gptc_wdt_list);
......@@ -711,12 +703,12 @@ static int gptc_clocksource_init(void)
250 + timer->frequency / 10000000;
gptc_per_timer_init(timer);
ret = clocksource_register_hz(&gptc_clksrc.cs,
timer->frequency);
timer->frequency);
if (ret < 0)
pr_warn("GPTC: Unable to register clocksource\n");
#ifndef CONFIG_X86
sched_clock_register(gptc_read_sched_clock,
32, timer->frequency);
32, timer->frequency);
#endif /* CONFIG_X86 */
#ifdef CONFIG_GPTC_SCHED_CLOCK
......@@ -726,7 +718,7 @@ static int gptc_clocksource_init(void)
gptc_clksrc_init = true;
gptc_get(timer->gptc);
pr_debug("gptc %d timer %d clk src register @cpu%d\n",
timer->gptcid, timer->tid, timer->cpuid);
timer->gptcid, timer->tid, timer->cpuid);
return 0;
}
}
......@@ -746,7 +738,7 @@ static struct clock_event_device gptc_per_timer_clockevent = {
};
static int gptc_clockevent_cpu_init(unsigned int cpu,
struct gptc_clockevent *cd)
struct gptc_clockevent *cd)
{
int ret;
struct gptc_timer *timer;
......@@ -768,25 +760,26 @@ static int gptc_clockevent_cpu_init(unsigned int cpu,
levt->irq = timer->irq;
levt->cpumask = cpumask_of(cpu);
snprintf(gptc_clkevt->name, sizeof(gptc_clkevt->name),
"gptc_event%d", cpu);
"gptc_event%d", cpu);
levt->name = gptc_clkevt->name;
gptc_per_timer_init(timer);
ret = request_irq(levt->irq, gptc_timer_interrupt,
IRQF_TIMER, gptc_clkevt->name, gptc_clkevt);
IRQF_TIMER, gptc_clkevt->name,
gptc_clkevt);
if (ret) {
pr_err("gptc clkevt register failed @cpu%d\n",
cpu);
cpu);
return ret;
}
irq_set_affinity(levt->irq, cpumask_of(cpu));
clockevents_config_and_register(levt,
timer->frequency, 0x64, 0x7FFFFFFF);
clockevents_config_and_register(levt, timer->frequency,
0x64, 0x7FFFFFFF);
gptc_irq_unmask(timer);
gptc_get(timer->gptc);
timer->used = true;
pr_debug("gptc %d timer %d clk evt register @cpu%d\n",
timer->gptcid, timer->tid, timer->cpuid);
timer->gptcid, timer->tid, timer->cpuid);
return 0;
}
}
......@@ -836,8 +829,8 @@ static int gptc_dying_cpu(unsigned int cpu)
static void gptc_clkevent_init(void)
{
cpuhp_setup_state(CPUHP_AP_INTEL_GPTC_TIMER_STARTING,
"AP_INTEL_GPTC_TIMER_STARTING", gptc_starting_cpu,
gptc_dying_cpu);
"AP_INTEL_GPTC_TIMER_STARTING", gptc_starting_cpu,
gptc_dying_cpu);
}
static int __init gptc_timer_init(struct device_node *np)
......@@ -853,6 +846,7 @@ static int __init gptc_timer_init(struct device_node *np)
#endif
return 0;
}
CLOCKSOURCE_OF_DECLARE(lantiq_gptc_timer, "lantiq,gptc", gptc_timer_init);
CLOCKSOURCE_OF_DECLARE(intel_gptc_timer, "intel,gptc", gptc_timer_init);
......@@ -871,7 +865,6 @@ static void *gptc_seq_next(struct seq_file *s, void *v, loff_t *pos)
static void gptc_seq_stop(struct seq_file *s, void *v)
{
}
static int gptc_seq_show(struct seq_file *s, void *v)
......@@ -883,29 +876,28 @@ static int gptc_seq_show(struct seq_file *s, void *v)
gptc = list_entry(v, struct gptc, next);
seq_printf(s, "GPTC%d base %p phy %lx freq %d ref %d\n",
gptc->id, gptc->base, gptc->phy_base, gptc->fpifreq,
atomic_read(&gptc->ref.refcount));
gptc->id, gptc->base, gptc->phy_base, gptc->fpifreq,
atomic_read(&gptc->ref.refcount));
seq_printf(s, "CLC %08x ID %08x IRNEN %08x IRNICR %08x IRNCR %08x\n",
ioread32(gptc->base + GPTC_CLC),
ioread32(gptc->base + GPTC_ID),
ioread32(gptc->base + GPTC_IRNEN),
ioread32(gptc->base + GPTC_IRNICR),
ioread32(gptc->base + GPTC_IRNCR));
ioread32(gptc->base + GPTC_CLC),
ioread32(gptc->base + GPTC_ID),
ioread32(gptc->base + GPTC_IRNEN),
ioread32(gptc->base + GPTC_IRNICR),
ioread32(gptc->base + GPTC_IRNCR));
list_for_each_entry(timer, &gptc->parent, child) {
seq_printf(s, "\ttimer%d base %p freq %d tid %d cpuid %d irq %d clk %s %s\n",
i, timer->base, timer->frequency, timer->tid,
timer->cpuid, timer->irq,
timer_type_to_str(timer->type),
timer->used ? "used" : "unused");
i, timer->base, timer->frequency, timer->tid,
timer->cpuid, timer->irq,
timer_type_to_str(timer->type),
timer->used ? "used" : "unused");
seq_printf(s, "\tCON %08x RUN %08x RLD %08x CNT %08x\n",
gptc_readl(timer, GPTC_CON(i)),
gptc_readl(timer, GPTC_RUN(i)),
gptc_readl(timer, GPTC_RLD(i)),
gptc_readl(timer, GPTC_CNT(i)));
gptc_readl(timer, GPTC_CON(i)),
gptc_readl(timer, GPTC_RUN(i)),
gptc_readl(timer, GPTC_RLD(i)),
gptc_readl(timer, GPTC_CNT(i)));
i++;
}
seq_putc(s, '\n');
return 0;
}
......
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